Commit Graph

9 Commits

Author SHA1 Message Date
Daniel Agar
dc10a68539 NuttX and apps update 7.29 2019-07-10 12:58:35 -04:00
Daniel Agar
bef7a9ba8e NuttX boards increase task limit 32 -> 64 (#12230) 2019-06-10 09:42:36 -04:00
David Sidrane
1c212e3f84 M7 dcache ctrl via a parameter (#11769)
* Support for armv7-m_dcache control via parameter

  The FORCE_F7_DCACHE parameter can be set to
   0 - (default) if Eratta exits turn dcache off else leave it on
   1 -  Force it off
   2 -  Force it on

   At boot the system will disable the d-cache if the silicon
   has the 1259864 Data corruption in a sequence of Write-Through
   stores and loads eratta.

   Post nsh script execution the FORCE_F7_DCACHE paramater
   will be used to set the d-cache to the state indicated
   above.
2019-04-03 16:14:19 -04:00
Daniel Agar
f6cd70bcc5 px4_fmu-v5 nsh compress defconfig 2019-03-21 08:41:01 -04:00
David Sidrane
edd9f91a19 board:Set larger stack margin 2019-03-01 23:45:48 -05:00
David Sidrane
b40f8d52a8 STM32F7 disable d-cache as a precaution (#11374)
- see 1259864 Data corruption in a sequence of Write-Through stores and loads
 - if we can be certain this sequence won't occur in PX4 then the d-cache will be re-enabled
2019-02-10 18:25:16 -05:00
David Sidrane
0f5f4814bb px4_fmu-v5: Inital commit NuttX 7.27+ 2019-01-25 06:32:37 -08:00
Daniel Agar
abb3817d31 boards new split VENDOR_MODEL naming convention 2018-11-26 14:40:14 -08:00
Daniel Agar
f692ad04d0 boards organization 2018-11-26 14:40:14 -08:00