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61 Commits

Author SHA1 Message Date
Daniel Agar
6874e9fba0 boards: NuttX disable all NSH memory debug commands (mb, mh, mw) by default 
- closes https://github.com/PX4/PX4-Autopilot/issues/17062
 2021-03-30 09:23:43 -04:00
Daniel Agar
631d1647d3 boards: minimize unnecessary differences in default variants 2021-03-28 14:46:47 -04:00
David Sidrane
d94ff14e6b px4_fmu-v5x:Use Auto LSE Drive setting 2021-03-05 15:40:09 -05:00
Lorenz Meier
4c9b2c65b5 Support v5X build variants 
This adds support for the different implementation variants of the v5X standard.
 2021-02-14 11:17:28 +01:00
Daniel Agar
8f0918a16b boards: remove unused linker __param section 2021-02-08 23:22:48 -05:00
dino
bb37fd2f29 Enabled LSE clock for RTC, set clk drive strength to 3. Else the quarzt on the fmuv5x does not socillate reliabel. 2021-02-02 09:58:47 +01:00
David Sidrane
ed996e2dd1 fmu-v5x:Add net monitoring an DHCP 
px4_fmu-v5x:Use Bin Net settigns
 2021-01-31 14:42:09 +01:00
Daniel Agar
1ec10bfcc6 boards: disable CONFIG_ARMV7M_LAZYFPU again (#16573) 
- this was causing hard faults on the CUAV Nora and possibly other boards, disabling everywhere until we fully understand the root cause
 2021-01-17 22:40:21 -05:00
Beat Küng
88fe047556 px4/v5x: enable mcp23009 GPIO driver 2021-01-15 10:57:20 -05:00
Daniel Agar
cb74cb8692 boards: enable CONFIG_ARMV7M_LAZYFPU everywhere 2021-01-12 09:04:38 +01:00
David Sidrane
a60df85a09 px4_fmu-v5x:Use px4_platform_configure 2020-12-02 20:40:23 -05:00
Daniel Agar
233949a377 NuttX upgrade to 10.0.0+ defconfig changes 2020-10-28 14:25:25 -04:00
David Sidrane
1e0f3a1e9c px4_fmu-v5x base_phy_DP83848C:Use 32kHz clock for RTC 2020-10-14 14:55:55 +02:00
David Sidrane
7f804b5508 px4_fmu-v5x:Use 32kHz clock for RTC 2020-10-14 14:55:55 +02:00
David Sidrane
b83fdfda37 px4_fmu-v5x: Updates for NuttX 9.1.0+ External schedule_note 2020-09-16 21:32:04 -04:00
David Sidrane
733c1b747b px4_fmu-v5x: Updates for NuttX 9.1.0+ External schedule_note 2020-09-16 21:32:04 -04:00
David Sidrane
acea295d5a px4_fmu-v5x Updates for NuttX 9.1.0- 
px4_fmu-v5x: defconfig MMCSD enable multiblock
 2020-09-16 21:32:04 -04:00
Daniel Agar
2c3441aa90 boards: reduce CONFIG_NFILE_DESCRIPTORS 15 -> 12 
- reduced now that calibration uses uORB::Subscription
 - can likely be reduced further (perhaps < 8) with additional testing
 2020-08-21 10:12:13 -04:00
David Sidrane
329ed6e273 px4_fmu-v5/v5x: Re-enable TXDMA 2020-08-11 12:27:28 -04:00
Daniel Agar
e3d31a881e boards: NuttX disable posix message queues 2020-07-17 17:00:21 -04:00
David Sidrane
0bb8d7a065 px4_fmu-v5x p4 (-06) default to suporting LAN8742Ai 2020-06-09 08:12:44 +02:00
Daniel Agar
5e7d2e830d boards: delete old board.h boilerplate 2020-06-08 19:10:33 -04:00
David Sidrane
626895eadc px4_fmu-v5x:Wrong Bit was being tested for mode. 
@TSC21  - this will fix you build
 2020-06-05 18:59:48 -04:00
Beat Küng
9c6f42a867 v5x defconfig: increase TELEM2 UART TX buffer size to 3000 
Required for very high-rate log streaming @3MBit baudrate.
 2020-05-20 09:12:50 +02:00
Daniel Agar
28d2aca699 boards: include all procfs entries on boards that aren't flash constrained 2020-05-01 20:59:57 -04:00
Daniel Agar
8d0c92003a boards: remove all CONFIG_NXFONTS_DISABLE* 2020-05-01 20:59:57 -04:00
Beat Küng
34c75f2d36 boards: temporarily disable UART TX DMA 
work-around for https://github.com/PX4/Firmware/issues/14659.
This can be reverted when fixed properly.
 2020-04-27 08:47:46 -04:00
Daniel Agar
66eacd24bc px4_fmu-v5_stackcheck: update stack sizes and add to Jenkins 
- increase stack sizes to run cleanly under stackcheck
     - this is likely overkill for most boards, but using stackcheck to set our minimum ensures we have a very safe margin on regular builds and it's something we can currently afford
 - remove holybro_durandal-v1_stackcheck from test rack (there's only one unit)
 2020-04-11 21:16:10 -04:00
Beat Küng
68e1172bb5 px4/v5x: enable tx dma on telem2 2020-04-09 14:59:28 +02:00
Daniel Agar
a89bba470a boards: STM32F76xxx/STM32F77xxx linker add ITCM RAM and .ramfuncs handling 
- this doesn't currently change anything, but gets us ready to start
experimenting with using the small amount of instruction tightly memory
on STM32F7
 - the .ramfuncs section works with NuttX CONFIG_ARCH_RAMFUNCS
 2020-04-08 13:20:54 -04:00
Daniel Agar
40b1043e12 NuttX boards minor lpwork and init stack increases 2020-04-02 23:39:17 -04:00
Daniel Agar
15332a7e56 boards: reduce CONFIG_NFILE_DESCRIPTORS 20 -> 15 2020-04-01 16:17:14 -04:00
Daniel Agar
44bec269b0 boards: update all NuttX configs CONFIG_NSH_MAXARGUMENTS 12 -> 15 2020-03-25 17:59:22 -04:00
Daniel Agar
8738c26426 boards: enable NuttX SPI DMA buffers 
- update to NuttX with stm32f4 and stm32f7 SPI DMA internal buffers
 - remove explicit DMA buffer allocations from new IMU drivers
 - restore original BOARD_DMA_ALLOC_POOL_SIZE
 - decrease SPI DMA thresholds based on fmu-v2/v3/v4/v5 bench testing
 2020-03-22 19:24:26 -04:00
Daniel Agar
0ce9e113ff boards: stm32f4/f7 enable SPI_DMATHRESHOLD=32 2020-03-11 22:08:37 -04:00
Beat Küng
179c89b6bd board configs: extend board_dma_map.h with a table 2020-03-11 22:08:37 -04:00
Daniel Agar
bd16c2b4f6 px4_fmu-v5x: add board_dma_map.h and enable SPI{1,2,3} DMA 2020-03-11 22:08:37 -04:00
Daniel Agar
46a09b711f boards: increase STDIO buffer size where we can afford it 2020-03-11 17:19:44 -04:00
Daniel Agar
505afc6063 boards: increase LPWORKSTACKSIZE 1536 -> 1600 2020-03-10 12:53:01 -04:00
David Sidrane
254b05d377 px4_fmu-v5x:P2 Base migrating to LAN8742Ai phy 2020-02-08 06:39:10 -08:00
David Sidrane
351c3f7c22 px4_fmu-v5x:Support Nuttx SDIO Fixes 2020-01-08 12:23:01 -05:00
David Sidrane
949ab563ef px4_fmu-v5x:Drop netinit task priority below LP work 2019-12-03 16:16:49 -05:00
David Sidrane
c9cb59fdd8 px4_fmu-v5x:Init Network in background (no monitor CONFIG_NETINIT_MONITOR is not set) 2019-12-03 16:16:49 -05:00
David Sidrane
213174fc74 px4_fmu-v5x:Set IP 192.168.0.123 GW:192.168.0.254 2019-12-03 16:16:49 -05:00
David Sidrane
996ee49868 fmu-v5x:SPI4 is not used BMM150 moved to I2C4 2019-12-03 16:16:49 -05:00
Beat Küng
cf4e97b71c fmu-v5x: enable DShot 
Only the first 6 FMU pins support it.
DMA conflict with UART8, which is the GPS2 port.
 2019-11-29 07:39:08 +01:00
Daniel Agar
99aae8b891 NuttX use toolchain math.h and avoid empty drivers/Kconfig 2019-11-16 11:43:42 +01:00
David Sidrane
26b9b0371f px4:fmu-v5x BSP Updated to NuttX 8.1+ 2019-11-16 11:43:42 +01:00
Daniel Agar
e2cf501f9d boards: increase CONFIG_MAX_TASKS 32->64 on all F7s (#13285) 
On more complicated setups it's still possible to exceed 32 tasks. For example fmu-v5 with mavlink on every telem (+ USB), external spi usage (pmw3901), gimbal (vmount), multiple i2c sensors, and camera feedback is 35 tasks (with top running). This is a fairly extreme case, so I'm only going to increase CONFIG_MAX_TASKS on newer F7 boards.
 2019-10-27 12:37:01 -04:00
Daniel Agar
315141873e NuttX boards reduce CONFIG_MAX_TASKS 64 -> 32 (default) 2019-10-02 19:44:46 -04:00