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61935e82716473bf6c46284a4727a8ec41478e6a
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Author SHA1 Message Date
David Sidrane
61935e8271 qurt:Use PX4_SOC_ARCH_ID_t from board common 2018-10-03 10:30:10 +02:00
David Sidrane
4e32ca45f1 sitl:Use PX4_SOC_ARCH_ID_t from board common 2018-10-03 10:30:10 +02:00
David Sidrane
d85452863d rpi:Use PX4_SOC_ARCH_ID_t from board common 2018-10-03 10:30:10 +02:00
David Sidrane
3d96e2ef60 ocpoc:Use PX4_SOC_ARCH_ID_t from board common 2018-10-03 10:30:10 +02:00
David Sidrane
5fea494a2d eagle:Use PX4_SOC_ARCH_ID_t from board common 2018-10-03 10:30:10 +02:00
David Sidrane
dc59e19bbb Moved PX4_SOC_ARCH_ID from px4_micro_hal to board_common 2018-10-03 10:30:10 +02:00
David Sidrane
695a7f6839 board_common:Added missing END_DECLS from rebase 2018-10-03 10:30:10 +02:00
David Sidrane
ea1722274d ver:Use Board identity API without ifdefs for overrides 2018-10-03 10:30:10 +02:00
David Sidrane
594da6247b board_common:Make board indenty API required. 2018-10-03 10:30:10 +02:00
David Sidrane
73552bdd64 sim:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane
2f64870e78 qurt:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane
a96acbb04d ocpoc:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane
82dcfeb576 eagle:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane
1c779d58fb bebop:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane
bc075208d5 rpi:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane
a1abd1b632 sitil:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane
ed9223edaf board_identity:Added common no-arch specific board_identity API 
This common code can be used byt posix based boars to provide
   the board_identity API.
 2018-10-03 10:30:10 +02:00
David Sidrane
1ac54f977e board_common:Documentation clean up 2018-10-03 10:30:10 +02:00
David Sidrane
9709d23179 logger:Use PX4 GUID for sys_uuid 2018-10-03 10:30:10 +02:00
David Sidrane
347ac48eab posix:Added PX4 GUID API board_get_px4_guid_formated 2018-10-03 10:30:10 +02:00
David Sidrane
a16ca0ccf9 sitl:Added BOARD_OVERRIDE_PX4_GUID 2018-10-03 10:30:10 +02:00
David Sidrane
7f29b04e41 sim:Added BOARD_OVERRIDE_PX4_GUID 2018-10-03 10:30:10 +02:00
David Sidrane
ba336bd19e rpi:Added BOARD_OVERRIDE_PX4_GUID 2018-10-03 10:30:10 +02:00
David Sidrane
a1d5cb766a ocpoc:Added BOARD_OVERRIDE_PX4_GUID 2018-10-03 10:30:10 +02:00
David Sidrane
cca2fd8471 eagle:Added BOARD_OVERRIDE_PX4_GUID 2018-10-03 10:30:10 +02:00
David Sidrane
39a0021251 ver:Add PX4 GUID (MFGUID and UID will be deprecated later) 2018-10-03 10:30:10 +02:00
David Sidrane
7050657a6e board_identity:Add stm32 board_get_px4_guid and board_get_px4_guid_formated API 2018-10-03 10:30:10 +02:00
David Sidrane
1c2f8bd4c4 board_identity:Fix potential buffer over flow 2018-10-03 10:30:10 +02:00
David Sidrane
f24a052355 board_common:Add PX4 GUID, deprecate other UUID API 
The form of the PX4  GUID is as follows:
   offset:0         1         2         -           17
      <ARCH MSD><ARCH LSD><MSD CPU UUID>...<LSD CPU UUID>

   Where <ARCH MSD><ARCH LSD> are a monotonic ordinal number assigned by
   PX4 to a chip architecture (PX4_SOC_ARCH_ID). The 2 bytes are used to
   create a globally unique ID when prepended to a padded CPU ID.

   In the case where the CPU's UUID is shorter than 16 bytes it will be
   padded with 0's starting at offset [2] until
   PX4_CPU_MFGUID_BYTE_LENGTH-PX4_CPU_UUID_BYTE_LENGTH -1
   I.E. For the STM32
   offset:0         1     2  3  4  5  6             -            17
     <ARCH MSD><ARCH LSD>[0][0][0][0]<MSD CPU UUID>...<LSD CPU UUID>

   I.E. For as CPU with a 16 byte UUID
   offset:0         1         2         -           17
     <ARCH MSD><ARCH LSD><MSD CPU UUID>...<LSD CPU UUID>
 2018-10-03 10:30:10 +02:00
David Sidrane
8bec5fc37b px4_micro_hal:Define PX4_SOC_ARCH_ID 2018-10-03 10:30:10 +02:00
Martina
e73c50ad9c mc_pos_control_main: enable continuos update of vehicle_trajectory_waypoint 
desired such that it's possible to use it in manual modes
 2018-10-02 09:45:48 -04:00
Beat Küng
02d89575b0 px4fmu-v2: disable camera_trigger 
due to limited flash space.
 2018-10-02 14:14:10 +02:00
Beat Küng
fb04a611c5 gps: reduce stack size 
A buffer size of the gps drivers got reduced by 100 bytes.
 2018-10-02 14:14:10 +02:00
Beat Küng
cef6cf96f8 gps: reduce delay by reducing the sleep time 
This uses now the same sleep time logic as mavlink, depending on the
baudrate.

CPU usage on a Pixracer for different sleep times:

#num reads/sec    sleep time         CPU usage
17-18             2.8ms              0.233-0.31% (this PR)
12                5ms                0.155-0.3%
9-10              10ms               0.155-0.233%
6                 20ms               0.155-0.233% (previous)
 2018-10-02 14:14:10 +02:00
Beat Küng
979e8ad28b gps drivers: update submodule 2018-10-02 14:14:10 +02:00
Beat Küng
403f909e3a mavlink_receiver: simplify sleeptime calculation 2018-10-02 14:14:10 +02:00
Beat Küng
23094b9ac9 ekf2: subscribe only to 2 gps topic instances 2018-10-02 14:14:10 +02:00
Matthias Grob
e167e6bec4 px_uploader: catch non-standard baud exception 
to fix Cygwin upload. It failed silently but when catching it prints
"non-standard baudrates are not supported on this platform".
Discussion about platform independet FTDI detection is in issue #10429.
 2018-10-02 10:01:41 +02:00
Matthias Grob
ebdea6e50d px_uploader: fix code and output spacing 2018-10-02 10:01:41 +02:00
Daniel Agar
181b2f69ed Github templates add support question and documentation issue (#10613) 2018-10-01 09:44:19 -04:00
Matthias Grob
bee6a6b8b0 Refactor: Use new matrix::Vector2f constructor 2018-10-01 08:10:21 -04:00
Matthias Grob
ada0179cda matrix lib: update to latest version 2018-10-01 08:10:21 -04:00
Lukas Woodtli
587c2e2477 Improve the use of ubsan in SITL pipeline 
Also some general minor sanitizer improvements.
 2018-09-30 16:08:58 -04:00
Bart Slinger
9530b6c24d bebop 2 disable motors on kill (#10605) 2018-09-30 11:40:51 -04:00
Daniel Agar
b83cb79596 Update submodule DriverFramework to latest Sun Sep 30 08:37:23 EDT 2018 (#10604) 
- DriverFramework in PX4/Firmware (1ce7e8d89a16262afe07d7487e55a2ec05985627): 721ace3e79
    - DriverFramework current upstream: 9f456acb3c
    - Changes: 721ace3e79...9f456acb3c

    9f456ac 2018-09-30 Bart Slinger - Increase DriverFramework priority to SCHED_PRIORITY_MAX
 2018-09-30 10:28:52 -04:00
Daniel Agar
9d2ff820bf px4fmu-v2 disable sdp3x to save flash (#10600) 
- fixes #10599
 2018-09-29 11:21:21 -04:00
Paul Riseborough
72f85e4b2d ekf2: Handle blending of dissimilar rate GPS data (#10570) 
A filtered update update interval is calculated for each receiver.
If dissimilar interval data is detected, blending occurs when data is received from the slower of the receivers.
If similar interval data is detected, blending occurs when receiver data with similar time stamps is available.
If no data is received from either receiver for longer than 300msec, then no blending will be performed and the most recent data will be used instead.
 2018-09-29 09:23:19 -04:00
Beat Küng
df9a09ce9d PreflightCheck: rename 'Estimator internal checks' to 'Position unknown' 2018-09-29 09:17:53 -04:00
Beat Küng
30cf287f7b PreflightCheck: update messages & use proper log level 2018-09-29 09:17:53 -04:00
Beat Küng
af07497b21 mavlink_log: add mavlink_log_warning 2018-09-29 09:17:53 -04:00