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px4fmu-v5:Fixed STM32_RCC_DCKCFGR2_DSISRC

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C&P error in upstream was:RCC_DCKCFGR2_DSISEL_48MHZ is
   RCC_DCKCFGR2_DSISEL_PHY
This commit is contained in:
David Sidrane
2017-07-31 16:36:20 -10:00
committed by Daniel Agar
parent c264cb3224
commit e6cc4530b4
1 changed files with 1 additions and 1 deletions
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2
nuttx-configs/px4fmu-v5/include/board.h
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@@ -159,7 +159,7 @@
#define STM32_RCC_DCKCFGR2_CK48MSRC RCC_DCKCFGR2_CK48MSEL_PLL
#define STM32_RCC_DCKCFGR2_SDMMCSRC RCC_DCKCFGR2_SDMMCSEL_48MHZ
#define STM32_RCC_DCKCFGR2_SDMMC2SRC RCC_DCKCFGR2_SDMMC2SEL_48MHZ
#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_48MHZ
#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_PHY
/* Several prescalers allow the configuration of the two AHB buses, the