nxp_fmurt1062-v1:Run from OCRAM

This commit is contained in:
David Sidrane
2020-02-26 13:41:57 -08:00
committed by David Sidrane
parent e12bce3a20
commit cad3a811d2
8 changed files with 291 additions and 35 deletions

View File

@@ -7,7 +7,7 @@ px4_add_board(
TOOLCHAIN arm-none-eabi
ARCHITECTURE cortex-m7
ROMFSROOT px4fmu_common
TESTING
LINKER_PREFIX ocram
# UAVCAN_INTERFACES 2
SERIAL_PORTS
@@ -22,14 +22,13 @@ px4_add_board(
batt_smbus
camera_capture
camera_trigger
differential_pressure # all available differential pressure drivers
distance_sensor # all available distance sensor drivers
# dshot not ported
gps
#heater
imu/adis16448
imu/adis16477
imu/adis16497
#imu # all available imu drivers
imu/bmi055
imu/mpu6000
irlock
@@ -38,12 +37,7 @@ px4_add_board(
lights/rgbled_ncp5623c
lights/rgbled_pwm
magnetometer # all available magnetometer drivers
mkblctrl
optical_flow # all available optical flow drivers
#osd
pca9685
power_monitor/ina226
#protocol_splitter
# pwm_input - not ptorable
pwm_out_sim
px4fmu
@@ -52,11 +46,9 @@ px4_add_board(
safety_button
tap_esc
telemetry # all available telemetry drivers
# test_ppm not portable
tone_alarm
# uavcan
MODULES
airspeed_selector
attitude_estimator_q
battery_status
camera_feedback
@@ -64,8 +56,6 @@ px4_add_board(
dataman
ekf2
events
fw_att_control
fw_pos_control_l1
land_detector
landing_target_estimator
load_mon
@@ -75,16 +65,14 @@ px4_add_board(
mc_att_control
mc_pos_control
mc_rate_control
#micrortps_bridge
navigator
rc_update
rover_pos_control
sensors
sih
temperature_compensation
vmount
vtol_att_control
SYSTEMCMDS
bl_update
# bl_update
config
dmesg
dumpfile
@@ -104,7 +92,6 @@ px4_add_board(
reflect
sd_bench
shutdown
tests # tests and test runner
top
topic_listener
tune_control
@@ -113,13 +100,13 @@ px4_add_board(
work_queue
serial_test
EXAMPLES
bottle_drop # OBC challenge
fixedwing_control # Tutorial code from https://px4.io/dev/example_fixedwing_control
hello
hwtest # Hardware test
# bottle_drop # OBC challenge
# fixedwing_control # Tutorial code from https://px4.io/dev/example_fixedwing_control
# hello
# hwtest # Hardware test
#matlab_csv_serial
px4_mavlink_debug # Tutorial code from http://dev.px4.io/en/debug/debug_values.html
px4_simple_app # Tutorial code from http://dev.px4.io/en/apps/hello_sky.html
rover_steering_control # Rover example app
uuv_example_app
# px4_mavlink_debug # Tutorial code from http://dev.px4.io/en/debug/debug_values.html
# px4_simple_app # Tutorial code from http://dev.px4.io/en/apps/hello_sky.html
# rover_steering_control # Rover example app
# uuv_example_app
)

View File

@@ -44,6 +44,7 @@ CONFIG_BOARD_CRASHDUMP=y
CONFIG_BOARD_CUSTOM_LEDS=y
CONFIG_BOARD_LOOPSPERMSEC=104926
CONFIG_BOARD_RESET_ON_ASSERT=2
CONFIG_BOOT_RUNFROMISRAM=y
CONFIG_BUILTIN=y
CONFIG_C99_BOOL8=y
CONFIG_CDCACM=y
@@ -85,6 +86,7 @@ CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_I2C=y
CONFIG_I2C_RESET=y
CONFIG_IDLETHREAD_STACKSIZE=750
CONFIG_IMXRT_BOOTLOADER_HEAP=y
CONFIG_IMXRT_DTCM_HEAP=y
CONFIG_IMXRT_GPIO1_0_15_IRQ=y
CONFIG_IMXRT_GPIO1_16_31_IRQ=y
@@ -105,6 +107,7 @@ CONFIG_IMXRT_GPIO8_16_31_IRQ=y
CONFIG_IMXRT_GPIO9_0_15_IRQ=y
CONFIG_IMXRT_GPIO9_16_31_IRQ=y
CONFIG_IMXRT_GPIO_IRQ=y
CONFIG_IMXRT_ITCM=0
CONFIG_IMXRT_LPI2C1=y
CONFIG_IMXRT_LPI2C2=y
CONFIG_IMXRT_LPI2C3=y
@@ -161,7 +164,7 @@ CONFIG_MEMSET_64BIT=y
CONFIG_MEMSET_OPTSPEED=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_MM_REGIONS=2
CONFIG_MM_REGIONS=3
CONFIG_MTD=y
CONFIG_MTD_BYTE_WRITE=y
CONFIG_MTD_PARTITION=y

View File

@@ -0,0 +1,225 @@
/****************************************************************************
* boards/arm/imxrt/imxrt1060-evk/scripts/flash-ocram.ld
*
* Copyright (C) 2018, 2020 Gregory Nutt. All rights reserved.
* Authors: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
* David Sidrane <david.sidrane@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The FMURT1062 has 8MiB of QSPI FLASH beginning at address,
* 0x0060:0000, Upto 512Kb of DTCM RAM beginning at 0x2000:0000, and 1MiB OCRAM
* beginning at 0x2020:0000. Neither DTCM or SDRAM are used in this
* configuration.
*
* The default flexram setting on the iMXRT 1062 is
* 256Kib to OCRRAM, 128Kib ITCM and 128Kib DTCM.
* This can be changed by using a dcd by minipulating
* IOMUX GPR16 and GPR17.
* The configuartion we will use is 384Kib to OCRRAM, 0Kib ITCM and
* 128Kib DTCM.
*
* This is the OCRAM inker script.
* The NXP ROM bootloader will move the FLASH image to OCRAM.
* We must reserve 32K for the bootloader' OCRAM usage from the OCRAM Size
* and an additinal 8K for the ivt_s which is IVT_SIZE(8K) This 40K can be
* reused once the application is running.
*
* 0x2020:A000 to 0x202d:ffff - The application Image's vector table
* 0x2020:8000 to 0x2020:A000 - IVT
* 0x2020:0000 to 0x2020:7fff - NXP ROM bootloader.
*
* We artificially split the FLASH to allow locating sections that we do not
* want loaded inoto OCRAM. This is to save on OCRAM where the speen of the
* code does not matter.
*
*/
MEMORY
{
flash (rx) : ORIGIN = 0x60000000, LENGTH = 7M
flashxip (rx) : ORIGIN = 0x60700000, LENGTH = 1M
/* Vectors @ boot+ivt OCRAM2 Flex RAM Boot IVT */
sram (rwx) : ORIGIN = 0x2020A000, LENGTH = 512K + 256K + 128K - (32K + 8K)
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 0K
dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
EXTERN(g_flash_config)
EXTERN(g_image_vector_table)
EXTERN(g_boot_data)
EXTERN(g_dcd_data)
ENTRY(_stext)
SECTIONS
{
/* Image Vector Table and Boot Data for booting from external flash */
.boot_hdr : ALIGN(4)
{
FILL(0xff)
__boot_hdr_start__ = ABSOLUTE(.) ;
KEEP(*(.boot_hdr.conf))
. = 0x1000 ;
KEEP(*(.boot_hdr.ivt))
. = 0x1020 ;
KEEP(*(.boot_hdr.boot_data))
. = 0x1030 ;
KEEP(*(.boot_hdr.dcd_data))
__boot_hdr_end__ = ABSOLUTE(.) ;
. = 0x2000 ;
} > flash
/* Catch all the section we want not in OCRAM so that the *(.text .text.*) in flash does not */
.flashxip : ALIGN(4)
{
FILL(0xff)
/* Order matters */
*(.text.__start)
*(.text.imxrt_ocram_initialize)
*(.slow_memory)
*(.text.*ModuleBase*)
*(.text.*print_message*)
*(.text._ZN4Ekf2C2Eb)
*(.text._ZN9CommanderC2Ev)
*(.text.*PreFlightCheck*)
*(.text.*calibrat*)
*(.text.*initEv)
*(.text.*probe*)
*(.text.*thread_main*);
*(.text.*listener*)
*(.text.nsh_*)
*(.text.lib_vscanf)
*(.text.*configure_streams_to_default*)
*(.text.*_main)
*(.rodata .rodata.*)
KEEP(*(__param*))
*(.fixup)
*(.gnu.warning)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
} > flashxip
/* Sections that will go to OCRAM */
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
_etext = ABSOLUTE(.);
/*
* This is a hack to make the newlib libm __errno() call
* use the NuttX get_errno_ptr() function.
*/
__errno = get_errno_ptr;
} > sram AT> flash
/*
* Init functions (static constructors and the like)
*/
.init_section :
{
_sinit = ABSOLUTE(.);
KEEP(*(.init_array .init_array.*))
_einit = ABSOLUTE(.);
} > flash
.ARM.extab :
{
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx :
{
*(.ARM.exidx*)
__exidx_end = ABSOLUTE(.);
} > flash
_eronly = ABSOLUTE(.);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.ramfunc ALIGN(4):
{
_sramfuncs = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfuncs = ABSOLUTE(.);
} > sram AT > flash
_framfuncs = LOADADDR(.ramfunc);
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

View File

@@ -50,7 +50,7 @@ MEMORY
OUTPUT_ARCH(arm)
EXTERN(_vectors)
EXTERN(flash_config)
EXTERN(g_flash_config)
EXTERN(g_image_vector_table)
EXTERN(g_boot_data)

View File

@@ -77,12 +77,11 @@
#define FLASH_BASE 0x60000000
#define FLASH_END 0x7f7fffff
/* This needs to take into account bootloader */
/* This needs to take into account the memory configuration at boot bootloader */
#define ROM_BOOTLOADER_OCRAM_RES 0x8000
#define OCRAM_BASE (0x20200000 + ROM_BOOTLOADER_OCRAM_RES)
#define OCRAM_END (OCRAM_BASE + (512 * 1024) + (256 * 1024) -\
ROM_BOOTLOADER_OCRAM_RES)
#define OCRAM_END (OCRAM_BASE + (512 * 1024) + (256 * 1024) - ROM_BOOTLOADER_OCRAM_RES)
#define SCLK 1
@@ -97,6 +96,7 @@
#endif
#define LOCATE_IN_DEST(x) (((uint32_t)(x)) - FLASH_BASE + IMAGE_DEST)
#define LOCATE_IN_SRC(x) (((uint32_t)(x)) - IMAGE_DEST + FLASH_BASE)
#define DCD_ADDRESS 0
#define BOOT_DATA_ADDRESS LOCATE_IN_DEST(&g_boot_data)
@@ -112,8 +112,6 @@
* Public Types
****************************************************************************/
extern uint32_t _vectors[];
/* IVT Data */
struct ivt_s {
@@ -170,5 +168,8 @@ struct boot_data_s {
****************************************************************************/
extern const struct boot_data_s g_boot_data;
extern const uint8_t g_dcd_data[];
extern const uint32_t _vectors[];
#endif /* __BOARDS_ARM_IMXRT_IMXRT1060_EVK_SRC_IMXRT_FLEXSPI_NOR_BOOT_H */

View File

@@ -47,7 +47,7 @@
#if defined (CONFIG_NXP_FMURT1062_V3_HYPER_FLASH)
__attribute__((section(".boot_hdr.conf")))
const struct flexspi_nor_config_s flash_config = {
const struct flexspi_nor_config_s g_flash_config = {
.mem_config =
{
.tag = FLEXSPI_CFG_BLK_TAG,
@@ -84,7 +84,7 @@ const struct flexspi_nor_config_s flash_config = {
#elif defined (CONFIG_NXP_FMURT1062_V3_QSPI_FLASH)
__attribute__((section(".boot_hdr.conf")))
const struct flexspi_nor_config_s flash_config = {
const struct flexspi_nor_config_s g_flash_config = {
.mem_config =
{
.tag = FLEXSPI_CFG_BLK_TAG,

View File

@@ -63,6 +63,9 @@
#include <nuttx/mm/gran.h>
#include "up_arch.h"
#include "up_internal.h"
#include "imxrt_flexspi_nor_boot.h"
#include "imxrt_iomuxc.h"
#include <chip.h>
#include "board_config.h"
@@ -145,6 +148,42 @@ __EXPORT void board_on_reset(int status)
}
}
/****************************************************************************
* Name: imxrt_ocram_initialize
*
* Description:
* Called off reset vector to reconfigure the flexRAM
* and finish the FLASH to RAM Copy.
*
****************************************************************************/
__EXPORT void imxrt_ocram_initialize(void)
{
const uint32_t *src;
uint32_t *dest;
uint32_t regval;
/* Reallocate 128K of Flex RAM from ITCM to OCRAM
* Final Confiduration is
* 128 DTCM
*
* 128 FlexRAM OCRAM (202C:0000-202D:ffff)
* 256 FlexRAM OCRAM (2028:0000-202B:ffff)
* 512 System OCRAM2 (2020:0000-2027:ffff)
* */
putreg32(0xaa555555, IMXRT_IOMUXC_GPR_GPR17);
regval = getreg32(IMXRT_IOMUXC_GPR_GPR16);
putreg32(regval | GPR_GPR16_FLEXRAM_BANK_CFG_SELF, IMXRT_IOMUXC_GPR_GPR16);
for (src = (uint32_t *)(LOCATE_IN_SRC(g_boot_data.start) + g_boot_data.size),
dest = (uint32_t *)(g_boot_data.start + g_boot_data.size);
dest < (uint32_t *) &_etext;) {
*dest++ = *src++;
}
}
/****************************************************************************
* Name: imxrt_boardinitialize
*
@@ -179,6 +218,7 @@ __EXPORT void imxrt_boardinitialize(void)
fmurt1062_timer_initialize();
}
/****************************************************************************
* Name: board_app_initialize
*