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Enabled LSE clock for RTC, set clk drive strength to 3. Else the quarzt on the fmuv5x does not socillate reliabel.

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dino
2021-01-29 15:47:25 +01:00
committed by Julian Kent
parent a2442ffb48
commit bb37fd2f29
1 changed files with 2 additions and 0 deletions
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boards/px4/fmu-v5x/nuttx-config/nsh/defconfig
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@@ -208,6 +208,8 @@ CONFIG_STM32F7_PHY_POLLING=y
CONFIG_STM32F7_PROGMEM=y
CONFIG_STM32F7_PWR=y
CONFIG_STM32F7_RTC=y
CONFIG_STM32F7_RTC_LSECLOCK_RUN_DRV_CAPABILITY=3
CONFIG_STM32F7_RTC_LSECLOCK_START_DRV_CAPABILITY=3
CONFIG_STM32F7_RTC_MAGIC_REG=1
CONFIG_STM32F7_SAVE_CRASHDUMP=y
CONFIG_STM32F7_SDMMC2=y