mirror of
https://gitee.com/xiaohuolufeihua/bizhang_-obav.git
synced 2026-05-22 01:12:31 +00:00
boards: simplify RC port configuration by using NuttX ioctl's
A board only needs to define: #define RC_SERIAL_PORT "/dev/ttyS4" Then it can optionally define one or more of the following: #define RC_SERIAL_SWAP_RXTX #define RC_SERIAL_SINGLEWIRE #define RC_INVERT_INPUT(_invert_true) px4_arch_gpiowrite(GPIO_SBUS_INV, _invert_true)
This commit is contained in:
@@ -271,7 +271,7 @@
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// #define GPIO_RSSI_IN (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTC|GPIO_PIN1)
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#define GPIO_SBUS_INV (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN10)
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#define BOARD_INVERT_RC_INPUT(_invert_true, _na) px4_arch_gpiowrite(GPIO_SBUS_INV, _invert_true);
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#define RC_INVERT_INPUT(_invert_true) px4_arch_gpiowrite(GPIO_SBUS_INV, _invert_true);
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#define GPIO_FRSKY_INV (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN12)
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#define INVERT_FRSKY(_invert_true) px4_arch_gpiowrite(GPIO_FRSKY_INV, _invert_true);
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@@ -226,6 +226,9 @@ CONFIG_STM32F7_USART2=y
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CONFIG_STM32F7_USART3=y
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CONFIG_STM32F7_USART6=y
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CONFIG_STM32F7_USART_BREAKS=y
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CONFIG_STM32F7_USART_INVERT=y
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CONFIG_STM32F7_USART_SINGLEWIRE=y
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CONFIG_STM32F7_USART_SWAP=y
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CONFIG_STM32F7_WWDG=y
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CONFIG_SYSTEM_NSH=y
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CONFIG_SYSTEM_PING=y
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@@ -33,7 +33,6 @@
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add_library(drivers_board
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init.c
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manifest.c
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sdio.c
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spi.cpp
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timer_config.c
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@@ -268,12 +268,7 @@
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/* RC Serial port */
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#define RC_UXART_BASE STM32_UART5_BASE
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#define RC_SERIAL_PORT "/dev/ttyS4"
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#define BOARD_HAS_SINGLE_WIRE 0 /* HW is capable of Single Wire */
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#define BOARD_HAS_SINGLE_WIRE_ON_TX 0 /* HW default is wired as Single Wire On TX pin */
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#define BOARD_HAS_RX_TX_SWAP 0 /* HW Can swap TX and RX */
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#define RC_SERIAL_PORT_IS_SWAPED 0 /* Board wired with RC's TX is on cpu RX */
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/* Power switch controls ******************************************************/
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@@ -75,51 +75,6 @@
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static int configure_switch(void);
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/************************************************************************************
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* Name: board_rc_input
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*
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* Description:
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* All boards my optionally provide this API to invert the Serial RC input.
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* This is needed on SoCs that support the notion RXINV or TXINV as apposed to
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* and external XOR controlled by a GPIO
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*
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************************************************************************************/
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__EXPORT void board_rc_input(bool invert_on, uint32_t uxart_base)
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{
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irqstate_t irqstate = px4_enter_critical_section();
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uint32_t cr1 = getreg32(STM32_USART_CR1_OFFSET + uxart_base);
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uint32_t cr2 = getreg32(STM32_USART_CR2_OFFSET + uxart_base);
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uint32_t regval = cr1;
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/* {R|T}XINV bit fields can only be written when the USART is disabled (UE=0). */
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regval &= ~USART_CR1_UE;
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putreg32(regval, STM32_USART_CR1_OFFSET + uxart_base);
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if (invert_on) {
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#if defined(BOARD_HAS_RX_TX_SWAP) && RC_SERIAL_PORT_IS_SWAPED == 1
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/* This is only ever turned on */
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cr2 |= (USART_CR2_RXINV | USART_CR2_TXINV | USART_CR2_SWAP);
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#else
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cr2 |= (USART_CR2_RXINV | USART_CR2_TXINV);
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#endif
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} else {
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cr2 &= ~(USART_CR2_RXINV | USART_CR2_TXINV);
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}
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putreg32(cr2, STM32_USART_CR2_OFFSET + uxart_base);
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putreg32(cr1, STM32_USART_CR1_OFFSET + uxart_base);
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leave_critical_section(irqstate);
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}
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/************************************************************************************
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* Name: board_on_reset
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*
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@@ -1,67 +0,0 @@
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/****************************************************************************
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*
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* Copyright (c) 2018 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/**
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* @file manifest.c
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*
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* This module supplies the interface to the manifest of hardware that is
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* optional and dependent on the HW REV and HW VER IDs
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*
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* The manifest allows the system to know whether a hardware option
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* say for example the PX4IO is an no-pop option vs it is broken.
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*
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*/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <board_config.h>
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#include <stdbool.h>
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#include "systemlib/px4_macros.h"
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/************************************************************************************
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* Name: board_rc_input
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*
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* Description:
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* All boards my optionally provide this API to invert the Serial RC input.
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* This is needed on SoCs that support the notion RXINV or TXINV as opposed to
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* and external XOR controlled by a GPIO
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*
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************************************************************************************/
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__EXPORT bool board_supports_single_wire(uint32_t uxart_base)
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{
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return uxart_base == RC_UXART_BASE;
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}
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@@ -89,6 +89,7 @@ CONFIG_KINETIS_UART4_RXDMA=y
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CONFIG_KINETIS_UARTFIFOS=y
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CONFIG_KINETIS_UART_BREAKS=y
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CONFIG_KINETIS_UART_EXTEDED_BREAK=y
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CONFIG_KINETIS_UART_INVERT=y
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CONFIG_KINETIS_USBDCD=y
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CONFIG_KINETS_LPUART_LOWEST=y
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CONFIG_LIBC_FLOATINGPOINT=y
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@@ -130,7 +130,6 @@ __BEGIN_DECLS
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/* RC input */
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#define RC_UXART_BASE KINETIS_UART1_BASE
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#define RC_SERIAL_PORT "/dev/ttyS2" /* UART1 */
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#define GPIO_RSSI_IN PIN_ADC1_SE13
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@@ -140,41 +140,6 @@ int board_read_VBUS_state(void)
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return BOARD_ADC_USB_CONNECTED ? 0 : 1;
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}
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/************************************************************************************
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* Name: board_rc_input
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*
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* Description:
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* All boards my optionally provide this API to invert the Serial RC input.
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* This is needed on SoCs that support the notion RXINV or TXINV as opposed to
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* and external XOR controlled by a GPIO
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*
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************************************************************************************/
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__EXPORT void board_rc_input(bool invert_on, uint32_t uxart_base)
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{
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irqstate_t irqstate = px4_enter_critical_section();
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uint8_t s2 = getreg8(KINETIS_UART_S2_OFFSET + uxart_base);
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uint8_t c3 = getreg8(KINETIS_UART_C3_OFFSET + uxart_base);
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/* {R|T}XINV bit fields can written any time */
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if (invert_on) {
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s2 |= (UART_S2_RXINV);
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c3 |= (UART_C3_TXINV);
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} else {
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s2 &= ~(UART_S2_RXINV);
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c3 &= ~(UART_C3_TXINV);
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}
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putreg8(s2, KINETIS_UART_S2_OFFSET + uxart_base);
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putreg8(c3, KINETIS_UART_C3_OFFSET + uxart_base);
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leave_critical_section(irqstate);
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}
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/************************************************************************************
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* Name: board_peripheral_reset
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*
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@@ -306,7 +306,7 @@
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/* For R12, this signal is active high. */
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#define GPIO_SBUS_INV (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
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#define BOARD_INVERT_RC_INPUT(_invert_true, _na) px4_arch_gpiowrite(GPIO_SBUS_INV, _invert_true)
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#define RC_INVERT_INPUT(_invert_true) px4_arch_gpiowrite(GPIO_SBUS_INV, _invert_true)
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#define GPIO_SPEKTRUM_PWR_EN (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN4)
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@@ -306,7 +306,6 @@
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*/
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#define GPIO_BTN_SAFETY_FMU (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN4)
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#define GPIO_SBUS_INV (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
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#define BOARD_INVERT_RC_INPUT(_invert_true, _na) px4_arch_gpiowrite(GPIO_SBUS_INV, _invert_true)
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#define GPIO_8266_GPIO0 (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN2)
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//TODO: fo not see on schematic #define GPIO_SPEKTRUM_PWR_EN (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN4)
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@@ -205,7 +205,9 @@ CONFIG_STM32F7_USART2=y
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CONFIG_STM32F7_USART3=y
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CONFIG_STM32F7_USART6=y
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CONFIG_STM32F7_USART_BREAKS=y
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CONFIG_STM32F7_USART_INVERT=y
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CONFIG_STM32F7_USART_SINGLEWIRE=y
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CONFIG_STM32F7_USART_SWAP=y
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CONFIG_STM32F7_WWDG=y
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CONFIG_SYSTEM_CDCACM=y
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CONFIG_SYSTEM_NSH=y
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@@ -496,12 +496,8 @@
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/* RC Serial port */
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#define RC_UXART_BASE STM32_USART6_BASE
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#define RC_SERIAL_PORT "/dev/ttyS4"
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#define BOARD_HAS_SINGLE_WIRE 1 /* HW is capable of Single Wire */
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#define BOARD_HAS_SINGLE_WIRE_ON_TX 1 /* HW default is wired as Single Wire On TX pin */
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#define BOARD_HAS_RX_TX_SWAP 1 /* HW Can swap TX and RX */
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#define RC_SERIAL_PORT_IS_SWAPED 0 /* Board wired with RC's TX is on cpu RX */
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#define RC_SERIAL_SINGLEWIRE
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/* Input Capture Channels. */
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#define INPUT_CAP1_TIMER 2
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@@ -91,51 +91,6 @@ extern void led_off(int led);
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__END_DECLS
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/************************************************************************************
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* Name: board_rc_input
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*
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* Description:
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* All boards my optionally provide this API to invert the Serial RC input.
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* This is needed on SoCs that support the notion RXINV or TXINV as apposed to
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* and external XOR controlled by a GPIO
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*
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************************************************************************************/
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__EXPORT void board_rc_input(bool invert_on, uint32_t uxart_base)
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{
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irqstate_t irqstate = px4_enter_critical_section();
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uint32_t cr1 = getreg32(STM32_USART_CR1_OFFSET + uxart_base);
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uint32_t cr2 = getreg32(STM32_USART_CR2_OFFSET + uxart_base);
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uint32_t regval = cr1;
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/* {R|T}XINV bit fields can only be written when the USART is disabled (UE=0). */
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regval &= ~USART_CR1_UE;
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putreg32(regval, STM32_USART_CR1_OFFSET + uxart_base);
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if (invert_on) {
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#if defined(BOARD_HAS_RX_TX_SWAP) && RC_SERIAL_PORT_IS_SWAPED == 1
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/* This is only ever turned on */
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cr2 |= (USART_CR2_RXINV | USART_CR2_TXINV | USART_CR2_SWAP);
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#else
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cr2 |= (USART_CR2_RXINV | USART_CR2_TXINV);
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#endif
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} else {
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cr2 &= ~(USART_CR2_RXINV | USART_CR2_TXINV);
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}
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putreg32(cr2, STM32_USART_CR2_OFFSET + uxart_base);
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putreg32(cr1, STM32_USART_CR1_OFFSET + uxart_base);
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leave_critical_section(irqstate);
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}
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/************************************************************************************
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* Name: board_peripheral_reset
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*
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@@ -96,20 +96,6 @@ static px4_hw_mft_list_entry_t mft_lists[] = {
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};
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/************************************************************************************
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* Name: board_rc_input
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*
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* Description:
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* All boards my optionally provide this API to invert the Serial RC input.
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* This is needed on SoCs that support the notion RXINV or TXINV as opposed to
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* and external XOR controlled by a GPIO
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*
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************************************************************************************/
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__EXPORT bool board_supports_single_wire(uint32_t uxart_base)
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{
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return uxart_base == RC_UXART_BASE;
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}
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/************************************************************************************
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* Name: board_query_manifest
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*
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