mro pixracerpro:Add remaining SRAM4 & DTCM to heap

This commit is contained in:
David Sidrane
2021-04-01 10:39:00 -07:00
committed by Daniel Agar
parent 2f9a57c604
commit 961bac759a
2 changed files with 6 additions and 3 deletions

View File

@@ -90,6 +90,7 @@ CONFIG_MEMSET_OPTSPEED=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE=y
CONFIG_MM_REGIONS=4
CONFIG_MTD=y
CONFIG_MTD_BYTE_WRITE=y
CONFIG_MTD_PARTITION=y
@@ -164,8 +165,6 @@ CONFIG_STM32H7_BKPSRAM=y
CONFIG_STM32H7_DMA1=y
CONFIG_STM32H7_DMA2=y
CONFIG_STM32H7_DMACAPABLE=y
CONFIG_STM32H7_DTCMEXCLUDE=y
CONFIG_STM32H7_DTCM_PROCFS=y
CONFIG_STM32H7_FLOWCONTROL_BROKEN=y
CONFIG_STM32H7_I2C1=y
CONFIG_STM32H7_I2C_DYNTIMEO=y

View File

@@ -197,8 +197,12 @@ SECTIONS
} > AXI_SRAM
/* Emit the the D3 power domain section for locating BDMA data */
.sram4 (NOLOAD) :
.sram4_reserve (NOLOAD) :
{
*(.sram4)
. = ALIGN(4);
_sram4_heap_start = ABSOLUTE(.);
} > SRAM4
/* Stabs debugging sections. */