micro_hal:Fixed DCACHE_LINESIZE abuse

2026-05-21 01:12:11 +00:00 · 2021-03-15 12:32:36 -07:00
parent e9725a5fa7
commit 45d0603627
10 changed files with 69 additions and 13 deletions
--- a/platforms/nuttx/src/px4/nxp/k66/include/px4_arch/micro_hal.h
+++ b/platforms/nuttx/src/px4/nxp/k66/include/px4_arch/micro_hal.h
@@ -33,7 +33,7 @@
 #pragma once


-#include <px4_platform/micro_hal.h>
+#include "../../../nxp_common/include/px4_arch/micro_hal.h"

 __BEGIN_DECLS

--- a/platforms/nuttx/src/px4/nxp/nxp_common/include/px4_arch/micro_hal.h
+++ b/platforms/nuttx/src/px4/nxp/nxp_common/include/px4_arch/micro_hal.h
@@ -0,0 +1,49 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2021 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+#pragma once
+
+#include <px4_platform/micro_hal.h>
+
+__BEGIN_DECLS
+
+#if defined(CONFIG_ARMV7M_DCACHE)
+#  define PX4_ARCH_DCACHE_ALIGNMENT ARMV7M_DCACHE_LINESIZE
+#  define px4_cache_aligned_data() aligned_data(ARMV7M_DCACHE_LINESIZE)
+#  define px4_cache_aligned_alloc(s) memalign(ARMV7M_DCACHE_LINESIZE,(s))
+#else
+#  define px4_cache_aligned_data()
+#  define px4_cache_aligned_alloc malloc
+#endif
+
+
+__END_DECLS
--- a/platforms/nuttx/src/px4/nxp/rt106x/include/px4_arch/micro_hal.h
+++ b/platforms/nuttx/src/px4/nxp/rt106x/include/px4_arch/micro_hal.h
@@ -32,8 +32,7 @@
 ****************************************************************************/
 #pragma once

-
-#include <px4_platform/micro_hal.h>
+#include "../../../nxp_common/include/px4_arch/micro_hal.h"

 __BEGIN_DECLS

--- a/platforms/nuttx/src/px4/nxp/s32k14x/include/px4_arch/micro_hal.h
+++ b/platforms/nuttx/src/px4/nxp/s32k14x/include/px4_arch/micro_hal.h
@@ -33,7 +33,7 @@
 #pragma once


-#include <px4_platform/micro_hal.h>
+#include "../../../nxp_common/include/px4_arch/micro_hal.h"

 __BEGIN_DECLS

--- a/platforms/nuttx/src/px4/stm/stm32_common/dshot/dshot.c
+++ b/platforms/nuttx/src/px4/stm/stm32_common/dshot/dshot.c
@@ -69,14 +69,18 @@ typedef struct dshot_handler_t {
 	uint32_t		dma_size;
 } dshot_handler_t;

-#define DMA_BUFFER_MASK    (PX4_ARCH_DCACHE_LINESIZE - 1)
-#define DMA_ALIGN_UP(n)    (((n) + DMA_BUFFER_MASK) & ~DMA_BUFFER_MASK)
+#if defined(CONFIG_ARMV7M_DCACHE)
+#  define DMA_BUFFER_MASK    (ARMV7M_DCACHE_LINESIZE - 1)
+#  define DMA_ALIGN_UP(n)    (((n) + DMA_BUFFER_MASK) & ~DMA_BUFFER_MASK)
+#else
+#define DMA_ALIGN_UP(n) (n)
+#endif
 #define DSHOT_BURST_BUFFER_SIZE(motors_number) (DMA_ALIGN_UP(sizeof(uint32_t)*ONE_MOTOR_BUFF_SIZE*motors_number))

 static dshot_handler_t dshot_handler[DSHOT_TIMERS] = {};
 static uint16_t *motor_buffer = NULL;
 static uint8_t dshot_burst_buffer_array[DSHOT_TIMERS * DSHOT_BURST_BUFFER_SIZE(MAX_NUM_CHANNELS_PER_TIMER)]
-__attribute__((aligned(PX4_ARCH_DCACHE_LINESIZE))); // DMA buffer
+px4_cache_aligned_data();
 static uint32_t *dshot_burst_buffer[DSHOT_TIMERS] = {};

 #ifdef BOARD_DSHOT_MOTOR_ASSIGNMENT
--- a/platforms/nuttx/src/px4/stm/stm32_common/include/px4_arch/micro_hal.h
+++ b/platforms/nuttx/src/px4/stm/stm32_common/include/px4_arch/micro_hal.h
@@ -125,5 +125,14 @@ __BEGIN_DECLS
 #define bus_speed_LOC   STM32_CAN1_FIR(3,2)
 #define node_id_LOC     STM32_CAN1_FIR(4,1)

+#if defined(CONFIG_ARMV7M_DCACHE)
+#  define PX4_ARCH_DCACHE_ALIGNMENT ARMV7M_DCACHE_LINESIZE
+#  define px4_cache_aligned_data() aligned_data(ARMV7M_DCACHE_LINESIZE)
+#  define px4_cache_aligned_alloc(s) memalign(ARMV7M_DCACHE_LINESIZE,(s))
+#else
+#  define px4_cache_aligned_data()
+#  define px4_cache_aligned_alloc malloc
+#endif
+

 __END_DECLS
--- a/platforms/nuttx/src/px4/stm/stm32_common/include/px4_arch/px4io_serial.h
+++ b/platforms/nuttx/src/px4/stm/stm32_common/include/px4_arch/px4io_serial.h
@@ -165,6 +165,6 @@ private:
 	/**
 	 * IO Buffer storage
 	 */
-	static uint8_t _io_buffer_storage[] __attribute__((aligned(PX4_ARCH_DCACHE_LINESIZE)));
+	static uint8_t _io_buffer_storage[] px4_cache_aligned_data();
 };

--- a/platforms/nuttx/src/px4/stm/stm32f4/include/px4_arch/micro_hal.h
+++ b/platforms/nuttx/src/px4/stm/stm32f4/include/px4_arch/micro_hal.h
@@ -46,7 +46,6 @@ __BEGIN_DECLS
 # define PX4_BBSRAM_GETDESC_IOCTL STM32_BBSRAM_GETDESC_IOCTL
 #endif
 #define PX4_NUMBER_I2C_BUSES STM32_NI2C
-#define PX4_ARCH_DCACHE_LINESIZE 32 // REMOVE this The DSHOT added this and needs to be fixed THERE IS NO DCAHE on F4

 __END_DECLS

--- a/platforms/nuttx/src/px4/stm/stm32f7/include/px4_arch/micro_hal.h
+++ b/platforms/nuttx/src/px4/stm/stm32f7/include/px4_arch/micro_hal.h
@@ -46,7 +46,6 @@ __BEGIN_DECLS
 #define PX4_BBSRAM_GETDESC_IOCTL STM32F7_BBSRAM_GETDESC_IOCTL
 #define PX4_FLASH_BASE  0x08000000
 #define PX4_NUMBER_I2C_BUSES STM32F7_NI2C
-#define PX4_ARCH_DCACHE_LINESIZE ARMV7M_DCACHE_LINESIZE

 int stm32_flash_lock(void);
 int stm32_flash_unlock(void);
--- a/platforms/nuttx/src/px4/stm/stm32h7/include/px4_arch/micro_hal.h
+++ b/platforms/nuttx/src/px4/stm/stm32h7/include/px4_arch/micro_hal.h
@@ -49,8 +49,6 @@ __BEGIN_DECLS
 #define RCC_APB1RSTR_TIM2RST  RCC_APB1LRSTR_TIM2RST
 #define RCC_APB1RSTR_TIM5RST  RCC_APB1LRSTR_TIM5RST

-
-
 #include <chip.h>
 #include <hardware/stm32_flash.h>
 #include <arm_internal.h> //include up_systemreset() which is included on stm32.h
@@ -59,7 +57,6 @@ __BEGIN_DECLS
 #define PX4_BBSRAM_GETDESC_IOCTL STM32H7_BBSRAM_GETDESC_IOCTL
 #define PX4_FLASH_BASE  0x08000000
 #define PX4_NUMBER_I2C_BUSES STM32H7_NI2C
-#define PX4_ARCH_DCACHE_LINESIZE ARMV7M_DCACHE_LINESIZE //Fix me! REMOVE this The DSHOT added this and needs to be fixed

 int stm32h7_flash_lock(size_t addr);
 int stm32h7_flash_unlock(size_t addr);