px4 fmu-v6u:Add remaining SRAM4 & DTCM to heap

This commit is contained in:
David Sidrane
2021-04-01 10:39:00 -07:00
committed by Daniel Agar
parent 961bac759a
commit 38485a5d41
2 changed files with 6 additions and 3 deletions

View File

@@ -92,6 +92,7 @@ CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE=y CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE=y
CONFIG_MM_IOB=y CONFIG_MM_IOB=y
CONFIG_MM_REGIONS=4
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_BYTE_WRITE=y CONFIG_MTD_BYTE_WRITE=y
CONFIG_MTD_PARTITION=y CONFIG_MTD_PARTITION=y
@@ -160,8 +161,6 @@ CONFIG_STM32H7_BKPSRAM=y
CONFIG_STM32H7_DMA1=y CONFIG_STM32H7_DMA1=y
CONFIG_STM32H7_DMA2=y CONFIG_STM32H7_DMA2=y
CONFIG_STM32H7_DMACAPABLE=y CONFIG_STM32H7_DMACAPABLE=y
CONFIG_STM32H7_DTCMEXCLUDE=y
CONFIG_STM32H7_DTCM_PROCFS=y
CONFIG_STM32H7_FLASH_OVERRIDE_I=y CONFIG_STM32H7_FLASH_OVERRIDE_I=y
CONFIG_STM32H7_FLOWCONTROL_BROKEN=y CONFIG_STM32H7_FLOWCONTROL_BROKEN=y
CONFIG_STM32H7_I2C1=y CONFIG_STM32H7_I2C1=y

View File

@@ -200,10 +200,14 @@ SECTIONS
/* Emit the the D3 power domain section for locating BDMA data */ /* Emit the the D3 power domain section for locating BDMA data */
.sram4 (NOLOAD) : .sram4_reserve (NOLOAD) :
{ {
*(.sram4)
. = ALIGN(4);
_sram4_heap_start = ABSOLUTE(.);
} > sram4 } > sram4
/* Stabs debugging sections. */ /* Stabs debugging sections. */
.stab 0 : { *(.stab) } .stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) } .stabstr 0 : { *(.stabstr) }