mirror of
https://gitee.com/xiaohuolufeihua/bizhang_-obav.git
synced 2026-05-21 09:22:18 +00:00
io-v2: use hw description methods for timer configuration
This commit is contained in:
@@ -33,7 +33,7 @@
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add_library(drivers_board
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init.c
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timer_config.c
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timer_config.cpp
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)
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target_link_libraries(drivers_board
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@@ -136,6 +136,8 @@
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#define GPIO_PWM7 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN0)
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#define GPIO_PWM8 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN1)
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#define DIRECT_PWM_OUTPUT_CHANNELS 8
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/* SBUS pins *************************************************************/
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/* XXX these should be UART pins */
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@@ -1,159 +0,0 @@
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/****************************************************************************
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*
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* Copyright (C) 2012 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/*
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* @file px4iov2_timer_config.c
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*
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* Configuration data for the stm32 pwm_servo driver.
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*
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* Note that these arrays must always be fully-sized.
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*/
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#include <stdint.h>
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#include <drivers/drv_pwm_output.h>
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#include <px4_arch/io_timer.h>
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#include <arch/board/board.h>
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#include <stm32.h>
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#include <stm32_gpio.h>
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#include <stm32_tim.h>
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__EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
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{
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.base = STM32_TIM2_BASE,
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.clock_register = STM32_RCC_APB1ENR,
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.clock_bit = RCC_APB1ENR_TIM2EN,
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.clock_freq = STM32_APB1_TIM2_CLKIN,
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.vectorno = STM32_IRQ_TIM2,
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},
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{
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.base = STM32_TIM3_BASE,
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.clock_register = STM32_RCC_APB1ENR,
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.clock_bit = RCC_APB1ENR_TIM3EN,
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.clock_freq = STM32_APB1_TIM3_CLKIN,
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.vectorno = STM32_IRQ_TIM3,
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},
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{
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.base = STM32_TIM4_BASE,
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.clock_register = STM32_RCC_APB1ENR,
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.clock_bit = RCC_APB1ENR_TIM4EN,
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.clock_freq = STM32_APB1_TIM4_CLKIN,
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.vectorno = STM32_IRQ_TIM4,
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}
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};
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__EXPORT const io_timers_channel_mapping_t io_timers_channel_mapping = {
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.element = {
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{
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.first_channel_index = 0,
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.channel_count = 2,
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},
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{
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.first_channel_index = 4,
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.channel_count = 4,
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},
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{
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.first_channel_index = 2,
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.channel_count = 2,
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}
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}
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};
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__EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
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{
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.gpio_out = GPIO_TIM2_CH1OUT,
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.gpio_in = GPIO_TIM2_CH1IN,
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.timer_index = 0,
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.timer_channel = 1,
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.ccr_offset = STM32_GTIM_CCR1_OFFSET,
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.masks = GTIM_SR_CC1IF | GTIM_SR_CC1OF
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},
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{
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.gpio_out = GPIO_TIM2_CH2OUT,
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.gpio_in = GPIO_TIM2_CH2IN,
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.timer_index = 0,
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.timer_channel = 2,
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.ccr_offset = STM32_GTIM_CCR2_OFFSET,
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.masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF
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},
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{
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.gpio_out = GPIO_TIM4_CH3OUT,
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.gpio_in = GPIO_TIM4_CH3IN,
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.timer_index = 2,
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.timer_channel = 3,
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.ccr_offset = STM32_GTIM_CCR3_OFFSET,
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.masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF
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},
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{
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.gpio_out = GPIO_TIM4_CH4OUT,
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.gpio_in = GPIO_TIM4_CH4IN,
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.timer_index = 2,
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.timer_channel = 4,
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.ccr_offset = STM32_GTIM_CCR4_OFFSET,
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.masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF
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},
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{
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.gpio_out = GPIO_TIM3_CH1OUT,
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.gpio_in = GPIO_TIM3_CH1IN,
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.timer_index = 1,
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.timer_channel = 1,
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.ccr_offset = STM32_GTIM_CCR1_OFFSET,
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.masks = GTIM_SR_CC1IF | GTIM_SR_CC1OF
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},
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{
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.gpio_out = GPIO_TIM3_CH2OUT,
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.gpio_in = GPIO_TIM3_CH2IN,
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.timer_index = 1,
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.timer_channel = 2,
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.ccr_offset = STM32_GTIM_CCR2_OFFSET,
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.masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF
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},
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{
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.gpio_out = GPIO_TIM3_CH3OUT,
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.gpio_in = GPIO_TIM3_CH3IN,
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.timer_index = 1,
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.timer_channel = 3,
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.ccr_offset = STM32_GTIM_CCR3_OFFSET,
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.masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF
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},
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{
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.gpio_out = GPIO_TIM3_CH4OUT,
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.gpio_in = GPIO_TIM3_CH4IN,
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.timer_index = 1,
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.timer_channel = 4,
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.ccr_offset = STM32_GTIM_CCR4_OFFSET,
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.masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF
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}
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};
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55
boards/px4/io-v2/src/timer_config.cpp
Normal file
55
boards/px4/io-v2/src/timer_config.cpp
Normal file
@@ -0,0 +1,55 @@
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/****************************************************************************
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*
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* Copyright (C) 2012 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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||||
*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#include <px4_arch/io_timer_hw_description.h>
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constexpr io_timers_t io_timers[MAX_IO_TIMERS] = {
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initIOTimer(Timer::Timer2),
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initIOTimer(Timer::Timer3),
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initIOTimer(Timer::Timer4),
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};
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constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
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initIOTimerChannel(io_timers, {Timer::Timer2, Timer::Channel1}, {GPIO::PortA, GPIO::Pin0}),
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initIOTimerChannel(io_timers, {Timer::Timer2, Timer::Channel2}, {GPIO::PortA, GPIO::Pin1}),
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initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel3}, {GPIO::PortB, GPIO::Pin8}),
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initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel4}, {GPIO::PortB, GPIO::Pin9}),
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initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel1}, {GPIO::PortA, GPIO::Pin6}),
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initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel2}, {GPIO::PortA, GPIO::Pin7}),
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initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel3}, {GPIO::PortB, GPIO::Pin0}),
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initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel4}, {GPIO::PortB, GPIO::Pin1}),
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};
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constexpr io_timers_channel_mapping_t io_timers_channel_mapping =
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initIOTimerChannelMapping(io_timers, timer_io_channels);
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