.vscode/cmake-variants.yaml

CONFIG:
  default: px4_sitl_default
  choices:
    px4_sitl_default:
      short: px4_sitl_default
      buildType: RelWithDebInfo
      settings:
        CONFIG: px4_sitl_default
    px4_fmu-v2_default:
      short: px4_fmu-v2_default
      buildType: MinSizeRel
      settings:
        CONFIG: px4_fmu-v2_default
    px4_fmu-v3_default:
      short: px4_fmu-v3_default
      buildType: MinSizeRel
      settings:
        CONFIG: px4_fmu-v3_default
    px4_fmu-v4_default:
      short: px4_fmu-v4_default
      buildType: MinSizeRel
      settings:
        CONFIG: px4_fmu-v4_default
    px4_fmu-v4pro_default:
      short: px4_fmu-v4pro_default
      buildType: MinSizeRel
      settings:
        CONFIG: px4_fmu-v4pro_default
    px4_fmu-v5_default:
      short: px4_fmu-v5_default
      buildType: MinSizeRel
      settings:
        CONFIG: px4_fmu-v5_default
    px4_fmu-v5x_default:
      short: px4_fmu-v5x_default
      buildType: MinSizeRel
      settings:
        CONFIG: px4_fmu-v5x_default
    airmind_mindpx-v2_default:
      short: airmind_mindpx-v2_default
      buildType: MinSizeRel
      settings:
        CONFIG: airmind_mindpx-v2_default
    av_x-v1_default:
      short: av_x-v1_default
      buildType: MinSizeRel
      settings:
        CONFIG: av_x-v1_default
    intel_aerofc-v1_default:
      short: intel_aerofc-v1_default
      buildType: MinSizeRel
      settings:
        CONFIG: intel_aerofc-v1_default
    modalai_fc-v1_default:
      short: modalai_fc-v1_default
      buildType: MinSizeRel
      settings:
        CONFIG: modalai_fc-v1_default
    mro_ctrl-zero-f7_default:
      short: mro_ctrl-zero-f7_default
      buildType: MinSizeRel
      settings:
        CONFIG: mro_ctrl-zero-f7_default
    nxp_fmuk66-v3_default:
      short: nxp_fmuk66-v3
      buildType: MinSizeRel
      settings:
        CONFIG: nxp_fmuk66-v3_default
    holybro_durandal-v1_default:
      short: holybro_durandal-v1
      buildType: MinSizeRel
      settings:
        CONFIG: holybro_durandal-v1_default
vscode initial configuration (#10911) 2018-12-04 23:11:36 -05:00			`CONFIG:`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`default: px4_sitl_default`
vscode initial configuration (#10911) 2018-12-04 23:11:36 -05:00			`choices:`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`px4_sitl_default:`
cmake generate vscode launch.json 2019-09-19 17:42:51 -04:00			`short: px4_sitl_default`
vscode initial configuration (#10911) 2018-12-04 23:11:36 -05:00			`buildType: RelWithDebInfo`
			`settings:`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`CONFIG: px4_sitl_default`
			`px4_fmu-v2_default:`
cmake generate vscode launch.json 2019-09-19 17:42:51 -04:00			`short: px4_fmu-v2_default`
vscode updates * working debugging (one click build and debug) * SITL jmavsim * SITL gazebo * jlink px4_fmu-v{2-5} * improved syntax highlighting * GNU linker files * ROS message files msg/.msg jinja2 template files * fixed intellisense support 2019-03-22 20:55:39 -04:00			`buildType: MinSizeRel`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`settings:`
			`CONFIG: px4_fmu-v2_default`
			`px4_fmu-v3_default:`
cmake generate vscode launch.json 2019-09-19 17:42:51 -04:00			`short: px4_fmu-v3_default`
vscode updates * working debugging (one click build and debug) * SITL jmavsim * SITL gazebo * jlink px4_fmu-v{2-5} * improved syntax highlighting * GNU linker files * ROS message files msg/.msg jinja2 template files * fixed intellisense support 2019-03-22 20:55:39 -04:00			`buildType: MinSizeRel`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`settings:`
			`CONFIG: px4_fmu-v3_default`
			`px4_fmu-v4_default:`
cmake generate vscode launch.json 2019-09-19 17:42:51 -04:00			`short: px4_fmu-v4_default`
vscode updates * working debugging (one click build and debug) * SITL jmavsim * SITL gazebo * jlink px4_fmu-v{2-5} * improved syntax highlighting * GNU linker files * ROS message files msg/.msg jinja2 template files * fixed intellisense support 2019-03-22 20:55:39 -04:00			`buildType: MinSizeRel`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`settings:`
			`CONFIG: px4_fmu-v4_default`
			`px4_fmu-v4pro_default:`
cmake generate vscode launch.json 2019-09-19 17:42:51 -04:00			`short: px4_fmu-v4pro_default`
vscode updates * working debugging (one click build and debug) * SITL jmavsim * SITL gazebo * jlink px4_fmu-v{2-5} * improved syntax highlighting * GNU linker files * ROS message files msg/.msg jinja2 template files * fixed intellisense support 2019-03-22 20:55:39 -04:00			`buildType: MinSizeRel`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`settings:`
			`CONFIG: px4_fmu-v4pro_default`
			`px4_fmu-v5_default:`
cmake generate vscode launch.json 2019-09-19 17:42:51 -04:00			`short: px4_fmu-v5_default`
vscode updates * working debugging (one click build and debug) * SITL jmavsim * SITL gazebo * jlink px4_fmu-v{2-5} * improved syntax highlighting * GNU linker files * ROS message files msg/.msg jinja2 template files * fixed intellisense support 2019-03-22 20:55:39 -04:00			`buildType: MinSizeRel`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`settings:`
			`CONFIG: px4_fmu-v5_default`
vscode add v5x variant (for cmake configure) 2019-07-26 12:36:27 -04:00			`px4_fmu-v5x_default:`
cmake generate vscode launch.json 2019-09-19 17:42:51 -04:00			`short: px4_fmu-v5x_default`
vscode add v5x variant (for cmake configure) 2019-07-26 12:36:27 -04:00			`buildType: MinSizeRel`
			`settings:`
			`CONFIG: px4_fmu-v5x_default`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`airmind_mindpx-v2_default:`
cmake generate vscode launch.json 2019-09-19 17:42:51 -04:00			`short: airmind_mindpx-v2_default`
vscode updates * working debugging (one click build and debug) * SITL jmavsim * SITL gazebo * jlink px4_fmu-v{2-5} * improved syntax highlighting * GNU linker files * ROS message files msg/.msg jinja2 template files * fixed intellisense support 2019-03-22 20:55:39 -04:00			`buildType: MinSizeRel`
vscode initial configuration (#10911) 2018-12-04 23:11:36 -05:00			`settings:`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`CONFIG: airmind_mindpx-v2_default`
			`av_x-v1_default:`
cmake generate vscode launch.json 2019-09-19 17:42:51 -04:00			`short: av_x-v1_default`
vscode updates * working debugging (one click build and debug) * SITL jmavsim * SITL gazebo * jlink px4_fmu-v{2-5} * improved syntax highlighting * GNU linker files * ROS message files msg/.msg jinja2 template files * fixed intellisense support 2019-03-22 20:55:39 -04:00			`buildType: MinSizeRel`
vscode initial configuration (#10911) 2018-12-04 23:11:36 -05:00			`settings:`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`CONFIG: av_x-v1_default`
			`intel_aerofc-v1_default:`
cmake generate vscode launch.json 2019-09-19 17:42:51 -04:00			`short: intel_aerofc-v1_default`
vscode updates * working debugging (one click build and debug) * SITL jmavsim * SITL gazebo * jlink px4_fmu-v{2-5} * improved syntax highlighting * GNU linker files * ROS message files msg/.msg jinja2 template files * fixed intellisense support 2019-03-22 20:55:39 -04:00			`buildType: MinSizeRel`
vscode initial configuration (#10911) 2018-12-04 23:11:36 -05:00			`settings:`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`CONFIG: intel_aerofc-v1_default`
Fix a missed refactor of board name in vscode file 2019-10-23 17:43:15 -07:00			`modalai_fc-v1_default:`
			`short: modalai_fc-v1_default`
Add support for ModalAI FC1 2019-10-19 09:23:23 -07:00			`buildType: MinSizeRel`
			`settings:`
Fix a missed refactor of board name in vscode file 2019-10-23 17:43:15 -07:00			`CONFIG: modalai_fc-v1_default`
mRo Control Zero F7 initial board support 2019-08-14 13:13:27 -04:00			`mro_ctrl-zero-f7_default:`
cmake generate vscode launch.json 2019-09-19 17:42:51 -04:00			`short: mro_ctrl-zero-f7_default`
mRo Control Zero F7 initial board support 2019-08-14 13:13:27 -04:00			`buildType: MinSizeRel`
			`settings:`
			`CONFIG: mro_ctrl-zero-f7_default`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`nxp_fmuk66-v3_default:`
			`short: nxp_fmuk66-v3`
vscode updates * working debugging (one click build and debug) * SITL jmavsim * SITL gazebo * jlink px4_fmu-v{2-5} * improved syntax highlighting * GNU linker files * ROS message files msg/.msg jinja2 template files * fixed intellisense support 2019-03-22 20:55:39 -04:00			`buildType: MinSizeRel`
vscode initial configuration (#10911) 2018-12-04 23:11:36 -05:00			`settings:`
vscode update targets and gdb debugging 2018-12-05 10:54:28 -05:00			`CONFIG: nxp_fmuk66-v3_default`
Added board support for holybro_durandal-v1 Durandal:Fix PLL settings durandal-v1:Move I2C123, I2C4 to HSI. Not liking using HSI but, F7 has, and in reality there is no requerment for accuracy. durandal-v1:board config set 400kHz on card probe durandal-v1:Board SDMMC Clock Not greater then 25 mHz durandal-v1:Fix PLL3 configuration typo and value CI build config for holybro_durandal-v1 durandal-v1:Kconfig - add knob to ensure ARCH_MATH_H is kept Upstream changes added ARCH_HAVE_MATH_H to protect from archs without math.h from causing isses for users setting CONFIG_ARCH_MATH_H and getting errors. PX4 provides a math.h and we need CONFIG_ARCH_MATH_H set. So this Selects ARCH_HAVE_MATH_H perserving CONFIG_ARCH_MATH_H a defconfig Track master LED removal durandal-v1: bmi055 -> bmi088 bmi088 is what the board uses durandal-v1:add PX4IO support durandal-v1 rc.board_sensors: start baro durandal-v1: remove segway module durandal:Run at 480 Mhz durandal-v1: build thermal control module durandal-v1: enable IMU thermal control by default durandal-v1:Track upstream adc start moved to rc.board_sensors durandal-v1:Track upstream mavlink start moved to rc.board_mavlink 2019-08-22 12:31:57 -07:00			`holybro_durandal-v1_default:`
			`short: holybro_durandal-v1`
			`buildType: MinSizeRel`
			`settings:`
			`CONFIG: holybro_durandal-v1_default`