162 lines
4.6 KiB
C
162 lines
4.6 KiB
C
/*
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* Copyright (c) 2025, sakumisu
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "usbd_core.h"
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#include "usbh_core.h"
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#include "usb_musb_reg.h"
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#undef USB_POWER_SOFTCONN
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#undef USB_DEVCTL_FSDEV
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#undef USB_DEVCTL_LSDEV
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#undef USB_DEVCTL_SESSION
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#undef USB_POWER_HSENAB
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#undef USB_POWER_HSMODE
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#undef USB_POWER_RESET
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#undef USB_POWER_RESUME
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#ifndef CONFIG_USB_MUSB_SIFLI
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#error must define CONFIG_USB_MUSB_SIFLI when use sunxi chips
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#endif
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#include "bf0_hal.h"
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uint8_t usbd_get_musb_fifo_cfg(struct musb_fifo_cfg **cfg)
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{
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*cfg = NULL; // No FIFO configuration for this implementation, readonly
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return 0;
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}
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uint8_t usbh_get_musb_fifo_cfg(struct musb_fifo_cfg **cfg)
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{
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*cfg = NULL; // No FIFO configuration for this implementation, readonly
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return 0;
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}
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uint32_t usb_get_musb_ram_size(void)
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{
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return 0xFFFF; // No specific RAM size for this implementation
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}
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void usbd_musb_delay_ms(uint8_t ms)
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{
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/* implement later */
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}
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#ifdef PKG_CHERRYUSB_DEVICE
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void usb_dc_low_level_init(uint8_t busid)
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{
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HAL_RCC_EnableModule(RCC_MOD_USBC);
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#ifdef SOC_SF32LB58X
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//hwp_usbc->utmicfg12 = hwp_usbc->utmicfg12 | 0x3; //set xo_clk_sel
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hwp_usbc->ldo25 = hwp_usbc->ldo25 | 0xa; //set psw_en and ldo25_en
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HAL_Delay(1);
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hwp_usbc->swcntl3 = 0x1; //set utmi_en for USB2.0
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hwp_usbc->usbcfg = hwp_usbc->usbcfg | 0x40; //enable usb PLL.
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#elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
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hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN;
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#elif defined(SOC_SF32LB55X)
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hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN;
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#endif
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#ifndef SOC_SF32LB55X
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hwp_usbc->usbcfg |= (USB_USBCFG_AVALID | USB_USBCFG_AVALID_DR);
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hwp_usbc->dpbrxdisl = 0xFE;
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hwp_usbc->dpbtxdisl = 0xFE;
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#endif
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NVIC_EnableIRQ(USBC_IRQn);
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__HAL_SYSCFG_Enable_USB();
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}
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void usb_dc_low_level_deinit(uint8_t busid)
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{
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NVIC_DisableIRQ(USBC_IRQn);
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#ifdef SOC_SF32LB58X
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hwp_usbc->usbcfg &= ~0x40; // Disable usb PLL.
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hwp_usbc->swcntl3 = 0x0;
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hwp_usbc->ldo25 &= ~0xa; // Disable psw_en and ldo25_en
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#elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
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hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN);
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#elif defined(SOC_SF32LB55X)
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hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN);
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#endif
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/* reset USB to make DP change to PULLDOWN state */
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hwp_hpsys_rcc->RSTR2 |= HPSYS_RCC_RSTR2_USBC;
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HAL_Delay_us(100);
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hwp_hpsys_rcc->RSTR2 &= ~HPSYS_RCC_RSTR2_USBC;
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HAL_RCC_DisableModule(RCC_MOD_USBC);
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}
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#endif
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#ifdef PKG_CHERRYUSB_HOST
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void usb_hc_low_level_init(struct usbh_bus *bus)
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{
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HAL_RCC_EnableModule(RCC_MOD_USBC);
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#ifdef SOC_SF32LB58X
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//hwp_usbc->utmicfg12 = hwp_usbc->utmicfg12 | 0x3; //set xo_clk_sel
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hwp_usbc->ldo25 = hwp_usbc->ldo25 | 0xa; //set psw_en and ldo25_en
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HAL_Delay(1);
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hwp_usbc->swcntl3 = 0x1; //set utmi_en for USB2.0
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hwp_usbc->usbcfg = hwp_usbc->usbcfg | 0x40; //enable usb PLL.
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#elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
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hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN;
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#elif defined(SOC_SF32LB55X)
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hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN;
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#endif
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#ifndef SOC_SF32LB55X
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hwp_usbc->usbcfg |= (USB_USBCFG_AVALID | USB_USBCFG_AVALID_DR);
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hwp_usbc->dpbrxdisl = 0xFE;
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hwp_usbc->dpbtxdisl = 0xFE;
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#endif
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__HAL_SYSCFG_Enable_USB();
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hwp_usbc->usbcfg &= 0xEF;
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hwp_usbc->dbgl = 0x80;
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NVIC_EnableIRQ(USBC_IRQn);
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}
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void usb_hc_low_level_deinit(struct usbh_bus *bus)
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{
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NVIC_DisableIRQ(USBC_IRQn);
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#ifdef SOC_SF32LB58X
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hwp_usbc->usbcfg &= ~0x40; // Disable usb PLL.
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hwp_usbc->swcntl3 = 0x0;
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hwp_usbc->ldo25 &= ~0xa; // Disable psw_en and ldo25_en
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#elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
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hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN);
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#elif defined(SOC_SF32LB55X)
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hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN);
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#endif
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/* reset USB to make DP change to PULLDOWN state */
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hwp_hpsys_rcc->RSTR2 |= HPSYS_RCC_RSTR2_USBC;
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HAL_Delay_us(100);
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hwp_hpsys_rcc->RSTR2 &= ~HPSYS_RCC_RSTR2_USBC;
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HAL_RCC_DisableModule(RCC_MOD_USBC);
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}
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void musb_reset_prev(void)
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{
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#if defined(SF32LB58X)
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hwp_usbc->rsvd0 = 0xc; //58
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#endif
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}
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void musb_reset_post(void)
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{
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#if defined(SF32LB58X)
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hwp_usbc->rsvd0 = 0x0; //58
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#endif
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}
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#endif
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void USBC_IRQHandler(void)
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{
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#ifdef PKG_CHERRYUSB_DEVICE
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USBD_IRQHandler(0);
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#endif
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#ifdef PKG_CHERRYUSB_HOST
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USBH_IRQHandler(0);
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#endif
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} |