883 lines
25 KiB
C
883 lines
25 KiB
C
#include "usbh_core.h"
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#include "hpm_usb_host.h"
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#include "board.h"
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#define HCD_MAX_ENDPOINT 16
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struct hpm_ehci_pipe {
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uint8_t ep_addr;
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uint8_t dev_addr;
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volatile int result; /* The result of the transfer */
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volatile uint32_t xfrd; /* Bytes transferred (at end of transfer) */
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volatile bool waiter; /* True: Thread is waiting for a channel event */
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usb_osal_sem_t waitsem; /* Channel wait semaphore */
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usb_osal_mutex_t exclsem; /* Support mutually exclusive access */
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#ifdef CONFIG_USBHOST_ASYNCH
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usbh_asynch_callback_t callback; /* Transfer complete callback */
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void *arg; /* Argument that accompanies the callback */
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#endif
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};
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struct hpm_ehci_hcd {
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struct hpm_ehci_pipe chan[HCD_MAX_ENDPOINT][2];
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} g_hpm_ehci_hcd;
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static inline uint32_t tu_align32(uint32_t value)
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{
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return (value & 0xFFFFFFE0UL);
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}
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/*---------------------------------------------------------------------*
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* Enum Declaration
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*---------------------------------------------------------------------*/
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typedef enum {
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hcd_int_mask_usb = HPM_BITSMASK(1, 0),
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hcd_int_mask_error = HPM_BITSMASK(1, 1),
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hcd_int_mask_port_change = HPM_BITSMASK(1, 2),
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hcd_int_mask_framelist_rollover = HPM_BITSMASK(1, 3),
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hcd_int_mask_pci_host_system_error = HPM_BITSMASK(1, 4),
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hcd_int_mask_async_advance = HPM_BITSMASK(1, 5),
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hcd_int_mask_sof = HPM_BITSMASK(1, 7),
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hcd_int_mask_async = HPM_BITSMASK(1, 18),
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hcd_int_mask_periodic = HPM_BITSMASK(1, 19),
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hcd_int_mask_all = hcd_int_mask_usb | hcd_int_mask_error | hcd_int_mask_port_change |
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hcd_int_mask_framelist_rollover | hcd_int_mask_pci_host_system_error |
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hcd_int_mask_async_advance | hcd_int_mask_sof |
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hcd_int_mask_async | hcd_int_mask_periodic
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} usb_interrupt_mask_t;
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typedef struct
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{
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USB_Type *regs; /* register base */
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const uint32_t irqnum; /* IRQ number */
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} hcd_controller_t;
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static const hcd_controller_t _hcd_controller[] = {
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{ .regs = (USB_Type *)HPM_USB0_BASE, .irqnum = IRQn_USB0 },
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#ifdef HPM_USB1_BASE
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{ .regs = (USB_Type *)HPM_USB1_BASE, .irqnum = IRQn_USB1 }
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#endif
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};
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/*---------------------------------------------------------------------*
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* Variable Definitions
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*---------------------------------------------------------------------*/
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ATTR_PLACE_AT_NONCACHEABLE static usb_host_handle_t usb_host_handle;
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ATTR_PLACE_AT_NONCACHEABLE_WITH_ALIGNMENT(USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT)
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static hcd_data_t _hcd_data;
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bool hcd_init(uint8_t rhport)
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{
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uint32_t int_mask;
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if (rhport > USB_SOC_MAX_COUNT) {
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return false;
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}
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usb_host_handle.rhport = rhport;
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usb_host_handle.regs = _hcd_controller[rhport].regs;
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usb_host_handle.hcd_data = &_hcd_data;
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usb_host_handle.hcd_vbus_ctrl_cb = board_usb_vbus_ctrl;
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int_mask = hcd_int_mask_error | hcd_int_mask_port_change | hcd_int_mask_async_advance |
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hcd_int_mask_periodic | hcd_int_mask_async | hcd_int_mask_framelist_rollover;
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usb_host_init(&usb_host_handle, int_mask, USB_HOST_FRAMELIST_SIZE);
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intc_m_enable_irq(_hcd_controller[rhport].irqnum);
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return true;
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}
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/****************************************************************************
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* Name: hpm_ehci_pipe_waitsetup
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*
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* Description:
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* Set the request for the transfer complete event well BEFORE enabling
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* the transfer (as soon as we are absolutely committed to the transfer).
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* We do this to minimize race conditions. This logic would have to be
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* expanded if we want to have more than one packet in flight at a time!
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*
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* Assumptions:
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* Called from a normal thread context BEFORE the transfer has been
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* started.
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*
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****************************************************************************/
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static int hpm_ehci_pipe_waitsetup(struct hpm_ehci_pipe *chan)
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{
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size_t flags;
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int ret = -ENODEV;
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flags = usb_osal_enter_critical_section();
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/* Is the device still connected? */
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if (usbh_get_port_connect_status(1)) {
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/* Yes.. then set waiter to indicate that we expect to be informed
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* when either (1) the device is disconnected, or (2) the transfer
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* completed.
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*/
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chan->waiter = true;
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chan->result = -EBUSY;
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chan->xfrd = 0;
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#ifdef CONFIG_USBHOST_ASYNCH
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chan->callback = NULL;
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chan->arg = NULL;
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#endif
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ret = 0;
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}
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usb_osal_leave_critical_section(flags);
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return ret;
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}
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/****************************************************************************
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* Name: hpm_ehci_pipe_asynchsetup
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*
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* Description:
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* Set the request for the transfer complete event well BEFORE enabling
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* the transfer (as soon as we are absolutely committed to the to avoid
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* transfer). We do this to minimize race conditions. This logic would
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* have to be expanded if we want to have more than one packet in flight
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* at a time!
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*
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* Assumptions:
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* Might be called from the level of an interrupt handler
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*
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****************************************************************************/
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#ifdef CONFIG_USBHOST_ASYNCH
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static int hpm_ehci_pipe_asynchsetup(struct hpm_ehci_pipe *chan, usbh_asynch_callback_t callback, void *arg)
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{
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size_t flags;
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int ret = -ENODEV;
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flags = usb_osal_enter_critical_section();
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/* Is the device still connected? */
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if (usbh_get_port_connect_status(1)) {
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/* Yes.. then set waiter to indicate that we expect to be informed
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* when either (1) the device is disconnected, or (2) the transfer
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* completed.
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*/
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chan->waiter = false;
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chan->result = -EBUSY;
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chan->xfrd = 0;
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chan->callback = callback;
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chan->arg = arg;
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ret = 0;
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}
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usb_osal_leave_critical_section(flags);
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return ret;
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}
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#endif
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/****************************************************************************
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* Name: hpm_ehci_pipe_wait
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*
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* Description:
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* Wait for a transfer on a channel to complete.
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*
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* Assumptions:
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* Called from a normal thread context
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*
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****************************************************************************/
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static int hpm_ehci_pipe_wait(struct hpm_ehci_pipe *chan, uint32_t timeout)
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{
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int ret;
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/* Loop, testing for an end of transfer condition. The channel 'result'
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* was set to EBUSY and 'waiter' was set to true before the transfer;
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* 'waiter' will be set to false and 'result' will be set appropriately
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* when the transfer is completed.
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*/
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if (chan->waiter) {
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ret = usb_osal_sem_take(chan->waitsem, timeout);
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if (ret < 0) {
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return ret;
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}
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}
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/* The transfer is complete re-enable interrupts and return the result */
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ret = chan->result;
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if (ret < 0) {
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return ret;
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}
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return chan->xfrd;
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}
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/****************************************************************************
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* Name: hpm_ehci_pipe_wakeup
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*
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* Description:
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* A channel transfer has completed... wakeup any threads waiting for the
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* transfer to complete.
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*
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* Assumptions:
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* This function is called from the transfer complete interrupt handler for
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* the channel. Interrupts are disabled.
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*
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****************************************************************************/
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static void hpm_ehci_pipe_wakeup(struct hpm_ehci_pipe *chan)
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{
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usbh_asynch_callback_t callback;
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void *arg;
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int nbytes;
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/* Is the transfer complete? */
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if (chan->result != -EBUSY) {
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/* Is there a thread waiting for this transfer to complete? */
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if (chan->waiter) {
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/* Wake'em up! */
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chan->waiter = false;
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usb_osal_sem_give(chan->waitsem);
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}
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#ifdef CONFIG_USBHOST_ASYNCH
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/* No.. is an asynchronous callback expected when the transfer
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* completes?
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*/
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else if (chan->callback) {
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callback = chan->callback;
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arg = chan->arg;
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nbytes = chan->xfrd;
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chan->callback = NULL;
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chan->arg = NULL;
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if (chan->result < 0) {
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nbytes = chan->result;
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}
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callback(arg, nbytes);
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}
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#endif
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}
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}
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__WEAK void usb_hc_low_level_init(void)
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{
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}
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int usb_hc_sw_init(void)
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{
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memset(&g_hpm_ehci_hcd, 0, sizeof(struct hpm_ehci_hcd));
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for (uint8_t chidx = 0; chidx < HCD_MAX_ENDPOINT; chidx++) {
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g_hpm_ehci_hcd.chan[chidx][0].exclsem = usb_osal_mutex_create();
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g_hpm_ehci_hcd.chan[chidx][0].waitsem = usb_osal_sem_create(0);
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g_hpm_ehci_hcd.chan[chidx][1].exclsem = usb_osal_mutex_create();
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g_hpm_ehci_hcd.chan[chidx][1].waitsem = usb_osal_sem_create(0);
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}
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return 0;
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}
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int usb_hc_hw_init(void)
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{
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usb_hc_low_level_init();
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hcd_init(0);
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return 0;
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}
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int usbh_reset_port(const uint8_t port)
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{
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usb_host_port_reset(&usb_host_handle);
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return 0;
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}
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bool usbh_get_port_connect_status(const uint8_t port)
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{
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return usb_host_get_port_ccs(&usb_host_handle);
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}
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uint8_t usbh_get_port_speed(const uint8_t port)
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{
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uint8_t speed = usb_host_get_port_speed(&usb_host_handle);
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if (speed == 0) {
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speed = USB_SPEED_FULL;
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} else if (speed == 1) {
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speed = USB_SPEED_LOW;
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} else if (speed == 2) {
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speed = USB_SPEED_HIGH;
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}
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return speed;
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}
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int usbh_ep0_reconfigure(usbh_epinfo_t ep, uint8_t dev_addr, uint8_t ep_mps, uint8_t speed)
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{
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struct hpm_ehci_pipe *chan;
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int ret;
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usb_desc_endpoint_t ep_desc;
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chan = (struct hpm_ehci_pipe *)ep;
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ret = usb_osal_mutex_take(chan->exclsem);
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if (ret < 0) {
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return ret;
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}
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if (speed == 1) {
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usb_host_handle.ep_speed = 1;
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} else if (speed == 2) {
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usb_host_handle.ep_speed = 0;
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} else if (speed == 3) {
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usb_host_handle.ep_speed = 2;
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}
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usb_host_handle.hub_addr = 0;
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usb_host_handle.hub_port = 0;
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ep_desc.bEndpointAddress = 0x00;
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ep_desc.bmAttributes.xfer = 0x00;
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ep_desc.wMaxPacketSize.size = ep_mps;
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chan->dev_addr = dev_addr;
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usb_host_edpt_open(&usb_host_handle, dev_addr, &ep_desc);
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usb_osal_mutex_give(chan->exclsem);
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return ret;
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}
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int usbh_ep_alloc(usbh_epinfo_t *ep, const struct usbh_endpoint_cfg *ep_cfg)
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{
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struct hpm_ehci_pipe *chan;
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struct usbh_hubport *hport;
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uint8_t speed;
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usb_osal_sem_t waitsem;
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usb_osal_mutex_t exclsem;
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usb_desc_endpoint_t ep_desc;
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hport = ep_cfg->hport;
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if (ep_desc.bmAttributes.xfer == 0) {
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chan = &g_hpm_ehci_hcd.chan[0][0];
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} else {
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if (ep_cfg->ep_addr & 0x80) {
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chan = &g_hpm_ehci_hcd.chan[ep_cfg->ep_addr & 0x7f][1];
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} else {
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chan = &g_hpm_ehci_hcd.chan[ep_cfg->ep_addr & 0x7f][0];
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}
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}
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waitsem = chan->waitsem;
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exclsem = chan->exclsem;
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memset(chan, 0, sizeof(struct hpm_ehci_pipe));
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if (hport->speed == 1) {
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usb_host_handle.ep_speed = 1;
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} else if (hport->speed == 2) {
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usb_host_handle.ep_speed = 0;
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} else if (hport->speed == 3) {
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usb_host_handle.ep_speed = 2;
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}
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usb_host_handle.hub_addr = 0;
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usb_host_handle.hub_port = 0;
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ep_desc.bEndpointAddress = ep_cfg->ep_addr;
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ep_desc.bmAttributes.xfer = ep_cfg->ep_type;
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ep_desc.wMaxPacketSize.size = ep_cfg->ep_mps;
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chan->ep_addr = ep_cfg->ep_addr;
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chan->dev_addr = hport->dev_addr;
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usb_host_edpt_open(&usb_host_handle, hport->dev_addr, &ep_desc);
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/* restore variable */
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chan->waitsem = waitsem;
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chan->exclsem = exclsem;
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*ep = (usbh_epinfo_t)chan;
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return 0;
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}
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int usbh_ep_free(usbh_epinfo_t ep)
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{
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struct hpm_ehci_pipe *chan;
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int ret;
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chan = (struct hpm_ehci_pipe *)ep;
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ret = usb_osal_mutex_take(chan->exclsem);
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if (ret < 0) {
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return ret;
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}
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usb_osal_mutex_give(chan->exclsem);
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return 0;
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}
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int usbh_control_transfer(usbh_epinfo_t ep, struct usb_setup_packet *setup, uint8_t *buffer)
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{
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struct hpm_ehci_pipe *chan;
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int ret;
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chan = (struct hpm_ehci_pipe *)ep;
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ret = usb_osal_mutex_take(chan->exclsem);
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if (ret < 0) {
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return ret;
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}
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ret = hpm_ehci_pipe_waitsetup(chan);
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if (ret < 0) {
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goto error_out;
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}
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usb_host_setup_send(&usb_host_handle, chan->dev_addr, (uint8_t *)setup);
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ret = hpm_ehci_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
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if (ret < 0) {
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goto error_out;
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}
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if (setup->wLength && buffer) {
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if (setup->bmRequestType & 0x80) {
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chan->waiter = true;
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chan->result = -EBUSY;
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usb_host_edpt_xfer(&usb_host_handle, chan->dev_addr, 0x80, buffer, setup->wLength);
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ret = hpm_ehci_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
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if (ret < 0) {
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goto error_out;
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}
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chan->waiter = true;
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chan->result = -EBUSY;
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usb_host_edpt_xfer(&usb_host_handle, chan->dev_addr, 0x00, NULL, 0);
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ret = hpm_ehci_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
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if (ret < 0) {
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goto error_out;
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}
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} else {
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chan->waiter = true;
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chan->result = -EBUSY;
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usb_host_edpt_xfer(&usb_host_handle, chan->dev_addr, 0x00, buffer, setup->wLength);
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ret = hpm_ehci_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
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if (ret < 0) {
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goto error_out;
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}
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chan->waiter = true;
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chan->result = -EBUSY;
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usb_host_edpt_xfer(&usb_host_handle, chan->dev_addr, 0x00, NULL, 0);
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ret = hpm_ehci_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
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if (ret < 0) {
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goto error_out;
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}
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}
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} else {
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chan->waiter = true;
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chan->result = -EBUSY;
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usb_host_edpt_xfer(&usb_host_handle, chan->dev_addr, 0x80, NULL, 0);
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ret = hpm_ehci_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
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if (ret < 0) {
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goto error_out;
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}
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}
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usb_osal_mutex_give(chan->exclsem);
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return ret;
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error_out:
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chan->waiter = false;
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usb_osal_mutex_give(chan->exclsem);
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return ret;
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}
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int usbh_ep_bulk_transfer(usbh_epinfo_t ep, uint8_t *buffer, uint32_t buflen, uint32_t timeout)
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{
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struct hpm_ehci_pipe *chan;
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int ret;
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chan = (struct hpm_ehci_pipe *)ep;
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ret = usb_osal_mutex_take(chan->exclsem);
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if (ret < 0) {
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return ret;
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}
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ret = hpm_ehci_pipe_waitsetup(chan);
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if (ret < 0) {
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goto error_out;
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}
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|
|
usb_host_edpt_xfer(&usb_host_handle, chan->dev_addr, chan->ep_addr, buffer, buflen);
|
|
ret = hpm_ehci_pipe_wait(chan, timeout);
|
|
if (ret < 0) {
|
|
goto error_out;
|
|
}
|
|
usb_osal_mutex_give(chan->exclsem);
|
|
return ret;
|
|
error_out:
|
|
chan->waiter = false;
|
|
usb_osal_mutex_give(chan->exclsem);
|
|
return ret;
|
|
}
|
|
|
|
int usbh_ep_intr_transfer(usbh_epinfo_t ep, uint8_t *buffer, uint32_t buflen, uint32_t timeout)
|
|
{
|
|
struct hpm_ehci_pipe *chan;
|
|
int ret;
|
|
|
|
chan = (struct hpm_ehci_pipe *)ep;
|
|
|
|
ret = usb_osal_mutex_take(chan->exclsem);
|
|
if (ret < 0) {
|
|
return ret;
|
|
}
|
|
|
|
ret = hpm_ehci_pipe_waitsetup(chan);
|
|
if (ret < 0) {
|
|
goto error_out;
|
|
}
|
|
|
|
usb_host_edpt_xfer(&usb_host_handle, chan->dev_addr, chan->ep_addr, buffer, buflen);
|
|
ret = hpm_ehci_pipe_wait(chan, timeout);
|
|
if (ret < 0) {
|
|
goto error_out;
|
|
}
|
|
usb_osal_mutex_give(chan->exclsem);
|
|
return ret;
|
|
error_out:
|
|
chan->waiter = false;
|
|
usb_osal_mutex_give(chan->exclsem);
|
|
return ret;
|
|
}
|
|
|
|
int usbh_ep_bulk_async_transfer(usbh_epinfo_t ep, uint8_t *buffer, uint32_t buflen, usbh_asynch_callback_t callback, void *arg)
|
|
{
|
|
struct hpm_ehci_pipe *chan;
|
|
int ret;
|
|
|
|
chan = (struct hpm_ehci_pipe *)ep;
|
|
|
|
ret = usb_osal_mutex_take(chan->exclsem);
|
|
if (ret < 0) {
|
|
return ret;
|
|
}
|
|
|
|
ret = hpm_ehci_pipe_asynchsetup(chan, callback, arg);
|
|
if (ret < 0) {
|
|
goto error_out;
|
|
}
|
|
|
|
usb_host_edpt_xfer(&usb_host_handle, chan->dev_addr, chan->ep_addr, buffer, buflen);
|
|
|
|
error_out:
|
|
usb_osal_mutex_give(chan->exclsem);
|
|
return ret;
|
|
}
|
|
|
|
int usbh_ep_intr_async_transfer(usbh_epinfo_t ep, uint8_t *buffer, uint32_t buflen, usbh_asynch_callback_t callback, void *arg)
|
|
{
|
|
struct hpm_ehci_pipe *chan;
|
|
int ret;
|
|
|
|
chan = (struct hpm_ehci_pipe *)ep;
|
|
|
|
ret = usb_osal_mutex_take(chan->exclsem);
|
|
if (ret < 0) {
|
|
return ret;
|
|
}
|
|
|
|
ret = hpm_ehci_pipe_asynchsetup(chan, callback, arg);
|
|
if (ret < 0) {
|
|
goto error_out;
|
|
}
|
|
|
|
usb_host_edpt_xfer(&usb_host_handle, chan->dev_addr, chan->ep_addr, buffer, buflen);
|
|
|
|
error_out:
|
|
usb_osal_mutex_give(chan->exclsem);
|
|
return ret;
|
|
}
|
|
|
|
int usb_ep_cancel(usbh_epinfo_t ep)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
/*---------------------------------------------------------------------*
|
|
* HCD Interrupt Handler
|
|
*---------------------------------------------------------------------*/
|
|
/* async_advance is handshake between usb stack & ehci controller.
|
|
* This isr mean it is safe to modify previously removed queue head from async list.
|
|
* In tinyusb, queue head is only removed when device is unplugged.
|
|
*/
|
|
static void async_advance_isr(usb_host_handle_t *handle)
|
|
{
|
|
hcd_qhd_t *qhd_pool = handle->hcd_data->qhd_pool;
|
|
|
|
for (uint32_t i = 0; i < HCD_MAX_ENDPOINT; i++) {
|
|
if (qhd_pool[i].removing) {
|
|
qhd_pool[i].removing = 0;
|
|
qhd_pool[i].used = 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
static void port_connect_status_change_isr(usb_host_handle_t *handle)
|
|
{
|
|
struct hpm_ehci_pipe *chan;
|
|
/* NOTE There is an sequence plug->unplug->…..-> plug if device is powering with pre-plugged device */
|
|
if (usb_host_get_port_ccs(handle)) {
|
|
usbh_event_notify_handler(USBH_EVENT_CONNECTED, 1);
|
|
} else { /* device unplugged */
|
|
for (uint8_t chidx = 0; chidx < HCD_MAX_ENDPOINT; chidx++) {
|
|
for (uint8_t j = 0; j < 2; j++) {
|
|
chan = &g_hpm_ehci_hcd.chan[chidx][j];
|
|
if (chan->waiter) {
|
|
chan->result = -ENXIO;
|
|
hpm_ehci_pipe_wakeup(chan);
|
|
}
|
|
}
|
|
}
|
|
usb_host_device_close(&usb_host_handle, 1);
|
|
usbh_event_notify_handler(USBH_EVENT_DISCONNECTED, 1);
|
|
}
|
|
}
|
|
|
|
static void qhd_xfer_complete_isr(hcd_qhd_t *p_qhd)
|
|
{
|
|
struct hpm_ehci_pipe *chan;
|
|
bool is_ioc;
|
|
|
|
while (p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active) {
|
|
/* TD need to be freed and removed from qhd, before invoking callback */
|
|
is_ioc = (p_qhd->p_qtd_list_head->int_on_complete != 0);
|
|
p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes;
|
|
|
|
p_qhd->p_qtd_list_head->used = 0; /* free QTD */
|
|
usb_host_qtd_remove_1st_from_qhd(p_qhd);
|
|
|
|
if (is_ioc) {
|
|
if (p_qhd->ep_number == 0) {
|
|
chan = &g_hpm_ehci_hcd.chan[0][0];
|
|
} else {
|
|
if (p_qhd->qtd_overlay.pid == usb_pid_in) {
|
|
chan = &g_hpm_ehci_hcd.chan[p_qhd->ep_number][1];
|
|
} else {
|
|
chan = &g_hpm_ehci_hcd.chan[p_qhd->ep_number][0];
|
|
}
|
|
}
|
|
|
|
chan->xfrd += p_qhd->total_xferred_bytes;
|
|
chan->result = 0;
|
|
|
|
p_qhd->total_xferred_bytes = 0;
|
|
hpm_ehci_pipe_wakeup(chan);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void async_list_xfer_complete_isr(hcd_qhd_t *const async_head)
|
|
{
|
|
hcd_qhd_t *p_qhd = async_head;
|
|
|
|
do {
|
|
if (!p_qhd->qtd_overlay.halted) { /* halted or error is processed in error isr */
|
|
qhd_xfer_complete_isr(p_qhd);
|
|
}
|
|
|
|
p_qhd = usb_host_qhd_next(p_qhd);
|
|
p_qhd = (hcd_qhd_t *)sys_address_to_core_local_mem(USB_HOST_MCU_CORE, (uint32_t)p_qhd);
|
|
|
|
} while (p_qhd != async_head); /* async list traversal, stop if loop around */
|
|
}
|
|
|
|
static void period_list_xfer_complete_isr(usb_host_handle_t *handle, uint8_t interval_ms)
|
|
{
|
|
uint16_t max_loop = 0;
|
|
uint32_t const period_1ms_addr = (uint32_t)usb_host_get_period_head(handle, 1);
|
|
hcd_link_t next_item = *usb_host_get_period_head(handle, interval_ms);
|
|
hcd_qhd_t *p_qhd_int;
|
|
|
|
/* TODO abstract max loop guard for period */
|
|
while (!next_item.terminate &&
|
|
!(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) &&
|
|
max_loop < (HCD_MAX_ENDPOINT + usb_max_itd + usb_max_sitd) * 1) {
|
|
switch (next_item.type) {
|
|
case usb_qtype_qhd:
|
|
p_qhd_int = (hcd_qhd_t *)tu_align32(next_item.address);
|
|
if (!p_qhd_int->qtd_overlay.halted) {
|
|
qhd_xfer_complete_isr(p_qhd_int);
|
|
}
|
|
|
|
break;
|
|
|
|
case usb_qtype_itd:
|
|
case usb_qtype_sitd:
|
|
case usb_qtype_fstn:
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
next_item = *usb_host_list_next(&next_item);
|
|
max_loop++;
|
|
}
|
|
}
|
|
|
|
static void qhd_xfer_error_isr(usb_host_handle_t *handle, hcd_qhd_t *p_qhd)
|
|
{
|
|
struct hpm_ehci_pipe *chan;
|
|
hcd_qtd_t *p_setup;
|
|
|
|
if ((p_qhd->dev_addr != 0 && p_qhd->qtd_overlay.halted) || /* addr0 cannot be protocol STALL */
|
|
usb_host_qhd_has_xact_error(p_qhd)) {
|
|
/* no error bits are set, endpoint is halted due to STALL */
|
|
p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes;
|
|
|
|
if (p_qhd->ep_number == 0) {
|
|
chan = &g_hpm_ehci_hcd.chan[0][0];
|
|
} else {
|
|
if (p_qhd->qtd_overlay.pid == usb_pid_in) {
|
|
chan = &g_hpm_ehci_hcd.chan[p_qhd->ep_number][1];
|
|
} else {
|
|
chan = &g_hpm_ehci_hcd.chan[p_qhd->ep_number][0];
|
|
}
|
|
}
|
|
|
|
if (p_qhd->qtd_overlay.babble_err) {
|
|
chan->result = -EPERM;
|
|
}
|
|
if (p_qhd->qtd_overlay.xact_err) {
|
|
chan->result = -EIO;
|
|
}
|
|
if (p_qhd->qtd_overlay.buffer_err) {
|
|
chan->result = -EIO;
|
|
}
|
|
|
|
/* TODO skip unplugged device */
|
|
|
|
p_qhd->p_qtd_list_head->used = 0; /* free QTD */
|
|
usb_host_qtd_remove_1st_from_qhd(p_qhd);
|
|
|
|
if (0 == p_qhd->ep_number) {
|
|
/* control cannot be halted --> clear all qtd list */
|
|
p_qhd->p_qtd_list_head = NULL;
|
|
p_qhd->p_qtd_list_tail = NULL;
|
|
|
|
p_qhd->qtd_overlay.next.terminate = 1;
|
|
p_qhd->qtd_overlay.alternate.terminate = 1;
|
|
p_qhd->qtd_overlay.halted = 0;
|
|
|
|
p_setup = usb_host_qtd_control(handle, p_qhd->dev_addr);
|
|
p_setup->used = 0;
|
|
}
|
|
|
|
p_qhd->total_xferred_bytes = 0;
|
|
hpm_ehci_pipe_wakeup(chan);
|
|
}
|
|
}
|
|
|
|
static void xfer_error_isr(usb_host_handle_t *handle)
|
|
{
|
|
hcd_qhd_t *const async_head = usb_host_qhd_async_head(handle);
|
|
hcd_qhd_t *p_qhd = async_head;
|
|
hcd_qhd_t *p_qhd_int;
|
|
hcd_link_t next_item, *p;
|
|
|
|
/*------------- async list -------------*/
|
|
do {
|
|
qhd_xfer_error_isr(handle, p_qhd);
|
|
p_qhd = usb_host_qhd_next(p_qhd);
|
|
p_qhd = (hcd_qhd_t *)sys_address_to_core_local_mem(USB_HOST_MCU_CORE, (uint32_t)p_qhd);
|
|
} while (p_qhd != async_head); /* async list traversal, stop if loop around */
|
|
|
|
/*------------- TODO refractor period list -------------*/
|
|
uint32_t const period_1ms_addr = (uint32_t)usb_host_get_period_head(handle, 1);
|
|
for (uint8_t interval_ms = 1; interval_ms <= USB_HOST_FRAMELIST_SIZE; interval_ms *= 2) {
|
|
next_item = *usb_host_get_period_head(handle, interval_ms);
|
|
|
|
/* TODO abstract max loop guard for period */
|
|
while (!next_item.terminate &&
|
|
!(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address))) {
|
|
switch (next_item.type) {
|
|
case usb_qtype_qhd:
|
|
p_qhd_int = (hcd_qhd_t *)tu_align32(next_item.address);
|
|
qhd_xfer_error_isr(handle, p_qhd_int);
|
|
break;
|
|
|
|
case usb_qtype_itd:
|
|
case usb_qtype_sitd:
|
|
case usb_qtype_fstn:
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
p = usb_host_list_next(&next_item);
|
|
p = (hcd_link_t *)sys_address_to_core_local_mem(USB_HOST_MCU_CORE, (uint32_t)p);
|
|
next_item = *p;
|
|
}
|
|
}
|
|
}
|
|
|
|
/*------------- Host Controller Driver's Interrupt Handler -------------*/
|
|
void hcd_int_handler(uint8_t rhport)
|
|
{
|
|
uint32_t status;
|
|
usb_host_handle_t *handle = &usb_host_handle;
|
|
|
|
/* Acknowledge handled interrupt */
|
|
status = usb_host_status_flags(handle);
|
|
status &= usb_host_interrupts(handle);
|
|
usb_host_clear_status_flags(handle, status);
|
|
|
|
if (status == 0) {
|
|
return;
|
|
}
|
|
|
|
if (status & hcd_int_mask_framelist_rollover) {
|
|
handle->hcd_data->uframe_number += (USB_HOST_FRAMELIST_SIZE << 3);
|
|
}
|
|
|
|
if (status & hcd_int_mask_port_change) {
|
|
if (usb_host_port_csc(handle)) {
|
|
port_connect_status_change_isr(handle);
|
|
}
|
|
}
|
|
|
|
if (status & hcd_int_mask_error) {
|
|
xfer_error_isr(handle);
|
|
}
|
|
|
|
/*------------- some QTD/SITD/ITD with IOC set is completed -------------*/
|
|
if (status & hcd_int_mask_async) {
|
|
async_list_xfer_complete_isr(usb_host_qhd_async_head(handle));
|
|
}
|
|
|
|
if (status & hcd_int_mask_periodic) {
|
|
for (uint8_t i = 1; i <= USB_HOST_FRAMELIST_SIZE; i *= 2) {
|
|
period_list_xfer_complete_isr(handle, i);
|
|
}
|
|
}
|
|
|
|
/*------------- There is some removed async previously -------------*/
|
|
if (status & hcd_int_mask_async_advance) { /* need to place after EHCI_INT_MASK_ASYNC */
|
|
async_advance_isr(handle);
|
|
}
|
|
}
|
|
|
|
void isr_usb0(void)
|
|
{
|
|
hcd_int_handler(0);
|
|
}
|
|
SDK_DECLARE_EXT_ISR_M(IRQn_USB0, isr_usb0)
|
|
|
|
#ifdef HPM_USB1_BASE
|
|
void isr_usb1(void)
|
|
{
|
|
hcd_int_handler(1);
|
|
}
|
|
SDK_DECLARE_EXT_ISR_M(IRQn_USB1, isr_usb1)
|
|
#endif |