255 lines
7.3 KiB
C
255 lines
7.3 KiB
C
/*
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* Copyright (c) 2024, sakumisu
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "usbd_core.h"
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#include "usbh_core.h"
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#if __has_include("stm32f1xx_hal.h")
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#include "stm32f1xx_hal.h"
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#elif __has_include("stm32f2xx_hal.h")
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#include "stm32f2xx_hal.h"
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#elif __has_include("stm32f4xx_hal.h")
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#include "stm32f4xx_hal.h"
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#elif __has_include("stm32f7xx_hal.h")
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#include "stm32f7xx_hal.h"
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#elif __has_include("stm32h7xx_hal.h")
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#include "stm32h7xx_hal.h"
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#elif __has_include("stm32h7rsxx_hal.h")
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#include "stm32h7rsxx_hal.h"
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#elif __has_include("stm32l4xx_hal.h")
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#include "stm32l4xx_hal.h"
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#endif
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#if !defined(HAL_HCD_MODULE_ENABLED) && !defined(HAL_PCD_MODULE_ENABLED)
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#error please define HAL_HCD_MODULE_ENABLED or HAL_PCD_MODULE_ENABLED in stm32xxx_hal_conf.h
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#endif
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typedef void (*usb_dwc2_irq)(uint8_t busid);
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struct dwc2_instance {
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USB_OTG_GlobalTypeDef *Instance;
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};
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static usb_dwc2_irq g_usb_dwc2_irq[2];
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static uint8_t g_usb_dwc2_busid[2] = { 0, 0 };
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static struct dwc2_instance g_dwc2_instance;
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#ifdef HAL_PCD_MODULE_ENABLED
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void usb_dc_low_level_init(uint8_t busid)
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{
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if (g_usbdev_bus[busid].reg_base == 0x40040000UL) { // USB_OTG_HS_PERIPH_BASE
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g_usb_dwc2_busid[1] = busid;
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g_usb_dwc2_irq[1] = USBD_IRQHandler;
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} else {
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g_usb_dwc2_busid[0] = busid;
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g_usb_dwc2_irq[0] = USBD_IRQHandler;
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}
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g_dwc2_instance.Instance = (USB_OTG_GlobalTypeDef *)g_usbdev_bus[busid].reg_base;
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HAL_PCD_MspInit((PCD_HandleTypeDef *)&g_dwc2_instance);
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}
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void usb_dc_low_level_deinit(uint8_t busid)
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{
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if (g_usbdev_bus[busid].reg_base == 0x40040000UL) { // USB_OTG_HS_PERIPH_BASE
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g_usb_dwc2_busid[1] = 0;
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g_usb_dwc2_irq[1] = NULL;
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} else {
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g_usb_dwc2_busid[0] = 0;
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g_usb_dwc2_irq[0] = NULL;
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}
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g_dwc2_instance.Instance = (USB_OTG_GlobalTypeDef *)g_usbdev_bus[busid].reg_base;
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HAL_PCD_MspDeInit((PCD_HandleTypeDef *)&g_dwc2_instance);
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}
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#endif
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#ifdef HAL_HCD_MODULE_ENABLED
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void usb_hc_low_level_init(struct usbh_bus *bus)
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{
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if (bus->hcd.reg_base == 0x40040000UL) { // USB_OTG_HS_PERIPH_BASE
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g_usb_dwc2_busid[1] = bus->hcd.hcd_id;
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g_usb_dwc2_irq[1] = USBH_IRQHandler;
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} else {
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g_usb_dwc2_busid[0] = bus->hcd.hcd_id;
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g_usb_dwc2_irq[0] = USBH_IRQHandler;
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}
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g_dwc2_instance.Instance = (USB_OTG_GlobalTypeDef *)bus->hcd.reg_base;
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HAL_HCD_MspInit((HCD_HandleTypeDef *)&g_dwc2_instance);
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}
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void usb_hc_low_level_deinit(struct usbh_bus *bus)
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{
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if (bus->hcd.reg_base == 0x40040000UL) { // USB_OTG_HS_PERIPH_BASE
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g_usb_dwc2_busid[1] = 0;
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g_usb_dwc2_irq[1] = NULL;
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} else {
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g_usb_dwc2_busid[0] = 0;
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g_usb_dwc2_irq[0] = NULL;
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}
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g_dwc2_instance.Instance = (USB_OTG_GlobalTypeDef *)bus->hcd.reg_base;
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HAL_HCD_MspDeInit((HCD_HandleTypeDef *)&g_dwc2_instance);
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}
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#endif
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/* you can find this config in function: USB_DevInit, file:stm32xxx_ll_usb.c, for example:
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*
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* USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN;
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* USBx->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
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* USBx->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN;
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* USBx->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN;
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*
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*/
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#if defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F732xx) || defined(STM32F733xx)
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/**
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* @brief Enables control of a High Speed USB PHY
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* Init the low level hardware : GPIO, CLOCK, NVIC...
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* @param USBx Selected device
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* @retval HAL status
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*/
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static int usb_hsphy_init(uint32_t hse_value)
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{
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__IO uint32_t count = 0U;
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/* Enable LDO */
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USB_HS_PHYC->USB_HS_PHYC_LDO |= USB_HS_PHYC_LDO_ENABLE;
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/* wait for LDO Ready */
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while ((USB_HS_PHYC->USB_HS_PHYC_LDO & USB_HS_PHYC_LDO_STATUS) == 0U) {
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count++;
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if (count > 200000U) {
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return -1;
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}
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}
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/* Controls PHY frequency operation selection */
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if (hse_value == 12000000U) /* HSE = 12MHz */
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{
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USB_HS_PHYC->USB_HS_PHYC_PLL = (0x0U << 1);
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} else if (hse_value == 12500000U) /* HSE = 12.5MHz */
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{
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USB_HS_PHYC->USB_HS_PHYC_PLL = (0x2U << 1);
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} else if (hse_value == 16000000U) /* HSE = 16MHz */
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{
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USB_HS_PHYC->USB_HS_PHYC_PLL = (0x3U << 1);
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} else if (hse_value == 24000000U) /* HSE = 24MHz */
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{
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USB_HS_PHYC->USB_HS_PHYC_PLL = (0x4U << 1);
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} else if (hse_value == 25000000U) /* HSE = 25MHz */
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{
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USB_HS_PHYC->USB_HS_PHYC_PLL = (0x5U << 1);
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} else if (hse_value == 32000000U) /* HSE = 32MHz */
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{
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USB_HS_PHYC->USB_HS_PHYC_PLL = (0x7U << 1);
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} else {
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/* ... */
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}
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/* Control the tuning interface of the High Speed PHY */
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USB_HS_PHYC->USB_HS_PHYC_TUNE |= USB_HS_PHYC_TUNE_VALUE;
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/* Enable PLL internal PHY */
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USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL_PLLEN;
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/* 2ms Delay required to get internal phy clock stable */
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HAL_Delay(2U);
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return 0;
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}
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#endif
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uint32_t usbd_get_dwc2_gccfg_conf(uint32_t reg_base)
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{
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#if __has_include("stm32h7xx.h") || __has_include("stm32f7xx.h") || __has_include("stm32l4xx.h")
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#define USB_OTG_GLB ((USB_OTG_GlobalTypeDef *)(reg_base))
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/* B-peripheral session valid override enable */
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USB_OTG_GLB->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
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USB_OTG_GLB->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
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#endif
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#ifdef CONFIG_USB_HS
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#if defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F732xx) || defined(STM32F733xx)
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USB_OTG_GLB->GCCFG = (1 << 23);
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usb_hsphy_init(25000000U);
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return (1 << 23); /* Enable USB HS PHY USBx->GCCFG |= USB_OTG_GCCFG_PHYHSEN;*/
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#elif __has_include("stm32h7rsxx.h")
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return (1 << 21);
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#else
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return 0;
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#endif
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#else
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#if __has_include("stm32h7xx.h") || __has_include("stm32f7xx.h") || __has_include("stm32l4xx.h")
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return (1 << 16);
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#else
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return ((1 << 16) | (1 << 21));
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#endif
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#endif
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}
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uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base)
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{
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#if __has_include("stm32h7xx.h") || __has_include("stm32f7xx.h") || __has_include("stm32l4xx.h")
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#define USB_OTG_GLB ((USB_OTG_GlobalTypeDef *)(reg_base))
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/* B-peripheral session valid override enable */
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USB_OTG_GLB->GOTGCTL &= ~USB_OTG_GOTGCTL_BVALOEN;
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USB_OTG_GLB->GOTGCTL &= ~USB_OTG_GOTGCTL_BVALOVAL;
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#endif
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#ifdef CONFIG_USB_HS
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#if defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F732xx) || defined(STM32F733xx)
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USB_OTG_GLB->GCCFG = (1 << 23);
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usb_hsphy_init(25000000U);
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return (1 << 23); /* Enable USB HS PHY USBx->GCCFG |= USB_OTG_GCCFG_PHYHSEN;*/
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#else
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return 0;
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#endif
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#else
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#if __has_include("stm32h7xx.h") || __has_include("stm32f7xx.h") || __has_include("stm32l4xx.h")
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return (1 << 16);
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#else
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return ((1 << 16) | (1 << 21));
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#endif
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#endif
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}
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extern uint32_t SystemCoreClock;
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void usbd_dwc2_delay_ms(uint8_t ms)
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{
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uint32_t count = SystemCoreClock / 1000 * ms;
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while (count--) {
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__asm volatile("nop");
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}
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}
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void OTG_FS_IRQHandler(void)
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{
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g_usb_dwc2_irq[0](g_usb_dwc2_busid[0]);
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}
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void OTG_HS_IRQHandler(void)
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{
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g_usb_dwc2_irq[1](g_usb_dwc2_busid[1]);
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}
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#ifdef CONFIG_USB_DCACHE_ENABLE
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void usb_dcache_clean(uintptr_t addr, size_t size)
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{
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SCB_CleanDCache_by_Addr((void *)addr, size);
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}
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void usb_dcache_invalidate(uintptr_t addr, size_t size)
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{
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SCB_InvalidateDCache_by_Addr((void *)addr, size);
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}
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void usb_dcache_flush(uintptr_t addr, size_t size)
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{
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SCB_CleanInvalidateDCache_by_Addr((void *)addr, size);
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}
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#endif |