194 lines
5.7 KiB
C
194 lines
5.7 KiB
C
/*
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* Copyright (c) 2025, sakumisu
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "usbd_core.h"
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#include "usbh_core.h"
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__WEAK void USBD_IRQHandler(uint8_t busid)
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{
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}
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__WEAK void USBH_IRQHandler(uint8_t busid)
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{
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}
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#if defined(N32H473) || defined(N32H474) || defined(N32H475) || defined(N32H482) || defined(N32H487)
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#include "n32h47x_48x_rcc.h"
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#include "n32h47x_48x_gpio.h"
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#include "n32h47x_48x_exti.h"
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#include "misc.h"
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typedef void (*usb_dwc2_irq)(uint8_t busid);
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static usb_dwc2_irq g_usb_dwc2_irq;
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static volatile uint8_t g_usb_dwc2_busid = 0;
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static void usbhs_common_init(void)
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{
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RCC_EnableAHB1PeriphClk(RCC_AHB_PERIPHEN_GPIOA | RCC_AHB_PERIPHEN_GPIOB, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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/* PLL= 240MHz */
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#if (HSE_VALUE == 8000000)
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/* Select PLL clock as USBHS clock source , clock 15 divisions = 16M */
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RCC_ConfigUSBPLLPresClk(RCC_USBPLLCLK_SRC_PLL, RCC_USBPLLCLK_DIV15);
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/* Select the corresponding bandwidth and frequency*/
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RCC_ConfigUSBHSBandwidth(RCC_USBHS_BW_16M);
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/* Select USBHS clock source frequency */
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RCC_ConfigUSBHSFrequency(RCC_USBHS_FREQ_16_OR_32M);
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/* Select PLL as USBHS clock */
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RCC_ConfigUSBHSClk(RCC_USBHS_CLKSRC_PLLPRES);
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#else //HSE 16M
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RCC_ConfigUSBHSBandwidth(RCC_USBHS_BW_16M);
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RCC_ConfigUSBHSFrequency(RCC_USBHS_FREQ_16_OR_32M);
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RCC_ConfigUSBHSClk(RCC_USBHS_CLKSRC_HSE);
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#endif
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/* Reset the USBHS phy clock*/
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RCC_EnableAHBPeriphReset(RCC_AHBPRST_USBHSPHYRST);
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/* Enables the USBHS peripheral clock*/
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RCC_EnableAHBPeriphClk(RCC_AHB_PERIPHEN_USBHS, ENABLE);
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NVIC_InitType NVIC_InitStructure;
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// EXTI_InitType EXTI_InitStructure;
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// NVIC_InitStructure.NVIC_IRQChannel = USB_HS_WKUP_IRQn;
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// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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// NVIC_Init(&NVIC_InitStructure);
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NVIC_InitStructure.NVIC_IRQChannel = USB_HS_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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/* Configure the EXTI line 23 connected internally to the USBHS IP */
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// EXTI_ClrITPendBit(EXTI_LINE23);
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// EXTI_InitStructure.EXTI_Line = EXTI_LINE23;
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// EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
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// EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
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// EXTI_InitStructure.EXTI_LineCmd = ENABLE;
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// EXTI_InitPeripheral(&EXTI_InitStructure);
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}
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static void usbhs_gpio_init(void)
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{
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GPIO_InitType GPIO_InitStructure;
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RCC_EnableAHB1PeriphClk(RCC_AHB_PERIPHEN_GPIOA | RCC_AHB_PERIPHEN_GPIOB | RCC_AHB_PERIPHEN_GPIOE, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(0, 0, GPIO_RMP_SWJ_SWD);
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GPIO_InitStruct(&GPIO_InitStructure);
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#ifdef USBHS_HOST
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GPIO_InitStructure.Pin = GPIO_PIN_1;
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GPIO_InitStructure.GPIO_Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitPeripheral(GPIOE, &GPIO_InitStructure);
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GPIO_ResetBits(GPIOE, GPIO_PIN_1);
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GPIO_InitStructure.Pin = GPIO_PIN_3;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
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GPIO_ResetBits(GPIOB, GPIO_PIN_3);
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#endif
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// VBUS
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// GPIO_InitStructure.Pin = GPIO_PIN_13;
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// GPIO_InitStructure.GPIO_Mode = GPIO_MODE_INPUT;
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// GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
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// // SOF
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// GPIO_InitStructure.Pin = GPIO_PIN_4;
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// GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;
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// GPIO_InitStructure.GPIO_Alternate = 8; // SOF
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// GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);
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// // ID
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// GPIO_InitStructure.Pin = GPIO_PIN_12;
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// GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;
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// GPIO_InitStructure.GPIO_Alternate = 14; // ID
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// GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
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}
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void usb_dc_low_level_init(uint8_t busid)
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{
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g_usb_dwc2_irq = USBD_IRQHandler;
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g_usb_dwc2_busid = busid;
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usbhs_common_init();
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RCC->USBHSCTRL2 |= (uint32_t)0x01 << 19;
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RCC->USBHSCTRL1 |= (uint32_t)0x01 << 31;
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}
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void usb_dc_low_level_deinit(uint8_t busid)
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{
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NVIC_InitType NVIC_InitStructure;
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NVIC_InitStructure.NVIC_IRQChannel = USB_HS_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
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NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
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NVIC_Init(&NVIC_InitStructure);
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RCC_EnableAHBPeriphReset(RCC_AHBPRST_USBHSPHYRST);
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/* Enables the USBHS peripheral clock*/
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RCC_EnableAHBPeriphClk(RCC_AHB_PERIPHEN_USBHS, DISABLE);
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}
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void usb_hc_low_level_init(struct usbh_bus *bus)
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{
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g_usb_dwc2_irq = USBH_IRQHandler;
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g_usb_dwc2_busid = 0;
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usbhs_common_init();
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RCC->USBHSCTRL2 &= ~(uint32_t)0x01 << 19;
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RCC->USBHSCTRL1 |= (uint32_t)0x01 << 31;
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}
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void usb_hc_low_level_deinit(struct usbh_bus *bus)
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{
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NVIC_InitType NVIC_InitStructure;
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NVIC_InitStructure.NVIC_IRQChannel = USB_HS_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
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NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
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NVIC_Init(&NVIC_InitStructure);
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RCC_EnableAHBPeriphReset(RCC_AHBPRST_USBHSPHYRST);
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/* Enables the USBHS peripheral clock*/
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RCC_EnableAHBPeriphClk(RCC_AHB_PERIPHEN_USBHS, DISABLE);
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}
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uint32_t usbd_get_dwc2_gccfg_conf(uint32_t reg_base)
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{
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return 0;
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}
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uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base)
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{
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return 0;
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}
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void USB_HS_IRQHandler(void)
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{
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g_usb_dwc2_irq(g_usb_dwc2_busid);
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}
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extern uint32_t SystemCoreClock;
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void usbd_dwc2_delay_ms(uint8_t ms)
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{
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uint32_t count = SystemCoreClock / 1000 * ms;
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while (count--) {
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__asm volatile("nop");
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}
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}
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#endif
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