322 lines
11 KiB
C
322 lines
11 KiB
C
/**
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******************************************************************************
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* @file ald_dac.h
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* @brief Header file of DAC Module library.
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*
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* @version V1.0
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* @date 28 Jun 2019
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* @author AE Team
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* @note
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* Change Logs:
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* Date Author Notes
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* 28 Jun 2019 AE Team The first version
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*
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* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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**********************************************************************************
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*/
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#ifndef __ALD_DAC_H__
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#define __ALD_DAC_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "utils.h"
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/** @addtogroup ES32FXXX_ALD
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* @{
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*/
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/** @addtogroup DAC
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* @{
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*/
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/** @defgroup DAC_Pubulic_Types DAC Pubulic Types
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* @{
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*/
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/**
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* @brief DAC channel
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*/
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typedef enum {
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DAC_CHANNEL_0 = 1U, /**< DAC channel 0 */
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DAC_CHANNEL_1 = 2U, /**< DAC channel 1 */
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DAC_CHANNEL_COMB = 3U, /**< DAC channel 0 and 1 */
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} dac_channel_t;
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/**
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* @brief DAC convert mode
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*/
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typedef enum {
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DAC_CONV_MODE_CONTINUOUS = 0U, /**< DAC set in continuous mode */
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DAC_CONV_MODE_SAMPLEHOLD = 1U, /**< DAC set in sample/hold mode */
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DAC_CONV_MODE_SAMPLEOFF = 2U, /**< DAC set in sample/shut off mode */
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} dac_conv_mode_t;
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/**
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* @brief DAC out mode
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*/
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typedef enum {
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DAC_OUTPUT_DISABLE = 0U, /**< DAC output disable */
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DAC_OUTPUT_PIN = 1U, /**< DAC output to pin enable */
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DAC_OUTPUT_ADC = 2U, /**< DAC output to adc and acmp enable */
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DAC_OUTPUT_PIN_ADC = 3U, /**< DAC output to pin, adc and acmp enable */
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} dac_out_mode_t;
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/**
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* @brief DAC pis input channel
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*/
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typedef enum {
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DAC_PIS_CH_0 = 0U, /**< PIS channel 0 triggers DAC channel conversion */
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DAC_PIS_CH_1 = 1U, /**< PIS channel 1 triggers DAC channel conversion */
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DAC_PIS_CH_2 = 2U, /**< PIS channel 2 triggers DAC channel conversion */
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DAC_PIS_CH_3 = 3U, /**< PIS channel 3 triggers DAC channel conversion */
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DAC_PIS_CH_4 = 4U, /**< PIS channel 4 triggers DAC channel conversion */
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DAC_PIS_CH_5 = 5U, /**< PIS channel 5 triggers DAC channel conversion */
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DAC_PIS_CH_6 = 6U, /**< PIS channel 6 triggers DAC channel conversion */
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DAC_PIS_CH_7 = 7U, /**< PIS channel 7 triggers DAC channel conversion */
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DAC_PIS_CH_8 = 8U, /**< PIS channel 8 triggers DAC channel conversion */
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DAC_PIS_CH_9 = 9U, /**< PIS channel 9 triggers DAC channel conversion */
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DAC_PIS_CH_10 = 10U, /**< PIS channel 10 triggers DAC channel conversion */
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DAC_PIS_CH_11 = 11U, /**< PIS channel 11 triggers DAC channel conversion */
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} dac_pissel_t;
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/**
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* @brief DAC negative reference voltage definition
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*/
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typedef enum {
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DAC_NEG_REF_VSS = 0x0U, /**< DAC negative regerence voltage vss */
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DAC_NEG_REF_VREFN = 0x1U, /**< DAC negative regerence voltage vrefn */
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} dac_neg_ref_t;
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/**
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* @brief DAC positive reference voltage definition
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*/
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typedef enum {
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DAC_POS_REF_VDD = 0x0U, /**< DAC posotove reference is VDD */
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DAC_POS_REF_2V = 0x1U, /**< DAC posotove reference is internal 2V */
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DAC_POS_REF_VREEFP = 0x2U, /**< DAC posotove reference is VREEFP */
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DAC_POS_REF_VREEFP_BUF = 0x3U, /**< DAC posotove reference is VREEFP BUFFER */
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} dac_pos_ref_t;
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/**
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* @brief Refresh interval select
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*/
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typedef enum {
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DAC_REFRESH_8 = 0U, /**< Channel refreshed every 8 cycles */
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DAC_REFRESH_16 = 1U, /**< Channel refreshed every 16 cycles */
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DAC_REFRESH_32 = 2U, /**< Channel refreshed every 32 cycles */
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DAC_REFRESH_64 = 3U, /**< Channel refreshed every 64 cycles */
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} dac_refresh_t;
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/**
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* @brief DAC prescale
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*/
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typedef enum {
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DAC_PRES_DIV_1 = 0U, /**< No division */
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DAC_PRES_DIV_2 = 1U, /**< 2 clock division */
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DAC_PRES_DIV_4 = 2U, /**< 4 clock division */
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DAC_PRES_DIV_8 = 3U, /**< 8 clock division */
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DAC_PRES_DIV_16 = 4U, /**< 16 clock division */
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DAC_PRES_DIV_32 = 5U, /**< 32 clock division */
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DAC_PRES_DIV_64 = 6U, /**< 64 clock division */
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DAC_PRES_DIV_128 = 7U, /**< 128 clock division */
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} dac_prescale_div_t;
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/**
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* @brief DAC output trigger select
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*/
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typedef enum {
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DAC_TRIGGER_BY_DATA = 0U, /**< Channel is triggered by CHxDATA or COMBDATA write */
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DAC_TRIGGER_BY_PIS = 1U, /**< Channel is triggered by PIS input */
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} dac_trigger_t;
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/**
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* @brief DAC interrupt type
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*/
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typedef enum {
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DAC_IT_CH0 = (1U << 0), /**< Channel 0 conversion complete interrupt */
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DAC_IT_CH1 = (1U << 1), /**< Channel 1 conversion complete interrupt */
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DAC_IT_CH0_UF = (1U << 4), /**< Channel 0 data underflow interrupt */
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DAC_IT_CH1_UF = (1U << 5), /**< Channel 1 data underflow interrupt */
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} dac_it_t;
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/**
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* @brief DAC interrupt flag type
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*/
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typedef enum {
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DAC_FLAG_CH0 = (1U << 0), /**< Channel 0 conversion complete interrupt flag */
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DAC_FLAG_CH1 = (1U << 1), /**< Channel 1 conversion complete interrupt flag */
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DAC_FLAG_CH0_UF = (1U << 4), /**< Channel 0 data underflow interrupt flag */
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DAC_FLAG_CH1_UF = (1U << 5), /**< Channel 1 data underflow interrupt flag */
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} dac_flag_t;
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/**
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* @brief DAC state flag
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*/
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typedef enum {
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DAC_CH0_BSY = (1U << 0), /**< Channel_0 is BUSY */
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DAC_CH1_BSY = (1U << 1), /**< Channel_1 is BUSY */
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} dac_status_t;
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/**
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* @brief DAC init structure definition
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*/
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typedef struct {
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dac_conv_mode_t conv_mode; /**< Conversion mode */
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dac_out_mode_t out_mode; /**< Select output mode */
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dac_refresh_t refresh; /**< Refresh interval select */
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dac_prescale_div_t div; /**< Prescaler setting */
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type_func_t ch0_reset; /**< Select if prescaler is reset on channel 0 start */
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type_func_t o_ctrl_pis; /**< Enable pis control of dac output enable */
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type_func_t sine; /**< Sine mode enable/disable */
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type_func_t diff; /**< Differential mode enable/disable */
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dac_neg_ref_t n_ref; /**< The negative reference voltage select */
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dac_pos_ref_t p_ref; /**< The positive reference voltage select */
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} dac_init_t;
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/**
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* @brief DAC channel initialize structure definition
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*/
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typedef struct {
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type_func_t enable; /**< DAC channel output enable/disable */
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dac_trigger_t trigger; /**< Select channel conversion trigger */
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type_func_t refresh_en; /**< Set automatic refresh of channel function */
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dac_pissel_t pis_ch; /**< Select channel pis input channel */
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} dac_channel_config_t;
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/**
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* @brief DAC handle Structure definition
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*/
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typedef struct dac_handle_s {
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DAC_TypeDef *perh; /**< Register base address */
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dac_init_t init; /**< DAC initialize parameters */
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lock_state_t lock; /**< Locking object */
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void (*cbk)(struct dac_handle_s *arg, uint32_t event); /**< DAC event callback */
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} dac_handle_t;
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/**
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* @}
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*/
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/** @defgroup DAC_Public_Macros DAC Public Macros
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* @{
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*/
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#define DAC_CH0_ENABLE() (SET_BIT(DAC0->CH0CTRL, DAC_CH0CTRL_EN_MSK))
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#define DAC_CH1_ENABLE() (SET_BIT(DAC0->CH1CTRL, DAC_CH1CTRL_EN_MSK))
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#define DAC_CH0_DISABLE() (CLEAR_BIT(DAC0->CH0CTRL, DAC_CH0CTRL_EN_MSK))
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#define DAC_CH1_DISABLE() (CLEAR_BIT(DAC0->CH1CTRL, DAC_CH1CTRL_EN_MSK))
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#define DAC_EVENT_CH0_CPLT 0x0
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#define DAC_EVENT_CH1_CPLT 0x1
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#define DAC_EVENT_CH0_UF 0x2
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#define DAC_EVENT_CH1_UF 0x3
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/**
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* @}
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*/
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/** @defgroup DAC_Private_Macros DAC Private Macros
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* @{
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*/
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#define IS_DAC_TYPE(x) ((x) == DAC0)
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#define IS_DAC_CONVERT_TYPE(x) (((x) == DAC_CONV_MODE_CONTINUOUS) || \
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((x) == DAC_CONV_MODE_SAMPLEHOLD) || \
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((x) == DAC_CONV_MODE_SAMPLEOFF))
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#define IS_DAC_OUTPUT_TYPE(x) (((x) == DAC_OUTPUT_DISABLE) || \
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((x) == DAC_OUTPUT_PIN) || \
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((x) == DAC_OUTPUT_ADC) || \
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((x) == DAC_OUTPUT_PIN_ADC))
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#define IS_DAC_NEG_REFRESH_TYPE(x) (((x) == DAC_NEG_REF_VSS) || \
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((x) == DAC_NEG_REF_VREFN))
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#define IS_DAC_POS_REFRESH_TYPE(x) (((x) == DAC_POS_REF_VDD) || \
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((x) == DAC_POS_REF_2V) || \
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((x) == DAC_POS_REF_VREEFP) || \
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((x) == DAC_POS_REF_VREEFP_BUF))
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#define IS_DAC_REFRESH_TYPE(x) (((x) == DAC_REFRESH_8) || \
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((x) == DAC_REFRESH_16) || \
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((x) == DAC_REFRESH_32) || \
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((x) == DAC_REFRESH_64))
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#define IS_DAC_CHANNEL_TYPE(x) (((x) == DAC_CHANNEL_0) || \
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((x) == DAC_CHANNEL_1) || \
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((x) == DAC_CHANNEL_COMB))
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#define IS_DAC_PRESCALE_TYPE(x) (((x) == DAC_PRES_DIV_1) || \
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((x) == DAC_PRES_DIV_2) || \
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((x) == DAC_PRES_DIV_4) || \
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((x) == DAC_PRES_DIV_8) || \
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((x) == DAC_PRES_DIV_16) || \
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((x) == DAC_PRES_DIV_32) || \
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((x) == DAC_PRES_DIV_64) || \
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((x) == DAC_PRES_DIV_128))
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#define IS_DAC_INTERRUPT_TYPE(x) (((x) == DAC_IT_CH0) || \
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((x) == DAC_IT_CH1) || \
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((x) == DAC_IT_CH0_UF) || \
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((x) == DAC_IT_CH1_UF))
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#define IS_DAC_FLAG_TYPE(x) (((x) == DAC_FLAG_CH0) || \
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((x) == DAC_FLAG_CH1) || \
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((x) == DAC_FLAG_CH0_UF) || \
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((x) == DAC_FLAG_CH1_UF))
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#define IS_DAC_PISSEL_CH_TYPE(x) (((x) == DAC_PIS_CH_0) || \
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((x) == DAC_PIS_CH_1) || \
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((x) == DAC_PIS_CH_2) || \
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((x) == DAC_PIS_CH_3) || \
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((x) == DAC_PIS_CH_4) || \
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((x) == DAC_PIS_CH_5) || \
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((x) == DAC_PIS_CH_6) || \
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((x) == DAC_PIS_CH_7) || \
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((x) == DAC_PIS_CH_8) || \
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((x) == DAC_PIS_CH_9) || \
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((x) == DAC_PIS_CH_10) || \
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((x) == DAC_PIS_CH_11))
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#define IS_DAC_STATUS_TYPE(x) (((x) == DAC_CH0_BSY) || \
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((x) == DAC_CH1_BSY))
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#define IS_DAC_TRIGGER_TYPE(x) (((x) == DAC_TRIGGER_BY_DATA) || \
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((x) == DAC_TRIGGER_BY_PIS))
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/**
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* @}
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*/
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/** @addtogroup DAC_Public_Functions
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* @{
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*/
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ald_status_t ald_dac_reset(dac_handle_t *hperh);
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ald_status_t ald_dac_init(dac_handle_t *hperh);
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ald_status_t ald_dac_channel_config(dac_handle_t *hperh, dac_channel_config_t *config, dac_channel_t ch);
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void ald_dac_output_set(dac_handle_t *hperh, dac_channel_t ch, uint32_t value);
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flag_status_t ald_dac_get_status(dac_handle_t *hperh, dac_status_t status);
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void ald_dac_interrupt_config(dac_handle_t *hperh, dac_it_t it, type_func_t state);
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it_status_t ald_dac_get_it_status(dac_handle_t *hperh, dac_it_t it);
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flag_status_t ald_dac_get_flag_status(dac_handle_t *hperh, dac_flag_t flag);
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flag_status_t ald_dac_get_mask_flag_status(dac_handle_t *hperh, dac_flag_t flag);
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void ald_dac_clear_flag_status(dac_handle_t *hperh, dac_flag_t flag);
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void ald_dac_irq_handler(dac_handle_t *hperh);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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extern "C" }
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#endif
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#endif /* __ALD_DAC_H */
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