From c5f2ffa6f9711b5c484fce071cd06dc39311ed86 Mon Sep 17 00:00:00 2001
From: sakumisu <1203593632@qq.com>
Date: Sun, 7 Apr 2024 13:17:01 +0800
Subject: [PATCH] export ehci config macros

---
 cherryusb_config_template.h |  9 +++++++--
 port/ehci/usb_ehci_priv.h   | 10 ++++++++--
 2 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/cherryusb_config_template.h b/cherryusb_config_template.h
index ed09c706..00cd2cbf 100644
--- a/cherryusb_config_template.h
+++ b/cherryusb_config_template.h
@@ -33,7 +33,7 @@
 
 /* ================= USB Device Stack Configuration ================ */
 
-#define CONFIG_USBDEV_MAX_BUS 1    // for now, bus num must be 1 except hpm ip
+#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip
 
 /* Ep0 max transfer buffer, specially for receiving data from ep0 out */
 #define CONFIG_USBDEV_REQUEST_BUFFER_LEN 256
@@ -97,7 +97,6 @@
 
 /* ================ USB HOST Stack Configuration ================== */
 
-#define CONFIG_USBHOST_MAX_BUS              1
 #define CONFIG_USBHOST_MAX_RHPORTS          1
 #define CONFIG_USBHOST_MAX_EXTHUBS          1
 #define CONFIG_USBHOST_MAX_EHPORTS          4
@@ -154,6 +153,7 @@
 
 /* ================ USB Host Port Configuration ==================*/
 
+#define CONFIG_USBHOST_MAX_BUS 1
 // #define CONFIG_USBHOST_PIPE_NUM 10
 
 /* ================ EHCI Configuration ================ */
@@ -161,7 +161,12 @@
 #define CONFIG_USB_EHCI_HCCR_OFFSET     (0x0)
 #define CONFIG_USB_OHCI_HCOR_OFFSET     (0x400)
 #define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024
+#define CONFIG_USB_EHCI_QH_NUM          CONFIG_USBHOST_PIPE_NUM
+#define CONFIG_USB_EHCI_QTD_NUM         3
+#define CONFIG_USB_EHCI_ITD_NUM         20
 // #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE
 // #define CONFIG_USB_EHCI_CONFIGFLAG
+// #define CONFIG_USB_EHCI_ISO
+// #define CONFIG_USB_EHCI_WITH_OHCI
 
 #endif
diff --git a/port/ehci/usb_ehci_priv.h b/port/ehci/usb_ehci_priv.h
index 771dae3a..03fa270c 100644
--- a/port/ehci/usb_ehci_priv.h
+++ b/port/ehci/usb_ehci_priv.h
@@ -18,9 +18,15 @@
 #define EHCI_ADDR2QTD(x) ((struct ehci_qtd_hw *)(uintptr_t)((uint32_t)(x) & ~0x1F))
 #define EHCI_ADDR2ITD(x) ((struct ehci_itd_hw *)(uintptr_t)((uint32_t)(x) & ~0x1F))
 
+#ifndef CONFIG_USB_EHCI_QH_NUM
 #define CONFIG_USB_EHCI_QH_NUM  CONFIG_USBHOST_PIPE_NUM
-#define CONFIG_USB_EHCI_QTD_NUM 3
-#define CONFIG_USB_EHCI_ITD_NUM 20
+#endif
+#ifndef CONFIG_USB_EHCI_QTD_NUM
+#define CONFIG_USB_EHCI_QTD_NUM  3
+#endif
+#ifndef CONFIG_USB_EHCI_ITD_NUM
+#define CONFIG_USB_EHCI_ITD_NUM  20
+#endif
 
 extern uint8_t usbh_get_port_speed(struct usbh_bus *bus, const uint8_t port);