From 75e6dc6300805331e885f5dc45edf8c2154f2799 Mon Sep 17 00:00:00 2001 From: sakumisu <1203593632@qq.com> Date: Thu, 19 Dec 2024 21:20:33 +0800 Subject: [PATCH] update(port/dwc2/usb_glue_gd): add check for ep --- docs/source/q&a.rst | 14 +++++++++++++- docs/source/share.rst | 4 +++- port/dwc2/README.md | 5 +++++ port/dwc2/usb_glue_gd.c | 4 ++++ 4 files changed, 25 insertions(+), 2 deletions(-) diff --git a/docs/source/q&a.rst b/docs/source/q&a.rst index 56a1d058..48064cde 100644 --- a/docs/source/q&a.rst +++ b/docs/source/q&a.rst @@ -43,7 +43,19 @@ ST 命名为 USB_OTG_FS, USB_OTG_HS,并不是说明本身是高速或者全速 GD IP 问题 ------------------ -GD IP 采用 DWC2,但是读取的硬件参数都是 0(我也不懂为什么不给人知道),因此需要用户自行知道硬件信息,并修改代码下面 check 的内容,然后删除 while1。 +GD IP 采用 DWC2,但是读取的硬件参数都是 0(我也不懂为什么不给人知道),因此需要用户自行知道硬件信息,以下列举 GD32F4 的信息: + +CONFIG_USBDEV_EP_NUM pa11/pa12 引脚必须为 4,PB14/PB15 引脚必须为 6,并删除 usb_dc_dwc2.c 中 while(1){} + +- 当 CONFIG_USBDEV_EP_NUM 为4 时,fifo_num 不得大于 320 字 +- 当 CONFIG_USBDEV_EP_NUM 为6 时,fifo_num 不得大于 1280 字 + +其次 GD 复位以后无法使用 EPDIS 功能关闭端点,需要用户删除 reset 中断中的以下代码: + +.. code-block:: C + + USB_OTG_INEP(i)->DIEPCTL = (USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK); + USB_OTG_OUTEP(i)->DOEPCTL = (USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK); dwc2 has less endpoints than config, please check --------------------------------------------------------------- diff --git a/docs/source/share.rst b/docs/source/share.rst index d52dbfcd..b2b2f0d2 100644 --- a/docs/source/share.rst +++ b/docs/source/share.rst @@ -17,4 +17,6 @@ - `printalyzer-timer: F-Stop enlarging timer and print exposure meter `_ -- `MiSTeryNano: Atari STE MiSTery core for the Tang Nano 20k FPGA `_ \ No newline at end of file +- `MiSTeryNano: Atari STE MiSTery core for the Tang Nano 20k FPGA `_ + +- `Cherryuf2 `_ \ No newline at end of file diff --git a/port/dwc2/README.md b/port/dwc2/README.md index faf9ab5a..3218b31c 100644 --- a/port/dwc2/README.md +++ b/port/dwc2/README.md @@ -20,6 +20,11 @@ If you are using more than one port, all ip parameters must be the same(like fif ## GD32 +CONFIG_USBDEV_EP_NUM 必须为4 或者 6,并删除 usb_dc_dwc2.c 中 while(1){} + +当 CONFIG_USBDEV_EP_NUM 为4 时,fifo_num 不得大于 320 字 +当 CONFIG_USBDEV_EP_NUM 为6 时,fifo_num 不得大于 1280 字 + - GD32F30X_CL - GD32F405、GD32F407 - GD32F450 diff --git a/port/dwc2/usb_glue_gd.c b/port/dwc2/usb_glue_gd.c index 7121ac9d..f3fa4d92 100644 --- a/port/dwc2/usb_glue_gd.c +++ b/port/dwc2/usb_glue_gd.c @@ -7,6 +7,10 @@ #include "stdint.h" #include "usb_dwc2_reg.h" +#if CONFIG_USBDEV_EP_NUM != 4 && CONFIG_USBDEV_EP_NUM != 6 +#error "gd32 only has 4 endpoints for pa11/pa12 and 6 endpoints for pb14/pb15" +#endif + /* you can find this config in function:usb_core_init, file:drv_usb_core.c, for example: * * usb_regs->gr->GCCFG |= GCCFG_PWRON | GCCFG_VBUSACEN | GCCFG_VBUSBCEN;