Fix esp32-p4 cache operation adaptation issue

This commit is contained in:
LiPeng
2025-06-04 15:45:34 +08:00
committed by sakumisu
parent 88cbed9807
commit 1feaed024e
2 changed files with 5 additions and 7 deletions

View File

@@ -1,6 +1,6 @@
cmake_minimum_required(VERSION 3.15) cmake_minimum_required(VERSION 3.15)
if(CONFIG_CHERRYUSB) if(CONFIG_CHERRYUSB OR ESP_PLATFORM)
if(BL_SDK_BASE) if(BL_SDK_BASE)
message(STATUS "enable cherryusb in bouffalo_sdk") message(STATUS "enable cherryusb in bouffalo_sdk")
@@ -71,7 +71,7 @@ elseif(ESP_PLATFORM)
${cherryusb_incs} ${cherryusb_incs}
${freertos_include} ${freertos_include}
PRIV_REQUIRES PRIV_REQUIRES
usb usb esp_mm
LDFRAGMENTS LDFRAGMENTS
${ldfragments} ${ldfragments}
) )

View File

@@ -8,6 +8,7 @@
#include "sdkconfig.h" #include "sdkconfig.h"
#include "esp_rom_sys.h" #include "esp_rom_sys.h"
#include "esp_attr.h"
/* ================ USB common Configuration ================ */ /* ================ USB common Configuration ================ */
@@ -28,7 +29,7 @@
// #define CONFIG_USB_DCACHE_ENABLE // #define CONFIG_USB_DCACHE_ENABLE
/* attribute data into no cache ram */ /* attribute data into no cache ram */
#define USB_NOCACHE_RAM_SECTION #define USB_NOCACHE_RAM_SECTION DRAM_DMA_ALIGNED_ATTR
/* use usb_memcpy default for high performance but cost more flash memory. /* use usb_memcpy default for high performance but cost more flash memory.
* And, arm libc has a bug that memcpy() may cause data misalignment when the size is not a multiple of 4. * And, arm libc has a bug that memcpy() may cause data misalignment when the size is not a multiple of 4.
@@ -340,9 +341,6 @@
#define CONFIG_USB_DCACHE_ENABLE #define CONFIG_USB_DCACHE_ENABLE
#undef CONFIG_USB_ALIGN_SIZE #undef CONFIG_USB_ALIGN_SIZE
#define CONFIG_USB_ALIGN_SIZE 32 #define CONFIG_USB_ALIGN_SIZE CONFIG_CACHE_L1_CACHE_LINE_SIZE
void usb_dcache_clean(uintptr_t addr, uint32_t size);
void usb_dcache_invalidate(uintptr_t addr, uint32_t size);
void usb_dcache_flush(uintptr_t addr, uint32_t size);
#endif #endif