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Update usb_dc_dwc2.c

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According to DS, the status register is W1C, |= will read the register first, write 1 to the corresponding bit, then write the register, if there is more than one status, it will be cleared by mistake. I'm not sure if other IP dcd's have the same problem?
This commit is contained in:
tyustli
2024-08-27 14:16:03 +08:00
committed by sakumisu
parent e603389638
commit 0d561ea313
1 changed files with 4 additions and 4 deletions
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8
port/dwc2/usb_dc_dwc2.c
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@@ -1111,7 +1111,7 @@ void USBD_IRQHandler(uint8_t busid)
}
}
if (gint_status & USB_OTG_GINTSTS_USBRST) {
USB_OTG_GLB->GINTSTS |= USB_OTG_GINTSTS_USBRST;
USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_USBRST;
USB_OTG_DEV->DCTL &= ~USB_OTG_DCTL_RWUSIG;
dwc2_flush_txfifo(busid, 0x10U);
@@ -1202,14 +1202,14 @@ void USBD_IRQHandler(uint8_t busid)
}
if (gint_status & USB_OTG_GINTSTS_SOF) {
USB_OTG_GLB->GINTSTS |= USB_OTG_GINTSTS_SOF;
USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_SOF;
}
if (gint_status & USB_OTG_GINTSTS_USBSUSP) {
USB_OTG_GLB->GINTSTS |= USB_OTG_GINTSTS_USBSUSP;
USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_USBSUSP;
usbd_event_suspend_handler(busid);
}
if (gint_status & USB_OTG_GINTSTS_WKUINT) {
USB_OTG_GLB->GINTSTS |= USB_OTG_GINTSTS_WKUINT;
USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_WKUINT;
usbd_event_resume_handler(busid);
}
if (gint_status & USB_OTG_GINTSTS_OTGINT) {