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Update 2024-12

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This commit is contained in:
Martin Loren
2024-12-05 15:16:35 +08:00
parent b44b44262d
commit df1d35353c
180 changed files with 2080 additions and 8012 deletions
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2
.platformio/platforms/at32/boards/generic_f435.json
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@@ -32,7 +32,7 @@
"name": "Generic_F435",
"upload": {
"maximum_ram_size": 524288,
"maximum_size": 262144,
"maximum_size": 1048576,
"protocol": "serial",
"protocols": [
"jlink",

47
.platformio/platforms/at32/boards/generic_f437.json Normal file
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@@ -0,0 +1,47 @@
{
"build": {
"core": "at32",
"cpu": "cortex-m4",
"extra_flags": "-DAT32F437RGT7 -DAT_START_F437_V1",
"f_cpu": "288000000L",
"hwids": [
[
"0x2E3C",
"0xDF11"
]
],
"mcu": "at32f437xg",
"product_line": "AT32F435_437",
"variant": "AT32F4xx/F437_F437(T-U)"
},
"debug": {
"default_tools": [
"stlink"
],
"jlink_device": "AT32F437xGx",
"openocd_extra_args": [
"-c",
"reset_config none"
],
"openocd_target": "stm32f4x",
"svd_path": "STM32F437xx.svd"
},
"frameworks": [
"cmsis"
],
"name": "Generic_F437",
"upload": {
"maximum_ram_size": 524288,
"maximum_size": 1048576,
"protocol": "serial",
"protocols": [
"jlink",
"cmsis-dap",
"stlink",
"serial",
"blackmagic"
]
},
"url": "https://www.arterychip.com/en/product/AT32F437.jsp",
"vendor": "Artery"
}

15
.platformio/platforms/at32/builder/frameworks/cmsis.py
View File

@@ -42,7 +42,10 @@ mcu = board.get("build.mcu", "")
product_line = board.get("build.product_line", "")
assert product_line, "Missing MCU or Product Line field"
print("-------------------------------------------------------------------------------");
print("AT32 PlatformIO porting by MartinLoren®");
print("-------------------------------------------------------------------------------");
print("Version: 2024-12");
#env.SConscript("_bare.py")
#build_script = "_bare.py"
@@ -58,7 +61,11 @@ SConscript(build_script)
CMSIS_DIR = platform.get_package_dir("framework-cmsis")
CMSIS_DEVICE_DIR = platform.get_package_dir("framework-cmsis-" + mcu[0:7])
LDSCRIPTS_DIR = join('%s' % platform.get_dir() or "", "ldscripts")
LDSCRIPTS_DIR = platform.get_package_dir("tool-ldscripts-at32")
print("Environment:");
print(" CMSIS_DIR: "+CMSIS_DIR);
print(" CMSIS_DEVICE_DIR: "+CMSIS_DEVICE_DIR);
print(" LDSCRIPTS_DIR: "+LDSCRIPTS_DIR);
assert all(os.path.isdir(d) for d in (CMSIS_DIR, CMSIS_DEVICE_DIR, LDSCRIPTS_DIR))
@@ -81,9 +88,9 @@ def generate_ldscript(default_ldscript_path):
def get_linker_script():
ldscript_match = glob.glob(os.path.join(
LDSCRIPTS_DIR, mcu[0:7], mcu[0:11].upper() + "*_FLASH.ld"))
#print(os.path.join(LDSCRIPTS_DIR, mcu[0:7], mcu[0:11].upper() + "*_FLASH.ld"))
if ldscript_match and os.path.isfile(ldscript_match[0]):
print("LD Script file: " +ldscript_match[0])
return ldscript_match[0]
default_ldscript = os.path.join(
@@ -99,7 +106,7 @@ def get_linker_script():
def prepare_startup_file(src_path):
startup_file = os.path.join(src_path, "gcc", "startup_%s.s" % product_line.lower())
startup_file = os.path.join(src_path, "gcc", "startup_%s.S" % product_line.lower())
print("Startup file: " + startup_file)
# Change file extension to uppercase:
if not os.path.isfile(startup_file) and os.path.isfile(startup_file[:-2] + ".s"):

205
.platformio/platforms/at32/examples/AT32F435/cmsis-blink/include/usb_conf.h Normal file
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@@ -0,0 +1,205 @@
/**
******************************************************************************
* File : USB_Device/VirtualComPort_loopback/inc/usb_conf.h
* Version: V1.2.2
* Date : 2020-07-01
* Brief : USB Endpoint config header.
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USB_CONF_F435_H
#define __USB_CONF_F435_H
#ifdef __cplusplus
extern "C" {
#endif
#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"
/** @addtogroup AT32F435_periph_examples
* @{
*/
/** @addtogroup 435_USB_device_vcp_loopback
* @{
*/
/**
* @brief enable usb device mode
*/
#define USE_OTG_DEVICE_MODE
/**
* @brief enable usb host mode
*/
/* #define USE_OTG_HOST_MODE */
/**
* @brief select otgfs1 or otgfs2 define
*/
/* use otgfs1 */
#define OTG_USB_ID 1
/* use otgfs2 */
//#define OTG_USB_ID 2
#if (OTG_USB_ID == 1)
#define USB_ID 0
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define OTG_IRQ OTGFS1_IRQn
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define OTG_PIN_GPIO GPIOA
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_12
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_DM GPIO_PINS_11
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define OTG_PIN_VBUS GPIO_PINS_9
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define OTG_PIN_ID GPIO_PINS_10
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
//#define OTG_PIN_SOF_GPIO GPIOA
//#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
//#define OTG_PIN_SOF GPIO_PINS_8
//#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define OTG_PIN_MUX GPIO_MUX_10
#endif
#if (OTG_USB_ID == 2)
#define USB_ID 1
#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
#define OTG_IRQ OTGFS2_IRQn
#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
#define OTG_PIN_GPIO GPIOB
#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_15
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
#define OTG_PIN_DM GPIO_PINS_14
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
#define OTG_PIN_VBUS GPIO_PINS_13
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
#define OTG_PIN_ID GPIO_PINS_12
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_4
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
#define OTG_PIN_MUX GPIO_MUX_12
#endif
/**
* @brief usb device mode config
*/
#ifdef USE_OTG_DEVICE_MODE
/**
* @brief usb device mode fifo
*/
/* otg1 device fifo */
#define USBD_RX_SIZE 128
#define USBD_EP0_TX_SIZE 64//24
#define USBD_EP1_TX_SIZE 64//20
#define USBD_EP2_TX_SIZE 20
#define USBD_EP3_TX_SIZE 20
#define USBD_EP4_TX_SIZE 20
#define USBD_EP5_TX_SIZE 20
#define USBD_EP6_TX_SIZE 20
#define USBD_EP7_TX_SIZE 20
/* otg2 device fifo */
#define USBD2_RX_SIZE 128
#define USBD2_EP0_TX_SIZE 24//24
#define USBD2_EP1_TX_SIZE 20//20
#define USBD2_EP2_TX_SIZE 20
#define USBD2_EP3_TX_SIZE 20
#define USBD2_EP4_TX_SIZE 20
#define USBD2_EP5_TX_SIZE 20
#define USBD2_EP6_TX_SIZE 20
#define USBD2_EP7_TX_SIZE 20
/**
* @brief usb endpoint max num define
*/
#ifndef USB_EPT_MAX_NUM
#define USB_EPT_MAX_NUM 8
#endif
#endif
/**
* @brief usb host mode config
*/
#ifdef USE_OTG_HOST_MODE
#ifndef USB_HOST_CHANNEL_NUM
#define USB_HOST_CHANNEL_NUM 16
#endif
/**
* @brief usb host mode fifo
*/
/* otg1 host fifo */
#define USBH_RX_FIFO_SIZE 128
#define USBH_NP_TX_FIFO_SIZE 96
#define USBH_P_TX_FIFO_SIZE 96
/* otg2 host fifo */
#define USBH2_RX_FIFO_SIZE 128
#define USBH2_NP_TX_FIFO_SIZE 96
#define USBH2_P_TX_FIFO_SIZE 96
#endif
/**
* @brief usb sof output enable
*/
/* #define USB_SOF_OUTPUT_ENABLE */
/**
* @brief usb vubs ignor, not use vbus pin
*/
#define USB_VBUS_IGNORE
/**
* @brief usb low power wakeup handler enable
*/
/* #define USB_LOW_POWER_WAKUP */
void usb_delay_ms(uint32_t ms);
void usb_delay_us(uint32_t us);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /*__USB_CONF_F435_H*/

2
.platformio/platforms/at32/examples/AT32F435/cmsis-blink/platformio.ini
View File

@@ -12,7 +12,7 @@ platform = at32
framework = cmsis
board = generic_f435
monitor_speed = 115200 ;serial monitor baudrate
build_flags = -I include
;Use the following for jlink upload
upload_protocol = jlink

2
.platformio/platforms/at32/examples/AT32F435/cmsis-blink/src/at32f435_437_clock.c
View File

@@ -58,7 +58,7 @@ void system_clock_config(void)
flash_clock_divider_set(FLASH_CLOCK_DIV_3);
/* reset crm */
crm_reset();
//crm_reset();
//crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE);

0
.platformio/platforms/at32/examples/cmsis-acd1_dma/.gitignore → .platformio/platforms/at32/examples/AT32F437/led_toggle/.gitignore vendored
View File

44
.platformio/platforms/at32/examples/AT32F437/led_toggle/include/at32f435_437_clock.h Normal file
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@@ -0,0 +1,44 @@
/**
**************************************************************************
* @file at32f435_437_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F435_437_CLOCK_H
#define __AT32F435_437_CLOCK_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f435_437.h"
/* exported functions ------------------------------------------------------- */
void system_clock_config(void);
#ifdef __cplusplus
}
#endif
#endif

173
.platformio/platforms/at32/examples/AT32F437/led_toggle/include/at32f435_437_conf.h Normal file
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@@ -0,0 +1,173 @@
/**
**************************************************************************
* @file at32f435_437_conf.h
* @brief at32f435_437 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F435_437_CONF_H
#define __AT32F435_437_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief in the following line adjust the value of high speed external crystal (hext)
* used in your application
*
* tip: to avoid modifying this file each time you need to use different hext, you
* can define the hext value in your toolchain compiler preprocessor.
*
*/
#if !defined HEXT_VALUE
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed external crystal in hz */
#endif
/**
* @brief in the following line adjust the high speed external crystal (hext) startup
* timeout value
*/
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */
/* module define -------------------------------------------------------------*/
#define CRM_MODULE_ENABLED
#define TMR_MODULE_ENABLED
#define ERTC_MODULE_ENABLED
#define GPIO_MODULE_ENABLED
#define I2C_MODULE_ENABLED
#define USART_MODULE_ENABLED
#define PWC_MODULE_ENABLED
#define CAN_MODULE_ENABLED
#define ADC_MODULE_ENABLED
#define DAC_MODULE_ENABLED
#define SPI_MODULE_ENABLED
#define EDMA_MODULE_ENABLED
#define DMA_MODULE_ENABLED
#define DEBUG_MODULE_ENABLED
#define FLASH_MODULE_ENABLED
#define CRC_MODULE_ENABLED
#define WWDT_MODULE_ENABLED
#define WDT_MODULE_ENABLED
#define EXINT_MODULE_ENABLED
#define SDIO_MODULE_ENABLED
#define XMC_MODULE_ENABLED
#define USB_MODULE_ENABLED
#define ACC_MODULE_ENABLED
#define MISC_MODULE_ENABLED
#define QSPI_MODULE_ENABLED
#define DVP_MODULE_ENABLED
#define SCFG_MODULE_ENABLED
#define EMAC_MODULE_ENABLED
/* includes ------------------------------------------------------------------*/
#ifdef CRM_MODULE_ENABLED
#include "at32f435_437_crm.h"
#endif
#ifdef TMR_MODULE_ENABLED
#include "at32f435_437_tmr.h"
#endif
#ifdef ERTC_MODULE_ENABLED
#include "at32f435_437_ertc.h"
#endif
#ifdef GPIO_MODULE_ENABLED
#include "at32f435_437_gpio.h"
#endif
#ifdef I2C_MODULE_ENABLED
#include "at32f435_437_i2c.h"
#endif
#ifdef USART_MODULE_ENABLED
#include "at32f435_437_usart.h"
#endif
#ifdef PWC_MODULE_ENABLED
#include "at32f435_437_pwc.h"
#endif
#ifdef CAN_MODULE_ENABLED
#include "at32f435_437_can.h"
#endif
#ifdef ADC_MODULE_ENABLED
#include "at32f435_437_adc.h"
#endif
#ifdef DAC_MODULE_ENABLED
#include "at32f435_437_dac.h"
#endif
#ifdef SPI_MODULE_ENABLED
#include "at32f435_437_spi.h"
#endif
#ifdef DMA_MODULE_ENABLED
#include "at32f435_437_dma.h"
#endif
#ifdef DEBUG_MODULE_ENABLED
#include "at32f435_437_debug.h"
#endif
#ifdef FLASH_MODULE_ENABLED
#include "at32f435_437_flash.h"
#endif
#ifdef CRC_MODULE_ENABLED
#include "at32f435_437_crc.h"
#endif
#ifdef WWDT_MODULE_ENABLED
#include "at32f435_437_wwdt.h"
#endif
#ifdef WDT_MODULE_ENABLED
#include "at32f435_437_wdt.h"
#endif
#ifdef EXINT_MODULE_ENABLED
#include "at32f435_437_exint.h"
#endif
#ifdef SDIO_MODULE_ENABLED
#include "at32f435_437_sdio.h"
#endif
#ifdef XMC_MODULE_ENABLED
#include "at32f435_437_xmc.h"
#endif
#ifdef ACC_MODULE_ENABLED
#include "at32f435_437_acc.h"
#endif
#ifdef MISC_MODULE_ENABLED
#include "at32f435_437_misc.h"
#endif
#ifdef EDMA_MODULE_ENABLED
#include "at32f435_437_edma.h"
#endif
#ifdef QSPI_MODULE_ENABLED
#include "at32f435_437_qspi.h"
#endif
#ifdef SCFG_MODULE_ENABLED
#include "at32f435_437_scfg.h"
#endif
#ifdef EMAC_MODULE_ENABLED
#include "at32f435_437_emac.h"
#endif
#ifdef DVP_MODULE_ENABLED
#include "at32f435_437_dvp.h"
#endif
#ifdef USB_MODULE_ENABLED
#include "at32f435_437_usb.h"
#endif
#ifdef __cplusplus
}
#endif
#endif

56
.platformio/platforms/at32/examples/AT32F437/led_toggle/include/at32f435_437_int.h Normal file
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@@ -0,0 +1,56 @@
/**
**************************************************************************
* @file at32f435_437_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F435_437_INT_H
#define __AT32F435_437_INT_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f435_437.h"
/* exported types ------------------------------------------------------------*/
/* exported constants --------------------------------------------------------*/
/* exported macro ------------------------------------------------------------*/
/* exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif

205
.platformio/platforms/at32/examples/AT32F437/led_toggle/include/usb_conf.h Normal file
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@@ -0,0 +1,205 @@
/**
******************************************************************************
* File : USB_Device/VirtualComPort_loopback/inc/usb_conf.h
* Version: V1.2.2
* Date : 2020-07-01
* Brief : USB Endpoint config header.
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USB_CONF_F435_H
#define __USB_CONF_F435_H
#ifdef __cplusplus
extern "C" {
#endif
#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"
/** @addtogroup AT32F435_periph_examples
* @{
*/
/** @addtogroup 435_USB_device_vcp_loopback
* @{
*/
/**
* @brief enable usb device mode
*/
#define USE_OTG_DEVICE_MODE
/**
* @brief enable usb host mode
*/
/* #define USE_OTG_HOST_MODE */
/**
* @brief select otgfs1 or otgfs2 define
*/
/* use otgfs1 */
#define OTG_USB_ID 1
/* use otgfs2 */
//#define OTG_USB_ID 2
#if (OTG_USB_ID == 1)
#define USB_ID 0
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define OTG_IRQ OTGFS1_IRQn
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define OTG_PIN_GPIO GPIOA
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_12
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_DM GPIO_PINS_11
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define OTG_PIN_VBUS GPIO_PINS_9
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define OTG_PIN_ID GPIO_PINS_10
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
//#define OTG_PIN_SOF_GPIO GPIOA
//#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
//#define OTG_PIN_SOF GPIO_PINS_8
//#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define OTG_PIN_MUX GPIO_MUX_10
#endif
#if (OTG_USB_ID == 2)
#define USB_ID 1
#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
#define OTG_IRQ OTGFS2_IRQn
#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
#define OTG_PIN_GPIO GPIOB
#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_15
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
#define OTG_PIN_DM GPIO_PINS_14
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
#define OTG_PIN_VBUS GPIO_PINS_13
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
#define OTG_PIN_ID GPIO_PINS_12
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_4
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
#define OTG_PIN_MUX GPIO_MUX_12
#endif
/**
* @brief usb device mode config
*/
#ifdef USE_OTG_DEVICE_MODE
/**
* @brief usb device mode fifo
*/
/* otg1 device fifo */
#define USBD_RX_SIZE 128
#define USBD_EP0_TX_SIZE 64//24
#define USBD_EP1_TX_SIZE 64//20
#define USBD_EP2_TX_SIZE 20
#define USBD_EP3_TX_SIZE 20
#define USBD_EP4_TX_SIZE 20
#define USBD_EP5_TX_SIZE 20
#define USBD_EP6_TX_SIZE 20
#define USBD_EP7_TX_SIZE 20
/* otg2 device fifo */
#define USBD2_RX_SIZE 128
#define USBD2_EP0_TX_SIZE 24//24
#define USBD2_EP1_TX_SIZE 20//20
#define USBD2_EP2_TX_SIZE 20
#define USBD2_EP3_TX_SIZE 20
#define USBD2_EP4_TX_SIZE 20
#define USBD2_EP5_TX_SIZE 20
#define USBD2_EP6_TX_SIZE 20
#define USBD2_EP7_TX_SIZE 20
/**
* @brief usb endpoint max num define
*/
#ifndef USB_EPT_MAX_NUM
#define USB_EPT_MAX_NUM 8
#endif
#endif
/**
* @brief usb host mode config
*/
#ifdef USE_OTG_HOST_MODE
#ifndef USB_HOST_CHANNEL_NUM
#define USB_HOST_CHANNEL_NUM 16
#endif
/**
* @brief usb host mode fifo
*/
/* otg1 host fifo */
#define USBH_RX_FIFO_SIZE 128
#define USBH_NP_TX_FIFO_SIZE 96
#define USBH_P_TX_FIFO_SIZE 96
/* otg2 host fifo */
#define USBH2_RX_FIFO_SIZE 128
#define USBH2_NP_TX_FIFO_SIZE 96
#define USBH2_P_TX_FIFO_SIZE 96
#endif
/**
* @brief usb sof output enable
*/
/* #define USB_SOF_OUTPUT_ENABLE */
/**
* @brief usb vubs ignor, not use vbus pin
*/
#define USB_VBUS_IGNORE
/**
* @brief usb low power wakeup handler enable
*/
/* #define USB_LOW_POWER_WAKUP */
void usb_delay_ms(uint32_t ms);
void usb_delay_us(uint32_t us);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /*__USB_CONF_F435_H*/

95
.platformio/platforms/at32/examples/AT32F437/led_toggle/lib/Delay/delay.c Normal file
View File

@@ -0,0 +1,95 @@
/*DO NOT USE - DON'T WORK*/
#include "delay.h"
#include "stdio.h"
/*delay macros*/
#define STEP_DELAY_MS 500
/*delay variable*/
static __IO float fac_us;
static __IO float fac_ms;
/**
* @brief initialize Delay function
* @param None
* @retval None
*/
void delay_init()
{
/* configure systick */
systick_clock_source_config(SYSTICK_CLOCK_SOURCE_AHBCLK_DIV8);
fac_us = system_core_clock / (1000000U);
fac_ms = fac_us * (1000U);
}
/**
* @brief inserts a delay time.
* @param nus: specifies the delay time length, in microsecond.
* @retval none
*/
void delay_us(uint32_t nus)
{
uint32_t temp = 0;
SysTick->LOAD = (uint32_t)(nus * fac_us);
SysTick->VAL = 0x00;
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk ;
do
{
temp = SysTick->CTRL;
}while((temp & 0x01) && !(temp & (1 << 16)));
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->VAL = 0x00;
}
/**
* @brief inserts a delay time.
* @param nms: specifies the delay time length, in milliseconds.
* @retval none
*/
void delay_ms(uint16_t nms)
{
uint32_t temp = 0;
while(nms)
{
if(nms > STEP_DELAY_MS)
{
SysTick->LOAD = (uint32_t)(STEP_DELAY_MS * fac_ms);
nms -= STEP_DELAY_MS;
}
else
{
SysTick->LOAD = (uint32_t)(nms * fac_ms);
nms = 0;
}
SysTick->VAL = 0x00;
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
do
{
temp = SysTick->CTRL;
}while((temp & 0x01) && !(temp & (1 << 16)));
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->VAL = 0x00;
}
}
/**
* @brief inserts a delay time.
* @param sec: specifies the delay time, in seconds.
* @retval none
*/
void delay_sec(uint16_t sec)
{
uint16_t index;
for(index = 0; index < sec; index++)
{
delay_ms(500);
delay_ms(500);
}
}

10
.platformio/platforms/at32/examples/cmsis-acd1_dma/lib/Delay/delay.h → .platformio/platforms/at32/examples/AT32F437/led_toggle/lib/Delay/delay.h
View File

@@ -5,12 +5,12 @@
#ifndef __DELAY_H
#define __DELAY_H
#include <at32f4xx.h>
#include "at32f435_437.h"
/*Delay function*/
void Delay_init(void);
void Delay_us(u32 nus);
void Delay_ms(u16 nms);
void Delay_sec(u16 sec);
void delay_init(void);
void delay_us(u32 nus);
void delay_ms(u16 nms);
void delay_sec(u16 sec);
#endif

0
.platformio/platforms/at32/examples/cmsis-acd1_dma/lib/README → .platformio/platforms/at32/examples/AT32F437/led_toggle/lib/README
View File

344
.platformio/platforms/at32/examples/AT32F437/led_toggle/mdk_v5/led_toggle.uvoptx Normal file
View File

@@ -0,0 +1,344 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>led_toggle</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
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<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
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</OPTLEX>
<ListingPage>
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</ListingPage>
<OPTXL>
<LMap>1</LMap>
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<OPTFL>
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<tvExpOptDlg>0</tvExpOptDlg>
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</OPTFL>
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<DebugOpt>
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<sLdApp>1</sLdApp>
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<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>BIN\CMSIS_AGDI.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F437_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F437ZMT7$Flash\AT32F437_4032.FLM))</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
</TargetOption>
</Target>
<Group>
<GroupName>user</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\src\at32f435_437_clock.c</PathWithFileName>
<FilenameWithoutPath>at32f435_437_clock.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\src\at32f435_437_int.c</PathWithFileName>
<FilenameWithoutPath>at32f435_437_int.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
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<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\src\main.c</PathWithFileName>
<FilenameWithoutPath>main.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>bsp</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
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<File>
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<PathWithFileName>..\..\..\..\..\at32f435_437_board\at32f435_437_board.c</PathWithFileName>
<FilenameWithoutPath>at32f435_437_board.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
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<GroupName>firmware</GroupName>
<tvExp>0</tvExp>
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<File>
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<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c</PathWithFileName>
<FilenameWithoutPath>at32f435_437_gpio.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
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<FilenameWithoutPath>at32f435_437_crm.c</FilenameWithoutPath>
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</File>
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<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c</PathWithFileName>
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487
.platformio/platforms/at32/examples/AT32F437/led_toggle/mdk_v5/led_toggle.uvprojx Normal file
View File

@@ -0,0 +1,487 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>led_toggle</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>-AT32F437ZMT7</Device>
<Vendor>ArteryTek</Vendor>
<PackID>ArteryTek.AT32F435_437_DFP.2.0.1</PackID>
<Cpu>IRAM(0x20000000,0x60000) IROM(0x08000000,0x3F0000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
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</TargetStatus>
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<SimDllArguments> -REMAP -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
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<Flash4></Flash4>
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<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
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<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x60000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x3f0000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x3f0000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x60000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>AT32F437ZMT7,USE_STDPERIPH_DRIVER,AT_START_F437_V1</Define>
<Undefine></Undefine>
<IncludePath>..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\..\..\..\templates\inc;..\..\..\..\..\at32f435_437_board</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>user</GroupName>
<Files>
<File>
<FileName>at32f435_437_clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\at32f435_437_clock.c</FilePath>
</File>
<File>
<FileName>at32f435_437_int.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\at32f435_437_int.c</FilePath>
</File>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\main.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>bsp</GroupName>
<Files>
<File>
<FileName>at32f435_437_board.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\at32f435_437_board\at32f435_437_board.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>firmware</GroupName>
<Files>
<File>
<FileName>at32f435_437_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c</FilePath>
</File>
<File>
<FileName>at32f435_437_crm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c</FilePath>
</File>
<File>
<FileName>at32f435_437_usart.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c</FilePath>
</File>
<File>
<FileName>at32f435_437_misc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>cmsis</GroupName>
<Files>
<File>
<FileName>system_at32f435_437.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c</FilePath>
</File>
<File>
<FileName>startup_at32f435_437.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>readme</GroupName>
<Files>
<File>
<FileName>readme.txt</FileName>
<FileType>5</FileType>
<FilePath>..\readme.txt</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>&lt;Project Info&gt;</LayName>
<LayDesc></LayDesc>
<LayUrl></LayUrl>
<LayKeys></LayKeys>
<LayCat></LayCat>
<LayLic></LayLic>
<LayTarg>0</LayTarg>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

13
.platformio/platforms/at32/examples/cmsis-acd1_dma/platformio.ini → .platformio/platforms/at32/examples/AT32F437/led_toggle/platformio.ini
View File

@@ -7,12 +7,11 @@
; Please visit documentation for the other options and examples
; http://docs.platformio.org/page/projectconf.html
[env:generic_f403a]
[env:led_togle]
platform = at32
framework = cmsis
board = generic_f403a
monitor_speed = 115200
upload_protocol = custom
upload_port = COM12
upload_speed = 921600 ;115200 460800 921600
upload_command = ${platformio.packages_dir}/framework-cmsis-at32f40/tools/stm32flash/stm32flash -g 0x8000000 -b $UPLOAD_SPEED -w $SOURCE $UPLOAD_PORT
board = generic_f437
build_flags = -I include
monitor_speed = 921600
;upload_protocol = serial
upload_protocol = jlink

9
.platformio/platforms/at32/examples/AT32F437/led_toggle/readme.txt Normal file
View File

@@ -0,0 +1,9 @@
/**
**************************************************************************
* @file readme.txt
* @brief readme
**************************************************************************
*/
Light on/off pin PB12, 1Hz frequency for complete cycle.

119
.platformio/platforms/at32/examples/AT32F437/led_toggle/src/at32f435_437_clock.c Normal file
View File

@@ -0,0 +1,119 @@
/**
**************************************************************************
* @file at32f435_437_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32f435_437_clock.h"
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* system clock (sclk) = (hext * pll_ns)/(pll_ms * pll_fr)
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 288000000
* - ahbdiv = 1
* - ahbclk = 288000000
* - apb2div = 2
* - apb2clk = 144000000
* - apb1div = 2
* - apb1clk = 144000000
* - pll_ns = 144
* - pll_ms = 1
* - pll_fr = 4
* @param none
* @retval none
*/
void system_clock_config(void)
{
/* reset crm */
//crm_reset();
/* enable pwc periph clock */
crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
/* config ldo voltage */
pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
/* set the flash clock divider */
flash_clock_divider_set(FLASH_CLOCK_DIV_3);
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
/* wait till hext is ready */
while(crm_hext_stable_wait() == ERROR)
{
}
/* config pll clock resource
common frequency config list: pll source selected hick or hext(8mhz)
_________________________________________________________________________________________________
| | | | | | | | | | |
|pll(mhz)| 288 | 252 | 216 | 192 | 180 | 144 | 108 | 72 | 36 |
|________|_________|_________|_________|_________|_________|_________|_________|_________________|
| | | | | | | | | | |
|pll_ns | 144 | 126 | 108 | 96 | 90 | 72 | 108 | 72 | 72 |
| | | | | | | | | | |
|pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| | | | | | | | | | |
|pll_fr | FR_4 | FR_4 | FR_4 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
|________|_________|_________|_________|_________|_________|_________|_________|________|________|
if pll clock source selects hext with other frequency values, or configure pll to other
frequency values, please use the at32 new clock configuration tool for configuration. */
crm_pll_config(CRM_PLL_SOURCE_HEXT, 144, 1, CRM_PLL_FR_4);
/* enable pll */
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
/* wait till pll is ready */
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
{
}
/* config ahbclk */
crm_ahb_div_set(CRM_AHB_DIV_1);
/* config apb2clk, the maximum frequency of APB1/APB2 clock is 144 MHz */
crm_apb2_div_set(CRM_APB2_DIV_2);
/* config apb1clk, the maximum frequency of APB1/APB2 clock is 144 MHz */
crm_apb1_div_set(CRM_APB1_DIV_2);
/* enable auto step mode */
crm_auto_step_mode_enable(TRUE);
/* select pll as system clock source */
crm_sysclk_switch(CRM_SCLK_PLL);
/* wait till pll is used as system clock source */
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
{
}
/* disable auto step mode */
crm_auto_step_mode_enable(FALSE);
/* update system_core_clock global variable */
system_core_clock_update();
}

139
.platformio/platforms/at32/examples/AT32F437/led_toggle/src/at32f435_437_int.c Normal file
View File

@@ -0,0 +1,139 @@
/**
**************************************************************************
* @file at32f435_437_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32f435_437_int.h"
/** @addtogroup AT32F437_periph_examples
* @{
*/
/** @addtogroup 437_GPIO_led_toggle
* @{
*/
/**
* @brief this function handles nmi exception.
* @param none
* @retval none
*/
void NMI_Handler(void)
{
}
/**
* @brief this function handles hard fault exception.
* @param none
* @retval none
*/
void HardFault_Handler(void)
{
/* go to infinite loop when hard fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles memory manage exception.
* @param none
* @retval none
*/
void MemManage_Handler(void)
{
/* go to infinite loop when memory manage exception occurs */
while(1)
{
}
}
/**
* @brief this function handles bus fault exception.
* @param none
* @retval none
*/
void BusFault_Handler(void)
{
/* go to infinite loop when bus fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles usage fault exception.
* @param none
* @retval none
*/
void UsageFault_Handler(void)
{
/* go to infinite loop when usage fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles svcall exception.
* @param none
* @retval none
*/
void SVC_Handler(void)
{
}
/**
* @brief this function handles debug monitor exception.
* @param none
* @retval none
*/
void DebugMon_Handler(void)
{
}
/**
* @brief this function handles pendsv_handler exception.
* @param none
* @retval none
*/
void PendSV_Handler(void)
{
}
/**
* @brief this function handles systick handler.
* @param none
* @retval none
*/
void SysTick_Handler(void)
{
}
/**
* @}
*/
/**
* @}
*/

90
.platformio/platforms/at32/examples/AT32F437/led_toggle/src/main.c Normal file
View File

@@ -0,0 +1,90 @@
/**
**************************************************************************
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes */
#include "at32f435_437_clock.h"
#include "delay.h"
#define LEDPERIPH CRM_GPIOB_PERIPH_CLOCK
#define LEDPORT (GPIOB)
#define LEDPIN (GPIO_PINS_12)
/** @addtogroup AT32F437_periph_examples
* @{
*/
/** @addtogroup 437_GPIO_led_toggle GPIO_led_toggle
* @{
*/
/**
* @brief gpio configuration.
* @param none
* @retval none
*/
static void gpio_config(void)
{
gpio_init_type gpio_init_struct;
crm_periph_clock_enable(LEDPERIPH, TRUE);
gpio_default_para_init(&gpio_init_struct);
//configure the led gpio
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
gpio_init_struct.gpio_pins = LEDPIN;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(LEDPORT, &gpio_init_struct);
}
/**
* @brief main function.
* @param none
* @retval none
*/
int main(void)
{
system_clock_config();
delay_init();
gpio_config();
gpio_bits_reset(LEDPORT, LEDPIN);
for (;;) {
delay_ms(500);
LEDPORT->odt ^= LEDPIN; // toggle pin
}
return 0;
}
/**
* @}
*/
/**
* @}
*/

67
.platformio/platforms/at32/examples/cmsis-acd1_dma/.travis.yml
View File

@@ -1,67 +0,0 @@
# Continuous Integration (CI) is the practice, in software
# engineering, of merging all developer working copies with a shared mainline
# several times a day < https://docs.platformio.org/page/ci/index.html >
#
# Documentation:
#
# * Travis CI Embedded Builds with PlatformIO
# < https://docs.travis-ci.com/user/integration/platformio/ >
#
# * PlatformIO integration with Travis CI
# < https://docs.platformio.org/page/ci/travis.html >
#
# * User Guide for `platformio ci` command
# < https://docs.platformio.org/page/userguide/cmd_ci.html >
#
#
# Please choose one of the following templates (proposed below) and uncomment
# it (remove "# " before each line) or use own configuration according to the
# Travis CI documentation (see above).
#
#
# Template #1: General project. Test it using existing `platformio.ini`.
#
# language: python
# python:
# - "2.7"
#
# sudo: false
# cache:
# directories:
# - "~/.platformio"
#
# install:
# - pip install -U platformio
# - platformio update
#
# script:
# - platformio run
#
# Template #2: The project is intended to be used as a library with examples.
#
# language: python
# python:
# - "2.7"
#
# sudo: false
# cache:
# directories:
# - "~/.platformio"
#
# env:
# - PLATFORMIO_CI_SRC=path/to/test/file.c
# - PLATFORMIO_CI_SRC=examples/file.ino
# - PLATFORMIO_CI_SRC=path/to/test/directory
#
# install:
# - pip install -U platformio
# - platformio update
#
# script:
# - platformio ci --lib="." --board=ID_1 --board=ID_2 --board=ID_N

38
.platformio/platforms/at32/examples/cmsis-acd1_dma/README.rst
View File

@@ -1,38 +0,0 @@
.. Copyright 2014-present PlatformIO <contact@platformio.org>
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
How to build PlatformIO based project
=====================================
1. `Install PlatformIO Core <http://docs.platformio.org/page/core.html>`_
2. Download `development platform with examples <https://github.com/platformio/platform-ststm32/archive/develop.zip>`_
3. Extract ZIP archive
4. Run these commands:
.. code-block:: bash
# Change directory to example
> cd platform-at32/examples/cmsis-blink
# Build project
> platformio run
# Upload firmware
> platformio run --target upload
# Build specific environment
> platformio run -e disco_f407vg
# Upload firmware for the specific environment
> platformio run -e disco_f407vg --target upload
# Clean build files
> platformio run --target clean

39
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@@ -1,39 +0,0 @@
This directory is intended for project header files.
A header file is a file containing C declarations and macro definitions
to be shared between several project source files. You request the use of a
header file in your project source file (C, C++, etc) located in `src` folder
by including it, with the C preprocessing directive `#include'.
```src/main.c
#include "header.h"
int main (void)
{
...
}
```
Including a header file produces the same results as copying the header file
into each source file that needs it. Such copying would be time-consuming
and error-prone. With a header file, the related declarations appear
in only one place. If they need to be changed, they can be changed in one
place, and programs that include the header file will automatically use the
new version when next recompiled. The header file eliminates the labor of
finding and changing all the copies as well as the risk that a failure to
find one copy will result in inconsistencies within a program.
In C, the usual convention is to give header files names that end with `.h'.
It is most portable to use only letters, digits, dashes, and underscores in
header file names, and at most one dot.
Read more about using header files in official GCC documentation:
* Include Syntax
* Include Operation
* Once-Only Headers
* Computed Includes
https://gcc.gnu.org/onlinedocs/cpp/Header-Files.html

92
.platformio/platforms/at32/examples/cmsis-acd1_dma/lib/Delay/delay.c
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#include "delay.h"
#include "stdio.h"
/*delay macros*/
#define STEP_DELAY_MS 500
/*delay variable*/
static __IO float fac_us;
static __IO float fac_ms;
/**
* @brief initialize Delay function
* @param None
* @retval None
*/
void Delay_init()
{
/*Config Systick*/
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
fac_us=(float)SystemCoreClock/(8 * 1000000);
fac_ms=fac_us*1000;
}
/**
* @brief Inserts a delay time.
* @param nus: specifies the delay time length, in microsecond.
* @retval None
*/
void Delay_us(u32 nus)
{
u32 temp;
SysTick->LOAD = (u32)(nus*fac_us);
SysTick->VAL = 0x00;
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk ;
do
{
temp = SysTick->CTRL;
}while((temp & 0x01) &&! (temp & (1<<16)));
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->VAL = 0X00;
}
/**
* @brief Inserts a delay time.
* @param nms: specifies the delay time length, in milliseconds.
* @retval None
*/
void Delay_ms(u16 nms)
{
u32 temp;
while(nms)
{
if(nms > STEP_DELAY_MS)
{
SysTick->LOAD = (u32)(STEP_DELAY_MS * fac_ms);
nms -= STEP_DELAY_MS;
}
else
{
SysTick->LOAD = (u32)(nms * fac_ms);
nms = 0;
}
SysTick->VAL = 0x00;
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
do
{
temp = SysTick->CTRL;
}while( (temp & 0x01) && !(temp & (1<<16)) );
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->VAL = 0X00;
}
}
/**
* @brief Inserts a delay time.
* @param sec: specifies the delay time length, in seconds.
* @retval None
*/
void Delay_sec(u16 sec)
{
u16 i;
for(i=0; i<sec; i++)
{
Delay_ms(500);
Delay_ms(500);
}
}

135
.platformio/platforms/at32/examples/cmsis-acd1_dma/src/at32f4xx_it.c
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/**
******************************************************************************
* File : ADC/ADC1_DMA/at32f4xx_it.c
* Version: V1.2.2
* Date : 2020-07-01
* Brief : Main Interrupt Service Routines.
* This file provides template for all exceptions handler and peripherals
* interrupt service routine.
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "at32f4xx_it.h"
/** @addtogroup AT32F403A_StdPeriph_Examples
* @{
*/
/** @addtogroup ADC_ADC1_DMA
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSV_Handler exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/**
* @}
*/
/**
* @}
*/
/******************* (C) COPYRIGHT 2018 ArteryTek *****END OF FILE****/

34
.platformio/platforms/at32/examples/cmsis-acd1_dma/src/at32f4xx_it.h
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@@ -1,34 +0,0 @@
/**
******************************************************************************
* File : ADC/ADC1_DMA/at32f4xx_it.h
* Version: V1.2.2
* Date : 2020-07-01
* Brief : This file contains the headers of the interrupt handlers.
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F4xx_IT_H
#define __AT32F4xx_IT_H
/* Includes ------------------------------------------------------------------*/
#include "at32f4xx.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#endif /* __AT32F4xx_IT_H */
/******************* (C) COPYRIGHT 2018 ArteryTek *****END OF FILE****/

202
.platformio/platforms/at32/examples/cmsis-acd1_dma/src/main.c
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@@ -1,202 +0,0 @@
/**
******************************************************************************
* File : ADC/ADC1_DMA/main.c
* Version: V1.2.2
* Date : 2020-07-01
* Brief : Main program body
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "at32f4xx.h"
#include "main.h"
/** @addtogroup AT32F403A_StdPeriph_Examples
* @{
*/
/** @addtogroup ADC_ADC1_DMA
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
ADC_InitType ADC_InitStructure;
DMA_InitType DMA_InitStructure;
__IO uint16_t ADCConvertedValue=0;
/* Private function prototypes -----------------------------------------------*/
void RCC_Configuration(void);
void GPIO_Configuration(void);
/* Private functions ---------------------------------------------------------*/
void UART_Print_sendData(uint8_t *buff, int len) {
int i = 0;
while (len > 0U)
{
len--;
while ( USART_GetFlagStatus(AT32_PRINT_UART, USART_FLAG_TRAC) == RESET );
AT32_PRINT_UART->DT = (buff[i++] & (uint16_t)0x01FF);
}
while ( USART_GetFlagStatus(AT32_PRINT_UART, USART_FLAG_TRAC) == RESET );
}
/**
* @brief initialize UART1
* @param bound: UART BaudRate
* @retval None
*/
void UART_Print_Init(uint32_t bound)
{
GPIO_InitType GPIO_InitStructure;
USART_InitType USART_InitStructure;
/*Enable the UART Clock*/
RCC_APB2PeriphClockCmd(AT32_PRINT_UARTTX_GPIO_RCC | AT32_PRINT_UARTRX_GPIO_RCC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_USART1, ENABLE);
/* Configure the UART1 TX pin */
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pins = AT32_PRINT_UARTTX_PIN;
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(AT32_PRINT_UARTTX_GPIO, &GPIO_InitStructure);
/* Configure the UART1 RX pin */
GPIO_InitStructure.GPIO_Pins = AT32_PRINT_UARTRX_PIN;//PA10
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(AT32_PRINT_UARTRX_GPIO, &GPIO_InitStructure);
/*Configure UART param*/
USART_StructInit(&USART_InitStructure);
USART_InitStructure.USART_BaudRate = bound;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(AT32_PRINT_UART, &USART_InitStructure);
USART_INTConfig(AT32_PRINT_UART, USART_INT_RDNE, ENABLE);
USART_Cmd(AT32_PRINT_UART, ENABLE);
}
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* System clocks configuration */
RCC_Configuration();
/* GPIO configuration ------------------------------------------------------*/
GPIO_Configuration();
/* UART configuration ------------------------------------------------------*/
UART_Print_Init(115200);
UART_Print_sendData("ADC Test", 8);
/* DMA1 channel1 configuration ----------------------------------------------*/
DMA_Reset(DMA1_Channel1);
DMA_DefaultInitParaConfig(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->RDOR;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&ADCConvertedValue;
DMA_InitStructure.DMA_Direction = DMA_DIR_PERIPHERALSRC;
DMA_InitStructure.DMA_BufferSize = 1;
DMA_InitStructure.DMA_PeripheralInc = DMA_PERIPHERALINC_DISABLE;
DMA_InitStructure.DMA_MemoryInc = DMA_MEMORYINC_DISABLE;
DMA_InitStructure.DMA_PeripheralDataWidth = DMA_PERIPHERALDATAWIDTH_HALFWORD;
DMA_InitStructure.DMA_MemoryDataWidth = DMA_MEMORYDATAWIDTH_HALFWORD;
DMA_InitStructure.DMA_Mode = DMA_MODE_CIRCULAR;
DMA_InitStructure.DMA_Priority = DMA_PRIORITY_HIGH;
DMA_InitStructure.DMA_MTOM = DMA_MEMTOMEM_DISABLE;
DMA_Init(DMA1_Channel1, &DMA_InitStructure);
/* Enable DMA1 channel1 */
DMA_ChannelEnable(DMA1_Channel1, ENABLE);
/* ADC1 configuration ------------------------------------------------------*/
ADC_StructInit(&ADC_InitStructure);
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
ADC_InitStructure.ADC_ScanMode = DISABLE;
ADC_InitStructure.ADC_ContinuousMode = ENABLE;
ADC_InitStructure.ADC_ExternalTrig = ADC_ExternalTrig_None;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NumOfChannel = 1;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular channels configuration */
ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 1, ADC_SampleTime_28_5);
/* Enable ADC1 DMA */
ADC_DMACtrl(ADC1, ENABLE);
/* Enable ADC1 */
ADC_Ctrl(ADC1, ENABLE);
/* Enable ADC1 reset calibration register */
ADC_RstCalibration(ADC1);
/* Check the end of ADC1 reset calibration register */
while(ADC_GetResetCalibrationStatus(ADC1));
/* Start ADC1 calibration */
ADC_StartCalibration(ADC1);
/* Check the end of ADC1 calibration */
while(ADC_GetCalibrationStatus(ADC1));
/* Start ADC1 Software Conversion */
ADC_SoftwareStartConvCtrl(ADC1, ENABLE);
while (1)
{
}
}
/**
* @brief Configures the different system clocks.
* @param None
* @retval None
*/
void RCC_Configuration(void)
{
/* ADCCLK = PCLK2/6 */
RCC_ADCCLKConfig(RCC_APB2CLK_Div6);
/* Enable peripheral clocks ------------------------------------------------*/
/* Enable DMA1 clocks */
RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_DMA1, ENABLE);
/* Enable ADC1 and GPIOC clocks */
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC1 | RCC_APB2PERIPH_GPIOC, ENABLE);
}
/**
* @brief Configures the different GPIO ports.
* @param None
* @retval None
*/
void GPIO_Configuration(void)
{
GPIO_InitType GPIO_InitStructure;
/* Configure PC.04 (ADC Channel14) as analog input -------------------------*/
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_ANALOG;
GPIO_Init(GPIOC, &GPIO_InitStructure);
}
/**
* @}
*/
/**
* @}
*/
/******************* (C) COPYRIGHT 2018 ArteryTek *****END OF FILE****/

28
.platformio/platforms/at32/examples/cmsis-acd1_dma/src/main.h
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@@ -1,28 +0,0 @@
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/**************** UART printf ****************/
#define AT32_PRINT_UART USART1
#define USARTx_IRQn USART1_IRQn
#define USARTx_IRQ_Handler USART1_IRQHandler
#define AT32_PRINT_UART_RCC RCC_APB2PERIPH_USART1
/*Tx*/
#define AT32_PRINT_UARTTX_PIN GPIO_Pins_9
#define AT32_PRINT_UARTTX_GPIO GPIOA
#define AT32_PRINT_UARTTX_GPIO_RCC RCC_APB2PERIPH_GPIOA
/*Rx*/
#define AT32_PRINT_UARTRX_PIN GPIO_Pins_10
#define AT32_PRINT_UARTRX_GPIO GPIOA
#define AT32_PRINT_UARTRX_GPIO_RCC RCC_APB2PERIPH_GPIOA
/**************** End UART printf ****************/
void AT32_Board_Init(void);
void AT32_USB_GPIO_init(void);
#endif /* __MAIN_H */

3473
.platformio/platforms/at32/examples/cmsis-acd1_dma/src/system_at32f4xx.c
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2
.platformio/platforms/at32/examples/cmsis-blink/.gitignore vendored
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.pio
.vscode

67
.platformio/platforms/at32/examples/cmsis-blink/.travis.yml
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# Continuous Integration (CI) is the practice, in software
# engineering, of merging all developer working copies with a shared mainline
# several times a day < https://docs.platformio.org/page/ci/index.html >
#
# Documentation:
#
# * Travis CI Embedded Builds with PlatformIO
# < https://docs.travis-ci.com/user/integration/platformio/ >
#
# * PlatformIO integration with Travis CI
# < https://docs.platformio.org/page/ci/travis.html >
#
# * User Guide for `platformio ci` command
# < https://docs.platformio.org/page/userguide/cmd_ci.html >
#
#
# Please choose one of the following templates (proposed below) and uncomment
# it (remove "# " before each line) or use own configuration according to the
# Travis CI documentation (see above).
#
#
# Template #1: General project. Test it using existing `platformio.ini`.
#
# language: python
# python:
# - "2.7"
#
# sudo: false
# cache:
# directories:
# - "~/.platformio"
#
# install:
# - pip install -U platformio
# - platformio update
#
# script:
# - platformio run
#
# Template #2: The project is intended to be used as a library with examples.
#
# language: python
# python:
# - "2.7"
#
# sudo: false
# cache:
# directories:
# - "~/.platformio"
#
# env:
# - PLATFORMIO_CI_SRC=path/to/test/file.c
# - PLATFORMIO_CI_SRC=examples/file.ino
# - PLATFORMIO_CI_SRC=path/to/test/directory
#
# install:
# - pip install -U platformio
# - platformio update
#
# script:
# - platformio ci --lib="." --board=ID_1 --board=ID_2 --board=ID_N

38
.platformio/platforms/at32/examples/cmsis-blink/README.rst
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@@ -1,38 +0,0 @@
.. Copyright 2014-present PlatformIO <contact@platformio.org>
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
How to build PlatformIO based project
=====================================
1. `Install PlatformIO Core <http://docs.platformio.org/page/core.html>`_
2. Download `development platform with examples <https://github.com/platformio/platform-ststm32/archive/develop.zip>`_
3. Extract ZIP archive
4. Run these commands:
.. code-block:: bash
# Change directory to example
> cd platform-at32/examples/cmsis-blink
# Build project
> platformio run
# Upload firmware
> platformio run --target upload
# Build specific environment
> platformio run -e disco_f407vg
# Upload firmware for the specific environment
> platformio run -e disco_f407vg --target upload
# Clean build files
> platformio run --target clean

39
.platformio/platforms/at32/examples/cmsis-blink/include/README
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@@ -1,39 +0,0 @@
This directory is intended for project header files.
A header file is a file containing C declarations and macro definitions
to be shared between several project source files. You request the use of a
header file in your project source file (C, C++, etc) located in `src` folder
by including it, with the C preprocessing directive `#include'.
```src/main.c
#include "header.h"
int main (void)
{
...
}
```
Including a header file produces the same results as copying the header file
into each source file that needs it. Such copying would be time-consuming
and error-prone. With a header file, the related declarations appear
in only one place. If they need to be changed, they can be changed in one
place, and programs that include the header file will automatically use the
new version when next recompiled. The header file eliminates the labor of
finding and changing all the copies as well as the risk that a failure to
find one copy will result in inconsistencies within a program.
In C, the usual convention is to give header files names that end with `.h'.
It is most portable to use only letters, digits, dashes, and underscores in
header file names, and at most one dot.
Read more about using header files in official GCC documentation:
* Include Syntax
* Include Operation
* Once-Only Headers
* Computed Includes
https://gcc.gnu.org/onlinedocs/cpp/Header-Files.html

94
.platformio/platforms/at32/examples/cmsis-blink/lib/Delay/delay.c
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@@ -1,94 +0,0 @@
/*DO NOT USE - DON'T WORK*/
#include "delay.h"
#include "stdio.h"
/*delay macros*/
#define STEP_DELAY_MS 500
/*delay variable*/
static __IO float fac_us;
static __IO float fac_ms;
/**
* @brief initialize Delay function
* @param None
* @retval None
*/
void Delay_init()
{
/*Config Systick*/
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
fac_us=(float)SystemCoreClock/(8 * 1000000);
fac_ms=fac_us*1000;
}
/**
* @brief Inserts a delay time.
* @param nus: specifies the delay time length, in microsecond.
* @retval None
*/
void Delay_us(u32 nus)
{
u32 temp;
SysTick->LOAD = (u32)(nus*fac_us);
SysTick->VAL = 0x00;
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk ;
do
{
temp = SysTick->CTRL;
}while((temp & 0x01) &&! (temp & (1<<16)));
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->VAL = 0X00;
}
/**
* @brief Inserts a delay time.
* @param nms: specifies the delay time length, in milliseconds.
* @retval None
*/
void Delay_ms(u16 nms)
{
u32 temp;
while(nms)
{
if(nms > STEP_DELAY_MS)
{
SysTick->LOAD = (u32)(STEP_DELAY_MS * fac_ms);
nms -= STEP_DELAY_MS;
}
else
{
SysTick->LOAD = (u32)(nms * fac_ms);
nms = 0;
}
SysTick->VAL = 0x00;
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
do
{
temp = SysTick->CTRL;
}while( (temp & 0x01) && !(temp & (1<<16)) );
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->VAL = 0X00;
}
}
/**
* @brief Inserts a delay time.
* @param sec: specifies the delay time length, in seconds.
* @retval None
*/
void Delay_sec(u16 sec)
{
u16 i;
for(i=0; i<sec; i++)
{
Delay_ms(500);
Delay_ms(500);
}
}

16
.platformio/platforms/at32/examples/cmsis-blink/lib/Delay/delay.h
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@@ -1,16 +0,0 @@
/**
**************************************************************************
* File : delay.h
*/
#ifndef __DELAY_H
#define __DELAY_H
#include <at32f4xx.h>
/*Delay function*/
void Delay_init(void);
void Delay_us(u32 nus);
void Delay_ms(u16 nms);
void Delay_sec(u16 sec);
#endif

46
.platformio/platforms/at32/examples/cmsis-blink/lib/README
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@@ -1,46 +0,0 @@
This directory is intended for project specific (private) libraries.
PlatformIO will compile them to static libraries and link into executable file.
The source code of each library should be placed in a an own separate directory
("lib/your_library_name/[here are source files]").
For example, see a structure of the following two libraries `Foo` and `Bar`:
|--lib
| |
| |--Bar
| | |--docs
| | |--examples
| | |--src
| | |- Bar.c
| | |- Bar.h
| | |- library.json (optional, custom build options, etc) https://docs.platformio.org/page/librarymanager/config.html
| |
| |--Foo
| | |- Foo.c
| | |- Foo.h
| |
| |- README --> THIS FILE
|
|- platformio.ini
|--src
|- main.c
and a contents of `src/main.c`:
```
#include <Foo.h>
#include <Bar.h>
int main (void)
{
...
}
```
PlatformIO Library Dependency Finder will find automatically dependent
libraries scanning project source files.
More information about PlatformIO Library Dependency Finder
- https://docs.platformio.org/page/librarymanager/ldf.html

35
.platformio/platforms/at32/examples/cmsis-blink/platformio.ini
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@@ -1,35 +0,0 @@
; PlatformIO Project Configuration File
;
; Build options: build flags, source filter, extra scripting
; Upload options: custom port, speed and extra flags
; Library options: dependencies, extra library storages
;
; Please visit documentation for the other options and examples
; http://docs.platformio.org/page/projectconf.html
[env:generic_f403a]
platform = at32
framework = cmsis
board = generic_f403a
monitor_speed = 115200 ;serial monitor baudrate
;Use the following for jlink upload
upload_protocol = jlink
;Use the following for serial upload via bootloader (PA9, PA10)
;upload_protocol = serial
;upload_speed = 115200 ;default: 115200
;Use the following for DFU upload via USB port
;upload_protocol = dfu
;build_flags =
; -DDFU_MODE
; -UVECT_TAB_OFFSET
; -DUSER_VECT_TAB_ADDRESS
; -DVECT_TAB_OFFSET=0x2000 ; override default vector tale to support ISR table for DFU mode
;Use the following for custom uploader
;upload_protocol = custom
;upload_port = COM16
;upload_speed = 115200
;upload_command = ${platformio.packages_dir}/framework-cmsis-at32f40/tools/stm32flash/stm32flash -b $UPLOAD_SPEED -w $SOURCE -g 0x8000000 $UPLOAD_PORT

49
.platformio/platforms/at32/examples/cmsis-blink/src/main.c
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@@ -1,49 +0,0 @@
/** Light on/off pin PC13, 100Hz frequency */
#include "at32f4xx.h"
#include "delay.h"
#define BLUEPILL // BLUEPILL BLACKPILL QFP48_FLASHER
#ifdef BLUEPILL
#define LEDPORT (GPIOC)
#define LED1 (13)
#define ENABLE_GPIO_CLOCK (RCC->APB2EN |= RCC_APB2EN_GPIOCEN) //RCC_APB2ENR_IOPCEN)
#define _MODER CTRLH
#define GPIOMODER (GPIO_CTRLH_MDE13_0)
#endif
#ifdef BLACKPILL
#define LEDPORT (GPIOB)
#define LED1 (12)
#define ENABLE_GPIO_CLOCK (RCC->APB2EN |= RCC_APB2EN_GPIOBEN) //RCC_APB2ENR_IOPCEN)
#define _MODER CTRLH
#define GPIOMODER (GPIO_CTRLH_MDE12_0)
#endif
#ifdef QFP48_FLASHER
#define LEDPORT (GPIOB)
#define LED1 (15)
#define ENABLE_GPIO_CLOCK (RCC->APB2EN |= RCC_APB2EN_GPIOBEN) //RCC_APB2ENR_IOPCEN)
#define _MODER CTRLH
#define GPIOMODER (GPIO_CTRLH_MDE15_0)
#endif
//Alternates blue and green LEDs quickly
int main(void)
{
Delay_init();
ENABLE_GPIO_CLOCK; // enable the clock to GPIO
LEDPORT->_MODER |= GPIOMODER; // set pins to be general purpose output
for (;;) {
Delay_ms(1000);
LEDPORT->OPTDT ^= (1<<LED1); // toggle diodes ODR
}
return 0;
}

8
.platformio/platforms/at32/examples/cmsis-blink/src/main.h
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@@ -1,8 +0,0 @@
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#endif /* __MAIN_H */

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.platformio/platforms/at32/examples/cmsis-blink/src/system_at32f4xx.c
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18
.platformio/platforms/at32/platform.json
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@@ -1,6 +1,6 @@
{
"name": "at32",
"title": "AT32",
"title": "Artery AT32",
"description": "The AT32 family of 32-bit Flash MCUs based on the ARM Cortex-M processor is designed to offer new degrees of freedom to MCU users. It offers a 32-bit product range that combines very high performance, real-time capabilities, digital signal processing, and low-power, low-voltage operation, while maintaining full integration and ease of development.",
"homepage": "https://www.arterychip.com/en/index.jsp",
"license": "Apache-2.0",
@@ -18,7 +18,7 @@
"type": "git",
"url": "https://github.com/platformio/platform-at32.git"
},
"version": "1.0.0",
"version": "1.0.1",
"frameworks": {
"cmsis": {
"package": "framework-cmsis",
@@ -51,20 +51,14 @@
"framework-cmsis-at32f40": {
"type": "framework",
"optional": true,
"owner": "platformio",
"version": "~1.0.0"
},
"framework-cmsis-at32f42": {
"type": "framework",
"optional": true,
"owner": "platformio",
"version": "~1.0.0"
"owner": "martinloren",
"version": "https://github.com/martinloren/framework-cmsis-at32f40.git"
},
"framework-cmsis-at32f43": {
"type": "framework",
"optional": true,
"owner": "platformio",
"version": "~1.0.0"
"owner": "martinloren",
"version": "https://github.com/martinloren/framework-cmsis-at32f43.git"
},
"tool-openocd": {
"type": "uploader",

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<Database>
<Device>
<ChipInfo Vendor="AT" Name="AT32F435xGx" WorkRAMAddr="0x20000000" WorkRAMSize="0x80000" Core="JLINK_CORE_CORTEX_M4" />
<FlashBankInfo Name="Internal code flash" BaseAddr="0x08000000" AlwaysPresent="1" >
<LoaderInfo Name="QSPI Flash" MaxSize="0x100000" Loader="AT32F435_1024.FLM" LoaderType="FLASH_ALGO_TYPE_CMSIS" />
</FlashBankInfo>
</Device>
</Database>

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@@ -0,0 +1,8 @@
<Database>
<Device>
<ChipInfo Vendor="AT" Name="AT32F437xGx" WorkRAMAddr="0x20000000" WorkRAMSize="0x80000" Core="JLINK_CORE_CORTEX_M4" />
<FlashBankInfo Name="Internal code flash" BaseAddr="0x08000000" AlwaysPresent="1" >
<LoaderInfo Name="QSPI Flash" MaxSize="0x100000" Loader="AT32F437_1024.FLM" LoaderType="FLASH_ALGO_TYPE_CMSIS" />
</FlashBankInfo>
</Device>
</Database>

21
README.md
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@@ -7,10 +7,23 @@ Released specifically for the latest **[AT32F403A](https://www.arterychip.com/en
## Why AT32F403A
![MCU Comparison](Docs/MCU_Comparison.jpg "MCU Comparison")
## Instructions 说明
You need to have Visual Studio Code with PlatformIO installed （tested with PlatformIO v.2.4.0).
1) Copy the folders under .platformio into your .platformio folder (ie: C:\Users\(username)\.platformio)<br>
将 .platformio 下的文件夹复制到您的 .platformio 文件夹中（即：C:\Users\(用户名)\.platformio）
## Installation 安装
You need to have Visual Studio Code with PlatformIO installed （tested with PlatformIO Core v.6.1.16).
1) Copy the folders under `.platformio` into your .platformio folder (ie: `C:\Users\<USER>\.platformio`)
将 .platformio 下的文件夹复制到您的 .platformio 文件夹中（即：`C:\Users\<用户名>\.platformio`）
#### Install AT32 Configurations for J-Link (last update from ArteryICPProgrammer V3.0.19)
In order to make the J-Link software aware of the new device, copy the folder `JLinkDevices` in the the central JLinkDevices folder (Windows): `C:\Users\<USER>\AppData\Roaming\SEGGER\`
Currently available:
- AT32F435xGx
- AT32F437xGx
More details about custom device configuration for J-Link are available [here](https://wiki.segger.com/J-Link_Device_Support_Kit).
## Usage Instructions 使用说明
3) Open Visual Studio Code, you should see AT32 Platform among the available platforms<br>
打开 Visual Studio Code，在可用平台中应该可以看到 AT32 平台
4) Open one of the example folder and try to compile / upload<br>

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