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update version to v2.1.0

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This commit is contained in:
Artery-MCU
2023-08-08 19:29:14 +08:00
parent 704a2ff779
commit fb61391d00
363 changed files with 144902 additions and 1210 deletions
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BIN
AT32F413_periph_lib_V2.0.9.chm → AT32F413_periph_lib_V2.1.0.chm
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document/AT32F413固件库BSP&Pack应用指南.pdf
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document/ReleaseNotes_AT32F413_Firmware_Library.pdf
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27
libraries/cmsis/cm4/device_support/at32f413.h
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@@ -66,6 +66,9 @@ extern "C" {
#define AT32F413xx
#endif
/**
* define with package
*/
#if defined (AT32F413RBT7) || defined (AT32F413RCT7)
#define AT32F413Rx
@@ -82,6 +85,26 @@ extern "C" {
#define AT32F413Kx
#endif
/**
* define with memory density
*/
#if defined (AT32F413C8T7) || defined (AT32FEBKC8T7)
#define AT32F413x8
#endif
#if defined (AT32F413KBU7_4) || defined (AT32F413CBU7) || defined (AT32F413CBT7) || \
defined (AT32F413RBT7) || defined (AT32F413TBU7)
#define AT32F413xB
#endif
#if defined (AT32F413KCU7_4) || defined (AT32F413CCU7) || defined (AT32F413CCT7) || \
defined (AT32F413RCT7)
#define AT32F413xC
#endif
#ifndef USE_STDPERIPH_DRIVER
/**
* @brief comment the line below if you will not use the peripherals drivers.
@@ -100,8 +123,8 @@ extern "C" {
* @brief at32f413 standard peripheral library version number
*/
#define __AT32F413_LIBRARY_VERSION_MAJOR (0x02) /*!< [31:24] major version */
#define __AT32F413_LIBRARY_VERSION_MIDDLE (0x00) /*!< [23:16] middle version */
#define __AT32F413_LIBRARY_VERSION_MINOR (0x09) /*!< [15:8] minor version */
#define __AT32F413_LIBRARY_VERSION_MIDDLE (0x01) /*!< [23:16] middle version */
#define __AT32F413_LIBRARY_VERSION_MINOR (0x00) /*!< [15:8] minor version */
#define __AT32F413_LIBRARY_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __AT32F413_LIBRARY_VERSION ((__AT32F413_LIBRARY_VERSION_MAJOR << 24) | \
(__AT32F413_LIBRARY_VERSION_MIDDLE << 16) | \

BIN
libraries/drivers/ReleaseNotes_AT32F413_Firmware_Library_Drivers.pdf
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30
libraries/drivers/inc/at32f413_crc.h
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@@ -66,6 +66,17 @@ typedef enum
CRC_REVERSE_OUTPUT_DATA = 0x01 /*!< output data reverse by word */
} crc_reverse_output_type;
/**
* @brief crc polynomial size
*/
typedef enum
{
CRC_POLY_SIZE_32B = 0x00, /*!< polynomial size 32 bits */
CRC_POLY_SIZE_16B = 0x01, /*!< polynomial size 16 bits */
CRC_POLY_SIZE_8B = 0x02, /*!< polynomial size 8 bits */
CRC_POLY_SIZE_7B = 0x03 /*!< polynomial size 7 bits */
} crc_poly_size_type;
/**
* @brief type define crc register all
*/
@@ -105,7 +116,8 @@ typedef struct
struct
{
__IO uint32_t rst : 1 ; /* [0] */
__IO uint32_t reserved1 : 4 ; /* [4:1] */
__IO uint32_t reserved1 : 2 ; /* [2:1] */
__IO uint32_t poly_size : 2 ; /* [4:3] */
__IO uint32_t revid : 2 ; /* [6:5] */
__IO uint32_t revod : 1 ; /* [7] */
__IO uint32_t reserved2 : 24 ;/* [31:8] */
@@ -129,6 +141,18 @@ typedef struct
} idt_bit;
};
/**
* @brief crc polynomial register, offset:0x14
*/
union
{
__IO uint32_t poly;
struct
{
__IO uint32_t poly : 32; /* [31:0] */
} poly_bit;
};
} crc_type;
/**
@@ -150,6 +174,10 @@ uint8_t crc_common_data_get(void);
void crc_init_data_set(uint32_t value);
void crc_reverse_input_data_set(crc_reverse_input_type value);
void crc_reverse_output_data_set(crc_reverse_output_type value);
void crc_poly_value_set(uint32_t value);
uint32_t crc_poly_value_get(void);
void crc_poly_size_set(crc_poly_size_type size);
crc_poly_size_type crc_poly_size_get(void);
/**
* @}

2
libraries/drivers/inc/at32f413_flash.h
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@@ -593,6 +593,8 @@ uint8_t flash_ssb_status_get(void);
void flash_interrupt_enable(uint32_t flash_int, confirm_state new_state);
void flash_spim_model_select(flash_spim_model_type mode);
void flash_spim_encryption_range_set(uint32_t decode_address);
void flash_spim_dummy_read(void);
flash_status_type flash_spim_mass_program(uint32_t address, uint8_t *buf, uint32_t cnt);
flash_status_type flash_slib_enable(uint32_t pwd, uint16_t start_sector, uint16_t data_start_sector, uint16_t end_sector);
error_status flash_slib_disable(uint32_t pwd);
uint32_t flash_slib_remaining_count_get(void);

6
libraries/drivers/inc/at32f413_usb.h
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@@ -199,9 +199,9 @@ typedef enum
typedef enum
{
EPT_CONTROL_TYPE = 0x00, /*!< usb transfer type control */
EPT_BULK_TYPE = 0x01, /*!< usb transfer type bulk */
EPT_INT_TYPE = 0x02, /*!< usb transfer type interrut */
EPT_ISO_TYPE = 0x03 /*!< usb transfer type iso */
EPT_ISO_TYPE = 0x01, /*!< usb transfer type iso */
EPT_BULK_TYPE = 0x02, /*!< usb transfer type bulk */
EPT_INT_TYPE = 0x03 /*!< usb transfer type interrupt */
}ept_trans_type;
/**

218
libraries/drivers/src/at32f413_adc.c
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@@ -109,7 +109,7 @@ void adc_combine_mode_select(adc_combine_mode_type combine_mode)
* - ADC_LEFT_ALIGNMENT
* @param ordinary_channel_length: configure the adc ordinary channel sequence length.
* this parameter can be:
* - (0x1~0xf)
* - (0x1~0x10)
* @retval none
*/
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
@@ -135,7 +135,7 @@ void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
* - ADC_LEFT_ALIGNMENT
* @param ordinary_channel_length: configure the adc ordinary channel sequence length.
* this parameter can be:
* - (0x1~0xf)
* - (0x1~0x10)
* @retval none
*/
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
@@ -340,117 +340,42 @@ void adc_voltage_monitor_single_channel_select(adc_type *adc_x, adc_channel_sele
*/
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
{
switch(adc_channel)
uint32_t tmp_reg;
if(adc_channel < ADC_CHANNEL_10)
{
case ADC_CHANNEL_0:
adc_x->spt2_bit.cspt0 = adc_sampletime;
break;
case ADC_CHANNEL_1:
adc_x->spt2_bit.cspt1 = adc_sampletime;
break;
case ADC_CHANNEL_2:
adc_x->spt2_bit.cspt2 = adc_sampletime;
break;
case ADC_CHANNEL_3:
adc_x->spt2_bit.cspt3 = adc_sampletime;
break;
case ADC_CHANNEL_4:
adc_x->spt2_bit.cspt4 = adc_sampletime;
break;
case ADC_CHANNEL_5:
adc_x->spt2_bit.cspt5 = adc_sampletime;
break;
case ADC_CHANNEL_6:
adc_x->spt2_bit.cspt6 = adc_sampletime;
break;
case ADC_CHANNEL_7:
adc_x->spt2_bit.cspt7 = adc_sampletime;
break;
case ADC_CHANNEL_8:
adc_x->spt2_bit.cspt8 = adc_sampletime;
break;
case ADC_CHANNEL_9:
adc_x->spt2_bit.cspt9 = adc_sampletime;
break;
case ADC_CHANNEL_10:
adc_x->spt1_bit.cspt10 = adc_sampletime;
break;
case ADC_CHANNEL_11:
adc_x->spt1_bit.cspt11 = adc_sampletime;
break;
case ADC_CHANNEL_12:
adc_x->spt1_bit.cspt12 = adc_sampletime;
break;
case ADC_CHANNEL_13:
adc_x->spt1_bit.cspt13 = adc_sampletime;
break;
case ADC_CHANNEL_14:
adc_x->spt1_bit.cspt14 = adc_sampletime;
break;
case ADC_CHANNEL_15:
adc_x->spt1_bit.cspt15 = adc_sampletime;
break;
case ADC_CHANNEL_16:
adc_x->spt1_bit.cspt16 = adc_sampletime;
break;
case ADC_CHANNEL_17:
adc_x->spt1_bit.cspt17 = adc_sampletime;
break;
default:
break;
tmp_reg = adc_x->spt2;
tmp_reg &= ~(0x07 << 3 * adc_channel);
tmp_reg |= adc_sampletime << 3 * adc_channel;
adc_x->spt2 = tmp_reg;
}
switch(adc_sequence)
else
{
case 1:
adc_x->osq3_bit.osn1 = adc_channel;
break;
case 2:
adc_x->osq3_bit.osn2 = adc_channel;
break;
case 3:
adc_x->osq3_bit.osn3 = adc_channel;
break;
case 4:
adc_x->osq3_bit.osn4 = adc_channel;
break;
case 5:
adc_x->osq3_bit.osn5 = adc_channel;
break;
case 6:
adc_x->osq3_bit.osn6 = adc_channel;
break;
case 7:
adc_x->osq2_bit.osn7 = adc_channel;
break;
case 8:
adc_x->osq2_bit.osn8 = adc_channel;
break;
case 9:
adc_x->osq2_bit.osn9 = adc_channel;
break;
case 10:
adc_x->osq2_bit.osn10 = adc_channel;
break;
case 11:
adc_x->osq2_bit.osn11 = adc_channel;
break;
case 12:
adc_x->osq2_bit.osn12 = adc_channel;
break;
case 13:
adc_x->osq1_bit.osn13 = adc_channel;
break;
case 14:
adc_x->osq1_bit.osn14 = adc_channel;
break;
case 15:
adc_x->osq1_bit.osn15 = adc_channel;
break;
case 16:
adc_x->osq1_bit.osn16 = adc_channel;
break;
default:
break;
tmp_reg = adc_x->spt1;
tmp_reg &= ~(0x07 << 3 * (adc_channel - ADC_CHANNEL_10));
tmp_reg |= adc_sampletime << 3 * (adc_channel - ADC_CHANNEL_10);
adc_x->spt1 = tmp_reg;
}
if(adc_sequence >= 13)
{
tmp_reg = adc_x->osq1;
tmp_reg &= ~(0x01F << 5 * (adc_sequence - 13));
tmp_reg |= adc_channel << 5 * (adc_sequence - 13);
adc_x->osq1 = tmp_reg;
}
else if(adc_sequence >= 7)
{
tmp_reg = adc_x->osq2;
tmp_reg &= ~(0x01F << 5 * (adc_sequence - 7));
tmp_reg |= adc_channel << 5 * (adc_sequence - 7);
adc_x->osq2 = tmp_reg;
}
else
{
tmp_reg = adc_x->osq3;
tmp_reg &= ~(0x01F << 5 * (adc_sequence - 1));
tmp_reg |= adc_channel << 5 * (adc_sequence - 1);
adc_x->osq3 = tmp_reg;
}
}
@@ -498,66 +423,23 @@ void adc_preempt_channel_length_set(adc_type *adc_x, uint8_t adc_channel_lenght)
*/
void adc_preempt_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
{
uint16_t sequence_index=0;
switch(adc_channel)
uint32_t tmp_reg;
uint8_t sequence_index;
if(adc_channel < ADC_CHANNEL_10)
{
case ADC_CHANNEL_0:
adc_x->spt2_bit.cspt0 = adc_sampletime;
break;
case ADC_CHANNEL_1:
adc_x->spt2_bit.cspt1 = adc_sampletime;
break;
case ADC_CHANNEL_2:
adc_x->spt2_bit.cspt2 = adc_sampletime;
break;
case ADC_CHANNEL_3:
adc_x->spt2_bit.cspt3 = adc_sampletime;
break;
case ADC_CHANNEL_4:
adc_x->spt2_bit.cspt4 = adc_sampletime;
break;
case ADC_CHANNEL_5:
adc_x->spt2_bit.cspt5 = adc_sampletime;
break;
case ADC_CHANNEL_6:
adc_x->spt2_bit.cspt6 = adc_sampletime;
break;
case ADC_CHANNEL_7:
adc_x->spt2_bit.cspt7 = adc_sampletime;
break;
case ADC_CHANNEL_8:
adc_x->spt2_bit.cspt8 = adc_sampletime;
break;
case ADC_CHANNEL_9:
adc_x->spt2_bit.cspt9 = adc_sampletime;
break;
case ADC_CHANNEL_10:
adc_x->spt1_bit.cspt10 = adc_sampletime;
break;
case ADC_CHANNEL_11:
adc_x->spt1_bit.cspt11 = adc_sampletime;
break;
case ADC_CHANNEL_12:
adc_x->spt1_bit.cspt12 = adc_sampletime;
break;
case ADC_CHANNEL_13:
adc_x->spt1_bit.cspt13 = adc_sampletime;
break;
case ADC_CHANNEL_14:
adc_x->spt1_bit.cspt14 = adc_sampletime;
break;
case ADC_CHANNEL_15:
adc_x->spt1_bit.cspt15 = adc_sampletime;
break;
case ADC_CHANNEL_16:
adc_x->spt1_bit.cspt16 = adc_sampletime;
break;
case ADC_CHANNEL_17:
adc_x->spt1_bit.cspt17 = adc_sampletime;
break;
default:
break;
tmp_reg = adc_x->spt2;
tmp_reg &= ~(0x07 << 3 * adc_channel);
tmp_reg |= adc_sampletime << 3 * adc_channel;
adc_x->spt2 = tmp_reg;
}
else
{
tmp_reg = adc_x->spt1;
tmp_reg &= ~(0x07 << 3 * (adc_channel - ADC_CHANNEL_10));
tmp_reg |= adc_sampletime << 3 * (adc_channel - ADC_CHANNEL_10);
adc_x->spt1 = tmp_reg;
}
sequence_index = adc_sequence + 3 - adc_x->psq_bit.pclen;
switch(sequence_index)
{

46
libraries/drivers/src/at32f413_crc.c
View File

@@ -147,6 +147,52 @@ void crc_reverse_output_data_set(crc_reverse_output_type value)
CRC->ctrl_bit.revod = value;
}
/**
* @brief config crc polynomial value
* @param value
* 32-bit new data of crc poly value
* @retval none.
*/
void crc_poly_value_set(uint32_t value)
{
CRC->poly = value;
}
/**
* @brief return crc polynomial value
* @param none
* @retval 32-bit value of the polynomial value.
*/
uint32_t crc_poly_value_get(void)
{
return (CRC->poly);
}
/**
* @brief config crc polynomial data size
* @param size
* this parameter can be one of the following values:
* - CRC_POLY_SIZE_32B
* - CRC_POLY_SIZE_16B
* - CRC_POLY_SIZE_8B
* - CRC_POLY_SIZE_7B
* @retval none.
*/
void crc_poly_size_set(crc_poly_size_type size)
{
CRC->ctrl_bit.poly_size = size;
}
/**
* @brief return crc polynomial data size
* @param none
* @retval polynomial data size.
*/
crc_poly_size_type crc_poly_size_get(void)
{
return (crc_poly_size_type)(CRC->ctrl_bit.poly_size);
}
/**
* @}
*/

71
libraries/drivers/src/at32f413_flash.c
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@@ -282,6 +282,9 @@ flash_status_type flash_sector_erase(uint32_t sector_address)
/* disable the secers bit */
FLASH->ctrl3_bit.secers = FALSE;
/* dummy read */
flash_spim_dummy_read();
}
else
{
@@ -341,6 +344,9 @@ flash_status_type flash_spim_all_erase(void)
/* disable the chpers bit */
FLASH->ctrl3_bit.chpers = FALSE;
/* dummy read */
flash_spim_dummy_read();
/* return the erase status */
return status;
}
@@ -416,6 +422,9 @@ flash_status_type flash_word_program(uint32_t address, uint32_t data)
/* disable the fprgm bit */
FLASH->ctrl3_bit.fprgm = FALSE;
/* dummy read */
flash_spim_dummy_read();
}
else
{
@@ -451,6 +460,9 @@ flash_status_type flash_halfword_program(uint32_t address, uint16_t data)
/* disable the fprgm bit */
FLASH->ctrl3_bit.fprgm = FALSE;
/* dummy read */
flash_spim_dummy_read();
}
else
{
@@ -732,6 +744,9 @@ void flash_interrupt_enable(uint32_t flash_int, confirm_state new_state)
void flash_spim_model_select(flash_spim_model_type mode)
{
FLASH->select = mode;
/* dummy read */
flash_spim_dummy_read();
}
/**
@@ -746,6 +761,62 @@ void flash_spim_encryption_range_set(uint32_t decode_address)
FLASH->da = decode_address;
}
/**
* @brief operate the flash spim dummy read.
* @param none
* @retval none
*/
void flash_spim_dummy_read(void)
{
UNUSED(*(__IO uint32_t*)FLASH_SPIM_START_ADDR);
UNUSED(*(__IO uint32_t*)(FLASH_SPIM_START_ADDR + 0x1000));
UNUSED(*(__IO uint32_t*)(FLASH_SPIM_START_ADDR + 0x2000));
}
/**
* @brief mass program for flash spim.
* @param address: specifies the start address to be programmed, word or halfword alignment is recommended.
* @param buf: specifies the pointer of data to be programmed.
* @param cnt: specifies the data counter to be programmed.
* @retval status: the returned value can be: FLASH_PROGRAM_ERROR,
* FLASH_EPP_ERROR, FLASH_OPERATE_DONE or FLASH_OPERATE_TIMEOUT.
*/
flash_status_type flash_spim_mass_program(uint32_t address, uint8_t *buf, uint32_t cnt)
{
flash_status_type status = FLASH_OPERATE_DONE;
uint32_t index, temp_offset;
if(address >= FLASH_SPIM_START_ADDR)
{
temp_offset = cnt % 4;
if((temp_offset != 0) && (temp_offset != 2))
return status;
FLASH->ctrl3_bit.fprgm = TRUE;
for(index = 0; index < cnt / 4; index++)
{
*(__IO uint32_t*)(address + index * 4) = *(uint32_t*)(buf + index * 4);
/* wait for operation to be completed */
status = flash_spim_operation_wait_for(SPIM_PROGRAMMING_TIMEOUT);
if(status != FLASH_OPERATE_DONE)
return status;
}
if(temp_offset == 2)
{
*(__IO uint16_t*)(address + index * 4) = *(uint16_t*)(buf + index * 4);
/* wait for operation to be completed */
status = flash_spim_operation_wait_for(SPIM_PROGRAMMING_TIMEOUT);
}
/* disable the fprgm bit */
FLASH->ctrl3_bit.fprgm = FALSE;
/* dummy read */
flash_spim_dummy_read();
}
/* return the program status */
return status;
}
/**
* @brief enable security library function.
* @param pwd: slib password

5
libraries/drivers/src/at32f413_tmr.c
View File

@@ -276,8 +276,7 @@ uint32_t tmr_counter_value_get(tmr_type *tmr_x)
* this parameter can be one of the following values:
* TMR1, TMR2, TMR3, TMR4, TMR5, TMR8, TMR9, TMR10,
* TMR11
* @param tmr_div_value (for 16 bit tmr 0x0000~0xFFFF,
* for 32 bit tmr 0x0000_0000~0xFFFF_FFFF)
* @param tmr_div_value (0x0000~0xFFFF)
* @retval none
*/
void tmr_div_value_set(tmr_type *tmr_x, uint32_t tmr_div_value)
@@ -1712,7 +1711,7 @@ void tmr_dma_control_config(tmr_type *tmr_x, tmr_dma_transfer_length_type dma_le
}
/**
* @brief config tmr break mode and dead-time
* @brief config tmr brake mode and dead-time
* @param tmr_x: select the tmr peripheral.
* this parameter can be one of the following values:
* TMR1, TMR8

3
libraries/drivers/src/at32f413_usart.c
View File

@@ -90,6 +90,9 @@ void usart_reset(usart_type* usart_x)
* this parameter can be one of the following values:
* - USART_DATA_8BITS
* - USART_DATA_9BITS.
* note：
* - when parity check is disabled, the data bit width is the actual data bit number.
* - when parity check is enabled, the data bit width is the actual data bit number minus 1, and the MSB bit is replaced with the parity bit.
* @param stop_bit: stop bits transmitted
* this parameter can be one of the following values:
* - USART_STOP_1_BIT

6
middlewares/usbd_class/audio/audio_class.c
View File

@@ -197,8 +197,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
audio_set_interface(udev, setup);
usbd_ctrl_send_status(pudev);
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;

5
middlewares/usbd_class/audio/audio_desc.c
View File

@@ -52,7 +52,10 @@ static usbd_desc_t *get_device_config_string(void);
static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
static void get_serial_num(void);
static uint8_t g_usbd_desc_buffer[256];
#if defined ( __ICCARM__ ) /* iar compiler */
#pragma data_alignment=4
#endif
ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
/**
* @brief device descriptor handler structure

10
middlewares/usbd_class/audio_hid/audio_hid_class.c
View File

@@ -216,7 +216,12 @@ usb_sts_type class_audio_setup_handler(void *udev, usb_setup_type *setup)
usbd_ctrl_send_status(pudev);
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;
@@ -293,7 +298,12 @@ usb_sts_type class_hid_setup_handler(void *udev, usb_setup_type *setup)
case USB_STD_REQ_SET_INTERFACE:
paudio_hid->alt_setting = setup->wValue;
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;

5
middlewares/usbd_class/audio_hid/audio_hid_desc.c
View File

@@ -54,7 +54,10 @@ static usbd_desc_t *get_device_config_string(void);
static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
static void get_serial_num(void);
static uint8_t g_usbd_desc_buffer[256];
#if defined ( __ICCARM__ ) /* iar compiler */
#pragma data_alignment=4
#endif
ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
/**
* @brief device descriptor handler structure

5
middlewares/usbd_class/cdc/cdc_class.c
View File

@@ -180,7 +180,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
case USB_STD_REQ_SET_INTERFACE:
pcdc->alt_setting = setup->wValue;
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;

5
middlewares/usbd_class/cdc/cdc_desc.c
View File

@@ -53,7 +53,10 @@ static usbd_desc_t *get_device_config_string(void);
static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
static void get_serial_num(void);
static uint8_t g_usbd_desc_buffer[256];
#if defined ( __ICCARM__ ) /* iar compiler */
#pragma data_alignment=4
#endif
ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
/**
* @brief device descriptor handler structure

10
middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_class.c
View File

@@ -356,7 +356,12 @@ static usb_sts_type cdc_class_setup_handler(void *udev, usb_setup_type *setup)
case USB_STD_REQ_SET_INTERFACE:
vcpkybrd->alt_setting = setup->wValue;
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;
@@ -431,7 +436,12 @@ static usb_sts_type keyboard_class_setup_handler(void *udev, usb_setup_type *set
case USB_STD_REQ_SET_INTERFACE:
vcpkybrd->alt_setting = setup->wValue;
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;

5
middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_desc.c
View File

@@ -52,7 +52,10 @@ static usbd_desc_t *get_device_config_string(void);
static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
static void get_serial_num(void);
static uint8_t g_usbd_desc_buffer[256];
#if defined ( __ICCARM__ ) /* iar compiler */
#pragma data_alignment=4
#endif
ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
/**
* @brief device descriptor handler structure

8
middlewares/usbd_class/composite_cdc_msc/cdc_msc_class.c
View File

@@ -227,7 +227,12 @@ static usb_sts_type cdc_class_setup_handler(void *udev, usb_setup_type *setup)
case USB_STD_REQ_SET_INTERFACE:
pcdc->alt_setting = setup->wValue;
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;
@@ -296,7 +301,10 @@ static usb_sts_type msc_class_setup_handler(void *udev, usb_setup_type *setup)
}
bot_scsi_clear_feature(udev, setup->wIndex);
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;

2
middlewares/usbd_class/composite_cdc_msc/cdc_msc_class.h
View File

@@ -266,7 +266,7 @@ typedef struct
uint32_t blk_nbr[MSC_SUPPORT_MAX_LUN];
uint32_t blk_size[MSC_SUPPORT_MAX_LUN];
uint32_t blk_addr;
uint64_t blk_addr;
uint32_t blk_len;
uint32_t data_len;

5
middlewares/usbd_class/composite_cdc_msc/cdc_msc_desc.c
View File

@@ -56,7 +56,10 @@ static usbd_desc_t *get_device_config_string(void);
static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
static void get_serial_num(void);
static uint8_t g_usbd_desc_buffer[256];
#if defined ( __ICCARM__ ) /* iar compiler */
#pragma data_alignment=4
#endif
ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
/**
* @brief device descriptor handler structure

5
middlewares/usbd_class/custom_hid/custom_hid_class.c
View File

@@ -180,7 +180,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
case USB_STD_REQ_SET_INTERFACE:
pcshid->alt_setting = setup->wValue;
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;

5
middlewares/usbd_class/custom_hid/custom_hid_desc.c
View File

@@ -52,7 +52,10 @@ static usbd_desc_t *get_device_config_string(void);
static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
static void get_serial_num(void);
static uint8_t g_usbd_desc_buffer[256];
#if defined ( __ICCARM__ ) /* iar compiler */
#pragma data_alignment=4
#endif
ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
/**
* @brief custom hid device descriptor handler structure

5
middlewares/usbd_class/hid_iap/hid_iap_class.c
View File

@@ -171,7 +171,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
case USB_STD_REQ_SET_INTERFACE:
piap->alt_setting = setup->wValue;
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;

5
middlewares/usbd_class/hid_iap/hid_iap_desc.c
View File

@@ -55,7 +55,10 @@ static usbd_desc_t *get_device_config_string(void);
static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
static void get_serial_num(void);
static uint8_t g_usbd_desc_buffer[256];
#if defined ( __ICCARM__ ) /* iar compiler */
#pragma data_alignment=4
#endif
ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
/**
* @brief hid device descriptor handler structure

5
middlewares/usbd_class/keyboard/keyboard_class.c
View File

@@ -301,7 +301,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
case USB_STD_REQ_SET_INTERFACE:
pkeyboard->alt_setting = setup->wValue;
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;

5
middlewares/usbd_class/keyboard/keyboard_desc.c
View File

@@ -53,7 +53,10 @@ static usbd_desc_t *get_device_config_string(void);
static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
static void get_serial_num(void);
static uint8_t g_usbd_desc_buffer[256];
#if defined ( __ICCARM__ ) /* iar compiler */
#pragma data_alignment=4
#endif
ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
/**
* @brief keyboard device descriptor handler structure

4
middlewares/usbd_class/mouse/mouse_class.c
View File

@@ -166,6 +166,10 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
case USB_STD_REQ_SET_INTERFACE:
pmouse->alt_setting = setup->wValue;
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;

5
middlewares/usbd_class/mouse/mouse_desc.c
View File

@@ -53,7 +53,10 @@ static usbd_desc_t *get_device_config_string(void);
static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
static void get_serial_num(void);
static uint8_t g_usbd_desc_buffer[256];
#if defined ( __ICCARM__ ) /* iar compiler */
#pragma data_alignment=4
#endif
ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
/**
* @brief mouse device descriptor handler structure

2
middlewares/usbd_class/msc/msc_bot_scsi.h
View File

@@ -197,7 +197,7 @@ typedef struct
uint32_t blk_nbr[MSC_SUPPORT_MAX_LUN];
uint32_t blk_size[MSC_SUPPORT_MAX_LUN];
uint32_t blk_addr;
uint64_t blk_addr;
uint32_t blk_len;
uint32_t data_len;

3
middlewares/usbd_class/msc/msc_class.c
View File

@@ -164,7 +164,10 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
}
bot_scsi_clear_feature(udev, setup->wIndex);
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;

5
middlewares/usbd_class/msc/msc_desc.c
View File

@@ -54,7 +54,10 @@ static usbd_desc_t *get_device_config_string(void);
static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
static void get_serial_num(void);
static uint8_t g_usbd_desc_buffer[256];
#if defined ( __ICCARM__ ) /* iar compiler */
#pragma data_alignment=4
#endif
ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
/**
* @brief device descriptor handler structure

5
middlewares/usbd_class/printer/printer_class.c
View File

@@ -163,7 +163,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
case USB_STD_REQ_SET_INTERFACE:
pprter->alt_setting = setup->wValue;
break;
case USB_STD_REQ_CLEAR_FEATURE:
break;
case USB_STD_REQ_SET_FEATURE:
break;
default:
usbd_ctrl_unsupport(pudev);
break;
}
break;

5
middlewares/usbd_class/printer/printer_desc.c
View File

@@ -54,7 +54,10 @@ static usbd_desc_t *get_device_config_string(void);
static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
static void get_serial_num(void);
static uint8_t g_usbd_desc_buffer[256];
#if defined ( __ICCARM__ ) /* iar compiler */
#pragma data_alignment=4
#endif
ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
/**
* @brief device descriptor handler structure

5
middlewares/usbd_drivers/inc/usb_std.h
View File

@@ -248,8 +248,13 @@ typedef struct
/**
* @brief min and max define
*/
#ifndef MIN
#define MIN(a, b) (uint16_t)(((a) < (b)) ? (a) : (b)) /*!< min define*/
#endif
#ifndef MAX
#define MAX(a, b) (uint16_t)(((a) > (b)) ? (a) : (b)) /*!< max define*/
#endif
/**
* @brief low byte and high byte define

20
middlewares/usbd_drivers/src/usbd_sdr.c
View File

@@ -395,9 +395,11 @@ usb_sts_type usbd_interface_request(usbd_core_type *udev)
usb_setup_type *setup = &udev->setup;
switch(udev->conn_state)
{
case USB_CONN_STATE_DEFAULT:
case USB_CONN_STATE_ADDRESSED:
case USB_CONN_STATE_CONFIGURED:
udev->class_handler->setup_handler(udev, &udev->setup);
if(setup->wLength == 0)
ret = udev->class_handler->setup_handler(udev, &udev->setup);
if(setup->wLength == 0 && ret == USB_OK)
{
usbd_ctrl_send_status(udev);
}
@@ -421,9 +423,10 @@ usb_sts_type usbd_endpoint_request(usbd_core_type *udev)
uint8_t ept_addr = LBYTE(setup->wIndex);
usb_ept_info *ept_info;
if((setup->bmRequestType & USB_REQ_TYPE_RESERVED) == USB_REQ_TYPE_CLASS)
if((setup->bmRequestType & USB_REQ_TYPE_RESERVED) != USB_REQ_TYPE_STANDARD)
{
udev->class_handler->setup_handler(udev, &udev->setup);
return ret;
}
switch(setup->bRequest)
{
@@ -435,6 +438,17 @@ usb_sts_type usbd_endpoint_request(usbd_core_type *udev)
{
usbd_set_stall(udev, ept_addr);
}
if((ept_addr & 0x80) != 0)
{
ept_info = &udev->ept_in[ept_addr & 0x7F];
}
else
{
ept_info = &udev->ept_out[ept_addr & 0x7F];
}
ept_info->status = 0x0000;
usbd_ctrl_send(udev, (uint8_t *)(&ept_info->status), 2);
break;
case USB_CONN_STATE_CONFIGURED:
{

13
project/at32f413_board/at32f413_board.c
View File

@@ -22,7 +22,6 @@
*
**************************************************************************
*/
#include "at32f413_board.h"
/** @addtogroup AT32F413_board
@@ -93,16 +92,24 @@ static __IO uint32_t fac_ms;
PUTCHAR_PROTOTYPE
{
while(usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET);
usart_data_transmit(PRINT_UART, ch);
usart_data_transmit(PRINT_UART, (uint16_t)ch);
while(usart_flag_get(PRINT_UART, USART_TDC_FLAG) == RESET);
return ch;
}
#if (defined (__GNUC__) && !defined (__clang__)) || (defined (__ICCARM__))
#if defined (__GNUC__) && !defined (__clang__)
int _write(int fd, char *pbuffer, int size)
#elif defined ( __ICCARM__ )
#pragma module_name = "?__write"
int __write(int fd, char *pbuffer, int size)
#endif
{
for(int i = 0; i < size; i ++)
{
__io_putchar(*pbuffer++);
while(usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET);
usart_data_transmit(PRINT_UART, (uint16_t)(*pbuffer++));
while(usart_flag_get(PRINT_UART, USART_TDC_FLAG) == RESET);
}
return size;

6
project/at_start_f413/examples/acc/calibration/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

4
project/at_start_f413/examples/acc/calibration/src/main.c
View File

@@ -158,11 +158,7 @@ void system_clock_config_for_acc(void)
/* reset crm */
crm_reset();
#ifdef SCLK_FROM_HICK
crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE);
#elif defined SCLK_FROM_HEXT
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
#endif
/* wait till hick is ready */
while(SET != crm_flag_get(CRM_HICK_STABLE_FLAG))

6
project/at_start_f413/examples/adc/combine_mode_ordinary_simult/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/adc/current_vref_value_check/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/adc/exint_trigger_partitioned/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/adc/internal_temperature_sensor/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/adc/repeat_conversion_loop_transfer/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/adc/software_trigger_repeat/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/adc/tmr_trigger_automatic_preempted/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/adc/voltage_monitoring/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/bpr/bpr_data/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/bpr/tamper/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/can/communication_mode/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/can/filter/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/can/loopback_mode/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/cortex_m4/bit_band/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/cortex_m4/cmsis_dsp/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/cortex_m4/fpu/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/cortex_m4/systick_interrupt/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/crc/calculation/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/crm/clock_failure_detection/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/crm/clock_failure_detection/src/main.c
View File

@@ -90,9 +90,9 @@ void clock_failure_detection_handler(void)
/**
* @brief config sclk 192 mhz with hick clock source.
* @note the system clock is configured as follow:
* - system clock = hick / 2 * pll_mult
* - system clock source = pll (hick)
* - hick = 8000000
* system clock (sclk) = hick / 2 * pll_mult
* system clock source = pll (hick)
* - hick = HICK_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/crm/sysclk_switch/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

12
project/at_start_f413/examples/crm/sysclk_switch/src/main.c
View File

@@ -87,9 +87,9 @@ static void switch_system_clock(void)
/**
* @brief config sclk 64 mhz with hick clock source.
* @note the system clock is configured as follow:
* - system clock = hick / 2 * pll_mult
* - system clock source = pll (hick)
* - hick = 8000000
* system clock (sclk) = hick / 2 * pll_mult
* system clock source = pll (hick)
* - hick = HICK_VALUE
* - sclk = 64000000
* - ahbdiv = 1
* - ahbclk = 64000000
@@ -161,9 +161,9 @@ static void sclk_64m_hick_config(void)
/**
* @brief config sclk 96 mhz with hext clock source.
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hick = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 96000000
* - ahbdiv = 1
* - ahbclk = 96000000

6
project/at_start_f413/examples/debug/tmr1/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/dma/data_to_gpio_flexible/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

2
project/at_start_f413/examples/dma/data_to_gpio_flexible/src/main.c
View File

@@ -102,7 +102,7 @@ int main(void)
dma_init_struct.loop_mode_enable = FALSE;
dma_init(DMA2_CHANNEL1, &dma_init_struct);
/* enable transfer full data intterrupt */
/* enable transfer full data interrupt */
dma_interrupt_enable(DMA2_CHANNEL1, DMA_FDT_INT, TRUE);
/* dma2 channel1 interrupt nvic init */

6
project/at_start_f413/examples/dma/flash_to_sram/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

2
project/at_start_f413/examples/dma/flash_to_sram/src/main.c
View File

@@ -117,7 +117,7 @@ int main(void)
dma_init_struct.loop_mode_enable = FALSE;
dma_init(DMA1_CHANNEL1, &dma_init_struct);
/* enable transfer full data intterrupt */
/* enable transfer full data interrupt */
dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
/* dma1 channel1 interrupt nvic init */

6
project/at_start_f413/examples/exint/exint_config/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/exint/exint_software_trigger/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/flash/fap_enable/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/flash/flash_write_read/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

4
project/at_start_f413/examples/flash/flash_write_read/src/flash.c
View File

@@ -33,7 +33,11 @@
* @{
*/
#if defined (AT32F413xC)
#define SECTOR_SIZE 2048 /* this parameter depends on the specific model of the chip */
#else
#define SECTOR_SIZE 1024 /* this parameter depends on the specific model of the chip */
#endif
uint16_t flash_buf[SECTOR_SIZE / 2];

6
project/at_start_f413/examples/flash/operate_spim/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

5
project/at_start_f413/examples/flash/run_in_spim/mdk_v5/run_in_spim.uvoptx
View File

@@ -117,6 +117,11 @@
<pMon>BIN\CMSIS_AGDI.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>CMSIS_AGDI</Key>
<Name>-X"Any" -UAny -O206 -S0 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN2 -FF0AT32F413_256.FLM -FS08000000 -FL040000 -FP0($$Device:-AT32F413RCT7$Flash\AT32F413_256.FLM) -FF1AT32F413_EXT_TYPE2_REAMP1_16MB -FS18400000 -FL11000000 -FP1($$Device:-AT32F413RCT7$Flash\AT32F413_EXT_TYPE2_REAMP1_16MB.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>

6
project/at_start_f413/examples/flash/run_in_spim/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/gpio/io_toggle/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/gpio/led_toggle/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/gpio/swjtag_remap/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/i2c/communication_dma/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/i2c/communication_int/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/i2c/communication_poll/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/i2c/eeprom/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/i2s/halfduplex_dma/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/i2s/halfduplex_interrupt/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/pwc/deepsleep_rtc/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/pwc/power_voltage_monitor/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/pwc/sleep_tmr2/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/pwc/sleep_usart1/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/pwc/standby_rtc/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/pwc/standby_wakeup_pin/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/rtc/calendar/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/rtc/lick_calibration/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

8
project/at_start_f413/examples/sdio/sd_mmc_card/src/at32_sdio.c
View File

@@ -143,8 +143,8 @@ sd_error_status_type sd_init(void)
{
if(sd_card_info.card_type == SDIO_STD_CAPACITY_SD_CARD_V1_1 || sd_card_info.card_type == SDIO_STD_CAPACITY_SD_CARD_V2_0)
{
/* set sdio_ck to 12mhz */
clkdiv = system_core_clock / 12000000;
/* set sdio_ck to 4mhz */
clkdiv = system_core_clock / 4000000;
if(clkdiv >= 2)
{
@@ -153,8 +153,8 @@ sd_error_status_type sd_init(void)
}
else
{
/* set sdio_ck to 48mhz */
clkdiv = system_core_clock / 48000000;
/* set sdio_ck to 4mhz */
clkdiv = system_core_clock / 4000000;
if(clkdiv >= 2)
{

6
project/at_start_f413/examples/sdio/sd_mmc_card/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

8
project/at_start_f413/examples/sdio/sdio_fatfs/src/at32_sdio.c
View File

@@ -144,8 +144,8 @@ sd_error_status_type sd_init(void)
{
if(sd_card_info.card_type == SDIO_STD_CAPACITY_SD_CARD_V1_1 || sd_card_info.card_type == SDIO_STD_CAPACITY_SD_CARD_V2_0)
{
/* set sdio_ck to 12mhz */
clkdiv = system_core_clock / 12000000;
/* set sdio_ck to 4mhz */
clkdiv = system_core_clock / 4000000;
if(clkdiv >= 2)
{
@@ -154,8 +154,8 @@ sd_error_status_type sd_init(void)
}
else
{
/* set sdio_ck to 48mhz */
clkdiv = system_core_clock / 48000000;
/* set sdio_ck to 4mhz */
clkdiv = system_core_clock / 4000000;
if(clkdiv >= 2)
{

6
project/at_start_f413/examples/sdio/sdio_fatfs/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

6
project/at_start_f413/examples/spi/crc_transfer_polling/src/at32f413_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000

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