mirror of
https://github.com/ArteryTek/AT32F413_Firmware_Library.git
synced 2026-05-21 09:22:02 +00:00
update version to v2.0.4
This commit is contained in:
@@ -22,7 +22,7 @@
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = 0x20007FFF; /* end of RAM */
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_estack = 0x20008000; /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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@@ -134,12 +134,12 @@ SECTIONS
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/* User_heap_stack section, used to check that there is enough RAM left */
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._user_heap_stack :
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{
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. = ALIGN(4);
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. = ALIGN(8);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(4);
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. = ALIGN(8);
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} >RAM
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/* Remove information from the standard libraries */
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@@ -22,7 +22,7 @@
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = 0x20007FFF; /* end of RAM */
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_estack = 0x20008000; /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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@@ -134,12 +134,12 @@ SECTIONS
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/* User_heap_stack section, used to check that there is enough RAM left */
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._user_heap_stack :
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{
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. = ALIGN(4);
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. = ALIGN(8);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(4);
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. = ALIGN(8);
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} >RAM
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/* Remove information from the standard libraries */
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@@ -22,7 +22,7 @@
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = 0x20007FFF; /* end of RAM */
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_estack = 0x20008000; /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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@@ -134,12 +134,12 @@ SECTIONS
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/* User_heap_stack section, used to check that there is enough RAM left */
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._user_heap_stack :
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{
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. = ALIGN(4);
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. = ALIGN(8);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(4);
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. = ALIGN(8);
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} >RAM
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/* Remove information from the standard libraries */
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@@ -1,8 +1,8 @@
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/**
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******************************************************************************
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* @file startup_at32f413.s
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* @version v2.0.3
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* @date 2022-02-11
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* @version v2.0.4
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* @date 2022-04-02
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* @brief at32f413xx devices vector table for gcc toolchain.
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* this module performs:
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* - set the initial sp
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@@ -106,7 +106,7 @@ Infinite_Loop:
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* The minimal vector table for a Cortex M3. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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*
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*******************************************************************************/
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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@@ -130,7 +130,7 @@ g_pfnVectors:
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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/* External Interrupts */
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.word WWDT_IRQHandler /* Window Watchdog Timer */
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.word PVM_IRQHandler /* PVM through EXINT Line detect */
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@@ -211,20 +211,20 @@ g_pfnVectors:
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/*******************************************************************************
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*
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* Provide weak aliases for each Exception handler to the Default_Handler.
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* As they are weak aliases, any function with the same name will override
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* Provide weak aliases for each Exception handler to the Default_Handler.
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* As they are weak aliases, any function with the same name will override
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* this definition.
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*
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*
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*******************************************************************************/
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.weak NMI_Handler
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.thumb_set NMI_Handler,Default_Handler
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.weak HardFault_Handler
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.thumb_set HardFault_Handler,Default_Handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler,Default_Handler
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.weak BusFault_Handler
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.thumb_set BusFault_Handler,Default_Handler
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@@ -241,10 +241,10 @@ g_pfnVectors:
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.thumb_set PendSV_Handler,Default_Handler
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.weak SysTick_Handler
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.thumb_set SysTick_Handler,Default_Handler
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.thumb_set SysTick_Handler,Default_Handler
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.weak WWDT_IRQHandler
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.thumb_set WWDT_IRQHandler,Default_Handler
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.thumb_set WWDT_IRQHandler,Default_Handler
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.weak PVM_IRQHandler
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.thumb_set PVM_IRQHandler,Default_Handler
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@@ -268,7 +268,7 @@ g_pfnVectors:
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.thumb_set EXINT1_IRQHandler,Default_Handler
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.weak EXINT2_IRQHandler
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.thumb_set EXINT2_IRQHandler,Default_Handler
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.thumb_set EXINT2_IRQHandler,Default_Handler
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.weak EXINT3_IRQHandler
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.thumb_set EXINT3_IRQHandler,Default_Handler
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@@ -286,7 +286,7 @@ g_pfnVectors:
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.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
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.weak DMA1_Channel4_IRQHandler
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.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
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.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
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.weak DMA1_Channel5_IRQHandler
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.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
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@@ -411,10 +411,10 @@ g_pfnVectors:
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.weak CAN2_TX_IRQHandler
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.thumb_set CAN2_TX_IRQHandler,Default_Handler
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.weak CAN2_RX0_IRQHandler
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.weak CAN2_RX0_IRQHandler
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.thumb_set CAN2_RX0_IRQHandler ,Default_Handler
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.weak CAN2_RX1_IRQHandler
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.weak CAN2_RX1_IRQHandler
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.thumb_set CAN2_RX1_IRQHandler ,Default_Handler
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.weak CAN2_SE_IRQHandler
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@@ -1,7 +1,7 @@
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;**************************************************************************
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;* @file startup_at32f413.s
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;* @version v2.0.3
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;* @date 2022-02-11
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;* @version v2.0.4
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;* @date 2022-04-02
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;* @brief at32f413 startup file for IAR Systems
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;**************************************************************************
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;
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@@ -64,8 +64,8 @@ __vector_table
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DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
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DCD ADC1_2_IRQHandler ; ADC1 & ADC2
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DCD USBFS_H_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
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DCD USBFS_L_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
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DCD CAN1_RX1_IRQHandler ; CAN1 RX1
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DCD USBFS_L_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
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DCD CAN1_RX1_IRQHandler ; CAN1 RX1
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DCD CAN1_SE_IRQHandler ; CAN1 SE
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DCD EXINT9_5_IRQHandler ; EXINT Line [9:5]
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DCD TMR1_BRK_TMR9_IRQHandler ; TMR1 Brake and TMR9
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@@ -113,8 +113,8 @@ __vector_table
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD CAN2_TX_IRQHandler ; CAN2 TX
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DCD CAN2_RX0_IRQHandler ; CAN2 RX0
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DCD CAN2_RX1_IRQHandler ; CAN2 RX1
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DCD CAN2_RX0_IRQHandler ; CAN2 RX0
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DCD CAN2_RX1_IRQHandler ; CAN2 RX1
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DCD CAN2_SE_IRQHandler ; CAN2 SE
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DCD ACC_IRQHandler ; ACC
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DCD USBFS_MAPH_IRQHandler ; USB Map HP
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@@ -280,15 +280,15 @@ ADC1_2_IRQHandler
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USBFS_H_CAN1_TX_IRQHandler
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B USBFS_H_CAN1_TX_IRQHandler
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PUBWEAK USBFS_L_CAN1_RX0_IRQHandler
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PUBWEAK USBFS_L_CAN1_RX0_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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USBFS_L_CAN1_RX0_IRQHandler
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B USBFS_L_CAN1_RX0_IRQHandler
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USBFS_L_CAN1_RX0_IRQHandler
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B USBFS_L_CAN1_RX0_IRQHandler
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PUBWEAK CAN1_RX1_IRQHandler
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PUBWEAK CAN1_RX1_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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CAN1_RX1_IRQHandler
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B CAN1_RX1_IRQHandler
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CAN1_RX1_IRQHandler
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B CAN1_RX1_IRQHandler
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PUBWEAK CAN1_SE_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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@@ -460,15 +460,15 @@ DMA2_Channel4_5_IRQHandler
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CAN2_TX_IRQHandler
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B CAN2_TX_IRQHandler
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PUBWEAK CAN2_RX0_IRQHandler
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PUBWEAK CAN2_RX0_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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CAN2_RX0_IRQHandler
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B CAN2_RX0_IRQHandler
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CAN2_RX0_IRQHandler
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B CAN2_RX0_IRQHandler
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PUBWEAK CAN2_RX1_IRQHandler
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PUBWEAK CAN2_RX1_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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CAN2_RX1_IRQHandler
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B CAN2_RX1_IRQHandler
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CAN2_RX1_IRQHandler
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B CAN2_RX1_IRQHandler
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PUBWEAK CAN2_SE_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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@@ -1,7 +1,7 @@
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;**************************************************************************
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;* @file startup_at32f403a_407.s
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;* @version v2.0.3
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;* @date 2022-02-11
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;* @version v2.0.4
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;* @date 2022-04-02
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;* @brief at32f403a_407 startup file for keil
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;**************************************************************************
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;
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@@ -77,8 +77,8 @@ __Vectors DCD __initial_sp ; Top of Stack
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DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
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DCD ADC1_2_IRQHandler ; ADC1 & ADC2
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DCD USBFS_H_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
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DCD USBFS_L_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
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DCD CAN1_RX1_IRQHandler ; CAN1 RX1
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DCD USBFS_L_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
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DCD CAN1_RX1_IRQHandler ; CAN1 RX1
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DCD CAN1_SE_IRQHandler ; CAN1 SE
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DCD EXINT9_5_IRQHandler ; EXINT Line [9:5]
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DCD TMR1_BRK_TMR9_IRQHandler ; TMR1 Brake and TMR9
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@@ -126,8 +126,8 @@ __Vectors DCD __initial_sp ; Top of Stack
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD CAN2_TX_IRQHandler ; CAN2 TX
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DCD CAN2_RX0_IRQHandler ; CAN2 RX0
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DCD CAN2_RX1_IRQHandler ; CAN2 RX1
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DCD CAN2_RX0_IRQHandler ; CAN2 RX0
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DCD CAN2_RX1_IRQHandler ; CAN2 RX1
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DCD CAN2_SE_IRQHandler ; CAN2 SE
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DCD ACC_IRQHandler ; ACC
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DCD USBFS_MAPH_IRQHandler ; USB Map High
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@@ -280,8 +280,8 @@ DMA1_Channel6_IRQHandler
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DMA1_Channel7_IRQHandler
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ADC1_2_IRQHandler
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USBFS_H_CAN1_TX_IRQHandler
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USBFS_L_CAN1_RX0_IRQHandler
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CAN1_RX1_IRQHandler
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USBFS_L_CAN1_RX0_IRQHandler
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CAN1_RX1_IRQHandler
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CAN1_SE_IRQHandler
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EXINT9_5_IRQHandler
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TMR1_BRK_TMR9_IRQHandler
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@@ -316,8 +316,8 @@ DMA2_Channel2_IRQHandler
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DMA2_Channel3_IRQHandler
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DMA2_Channel4_5_IRQHandler
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CAN2_TX_IRQHandler
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CAN2_RX0_IRQHandler
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CAN2_RX1_IRQHandler
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CAN2_RX0_IRQHandler
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CAN2_RX1_IRQHandler
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CAN2_SE_IRQHandler
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ACC_IRQHandler
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USBFS_MAPH_IRQHandler
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