mirror of
https://github.com/ArteryTek/AT32F413_Firmware_Library.git
synced 2026-05-21 09:22:02 +00:00
update version to v2.0.9
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@@ -101,7 +101,7 @@ extern "C" {
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*/
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#define __AT32F413_LIBRARY_VERSION_MAJOR (0x02) /*!< [31:24] major version */
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#define __AT32F413_LIBRARY_VERSION_MIDDLE (0x00) /*!< [23:16] middle version */
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#define __AT32F413_LIBRARY_VERSION_MINOR (0x08) /*!< [15:8] minor version */
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#define __AT32F413_LIBRARY_VERSION_MINOR (0x09) /*!< [15:8] minor version */
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#define __AT32F413_LIBRARY_VERSION_RC (0x00) /*!< [7:0] release candidate */
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#define __AT32F413_LIBRARY_VERSION ((__AT32F413_LIBRARY_VERSION_MAJOR << 24) | \
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(__AT32F413_LIBRARY_VERSION_MIDDLE << 16) | \
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@@ -45,8 +45,9 @@ extern "C" {
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* @brief in the following line adjust the high speed exernal crystal (hext) startup
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* timeout value
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*/
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#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
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#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
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#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
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#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
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#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed exernal clock in hz */
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/* module define -------------------------------------------------------------*/
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#define CRM_MODULE_ENABLED
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@@ -33,6 +33,7 @@ MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
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SPIM (rx) : ORIGIN = 0x08400000, LENGTH = 16384K
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}
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/* Define output sections */
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@@ -115,6 +116,19 @@ SECTIONS
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_edata = .; /* define a global symbol at data end */
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} >RAM AT> FLASH
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_spim_init_base = LOADADDR(.spim);
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_spim_init_length = SIZEOF(.spim);
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.spim :
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{
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. = ALIGN(4);
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_spim_start = .; /* create a global symbol at spim start */
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*(.spim) /* .spim sections */
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*(.spim*) /* .spim* sections */
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. = ALIGN(4);
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_spim_end = .; /* define a global symbols at end of spim */
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} >SPIM
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss :
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@@ -33,6 +33,7 @@ MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
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SPIM (rx) : ORIGIN = 0x08400000, LENGTH = 16384K
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}
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/* Define output sections */
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@@ -115,6 +116,19 @@ SECTIONS
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_edata = .; /* define a global symbol at data end */
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} >RAM AT> FLASH
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_spim_init_base = LOADADDR(.spim);
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_spim_init_length = SIZEOF(.spim);
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.spim :
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{
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. = ALIGN(4);
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_spim_start = .; /* create a global symbol at spim start */
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*(.spim) /* .spim sections */
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*(.spim*) /* .spim* sections */
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. = ALIGN(4);
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_spim_end = .; /* define a global symbols at end of spim */
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} >SPIM
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss :
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@@ -33,6 +33,7 @@ MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
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SPIM (rx) : ORIGIN = 0x08400000, LENGTH = 16384K
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}
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/* Define output sections */
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@@ -115,6 +116,19 @@ SECTIONS
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_edata = .; /* define a global symbol at data end */
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} >RAM AT> FLASH
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_spim_init_base = LOADADDR(.spim);
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_spim_init_length = SIZEOF(.spim);
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.spim :
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{
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. = ALIGN(4);
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_spim_start = .; /* create a global symbol at spim start */
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*(.spim) /* .spim sections */
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*(.spim*) /* .spim* sections */
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. = ALIGN(4);
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_spim_end = .; /* define a global symbols at end of spim */
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} >SPIM
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss :
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