yemai/AT32F403A_407_Firmware_Library
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update version to v2.1.8

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This commit is contained in:
Artery-MCU
2024-05-13 13:35:27 +08:00
parent 7c74102117
commit ba2f6ccee8
12 changed files with 15 additions and 17 deletions
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4
project/at_start_f403a/examples/i2s/halfduplex_dma/src/main.c
View File

@@ -88,7 +88,7 @@ static void i2s_config(void)
dma_init_struct.memory_base_addr = (uint32_t)i2s3_buffer_tx;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_base_addr = (uint32_t)0x40003C0C;
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt);
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_HIGH;
@@ -97,7 +97,7 @@ static void i2s_config(void)
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx;
dma_init_struct.peripheral_base_addr = (uint32_t)0x4000380C;
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
dma_init(DMA1_CHANNEL4, &dma_init_struct);
crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);

1
project/at_start_f403a/examples/rtc/calendar/src/rtc.c
View File

@@ -329,7 +329,6 @@ void rtc_time_get(void)
}
else
{
temp1++;
break;
}
}

2
project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c
View File

@@ -86,7 +86,7 @@ static void spi_config(void)
dma_init_struct.memory_base_addr = (uint32_t)spi2_rx_buffer;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_base_addr = (uint32_t)0x4000380C;
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_MEDIUM;

4
project/at_start_f407/examples/i2s/halfduplex_dma/src/main.c
View File

@@ -88,7 +88,7 @@ static void i2s_config(void)
dma_init_struct.memory_base_addr = (uint32_t)i2s3_buffer_tx;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_base_addr = (uint32_t)0x40003C0C;
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt);
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_HIGH;
@@ -97,7 +97,7 @@ static void i2s_config(void)
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx;
dma_init_struct.peripheral_base_addr = (uint32_t)0x4000380C;
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
dma_init(DMA1_CHANNEL4, &dma_init_struct);
crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);

1
project/at_start_f407/examples/rtc/calendar/src/rtc.c
View File

@@ -329,7 +329,6 @@ void rtc_time_get(void)
}
else
{
temp1++;
break;
}
}

2
project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c
View File

@@ -86,7 +86,7 @@ static void spi_config(void)
dma_init_struct.memory_base_addr = (uint32_t)spi2_rx_buffer;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_base_addr = (uint32_t)0x4000380C;
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_MEDIUM;