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update version to v2.2.0

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This commit is contained in:
Artery-MCU
2024-12-27 18:00:22 +08:00
parent f2cb360c3d
commit b71bd119f4
875 changed files with 361265 additions and 217891 deletions
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29
project/at_start_f403a/examples/can/communication_mode/src/main.c
View File

@@ -65,13 +65,23 @@ static void can_gpio_config(void)
/**
* @brief can configiguration.
* @param none
* @retval none
* @retval the result of can_configuration
* this parameter can be one of the following values:
* SUCCESS or ERROR
*/
static void can_configuration(void)
error_status can_configuration(void)
{
can_base_type can_base_struct;
can_baudrate_type can_baudrate_struct;
can_filter_init_type can_filter_init_struct;
/* as specified in CAN protocol, the maximum allowable oscillator tolerance is 1.58%.
The HICK accuracy does not meet the clock requirements in CAN protocol. to guarantee normal
communication, it is recommended to use HEXT as the system clock source. */
if(crm_flag_get(CRM_HEXT_STABLE_FLAG) != SET)
{
return ERROR;
}
crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
/* can base init */
@@ -90,7 +100,10 @@ static void can_configuration(void)
can_baudrate_struct.rsaw_size = CAN_RSAW_3TQ;
can_baudrate_struct.bts1_size = CAN_BTS1_8TQ;
can_baudrate_struct.bts2_size = CAN_BTS2_3TQ;
can_baudrate_set(CAN1, &can_baudrate_struct);
if(can_baudrate_set(CAN1, &can_baudrate_struct) != SUCCESS)
{
return ERROR;
}
/* can filter init */
can_filter_init_struct.filter_activate_enable = TRUE;
@@ -112,6 +125,8 @@ static void can_configuration(void)
/* error interrupt enable */
can_interrupt_enable(CAN1, CAN_ETRIEN_INT, TRUE);
can_interrupt_enable(CAN1, CAN_EOIEN_INT, TRUE);
return SUCCESS;
}
/**
@@ -190,7 +205,13 @@ int main(void)
at32_board_init();
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
can_gpio_config();
can_configuration();
if(can_configuration() == ERROR)
{
/* CAN clock initialization error */
while(1)
{
}
}
while(1)
{
can_transmit_data();

29
project/at_start_f403a/examples/can/filter/src/main.c
View File

@@ -78,13 +78,23 @@ static void can_gpio_config(void)
/**
* @brief can configiguration.
* @param none
* @retval none
* @retval the result of can_configuration
* this parameter can be one of the following values:
* SUCCESS or ERROR
*/
static void can_configuration(void)
error_status can_configuration(void)
{
can_base_type can_base_struct;
can_baudrate_type can_baudrate_struct;
can_filter_init_type can_filter_init_struct;
/* as specified in CAN protocol, the maximum allowable oscillator tolerance is 1.58%.
The HICK accuracy does not meet the clock requirements in CAN protocol. to guarantee normal
communication, it is recommended to use HEXT as the system clock source. */
if(crm_flag_get(CRM_HEXT_STABLE_FLAG) != SET)
{
return ERROR;
}
crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
/* can base init */
@@ -103,7 +113,10 @@ static void can_configuration(void)
can_baudrate_struct.rsaw_size = CAN_RSAW_3TQ;
can_baudrate_struct.bts1_size = CAN_BTS1_8TQ;
can_baudrate_struct.bts2_size = CAN_BTS2_3TQ;
can_baudrate_set(CAN1, &can_baudrate_struct);
if(can_baudrate_set(CAN1, &can_baudrate_struct) != SUCCESS)
{
return ERROR;
}
/* can filter 0 config */
can_filter_init_struct.filter_activate_enable = TRUE;
@@ -137,6 +150,8 @@ static void can_configuration(void)
/* error interrupt enable */
can_interrupt_enable(CAN1, CAN_ETRIEN_INT, TRUE);
can_interrupt_enable(CAN1, CAN_EOIEN_INT, TRUE);
return SUCCESS;
}
/**
@@ -312,7 +327,13 @@ int main(void)
at32_board_init();
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
can_gpio_config();
can_configuration();
if(can_configuration() == ERROR)
{
/* CAN clock initialization error */
while(1)
{
}
}
can_transmit_data();
while(1)
{

29
project/at_start_f403a/examples/can/loopback_mode/src/main.c
View File

@@ -65,13 +65,23 @@ static void can_gpio_config(void)
/**
* @brief can configiguration.
* @param none
* @retval none
* @retval the result of can_configuration
* this parameter can be one of the following values:
* SUCCESS or ERROR
*/
static void can_configuration(void)
error_status can_configuration(void)
{
can_base_type can_base_struct;
can_baudrate_type can_baudrate_struct;
can_filter_init_type can_filter_init_struct;
/* as specified in CAN protocol, the maximum allowable oscillator tolerance is 1.58%.
The HICK accuracy does not meet the clock requirements in CAN protocol. to guarantee normal
communication, it is recommended to use HEXT as the system clock source. */
if(crm_flag_get(CRM_HEXT_STABLE_FLAG) != SET)
{
return ERROR;
}
crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
/* can base init */
@@ -90,7 +100,10 @@ static void can_configuration(void)
can_baudrate_struct.rsaw_size = CAN_RSAW_3TQ;
can_baudrate_struct.bts1_size = CAN_BTS1_8TQ;
can_baudrate_struct.bts2_size = CAN_BTS2_3TQ;
can_baudrate_set(CAN1, &can_baudrate_struct);
if(can_baudrate_set(CAN1, &can_baudrate_struct) != SUCCESS)
{
return ERROR;
}
/* can filter init */
can_filter_init_struct.filter_activate_enable = TRUE;
@@ -112,6 +125,8 @@ static void can_configuration(void)
/* error interrupt enable */
can_interrupt_enable(CAN1, CAN_ETRIEN_INT, TRUE);
can_interrupt_enable(CAN1, CAN_EOIEN_INT, TRUE);
return SUCCESS;
}
/**
@@ -188,7 +203,13 @@ int main(void)
at32_board_init();
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
can_gpio_config();
can_configuration();
if(can_configuration() == ERROR)
{
/* CAN clock initialization error */
while(1)
{
}
}
while(1)
{
can_transmit_data();

15
project/at_start_f403a/examples/flash/fap_enable/readme.txt
View File

@@ -1,15 +0,0 @@
/**
**************************************************************************
* @file readme.txt
* @brief readme
**************************************************************************
*/
this demo is based on the at-start board, in this demo, show how to enable
fap function by executing code. when fap enabled, the three leds will turn
on.
note:
if fap is still in debug mode when it is set, the debug mode must be
cleared with poweron reset instead of system reset, to restore flash
program access to flash memory data.

3
project/at_start_f403a/examples/flash/operate_spim/src/operate_spim.c
View File

@@ -70,6 +70,9 @@ void spim_init(void)
/* in this example, use on-board en25qh128a as spim flash */
flash_spim_model_select(FLASH_SPIM_MODEL2);
/* for model 1 flash, a delay needs to be added */
delay_ms(20);
/* unlock the spim flash program erase controller */
while(flash_flag_get(FLASH_SPIM_OBF_FLAG));
flash_spim_unlock();

3
project/at_start_f403a/examples/flash/run_in_spim/src/main.c
View File

@@ -66,6 +66,9 @@ void spim_init(void)
/* in this example, use on-board en25qh128a as spim flash */
flash_spim_model_select(FLASH_SPIM_MODEL2);
/* for model 1 flash, a delay needs to be added */
delay_ms(20);
/* unlock the spim flash program erase controller */
while(flash_flag_get(FLASH_SPIM_OBF_FLAG));
flash_spim_unlock();

10
project/at_start_f403a/examples/i2c/communication_dma/mdk_v5/communication_dma.uvprojx
View File

@@ -484,4 +484,14 @@
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>&lt;Project Info&gt;</LayName>
<LayTarg>0</LayTarg>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

10
project/at_start_f403a/examples/i2c/communication_int/mdk_v5/communication_int.uvprojx
View File

@@ -484,4 +484,14 @@
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>&lt;Project Info&gt;</LayName>
<LayTarg>0</LayTarg>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

10
project/at_start_f403a/examples/i2c/communication_poll/mdk_v5/communication_poll.uvprojx
View File

@@ -484,4 +484,14 @@
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>&lt;Project Info&gt;</LayName>
<LayTarg>0</LayTarg>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

44
project/at_start_f403a/examples/i2c/eeprom/inc/eeprom.h Normal file
View File

@@ -0,0 +1,44 @@
/**
**************************************************************************
* @file eeprom.h
* @brief i2c eeprom libray header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
#ifndef __EERPOM_H
#define __EERPOM_H
#include "i2c_application.h"
#define EEPROM_BUSY_TIMEOUT 1000 /*!< eeprom busy waiting timeout */
#define EEPROM_PAGE_SIZE 8 /*!< eeprom page size */
#define EEPROM_I2C_ADDRESS 0xA0 /*!< eeprom i2c address */
typedef enum
{
EE_MODE_POLL = 0x01, /*!< polling communication */
EE_MODE_INT = 0x02, /*!< interrupt communication */
EE_MODE_DMA = 0x03, /*!< dma communication */
} eeprom_mode_type;
i2c_status_type eeprom_write_buffer(i2c_handle_type* hi2c, eeprom_mode_type mode, i2c_mem_address_width_type mem_address_width, uint16_t address, uint16_t mem_address, uint8_t* pdata, uint16_t size, uint32_t timeout);
i2c_status_type eeprom_read_buffer (i2c_handle_type* hi2c, eeprom_mode_type mode, i2c_mem_address_width_type mem_address_width, uint16_t address, uint16_t mem_address, uint8_t* pdata, uint16_t size, uint32_t timeout);
#endif

34
project/at_start_f403a/examples/i2c/eeprom/mdk_v5/eeprom.uvoptx
View File

@@ -211,6 +211,18 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\src\eeprom.c</PathWithFileName>
<FilenameWithoutPath>eeprom.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
@@ -221,7 +233,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber>
<FileNumber>5</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -233,7 +245,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>5</FileNumber>
<FileNumber>6</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -253,7 +265,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>6</FileNumber>
<FileNumber>7</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -265,7 +277,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>7</FileNumber>
<FileNumber>8</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -277,7 +289,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>8</FileNumber>
<FileNumber>9</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -289,7 +301,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>9</FileNumber>
<FileNumber>10</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -301,7 +313,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>10</FileNumber>
<FileNumber>11</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -313,7 +325,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>11</FileNumber>
<FileNumber>12</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -333,7 +345,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>12</FileNumber>
<FileNumber>13</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -345,7 +357,7 @@
</File>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>13</FileNumber>
<FileNumber>14</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -365,7 +377,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>5</GroupNumber>
<FileNumber>14</FileNumber>
<FileNumber>15</FileNumber>
<FileType>5</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>

15
project/at_start_f403a/examples/i2c/eeprom/mdk_v5/eeprom.uvprojx
View File

@@ -397,6 +397,11 @@
<FileType>1</FileType>
<FilePath>..\src\main.c</FilePath>
</File>
<File>
<FileName>eeprom.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\eeprom.c</FilePath>
</File>
</Files>
</Group>
<Group>
@@ -484,4 +489,14 @@
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>&lt;Project Info&gt;</LayName>
<LayTarg>0</LayTarg>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

4
project/at_start_f403a/examples/i2c/eeprom/readme.txt
View File

@@ -5,8 +5,8 @@
**************************************************************************
*/
this demo is based on the at-start board and AT32-Comm-EV, in this demo, use hardware i2c1
write or read data based on the memory device. if the communication is
this demo is based on the at-start board and AT32-Comm-EV, in this demo, use hardware i2c2
write or read data based on the eeprom device. if the communication is
successful, led3 will turn on, if the communication fails, led2 will keep flashing.
attention:

330
project/at_start_f403a/examples/i2c/eeprom/src/eeprom.c Normal file
View File

@@ -0,0 +1,330 @@
/**
**************************************************************************
* @file eeprom.c
* @brief the driver library of the i2c eeprom
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
#include "eeprom.h"
/**
* @brief check if the eeprom device is ready
* @param hi2c: the handle points to the operation information.
* @param address: eeprom address.
* @param timeout: maximum waiting time.
* @retval i2c status.
*/
i2c_status_type eeprom_ready_check(i2c_handle_type* hi2c, uint16_t address, uint32_t timeout)
{
/* wait for the busy flag to be reset */
if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
{
return I2C_ERR_STEP_1;
}
/* ack acts on the current byte */
i2c_master_receive_ack_set(hi2c->i2cx, I2C_MASTER_ACK_CURRENT);
/* generate start condtion */
i2c_start_generate(hi2c->i2cx);
/* wait for the start flag to be set */
if(i2c_wait_flag(hi2c, I2C_STARTF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
{
/* generate stop condtion */
i2c_stop_generate(hi2c->i2cx);
return I2C_ERR_STEP_2;
}
/* send slave address */
i2c_7bit_address_send(hi2c->i2cx, address, I2C_DIRECTION_TRANSMIT);
/* wait for the addr7 flag to be set */
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
{
return I2C_ERR_STEP_3;
}
/* clear addr flag */
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
/* generate stop condtion */
i2c_stop_generate(hi2c->i2cx);
/* wait for the busy flag to be reset */
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
{
return I2C_ERR_STEP_4;
}
return I2C_OK;
}
/**
* @brief wait for eeprom device to be ready
* @param hi2c: the handle points to the operation information.
* @param address: eeprom address.
* @param timeout: maximum waiting time.
* @retval i2c status.
*/
i2c_status_type eeprom_ready_wait(i2c_handle_type* hi2c, uint16_t address, uint32_t timeout)
{
uint32_t i = 0;
for(i = 0; i < EEPROM_BUSY_TIMEOUT; i++)
{
if(eeprom_ready_check(hi2c, address, timeout) == I2C_OK)
{
return I2C_OK;
}
}
return I2C_ERR_TIMEOUT;
}
/**
* @brief write data to the eeprom page.
* @param hi2c: the handle points to the operation information.
* @param mode: transfer mode.
* this parameter can be one of the following values:
* - EE_MODE_POLL: poll mode
* - EE_MODE_INT: interrupt mode
* - EE_MODE_DMA: dma mode
* @param mem_address_width: memory address width.
* this parameter can be one of the following values:
* - I2C_MEM_ADDR_WIDIH_8: memory address is 8 bit
* - I2C_MEM_ADDR_WIDIH_16: memory address is 16 bit
* @param address: eeprom address.
* @param mem_address: memory address.
* @param pdata: data buffer.
* @param size: data size.
* @param timeout: maximum waiting time.
* @retval i2c status.
*/
i2c_status_type eeprom_write_page(i2c_handle_type* hi2c, eeprom_mode_type mode, i2c_mem_address_width_type mem_address_width, uint16_t address, uint16_t mem_address, uint8_t* pdata, uint16_t size, uint32_t timeout)
{
i2c_status_type status;
/* write data to eeprom */
if(mode == EE_MODE_POLL)
{
return i2c_memory_write(hi2c, mem_address_width, address, mem_address, pdata, size, timeout);
}
else if(mode == EE_MODE_INT)
{
status = i2c_memory_write_int(hi2c, mem_address_width, address, mem_address, pdata, size, timeout);
if(status != I2C_OK)
{
return status;
}
/* wait for the communication to end */
return i2c_wait_end(hi2c, timeout);
}
else
{
status = i2c_memory_write_dma(hi2c, mem_address_width, address, mem_address, pdata, size, timeout);
if(status != I2C_OK)
{
return status;
}
/* wait for the communication to end */
return i2c_wait_end(hi2c, timeout);
}
}
/**
* @brief read data from eeprom.
* @param hi2c: the handle points to the operation information.
* @param mode: transfer mode.
* this parameter can be one of the following values:
* - EE_MODE_POLL: poll mode
* - EE_MODE_INT: interrupt mode
* - EE_MODE_DMA: dma mode
* @param mem_address_width: memory address width.
* this parameter can be one of the following values:
* - I2C_MEM_ADDR_WIDIH_8: memory address is 8 bit
* - I2C_MEM_ADDR_WIDIH_16: memory address is 16 bit
* @param address: eeprom address.
* @param mem_address: memory address.
* @param pdata: data buffer.
* @param size: data size.
* @param timeout: maximum waiting time.
* @retval i2c status.
*/
i2c_status_type eeprom_read_buffer(i2c_handle_type* hi2c, eeprom_mode_type mode, i2c_mem_address_width_type mem_address_width, uint16_t address, uint16_t mem_address, uint8_t* pdata, uint16_t size, uint32_t timeout)
{
i2c_status_type status;
/* write data to eeprom */
if(mode == EE_MODE_POLL)
{
return i2c_memory_read(hi2c, mem_address_width, address, mem_address, pdata, size, timeout);
}
else if(mode == EE_MODE_INT)
{
status = i2c_memory_read_int(hi2c, mem_address_width, address, mem_address, pdata, size, timeout);
if(status != I2C_OK)
{
return status;
}
/* wait for the communication to end */
return i2c_wait_end(hi2c, timeout);
}
else
{
status = i2c_memory_read_dma(hi2c, mem_address_width, address, mem_address, pdata, size, timeout);
if(status != I2C_OK)
{
return status;
}
/* wait for the communication to end */
return i2c_wait_end(hi2c, timeout);
}
}
/**
* @brief write data to the eeprom device.
* @param hi2c: the handle points to the operation information.
* @param mode: transfer mode.
* this parameter can be one of the following values:
* - EE_MODE_POLL: poll mode
* - EE_MODE_INT: interrupt mode
* - EE_MODE_DMA: dma mode
* @param mem_address_width: memory address width.
* this parameter can be one of the following values:
* - I2C_MEM_ADDR_WIDIH_8: memory address is 8 bit
* - I2C_MEM_ADDR_WIDIH_16: memory address is 16 bit
* @param address: eeprom address.
* @param mem_address: memory address.
* @param pdata: data buffer.
* @param size: data size.
* @param timeout: maximum waiting time.
* @retval i2c status.
*/
i2c_status_type eeprom_write_buffer(i2c_handle_type* hi2c, eeprom_mode_type mode, i2c_mem_address_width_type mem_address_width, uint16_t address, uint16_t mem_address, uint8_t* pdata, uint16_t size, uint32_t timeout)
{
uint16_t page_number = 0;
uint16_t page_last = 0;
uint16_t single_write = 0;
uint16_t write_address = 0;
i2c_status_type status;
/* calculate the number of data programred for the first time, and the subsequent program address will be aligned */
single_write = mem_address / EEPROM_PAGE_SIZE * EEPROM_PAGE_SIZE + EEPROM_PAGE_SIZE - mem_address;
/* first program address */
write_address = mem_address;
if (size < single_write)
{
single_write = size;
}
/* write data to eeprom */
status = eeprom_write_page(hi2c, mode, mem_address_width, address, write_address, pdata, single_write, timeout);
if(status != I2C_OK)
{
return status;
}
/* wait for eeprom device to be ready */
if(eeprom_ready_wait(hi2c, address, timeout) != I2C_OK)
{
return I2C_ERR_TIMEOUT;
}
/* address increase */
write_address += single_write;
/* subtract the number of data programed for the first time */
size -= single_write;
/* pointer increase */
pdata += single_write;
/* if the remaining quantity is 0, it means the program is complete */
if (size == 0)
{
return I2C_OK;
}
/* calculate the number of bytes in less than one page */
page_last = size % EEPROM_PAGE_SIZE;
/* calculate the number of full page */
page_number = size / EEPROM_PAGE_SIZE;
/* program an integer number of pages of data */
while(page_number > 0)
{
/* write data to eeprom */
status = eeprom_write_page(hi2c, mode, mem_address_width, address, write_address, pdata, EEPROM_PAGE_SIZE, timeout);
if(status != I2C_OK)
{
return status;
}
/* wait for eeprom device to be ready */
if(eeprom_ready_wait(hi2c, address, timeout) != I2C_OK)
{
return I2C_ERR_TIMEOUT;
}
/* page number subtract */
page_number--;
/* address increase */
write_address += EEPROM_PAGE_SIZE;
/* pointer increase */
pdata += EEPROM_PAGE_SIZE;
}
/* programring less than one page of data */
if (page_last)
{
/* write data to eeprom */
status = eeprom_write_page(hi2c, mode, mem_address_width, address, write_address, pdata, page_last, timeout);
if(status != I2C_OK)
{
return status;
}
/* wait for eeprom device to be ready */
if(eeprom_ready_wait(hi2c, address, timeout) != I2C_OK)
{
return I2C_ERR_TIMEOUT;
}
}
return I2C_OK;
}

80
project/at_start_f403a/examples/i2c/eeprom/src/main.c
View File

@@ -24,7 +24,7 @@
#include "at32f403a_407_board.h"
#include "at32f403a_407_clock.h"
#include "i2c_application.h"
#include "eeprom.h"
/** @addtogroup AT32F403A_periph_examples
* @{
@@ -60,11 +60,11 @@
#define I2Cx_EVT_IRQn I2C2_EVT_IRQn
#define I2Cx_ERR_IRQn I2C2_ERR_IRQn
#define BUF_SIZE 8
#define BUF_SIZE 12
uint8_t tx_buf1[BUF_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08};
uint8_t tx_buf2[BUF_SIZE] = {0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, 0x80};
uint8_t tx_buf3[BUF_SIZE] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88};
uint8_t tx_buf1[BUF_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C};
uint8_t tx_buf2[BUF_SIZE] = {0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, 0x80, 0x90, 0xA0, 0xB0, 0xC0};
uint8_t tx_buf3[BUF_SIZE] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x99, 0xAA, 0xBB, 0xCC};
uint8_t rx_buf1[BUF_SIZE] = {0};
uint8_t rx_buf2[BUF_SIZE] = {0};
uint8_t rx_buf3[BUF_SIZE] = {0};
@@ -205,72 +205,55 @@ int main(void)
{
}
/* write data to memory device */
if((i2c_status = i2c_memory_write(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, tx_buf1, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
/* write data to eeprom device */
if((i2c_status = eeprom_write_buffer(&hi2cx, EE_MODE_POLL, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, tx_buf1, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
delay_ms(1);
/* read data from eeprom device */
if((i2c_status = eeprom_read_buffer(&hi2cx, EE_MODE_POLL, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, rx_buf1, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
delay_ms(5);
/* read data from memory device */
if((i2c_status = i2c_memory_read(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, rx_buf1, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
/* write data to eeprom device */
if((i2c_status = eeprom_write_buffer(&hi2cx, EE_MODE_INT, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, tx_buf2, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
/* write data to memory device */
if((i2c_status = i2c_memory_write_int(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, tx_buf2, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
delay_ms(1);
/* wait for the communication to end */
if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
/* read data from eeprom device */
if((i2c_status = eeprom_read_buffer(&hi2cx, EE_MODE_INT, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, rx_buf2, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
delay_ms(5);
/* read data from memory device */
if((i2c_status = i2c_memory_read_int(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, rx_buf2, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
/* write data to eeprom device */
if((i2c_status = eeprom_write_buffer(&hi2cx, EE_MODE_DMA, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, tx_buf3, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
/* wait for the communication to end */
if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
{
error_handler(i2c_status);
}
/* write data to memory device */
if((i2c_status = i2c_memory_write_dma(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, tx_buf3, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
/* wait for the communication to end */
if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
{
error_handler(i2c_status);
}
delay_ms(5);
/* read data from memory device */
if((i2c_status = i2c_memory_read_dma(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, rx_buf3, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
/* wait for the communication to end */
if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
delay_ms(1);
/* read data from eeprom device */
if((i2c_status = eeprom_read_buffer(&hi2cx, EE_MODE_DMA, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, rx_buf3, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
if((buffer_compare(tx_buf1, rx_buf1, BUF_SIZE) == 0) &&
(buffer_compare(tx_buf2, rx_buf2, BUF_SIZE) == 0) &&
(buffer_compare(tx_buf3, rx_buf3, BUF_SIZE) == 0))
@@ -281,7 +264,6 @@ int main(void)
{
error_handler(i2c_status);
}
}
}

0
project/at_start_f403a/examples/flash/fap_enable/inc/at32f403a_407_clock.h → project/at_start_f403a/examples/i2c/memory_write/inc/at32f403a_407_clock.h
View File

0
project/at_start_f403a/examples/flash/fap_enable/inc/at32f403a_407_conf.h → project/at_start_f403a/examples/i2c/memory_write/inc/at32f403a_407_conf.h
View File

0
project/at_start_f403a/examples/flash/fap_enable/inc/at32f403a_407_int.h → project/at_start_f403a/examples/i2c/memory_write/inc/at32f403a_407_int.h
View File

380
project/at_start_f403a/examples/i2c/memory_write/mdk_v5/memory_write.uvoptx Normal file
View File

@@ -0,0 +1,380 @@
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</ProjectOpt>

38
project/at_start_f403a/examples/flash/fap_enable/mdk_v5/fap_enable.uvprojx → project/at_start_f403a/examples/i2c/memory_write/mdk_v5/memory_write.uvprojx
View File

@@ -7,7 +7,7 @@
<Targets>
<Target>
<TargetName>fap_enable</TargetName>
<TargetName>memory_write</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
@@ -48,7 +48,7 @@
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\objects\</OutputDirectory>
<OutputName>fap_enable</OutputName>
<OutputName>memory_write</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
@@ -338,7 +338,7 @@
<MiscControls></MiscControls>
<Define>AT32F403AVGT7,USE_STDPERIPH_DRIVER,AT_START_F403A_V1</Define>
<Undefine></Undefine>
<IncludePath>..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\..\..\..\..\at32f403a_407_board;..\inc</IncludePath>
<IncludePath>..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\..\..\..\..\..\middlewares\i2c_application_library;..\inc;..\..\..\..\..\at32f403a_407_board</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -407,6 +407,11 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\..\at32f403a_407_board\at32f403a_407_board.c</FilePath>
</File>
<File>
<FileName>i2c_application.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\middlewares\i2c_application_library\i2c_application.c</FilePath>
</File>
</Files>
</Group>
<Group>
@@ -417,6 +422,21 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_gpio.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_i2c.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_i2c.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_misc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_misc.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_dma.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_crm.c</FileName>
<FileType>1</FileType>
@@ -427,16 +447,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_usart.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_flash.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_flash.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_misc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_misc.c</FilePath>
</File>
</Files>
</Group>
<Group>
@@ -477,7 +487,7 @@
<LayerInfo>
<Layers>
<Layer>
<LayName>fap_enable</LayName>
<LayName>&lt;Project Info&gt;</LayName>
<LayTarg>0</LayTarg>
<LayPrjMark>1</LayPrjMark>
</Layer>

20
project/at_start_f403a/examples/i2c/memory_write/readme.txt Normal file
View File

@@ -0,0 +1,20 @@
/**
**************************************************************************
* @file memory_write/readme.txt
* @brief readme
**************************************************************************
*/
this demo is based on the at-start board and AT32-Comm-EV, in this demo, use hardware i2c2
write or read data based on the memory device. if the communication is
successful, led3 will turn on, if the communication fails, led2 will keep flashing.
attention:
1. i2c bus must pull-up
2. press the slave button first, then press the master button to start communication.
pin used:
1. scl --- pb10
2. sda --- pb11

0
project/at_start_f403a/examples/flash/fap_enable/src/at32f403a_407_clock.c → project/at_start_f403a/examples/i2c/memory_write/src/at32f403a_407_clock.c
View File

187
project/at_start_f403a/examples/i2c/memory_write/src/at32f403a_407_int.c Normal file
View File

@@ -0,0 +1,187 @@
/**
**************************************************************************
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407_int.h"
#include "i2c_application.h"
extern i2c_handle_type hi2cx;
#define I2Cx_DMA_TX_IRQHandler DMA1_Channel4_IRQHandler
#define I2Cx_DMA_RX_IRQHandler DMA1_Channel5_IRQHandler
#define I2Cx_EVT_IRQHandler I2C2_EVT_IRQHandler
#define I2Cx_ERR_IRQHandler I2C2_ERR_IRQHandler
/** @addtogroup AT32F403A_periph_examples
* @{
*/
/** @addtogroup 403A_I2C_memory_write
* @{
*/
/**
* @brief this function handles nmi exception.
* @param none
* @retval none
*/
void NMI_Handler(void)
{
}
/**
* @brief this function handles hard fault exception.
* @param none
* @retval none
*/
void HardFault_Handler(void)
{
/* go to infinite loop when hard fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles memory manage exception.
* @param none
* @retval none
*/
void MemManage_Handler(void)
{
/* go to infinite loop when memory manage exception occurs */
while(1)
{
}
}
/**
* @brief this function handles bus fault exception.
* @param none
* @retval none
*/
void BusFault_Handler(void)
{
/* go to infinite loop when bus fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles usage fault exception.
* @param none
* @retval none
*/
void UsageFault_Handler(void)
{
/* go to infinite loop when usage fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles svcall exception.
* @param none
* @retval none
*/
void SVC_Handler(void)
{
}
/**
* @brief this function handles debug monitor exception.
* @param none
* @retval none
*/
void DebugMon_Handler(void)
{
}
/**
* @brief this function handles pendsv_handler exception.
* @param none
* @retval none
*/
void PendSV_Handler(void)
{
}
/**
* @brief this function handles systick handler.
* @param none
* @retval none
*/
void SysTick_Handler(void)
{
}
/**
* @brief this function handles dma interrupt request.
* @param none
* @retval none
*/
void I2Cx_DMA_RX_IRQHandler(void)
{
i2c_dma_rx_irq_handler(&hi2cx);
}
/**
* @brief this function handles dma interrupt request.
* @param none
* @retval none
*/
void I2Cx_DMA_TX_IRQHandler(void)
{
i2c_dma_tx_irq_handler(&hi2cx);
}
/**
* @brief this function handles i2c event interrupt request.
* @param none
* @retval none
*/
void I2Cx_EVT_IRQHandler(void)
{
i2c_evt_irq_handler(&hi2cx);
}
/**
* @brief this function handles i2c error interrupt request.
* @param none
* @retval none
*/
void I2Cx_ERR_IRQHandler(void)
{
i2c_err_irq_handler(&hi2cx);
}
/**
* @}
*/
/**
* @}
*/

294
project/at_start_f403a/examples/i2c/memory_write/src/main.c Normal file
View File

@@ -0,0 +1,294 @@
/**
**************************************************************************
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
#include "at32f403a_407_board.h"
#include "at32f403a_407_clock.h"
#include "i2c_application.h"
/** @addtogroup AT32F403A_periph_examples
* @{
*/
/** @addtogroup 403A_I2C_memory_write I2C_memory_write
* @{
*/
#define I2C_TIMEOUT 0xFFFFFFFF
#define I2Cx_SPEED 100000
#define I2Cx_ADDRESS 0xA0
#define I2Cx_PORT I2C2
#define I2Cx_CLK CRM_I2C2_PERIPH_CLOCK
#define I2Cx_SCL_PIN GPIO_PINS_10
#define I2Cx_SCL_GPIO_PORT GPIOB
#define I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define I2Cx_SDA_PIN GPIO_PINS_11
#define I2Cx_SDA_GPIO_PORT GPIOB
#define I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
#define I2Cx_DMA_TX_CHANNEL DMA1_CHANNEL4
#define I2Cx_DMA_TX_IRQn DMA1_Channel4_IRQn
#define I2Cx_DMA_RX_CHANNEL DMA1_CHANNEL5
#define I2Cx_DMA_RX_IRQn DMA1_Channel5_IRQn
#define I2Cx_EVT_IRQn I2C2_EVT_IRQn
#define I2Cx_ERR_IRQn I2C2_ERR_IRQn
#define BUF_SIZE 8
uint8_t tx_buf1[BUF_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08};
uint8_t tx_buf2[BUF_SIZE] = {0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, 0x80};
uint8_t tx_buf3[BUF_SIZE] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88};
uint8_t rx_buf1[BUF_SIZE] = {0};
uint8_t rx_buf2[BUF_SIZE] = {0};
uint8_t rx_buf3[BUF_SIZE] = {0};
i2c_handle_type hi2cx;
void error_handler(uint32_t error_code);
uint32_t buffer_compare(uint8_t* buffer1, uint8_t* buffer2, uint32_t len);
void i2c_lowlevel_init(i2c_handle_type* hi2c);
/**
* @brief error handler program
* @param i2c_status
* @retval none
*/
void error_handler(uint32_t error_code)
{
while(1)
{
at32_led_toggle(LED2);
delay_ms(500);
}
}
/**
* @brief compare whether the valus of buffer 1 and buffer 2 are equal.
* @param buffer1: buffer 1 address.
buffer2: buffer 2 address.
* @retval 0: equal.
* 1: unequal.
*/
uint32_t buffer_compare(uint8_t* buffer1, uint8_t* buffer2, uint32_t len)
{
uint32_t i;
for(i = 0; i < len; i++)
{
if(buffer1[i] != buffer2[i])
{
return 1;
}
}
return 0;
}
/**
* @brief initializes peripherals used by the i2c.
* @param none
* @retval none
*/
void i2c_lowlevel_init(i2c_handle_type* hi2c)
{
gpio_init_type gpio_initstructure;
if(hi2c->i2cx == I2Cx_PORT)
{
/* i2c periph clock enable */
crm_periph_clock_enable(I2Cx_CLK, TRUE);
crm_periph_clock_enable(I2Cx_SCL_GPIO_CLK, TRUE);
crm_periph_clock_enable(I2Cx_SDA_GPIO_CLK, TRUE);
/* gpio configuration */
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
gpio_initstructure.gpio_pull = GPIO_PULL_NONE;
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
/* configure i2c pins: scl */
gpio_initstructure.gpio_pins = I2Cx_SCL_PIN;
gpio_init(I2Cx_SCL_GPIO_PORT, &gpio_initstructure);
/* configure i2c pins: sda */
gpio_initstructure.gpio_pins = I2Cx_SDA_PIN;
gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_initstructure);
/* configure and enable i2c dma channel interrupt */
nvic_irq_enable(I2Cx_DMA_TX_IRQn, 0, 0);
nvic_irq_enable(I2Cx_DMA_RX_IRQn, 0, 0);
/* configure and enable i2c interrupt */
nvic_irq_enable(I2Cx_EVT_IRQn, 0, 0);
nvic_irq_enable(I2Cx_ERR_IRQn, 0, 0);
/* i2c dma tx and rx channels configuration */
/* enable the dma clock */
crm_periph_clock_enable(I2Cx_DMA_CLK, TRUE);
/* i2c dma channel configuration */
hi2c->dma_tx_channel = I2Cx_DMA_TX_CHANNEL;
hi2c->dma_rx_channel = I2Cx_DMA_RX_CHANNEL;
dma_reset(hi2c->dma_tx_channel);
dma_reset(hi2c->dma_rx_channel);
dma_default_para_init(&hi2c->dma_init_struct);
hi2c->dma_init_struct.peripheral_inc_enable = FALSE;
hi2c->dma_init_struct.memory_inc_enable = TRUE;
hi2c->dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
hi2c->dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
hi2c->dma_init_struct.loop_mode_enable = FALSE;
hi2c->dma_init_struct.priority = DMA_PRIORITY_LOW;
hi2c->dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
dma_init(hi2c->dma_tx_channel, &hi2c->dma_init_struct);
dma_init(hi2c->dma_rx_channel, &hi2c->dma_init_struct);
i2c_init(hi2c->i2cx, I2C_FSMODE_DUTY_2_1, I2Cx_SPEED);
i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS);
}
}
/**
* @brief main function.
* @param none
* @retval none
*/
int main(void)
{
i2c_status_type i2c_status;
/* config nvic priority group */
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
system_clock_config();
at32_board_init();
hi2cx.i2cx = I2Cx_PORT;
i2c_config(&hi2cx);
while(1)
{
/* wait for key USER_BUTTON press before starting the communication */
while(at32_button_press() != USER_BUTTON)
{
}
/* write data to memory device */
if((i2c_status = i2c_memory_write(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, tx_buf1, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
delay_ms(5);
/* read data from memory device */
if((i2c_status = i2c_memory_read(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, rx_buf1, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
/* write data to memory device */
if((i2c_status = i2c_memory_write_int(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, tx_buf2, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
/* wait for the communication to end */
if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
{
error_handler(i2c_status);
}
delay_ms(5);
/* read data from memory device */
if((i2c_status = i2c_memory_read_int(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, rx_buf2, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
/* wait for the communication to end */
if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
{
error_handler(i2c_status);
}
/* write data to memory device */
if((i2c_status = i2c_memory_write_dma(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, tx_buf3, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
/* wait for the communication to end */
if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
{
error_handler(i2c_status);
}
delay_ms(5);
/* read data from memory device */
if((i2c_status = i2c_memory_read_dma(&hi2cx, I2C_MEM_ADDR_WIDIH_8, I2Cx_ADDRESS, 0x00, rx_buf3, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
{
error_handler(i2c_status);
}
/* wait for the communication to end */
if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
{
error_handler(i2c_status);
}
if((buffer_compare(tx_buf1, rx_buf1, BUF_SIZE) == 0) &&
(buffer_compare(tx_buf2, rx_buf2, BUF_SIZE) == 0) &&
(buffer_compare(tx_buf3, rx_buf3, BUF_SIZE) == 0))
{
at32_led_on(LED3);
}
else
{
error_handler(i2c_status);
}
}
}
/**
* @}
*/
/**
* @}
*/

4
project/at_start_f403a/examples/pwc/deepsleep_rtc/src/main.c
View File

@@ -178,8 +178,8 @@ int main(void)
/* restore systick register configuration */
SysTick->CTRL |= systick_index;
/* wait clock stable */
delay_us(120);
/* wait 3 LICK cycles to ensure clock stable */
delay_us(5);
/* wake up from deep sleep mode, congfig the system clock */
system_clock_recover();

524
project/at_start_f403a/examples/sdio/emmc_card/inc/at32_sdio.h Normal file
View File

@@ -0,0 +1,524 @@
/**
**************************************************************************
* @file at32_sdio.h
* @brief this file contains all the functions prototypes for the sd/mmc
* card at32_sdio driver firmware library.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32_SDIO_H
#define __AT32_SDIO_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407.h"
/** @addtogroup AT32F403A_periph_examples
* @{
*/
/** @addtogroup SDIO_emmc_card
* @{
*/
/** @defgroup SDIO_instance_definition
* @{
*/
#define SDIOx SDIO1
/**
* @}
*/
/** @defgroup SDIO_exported_types
* @{
*/
/**
* sdio data transfer mode
*/
typedef enum
{
SD_TRANSFER_POLLING_MODE = 0,
SD_TRANSFER_DMA_MODE = 1
} sd_data_transfer_mode_type;
/**
* sdio error defines
*/
typedef enum
{
/* sdio specific error defines ------------------------------------------*/
SD_CMD_FAIL = 1, /*!< command response received (but crc check error) */
SD_DATA_FAIL = 2, /*!< data bock sent/received (crc check error) */
SD_CMD_RSP_TIMEOUT = 3, /*!< command response timeout */
SD_DATA_TIMEOUT = 4, /*!< data time out */
SD_TX_UNDERRUN = 5, /*!< transmit fifo under-run */
SD_RX_OVERRUN = 6, /*!< receive fifo over-run */
SD_START_BIT_ERR = 7, /*!< start bit not detected on all data signals in wide bus mode */
SD_CMD_OUT_OF_RANGE = 8, /*!< cmd's argument was out of range. */
SD_ADDR_MISALIGNED = 9, /*!< misaligned address */
SD_BLK_LEN_ERR = 10, /*!< transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
SD_ERASE_SEQ_ERR = 11, /*!< an error in the sequence of erase command occurs. */
SD_INVALID_ERASE_PARAM = 12, /*!< an invalid selection for erase groups */
SD_WR_PROTECT_VIOLATION = 13, /*!< attempt to program a write protect block */
SD_LOCK_UNLOCK_ERROR = 14, /*!< sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
SD_CMD_CRC_ERROR = 15, /*!< crc check of the previous command error */
SD_ILLEGAL_CMD = 16, /*!< command is not legal for the card state */
SD_CARD_ECC_ERROR = 17, /*!< card internal ecc was applied but error to correct the data */
SD_CARD_CONTROLLER_ERR = 18, /*!< internal card controller error */
SD_GENERAL_UNKNOWN_ERROR = 19, /*!< general or unknown error */
SD_STREAM_RD_UNDERRUN = 20, /*!< the card could not sustain data transfer in stream read operation. */
SD_STREAM_WR_OVERRUN = 21, /*!< the card could not sustain data programming in stream mode */
SD_CID_CSD_OVERWRITE = 22, /*!< cid/csd overwrite error */
SD_WP_ERASE_SKIP = 23, /*!< only partial address space was erased */
SD_CARD_ECC_DISABLED = 24, /*!< command has been executed without using internal ecc */
SD_ERASE_RESET = 25, /*!< erase sequence was cleared before executing because an out of erase sequence command was received */
SD_AKE_SEQ_ERROR = 26, /*!< error in sequence of authentication. */
SD_INVALID_VOLTRANGE = 27, /*!< invalid voltage range */
SD_ADDR_OUT_OF_RANGE = 28, /*!< address out of range */
SD_SWITCH_ERROR = 29, /*!< switch error */
SD_SDIO_DISABLED = 30, /*!< sdio disabled */
SD_SDIO_FUNC_BUSY = 31, /*!< function busy */
SD_SDIO_FUNC_ERROR = 32, /*!< function error */
SD_SDIO_UNKNOWN_FUNC = 33, /*!< unknown function */
/* standard error defines --------------------------------------------*/
SD_INTERNAL_ERROR, /*!< internal error */
SD_NOT_CONFIGURED, /*!< sdio doesn't configuration */
SD_REQ_PENDING, /*!< request pending */
SD_REQ_NOT_APPLICABLE, /*!< request isn't applicable */
SD_INVALID_PARAMETER, /*!< invalid parameter */
SD_UNSUPPORTED_FEATURE, /*!< unsupported feature */
SD_UNSUPPORTED_HW, /*!< unsupported hardware */
SD_ERROR, /*!< error */
SD_OK = 0 /*!< pass */
} sd_error_status_type;
/**
* card specific data: csd register
*/
typedef struct
{
uint8_t csd_struct; /*!< csd structure */
uint8_t spec_version; /*!< system specification version */
uint8_t reserved1; /*!< reserved */
uint8_t taac; /*!< data read access-time 1 */
uint8_t nsac; /*!< data read access-time 2 in clk cycles */
uint8_t max_bus_clk_freq; /*!< max. bus clock frequency */
uint16_t card_cmd_classes; /*!< card command classes */
uint8_t max_read_blk_length; /*!< max. read data block length */
uint8_t part_blk_read; /*!< partial blocks for read allowed */
uint8_t write_blk_misalign; /*!< write block misalignment */
uint8_t read_blk_misalign; /*!< read block misalignment */
uint8_t dsr_implemented; /*!< dsr implemented */
uint8_t reserved2; /*!< reserved */
uint32_t device_size; /*!< device size */
uint8_t max_read_current_vdd_min; /*!< max. read current @ vdd min */
uint8_t max_read_current_vdd_max; /*!< max. read current @ vdd max */
uint8_t max_write_current_vdd_min; /*!< max. write current @ vdd min */
uint8_t max_write_current_vdd_max; /*!< max. write current @ vdd max */
uint8_t device_size_mult; /*!< device size multiplier */
uint8_t erase_group_size; /*!< erase group size */
uint8_t erase_group_size_mult; /*!< erase group size multiplier */
uint8_t write_protect_group_size; /*!< write protect group size */
uint8_t write_protect_group_enable; /*!< write protect group enable */
uint8_t manufacturer_default_ecc; /*!< manufacturer default ecc */
uint8_t write_speed_factor; /*!< write speed factor */
uint8_t max_write_blk_length; /*!< max. write data block length */
uint8_t part_blk_write; /*!< partial blocks for write allowed */
uint8_t reserved3; /*!< reserded */
uint8_t content_protect_app; /*!< content protection application */
uint8_t file_format_group; /*!< file format group */
uint8_t copy_flag; /*!< copy flag (otp) */
uint8_t permanent_write_protect; /*!< permanent write protection */
uint8_t temp_write_protect; /*!< temporary write protection */
uint8_t file_formart; /*!< file format */
uint8_t ecc_code; /*!< ecc code */
uint8_t csd_crc; /*!< csd crc */
uint8_t reserved4; /*!< always */
} sd_csd_struct_type;
/**
* card identification data: cid register
*/
typedef struct
{
uint8_t manufacturer_id; /*!< manufacturer id */
uint16_t oem_app_id; /*!< oem/application id */
uint32_t product_name1; /*!< product name part1 */
uint8_t product_name2; /*!< product name part2 */
uint8_t product_reversion; /*!< product revision */
uint32_t product_sn; /*!< product serial number */
uint8_t reserved1; /*!< reserved1 */
uint16_t manufact_date; /*!< manufacturing date */
uint8_t cid_crc; /*!< cid crc */
uint8_t reserved2; /*!< always 1 */
} sd_cid_struct_type;
/**
* sd card status
*/
typedef enum
{
SD_CARD_READY = ((uint32_t)0x00000001),
SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002),
SD_CARD_STANDBY = ((uint32_t)0x00000003),
SD_CARD_TRANSFER = ((uint32_t)0x00000004),
SD_CARD_SENDING = ((uint32_t)0x00000005),
SD_CARD_RECEIVING = ((uint32_t)0x00000006),
SD_CARD_PROGRAMMING = ((uint32_t)0x00000007),
SD_CARD_DISCONNECTED = ((uint32_t)0x00000008),
SD_CARD_ERROR = ((uint32_t)0x000000FF)
} sd_card_state_type;
/**
* supported sd memory cards
*/
typedef enum
{
SDIO_STD_CAPACITY_SD_CARD_V1_1 = 0,
SDIO_STD_CAPACITY_SD_CARD_V2_0 = 1,
SDIO_HIGH_CAPACITY_SD_CARD = 2,
SDIO_MULTIMEDIA_CARD = 3,
SDIO_SECURE_DIGITAL_IO_CARD = 4,
SDIO_HIGH_SPEED_MULTIMEDIA_CARD = 5,
SDIO_SECURE_DIGITAL_IO_COMBO_CARD = 6,
SDIO_HIGH_CAPACITY_MMC_CARD = 7,
SDIO_SDIO_CARD = 8
} sd_memory_card_type;
/**
* sd card scr information
*/
typedef struct
{
uint32_t sd_spec :4; /* [59:56] */
uint32_t scr_structure :4; /* [60:63] */
uint32_t sd_bus_width :4; /* [51:48] */
uint32_t sd_security :3; /* [52:54] */
uint32_t data_stat_after_erase :1; /* [55:55] */
uint32_t reserved1 :7; /* [46:40] */
uint32_t sd_spec3 :1; /* [47:47] */
uint32_t cmd20_support :1; /* [32:32] */
uint32_t cmd23_support :1; /* [33:33] */
uint32_t reserverd2 :6; /* [34:39] */
uint32_t reserverd3; /* [31:0] */
} sd_scr_struct_type;
/**
* sd card information
*/
typedef struct
{
sd_csd_struct_type sd_csd_reg;
sd_cid_struct_type sd_cid_reg;
sd_scr_struct_type sd_scr_reg;
long long card_capacity;
uint32_t card_blk_size;
uint16_t rca;
uint8_t card_type;
} sd_card_info_struct_type;
extern sd_card_info_struct_type sd_card_info;
/**
* @}
*/
/** @defgroup SDIO_command_index_definition
* @{
*/
/**
* sdio commands index
*/
#define SD_CMD_GO_IDLE_STATE ((uint8_t)0)
#define SD_CMD_SEND_OP_COND ((uint8_t)1)
#define SD_CMD_ALL_SEND_CID ((uint8_t)2)
#define SD_CMD_SET_REL_ADDR ((uint8_t)3)
#define SD_CMD_SET_DSR ((uint8_t)4)
#define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5)
#define SD_CMD_HS_SWITCH ((uint8_t)6)
#define SD_CMD_SEL_DESEL_CARD ((uint8_t)7)
#define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8)
#define SD_CMD_SEND_CSD ((uint8_t)9)
#define SD_CMD_SEND_CID ((uint8_t)10)
#define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11)
#define SD_CMD_STOP_TRANSMISSION ((uint8_t)12)
#define SD_CMD_SEND_STATUS ((uint8_t)13)
#define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
#define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15)
#define SD_CMD_SET_BLOCKLEN ((uint8_t)16)
#define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17)
#define SD_CMD_READ_MULT_BLOCK ((uint8_t)18)
#define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19)
#define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20)
#define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23)
#define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24)
#define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25)
#define SD_CMD_PROG_CID ((uint8_t)26)
#define SD_CMD_PROG_CSD ((uint8_t)27)
#define SD_CMD_SET_WRITE_PROT ((uint8_t)28)
#define SD_CMD_CLR_WRITE_PROT ((uint8_t)29)
#define SD_CMD_SEND_WRITE_PROT ((uint8_t)30)
#define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32)
#define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33)
#define SD_CMD_ERASE_GRP_START ((uint8_t)35)
#define SD_CMD_ERASE_GRP_END ((uint8_t)36)
#define SD_CMD_ERASE ((uint8_t)38)
#define SD_CMD_FAST_IO ((uint8_t)39)
#define SD_CMD_GO_IRQ_STATE ((uint8_t)40)
#define SD_CMD_LOCK_UNLOCK ((uint8_t)42)
#define SD_CMD_APP_CMD ((uint8_t)55)
#define SD_CMD_GEN_CMD ((uint8_t)56)
#define SD_CMD_NO_CMD ((uint8_t)64)
/**
* following commands are sd card specific commands.
* should be sent before sending these commands.
*/
#define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6)
#define SD_CMD_SD_APP_STAUS ((uint8_t)13)
#define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22)
#define SD_CMD_SD_APP_OP_COND ((uint8_t)41)
#define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42)
#define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51)
#define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52)
#define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53)
/**
* following commands are sd card specific security commands.
* sdio_app_cmd should be sent before sending these commands.
*/
#define SD_CMD_SD_APP_GET_MKB ((uint8_t)43)
#define SD_CMD_SD_APP_GET_MID ((uint8_t)44)
#define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45)
#define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46)
#define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47)
#define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48)
#define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18)
#define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25)
#define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38)
#define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49)
#define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48)
/**
* @}
*/
/** @defgroup SDIO_paremeters_definition
* @{
*/
/**
* sdio paremeters
*/
#define NULL 0
#define SDIO_STATIC_FLAGS ((uint32_t)0x000005FF)
#define SDIO_CMD0TIMEOUT ((uint32_t)0x00010000)
#define SDIO_DATATIMEOUT ((uint32_t)0xFFFFFFFF)
/**
* @}
*/
/** @defgroup SDIO_response_definition
* @{
*/
/**
* mask for errors card status r1 (ocr register)
*/
#define SD_OCR_ADDR_OUT_OF_RANGE ((uint32_t)0x80000000)
#define SD_OCR_ADDR_MISALIGNED ((uint32_t)0x40000000)
#define SD_OCR_BLK_LEN_ERR ((uint32_t)0x20000000)
#define SD_OCR_ERASE_SEQ_ERR ((uint32_t)0x10000000)
#define SD_OCR_INVALID_ERASE_PARAM ((uint32_t)0x08000000)
#define SD_OCR_WR_PROTECT_VIOLATION ((uint32_t)0x04000000)
#define SD_OCR_LOCK_UNLOCK_ERROR ((uint32_t)0x01000000)
#define SD_OCR_CMD_CRC_ERROR ((uint32_t)0x00800000)
#define SD_OCR_ILLEGAL_CMD ((uint32_t)0x00400000)
#define SD_OCR_CARD_ECC_ERROR ((uint32_t)0x00200000)
#define SD_OCR_CARD_CONTROLLER_ERR ((uint32_t)0x00100000)
#define SD_OCR_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00080000)
#define SD_OCR_STREAM_RD_UNDERRUN ((uint32_t)0x00040000)
#define SD_OCR_STREAM_WR_OVERRUN ((uint32_t)0x00020000)
#define SD_OCR_CID_CSD_OVERWRIETE ((uint32_t)0x00010000)
#define SD_OCR_WP_ERASE_SKIP ((uint32_t)0x00008000)
#define SD_OCR_CARD_ECC_DISABLED ((uint32_t)0x00004000)
#define SD_OCR_ERASE_RESET ((uint32_t)0x00002000)
#define MMC_SWITCH_ERROR ((uint32_t)0x00000080)
#define SD_OCR_AKE_SEQ_ERROR ((uint32_t)0x00000008)
#define SD_OCR_ERRORBITS ((uint32_t)0xFDFFE008)
/**
* masks for r5 response
*/
#define SD_R5_OUT_OF_RANGE ((uint32_t)0x00000100)
#define SD_R5_FUNCTION_NUMBER ((uint32_t)0x00000200)
#define SD_R5_ERROR ((uint32_t)0x00000800)
/**
* masks for r6 response
*/
#define SD_R6_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00002000)
#define SD_R6_ILLEGAL_CMD ((uint32_t)0x00004000)
#define SD_R6_CMD_CRC_ERROR ((uint32_t)0x00008000)
#define SD_VOLTAGE_WINDOW_SD ((uint32_t)0x80100000)
#define SD_HIGH_CAPACITY ((uint32_t)0x40000000)
#define SD_STD_CAPACITY ((uint32_t)0x00000000)
#define SD_CHECK_PATTERN ((uint32_t)0x000001AA)
#define SD_VOLTAGE_WINDOW_MMC ((uint32_t)0x40FF8000)
#define SD_MAX_VOLT_TRIAL ((uint32_t)0x000000FF)
#define SD_ALLZERO ((uint32_t)0x00000000)
#define SD_WIDE_BUS_SUPPORT ((uint32_t)0x00040000)
#define SD_SINGLE_BUS_SUPPORT ((uint32_t)0x00010000)
#define SD_CARD_LOCKED ((uint32_t)0x02000000)
#define SD_CARD_PROGRAMMING ((uint32_t)0x00000007)
#define SD_CARD_RECEIVING ((uint32_t)0x00000006)
#define SD_DATATIMEOUT ((uint32_t)0xFFFFFFFF)
#define SD_0TO7BITS ((uint32_t)0x000000FF)
#define SD_8TO15BITS ((uint32_t)0x0000FF00)
#define SD_16TO23BITS ((uint32_t)0x00FF0000)
#define SD_24TO31BITS ((uint32_t)0xFF000000)
#define SD_MAX_DATA_LENGTH ((uint32_t)0x01FFFFFF)
#define SD_HALFFIFO ((uint32_t)0x00000008)
#define SD_HALFFIFOBYTES ((uint32_t)0x00000020)
/**
* @}
*/
/** @defgroup SDIO_command_class_definition
* @{
*/
/**
* command class supported
*/
#define SD_CCCC_LOCK_UNLOCK ((uint32_t)0x00000080)
#define SD_CCCC_WRITE_PROT ((uint32_t)0x00000040)
#define SD_CCCC_ERASE ((uint32_t)0x00000020)
/**
* @}
*/
/** @defgroup SDIO_cmd8_definition
* @{
*/
/**
* cmd8
*/
#define SDIO_SEND_IF_COND ((uint32_t)0x00000008)
/**
* @}
*/
/** @defgroup SDIO_mmc_extend_definition
* @{
*/
/**
* mmc ext_csd operation
*/
#define EXT_CSD_Command_set 0x0
#define EXT_CSD_Set_bit 0x1
#define EXT_CSD_Clear_byte 0x2
#define EXT_CSD_Write_byte 0x3
#define EXT_CSD_CMD_SET_NORMAL (1<<0)
#define EXT_CSD_CMD_SET_SECURE (1<<1)
#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
/**
* mmc ext_csd offset
*/
#define EXT_CSD_BUS_WIDTH 183
#define EXT_CSD_HS_TIMING 185
/**
* @}
*/
/** @defgroup SDIO_interrupt_flags_definition
* @{
*/
#define SDIO_INTR_STS_WRITE_MASK (SDIO_DTFAIL_FLAG | SDIO_DTTIMEOUT_FLAG | SDIO_TXERRU_FLAG | \
SDIO_DTCMPL_FLAG | SDIO_SBITERR_FLAG)
#define SDIO_INTR_STS_READ_MASK (SDIO_DTFAIL_FLAG | SDIO_DTTIMEOUT_FLAG | SDIO_RXERRO_FLAG | \
SDIO_DTCMPL_FLAG | SDIO_SBITERR_FLAG)
/**
* @}
*/
/** @defgroup SDIO_exported_functions
* @{
*/
/* sd exported functions ----------------------------------------*/
sd_error_status_type sd_init(void);
void sdio_clock_set(uint32_t clkdiv);
sd_error_status_type sd_power_on(void);
sd_error_status_type sd_power_off(void);
sd_error_status_type sd_card_init(void);
sd_error_status_type sd_card_info_get(sd_card_info_struct_type *card_info);
sd_error_status_type sd_wide_bus_operation_config(sdio_bus_width_type mode);
sd_error_status_type sd_device_mode_set(uint32_t mode);
sd_error_status_type sd_deselect_select(uint32_t addr);
sd_error_status_type sd_status_send(uint32_t *p_card_status);
sd_card_state_type sd_state_get(void);
sd_error_status_type sd_blocks_erase(long long addr, uint32_t nblks);
sd_error_status_type sd_block_read(uint8_t *buf, long long addr, uint16_t blk_size);
sd_error_status_type sd_mult_blocks_read(uint8_t *buf, long long addr, uint16_t blk_size, uint32_t nblks);
sd_error_status_type sd_block_write(const uint8_t *buf, long long addr, uint16_t blk_size);
sd_error_status_type sd_mult_blocks_write(const uint8_t *buf, long long addr, uint16_t blk_size, uint32_t nblks);
sd_error_status_type mmc_stream_read(uint8_t *buf, long long addr, uint32_t len);
sd_error_status_type mmc_stream_write(uint8_t *buf, long long addr, uint32_t len);
sd_error_status_type sd_irq_service(void);
void sd_dma_config(uint32_t *mbuf, uint32_t buf_size, dma_dir_type dir);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __AT32_SDIO_H */

66
project/at_start_f403a/examples/flash/fap_enable/src/main.c → project/at_start_f403a/examples/sdio/emmc_card/inc/at32f403a_407_clock.h
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@@ -1,7 +1,7 @@
/**
**************************************************************************
* @file main.c
* @brief main program
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
@@ -22,57 +22,23 @@
**************************************************************************
*/
#include "at32f403a_407_board.h"
#include "at32f403a_407_clock.h"
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F403A_407_CLOCK_H
#define __AT32F403A_407_CLOCK_H
/** @addtogroup AT32F403A_periph_examples
* @{
*/
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup 403A_FLASH_fap_enable FLASH_fap_enable
* @{
*/
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407.h"
/**
* @brief main function.
* @param none
* @retval none
*/
int main(void)
{
flash_status_type status = FLASH_OPERATE_DONE;
system_clock_config();
at32_board_init();
if(flash_fap_status_get() == RESET)
{
flash_unlock();
/* wait for operation to be completed */
status = flash_operation_wait_for(OPERATION_TIMEOUT);
if(status != FLASH_OPERATE_TIMEOUT)
{
if((status == FLASH_PROGRAM_ERROR) || (status == FLASH_EPP_ERROR))
flash_flag_clear(FLASH_PRGMERR_FLAG | FLASH_EPPERR_FLAG);
status = flash_fap_enable(TRUE);
if(status == FLASH_OPERATE_DONE)
nvic_system_reset();
}
}else
{
at32_led_on(LED2);
at32_led_on(LED3);
at32_led_on(LED4);
}
while(1)
{
}
/* exported functions ------------------------------------------------------- */
void system_clock_config(void);
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#endif /* __AT32F403A_407_CLOCK_H */
/**
* @}
*/

162
project/at_start_f403a/examples/sdio/emmc_card/inc/at32f403a_407_conf.h Normal file
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@@ -0,0 +1,162 @@
/**
**************************************************************************
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F403A_407_CONF_H
#define __AT32F403A_407_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief in the following line adjust the value of high speed external crystal (hext)
* used in your application
*
* tip: to avoid modifying this file each time you need to use different hext, you
* can define the hext value in your toolchain compiler preprocessor.
*
*/
#if !defined HEXT_VALUE
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed external crystal in hz */
#endif
/**
* @brief in the following line adjust the high speed external crystal (hext) startup
* timeout value
*/
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */
/* module define -------------------------------------------------------------*/
#define CRM_MODULE_ENABLED
#define TMR_MODULE_ENABLED
#define RTC_MODULE_ENABLED
#define BPR_MODULE_ENABLED
#define GPIO_MODULE_ENABLED
#define I2C_MODULE_ENABLED
#define USART_MODULE_ENABLED
#define PWC_MODULE_ENABLED
#define CAN_MODULE_ENABLED
#define ADC_MODULE_ENABLED
#define DAC_MODULE_ENABLED
#define SPI_MODULE_ENABLED
#define DMA_MODULE_ENABLED
#define DEBUG_MODULE_ENABLED
#define FLASH_MODULE_ENABLED
#define CRC_MODULE_ENABLED
#define WWDT_MODULE_ENABLED
#define WDT_MODULE_ENABLED
#define EXINT_MODULE_ENABLED
#define SDIO_MODULE_ENABLED
#define XMC_MODULE_ENABLED
#define USB_MODULE_ENABLED
#define ACC_MODULE_ENABLED
#define MISC_MODULE_ENABLED
#define EMAC_MODULE_ENABLED
/* includes ------------------------------------------------------------------*/
#ifdef CRM_MODULE_ENABLED
#include "at32f403a_407_crm.h"
#endif
#ifdef TMR_MODULE_ENABLED
#include "at32f403a_407_tmr.h"
#endif
#ifdef RTC_MODULE_ENABLED
#include "at32f403a_407_rtc.h"
#endif
#ifdef BPR_MODULE_ENABLED
#include "at32f403a_407_bpr.h"
#endif
#ifdef GPIO_MODULE_ENABLED
#include "at32f403a_407_gpio.h"
#endif
#ifdef I2C_MODULE_ENABLED
#include "at32f403a_407_i2c.h"
#endif
#ifdef USART_MODULE_ENABLED
#include "at32f403a_407_usart.h"
#endif
#ifdef PWC_MODULE_ENABLED
#include "at32f403a_407_pwc.h"
#endif
#ifdef CAN_MODULE_ENABLED
#include "at32f403a_407_can.h"
#endif
#ifdef ADC_MODULE_ENABLED
#include "at32f403a_407_adc.h"
#endif
#ifdef DAC_MODULE_ENABLED
#include "at32f403a_407_dac.h"
#endif
#ifdef SPI_MODULE_ENABLED
#include "at32f403a_407_spi.h"
#endif
#ifdef DMA_MODULE_ENABLED
#include "at32f403a_407_dma.h"
#endif
#ifdef DEBUG_MODULE_ENABLED
#include "at32f403a_407_debug.h"
#endif
#ifdef FLASH_MODULE_ENABLED
#include "at32f403a_407_flash.h"
#endif
#ifdef CRC_MODULE_ENABLED
#include "at32f403a_407_crc.h"
#endif
#ifdef WWDT_MODULE_ENABLED
#include "at32f403a_407_wwdt.h"
#endif
#ifdef WDT_MODULE_ENABLED
#include "at32f403a_407_wdt.h"
#endif
#ifdef EXINT_MODULE_ENABLED
#include "at32f403a_407_exint.h"
#endif
#ifdef SDIO_MODULE_ENABLED
#include "at32f403a_407_sdio.h"
#endif
#ifdef XMC_MODULE_ENABLED
#include "at32f403a_407_xmc.h"
#endif
#ifdef ACC_MODULE_ENABLED
#include "at32f403a_407_acc.h"
#endif
#ifdef MISC_MODULE_ENABLED
#include "at32f403a_407_misc.h"
#endif
#ifdef USB_MODULE_ENABLED
#include "at32f403a_407_usb.h"
#endif
#ifdef EMAC_MODULE_ENABLED
#include "at32f403a_407_emac.h"
#endif
#ifdef __cplusplus
}
#endif
#endif

56
project/at_start_f403a/examples/sdio/emmc_card/inc/at32f403a_407_int.h Normal file
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@@ -0,0 +1,56 @@
/**
**************************************************************************
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F403A_407_INT_H
#define __AT32F403A_407_INT_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407.h"
/* exported types ------------------------------------------------------------*/
/* exported constants --------------------------------------------------------*/
/* exported macro ------------------------------------------------------------*/
/* exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif

88
project/at_start_f403a/examples/flash/fap_enable/mdk_v5/fap_enable.uvoptx → project/at_start_f403a/examples/sdio/emmc_card/mdk_v5/emmc_card.uvoptx
View File

@@ -22,7 +22,7 @@
</DaveTm>
<Target>
<TargetName>fap_enable</TargetName>
<TargetName>emmc_card</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
@@ -206,6 +206,18 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\src\at32_sdio.c</PathWithFileName>
<FilenameWithoutPath>at32_sdio.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\src\main.c</PathWithFileName>
<FilenameWithoutPath>main.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
@@ -221,7 +233,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber>
<FileNumber>5</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -241,7 +253,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>5</FileNumber>
<FileNumber>6</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -253,7 +265,43 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>6</FileNumber>
<FileNumber>7</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_misc.c</PathWithFileName>
<FilenameWithoutPath>at32f403a_407_misc.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>8</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_sdio.c</PathWithFileName>
<FilenameWithoutPath>at32f403a_407_sdio.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>9</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_dma.c</PathWithFileName>
<FilenameWithoutPath>at32f403a_407_dma.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>10</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -265,7 +313,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>7</FileNumber>
<FileNumber>11</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -275,30 +323,6 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>8</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_flash.c</PathWithFileName>
<FilenameWithoutPath>at32f403a_407_flash.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>9</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_misc.c</PathWithFileName>
<FilenameWithoutPath>at32f403a_407_misc.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
@@ -309,7 +333,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>10</FileNumber>
<FileNumber>12</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -321,7 +345,7 @@
</File>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>11</FileNumber>
<FileNumber>13</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -341,7 +365,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>5</GroupNumber>
<FileNumber>12</FileNumber>
<FileNumber>14</FileNumber>
<FileType>5</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>

496
project/at_start_f403a/examples/sdio/emmc_card/mdk_v5/emmc_card.uvprojx Normal file
View File

@@ -0,0 +1,496 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>emmc_card</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>-AT32F403AVGT7</Device>
<Vendor>ArteryTek</Vendor>
<PackID>ArteryTek.AT32F403A_407_DFP.2.0.2</PackID>
<Cpu>IRAM(0x20000000,0x38000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:-AT32F403AVGT7$Device\Include\at32f403a_407.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:-AT32F403AVGT7$SVD\AT32F403Axx_v2.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\objects\</OutputDirectory>
<OutputName>emmc_card</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\listings\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>0</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -REMAP -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x38000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x100000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x100000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x38000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>AT32F403AVGT7,USE_STDPERIPH_DRIVER,AT_START_F403A_V1</Define>
<Undefine></Undefine>
<IncludePath>..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\inc;..\..\..\..\..\at32f403a_407_board</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>user</GroupName>
<Files>
<File>
<FileName>at32f403a_407_clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\at32f403a_407_clock.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_int.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\at32f403a_407_int.c</FilePath>
</File>
<File>
<FileName>at32_sdio.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\at32_sdio.c</FilePath>
</File>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\main.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>bsp</GroupName>
<Files>
<File>
<FileName>at32f403a_407_board.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\at32f403a_407_board\at32f403a_407_board.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>firmware</GroupName>
<Files>
<File>
<FileName>at32f403a_407_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_gpio.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_misc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_misc.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_sdio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_sdio.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_dma.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_crm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_crm.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_usart.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_usart.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>cmsis</GroupName>
<Files>
<File>
<FileName>system_at32f403a_407.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f403a_407.c</FilePath>
</File>
<File>
<FileName>startup_at32f403a_407.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f403a_407.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>readme</GroupName>
<Files>
<File>
<FileName>readme.txt</FileName>
<FileType>5</FileType>
<FilePath>..\readme.txt</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>emmc_card</LayName>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

19
project/at_start_f403a/examples/sdio/emmc_card/readme.txt Normal file
View File

@@ -0,0 +1,19 @@
/**
**************************************************************************
* @file readme.txt
* @brief readme
**************************************************************************
*/
this demo is based on the at-start board, in this demo, sdio1 to manage
sd card test: init, erase, single block r/w, multiple blocks r/w.
mmc card test:init, erase, single block r/w, multiple blocks r/w, stream data r/w.
sdio1 sd/mmc card
- sdio1_d0 pc8 ---> dat0
- sdio1_d1 pc9 ---> dat1
- sdio1_d2 pc10 ---> dat2
- sdio1_d3 pc11 ---> dat3
- sdio1_ck pc12 ---> clk
- sdio1_cmd pd2 ---> cmd
for more detailed information. please refer to the application note document AN0105.

2829
project/at_start_f403a/examples/sdio/emmc_card/src/at32_sdio.c Normal file
View File

File diff suppressed because it is too large Load Diff

98
project/at_start_f403a/examples/sdio/emmc_card/src/at32f403a_407_clock.c Normal file
View File

@@ -0,0 +1,98 @@
/**
**************************************************************************
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407_clock.h"
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 240000000
* - ahbdiv = 1
* - ahbclk = 240000000
* - apb2div = 2
* - apb2clk = 120000000
* - apb1div = 2
* - apb1clk = 120000000
* - pll_mult = 60
* - pll_range = GT72MHZ (greater than 72 mhz)
* @param none
* @retval none
*/
void system_clock_config(void)
{
/* reset crm */
crm_reset();
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
/* wait till hext is ready */
while(crm_hext_stable_wait() == ERROR)
{
}
/* config pll clock resource */
crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_60, CRM_PLL_OUTPUT_RANGE_GT72MHZ);
/* config hext division */
crm_hext_clock_div_set(CRM_HEXT_DIV_2);
/* enable pll */
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
/* wait till pll is ready */
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
{
}
/* config ahbclk */
crm_ahb_div_set(CRM_AHB_DIV_1);
/* config apb2clk, the maximum frequency of APB1/APB2 clock is 120 MHz */
crm_apb2_div_set(CRM_APB2_DIV_2);
/* config apb1clk, the maximum frequency of APB1/APB2 clock is 120 MHz */
crm_apb1_div_set(CRM_APB1_DIV_2);
/* enable auto step mode */
crm_auto_step_mode_enable(TRUE);
/* select pll as system clock source */
crm_sysclk_switch(CRM_SCLK_PLL);
/* wait till pll is used as system clock source */
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
{
}
/* disable auto step mode */
crm_auto_step_mode_enable(FALSE);
/* update system_core_clock global variable */
system_core_clock_update();
}

2
project/at_start_f403a/examples/flash/fap_enable/src/at32f403a_407_int.c → project/at_start_f403a/examples/sdio/emmc_card/src/at32f403a_407_int.c
View File

@@ -29,7 +29,7 @@
* @{
*/
/** @addtogroup 403A_FLASH_fap_enable
/** @addtogroup 403A_SDIO_emmc_card
* @{
*/

359
project/at_start_f403a/examples/sdio/emmc_card/src/main.c Normal file
View File

@@ -0,0 +1,359 @@
/**
**************************************************************************
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
#include <stdbool.h>
#include <string.h>
#include "at32_sdio.h"
#include "at32f403a_407_board.h"
#include "at32f403a_407_clock.h"
/** @addtogroup AT32F403A_periph_examples
* @{
*/
/** @addtogroup 403A_SDIO_emmc_card SDIO_emmc_card
* @{
*/
#define BLOCK_SIZE (512)
#define BLOCKS_NUMBER (64)
#define MULTI_BUFFER_SIZE (BLOCK_SIZE * BLOCKS_NUMBER)
#define STREAM_BUFFER_SIZE (2048)
static uint8_t sblock_tbuffer[BLOCK_SIZE], sblock_rbuffer[BLOCK_SIZE];
static uint8_t mblock_tbuffer[MULTI_BUFFER_SIZE], mblock_rbuffer[MULTI_BUFFER_SIZE];
static uint8_t stream_tbuffer[STREAM_BUFFER_SIZE], stream_rbuffer[STREAM_BUFFER_SIZE];
/**
* test result
*/
typedef enum
{
TEST_FAIL = 0,
TEST_SUCCESS,
} test_result_type;
static test_result_type sd_single_block_test(void);
static test_result_type sd_multiple_blocks_test(void);
uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
static void sd_test_error(void);
static void nvic_configuration(void);
/**
* @brief sd card single block read/write test.
* @param none
* @retval TEST_FAIL: fail.
* TEST_SUCCESS: success.
*/
static test_result_type sd_single_block_test(void)
{
sd_error_status_type status = SD_OK;
uint8_t bus_width;
/* test 1-bit and 4-bit width */
for(bus_width = 0; bus_width < 2; bus_width++)
{
memset(sblock_tbuffer, bus_width + 0xAB, BLOCK_SIZE);
memset(sblock_rbuffer, 0, BLOCK_SIZE);
/* set data width */
status = sd_wide_bus_operation_config((sdio_bus_width_type)bus_width);
if(status != SD_OK)
{
return TEST_FAIL;
}
/* write block of 512 bytes on address 0 */
status = sd_block_write(sblock_tbuffer, 0x00, BLOCK_SIZE);
if(status != SD_OK)
{
return TEST_FAIL;
}
/* read block of 512 bytes from address 0 */
status = sd_block_read(sblock_rbuffer, 0x00, BLOCK_SIZE);
if(status != SD_OK)
{
return TEST_FAIL;
}
if(!buffer_compare(sblock_tbuffer, sblock_rbuffer, BLOCK_SIZE))
{
return TEST_FAIL;
}
}
return TEST_SUCCESS;
}
/**
* @brief sd card multiple blocks read/write test.
* @param none
* @retval TEST_FAIL: fail.
* TEST_SUCCESS: success.
*/
static test_result_type sd_multiple_blocks_test(void)
{
sd_error_status_type status = SD_OK;
uint8_t bus_width;
/* test 1-bit and 4-bit width */
for(bus_width = 0; bus_width < 2; bus_width++)
{
memset(mblock_tbuffer, bus_width + 0x3C, MULTI_BUFFER_SIZE);
memset(mblock_rbuffer, 0, MULTI_BUFFER_SIZE);
/* set data width */
status = sd_wide_bus_operation_config((sdio_bus_width_type)bus_width);
if(status != SD_OK)
{
return TEST_FAIL;
}
/* write multiple block of many bytes on address 0 */
status = sd_mult_blocks_write(mblock_tbuffer, 0x00, BLOCK_SIZE, BLOCKS_NUMBER);
if(status != SD_OK)
{
return TEST_FAIL;
}
/* read block of many bytes from address 0 */
status = sd_mult_blocks_read(mblock_rbuffer, 0x00, BLOCK_SIZE, BLOCKS_NUMBER);
if(status != SD_OK)
{
return TEST_FAIL;
}
/* check the correctness of written data */
if(!buffer_compare(mblock_tbuffer, mblock_rbuffer, MULTI_BUFFER_SIZE))
{
return TEST_FAIL;
}
}
return TEST_SUCCESS;
}
/**
* @brief mmc card data stream read/write test.
* @param none
* @retval TEST_FAIL: fail.
* TEST_SUCCESS: success.
*/
static test_result_type mmc_stream_test(void)
{
sd_error_status_type status = SD_OK;
uint8_t bus_width;
/* only test 1-bit width */
for(bus_width = 0; bus_width < 1; bus_width++)
{
memset(stream_tbuffer, bus_width+0x5A, STREAM_BUFFER_SIZE);
memset(stream_rbuffer, 0, STREAM_BUFFER_SIZE);
/* set data width */
status = sd_wide_bus_operation_config((sdio_bus_width_type)bus_width);
if(status != SD_OK)
{
return TEST_FAIL;
}
/* write stream of many bytes on address 0 */
status = mmc_stream_write(stream_tbuffer, 0x00, STREAM_BUFFER_SIZE);
if (status != SD_OK)
{
return TEST_FAIL;
}
/* read stream of many bytes from address 0 */
status = mmc_stream_read(stream_rbuffer, 0x00, STREAM_BUFFER_SIZE);
if (status != SD_OK)
{
return TEST_FAIL;
}
/* check the correctness of written data */
if(!buffer_compare(stream_tbuffer, stream_rbuffer, STREAM_BUFFER_SIZE))
{
return TEST_FAIL;
}
}
return TEST_SUCCESS;
}
/**
* @brief compares two buffers.
* @param pbuffer1, pbuffer2: buffers to be compared.
* @param buffer_length: buffer's length
* @retval 1: pbuffer1 identical to pbuffer2
* 0: pbuffer1 differs from pbuffer2
*/
uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
{
while(buffer_length--)
{
if(*pbuffer1 != *pbuffer2)
{
return 0;
}
pbuffer1++;
pbuffer2++;
}
return 1;
}
/**
* @brief LED2 on off every 300ms for sd test error.
* @param none
* @retval none
*/
static void sd_test_error(void)
{
at32_led_on(LED2);
delay_ms(300);
at32_led_off(LED2);
delay_ms(300);
}
/**
* @brief configures sdio1 irq channel.
* @param none
* @retval none
*/
static void nvic_configuration(void)
{
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
nvic_irq_enable(SDIO1_IRQn, 1, 0);
}
/**
* @brief show sd/mmc card info.
* @param none
* @retval none
*/
void show_card_info(void)
{
printf("---------------------\r\n");
switch(sd_card_info.card_type)
{
case SDIO_STD_CAPACITY_SD_CARD_V1_1: printf("card type: SDSC V1.1\r\n");break;
case SDIO_STD_CAPACITY_SD_CARD_V2_0: printf("card type: SDSC V2.0\r\n");break;
case SDIO_HIGH_CAPACITY_SD_CARD: printf("card type: SDHC V2.0\r\n");break;
case SDIO_MULTIMEDIA_CARD: printf("card type: MMC \r\n");break;
case SDIO_HIGH_SPEED_MULTIMEDIA_CARD: printf("card type: MMC V4.2\r\n");break;
case SDIO_HIGH_CAPACITY_MMC_CARD: printf("card type: eMMC \r\n");break;
}
printf("card manufacturer_id: %d\r\n", sd_card_info.sd_cid_reg.manufacturer_id);
printf("card rca: 0x%X\r\n", sd_card_info.rca);
printf("card c_size = %u\r\n", sd_card_info.sd_csd_reg.device_size);
printf("card capacity: %uMB %uKB\r\n", (uint32_t)(sd_card_info.card_capacity>>20), (uint32_t)(sd_card_info.card_capacity>>10));
printf("card block_size: %d\r\n", sd_card_info.card_blk_size);
printf("---------------------\r\n");
}
/* gloable functions ---------------------------------------------------------*/
/**
* @brief main function.
* @param none
* @retval none
*/
int main(void)
{
system_clock_config();
at32_board_init();
nvic_configuration();
uart_print_init(115200);
printf("start test..\r\n");
/* sdio init */
if(SD_OK != sd_init())
{
printf("sdio init fail\r\n");
while(1)
{
sd_test_error();
}
}
printf("sdio init ok\r\n");
show_card_info();
/* sd card single block test */
if(TEST_SUCCESS != sd_single_block_test())
{
printf("sd card single block test fail\r\n");
/* single block test fail, led2 fresh */
while(1)
{
sd_test_error();
}
}
printf("sd card single block test ok\r\n");
/* sd card multiple blocks test */
if(TEST_SUCCESS != sd_multiple_blocks_test())
{
printf("sd card multiple blocks test fail\r\n");
/* multiple blocks test fail, led2 fresh */
while(1)
{
sd_test_error();
}
}
printf("sd card multiple blocks test ok\r\n");
/* mmc card stream data transfer test */
if((sd_card_info.card_type == SDIO_MULTIMEDIA_CARD)||(sd_card_info.card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD))
{
if(TEST_SUCCESS != mmc_stream_test())
{
printf("mmc card stream data test fail\r\n");
/* mmc card stream data test fail, led2 fresh */
while(1)
{
sd_test_error();
}
}
printf("mmc card stream data test ok\r\n");
}
/* all tests pass, led3 and led4 fresh */
while(1)
{
at32_led_toggle(LED3);
at32_led_toggle(LED4);
delay_ms(300);
}
}
/**
* @}
*/
/**
* @}
*/

38
project/at_start_f403a/examples/sdio/sd_mmc_card/inc/at32_sdio.h
View File

@@ -38,11 +38,11 @@ extern "C" {
* @{
*/
/** @addtogroup 403A_SDIO_sd_mmc_card
/** @addtogroup SDIO_sd_mmc_card
* @{
*/
/** @defgroup SDIO_sd_mmc_card_instance_definition
/** @defgroup SDIO_instance_definition
* @{
*/
@@ -52,7 +52,7 @@ extern "C" {
* @}
*/
/** @defgroup SDIO_sd_mmc_card_exported_types
/** @defgroup SDIO_exported_types
* @{
*/
@@ -242,11 +242,13 @@ typedef struct
uint8_t card_type;
} sd_card_info_struct_type;
extern sd_card_info_struct_type sd_card_info;
/**
* @}
*/
/** @defgroup SDIO_sd_mmc_card_command_index_definition
/** @defgroup SDIO_command_index_definition
* @{
*/
@@ -327,7 +329,7 @@ typedef struct
* @}
*/
/** @defgroup SDIO_sd_mmc_card_paremeters_definition
/** @defgroup SDIO_paremeters_definition
* @{
*/
@@ -338,13 +340,12 @@ typedef struct
#define SDIO_STATIC_FLAGS ((uint32_t)0x000005FF)
#define SDIO_CMD0TIMEOUT ((uint32_t)0x00010000)
#define SDIO_DATATIMEOUT ((uint32_t)0xFFFFFFFF)
#define SDIO_FIFO_Address ((uint32_t)0x40018080)
/**
* @}
*/
/** @defgroup SDIO_sd_mmc_card_response_definition
/** @defgroup SDIO_response_definition
* @{
*/
@@ -357,10 +358,10 @@ typedef struct
#define SD_OCR_ERASE_SEQ_ERR ((uint32_t)0x10000000)
#define SD_OCR_INVALID_ERASE_PARAM ((uint32_t)0x08000000)
#define SD_OCR_WR_PROTECT_VIOLATION ((uint32_t)0x04000000)
#define SD_OCR_LOCK_UNLOCK_ERROR ((uint32_t)0x01000000)
#define SD_OCR_CMD_CRC_ERROR ((uint32_t)0x00800000)
#define SD_OCR_LOCK_UNLOCK_ERROR ((uint32_t)0x01000000)
#define SD_OCR_CMD_CRC_ERROR ((uint32_t)0x00800000)
#define SD_OCR_ILLEGAL_CMD ((uint32_t)0x00400000)
#define SD_OCR_CARD_ECC_ERROR ((uint32_t)0x00200000)
#define SD_OCR_CARD_ECC_ERROR ((uint32_t)0x00200000)
#define SD_OCR_CARD_CONTROLLER_ERR ((uint32_t)0x00100000)
#define SD_OCR_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00080000)
#define SD_OCR_STREAM_RD_UNDERRUN ((uint32_t)0x00040000)
@@ -385,12 +386,12 @@ typedef struct
*/
#define SD_R6_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00002000)
#define SD_R6_ILLEGAL_CMD ((uint32_t)0x00004000)
#define SD_R6_CMD_CRC_ERROR ((uint32_t)0x00008000)
#define SD_R6_CMD_CRC_ERROR ((uint32_t)0x00008000)
#define SD_VOLTAGE_WINDOW_SD ((uint32_t)0x80100000)
#define SD_HIGH_CAPACITY ((uint32_t)0x40000000)
#define SD_STD_CAPACITY ((uint32_t)0x00000000)
#define SD_CHECK_PATTERN ((uint32_t)0x000001AA)
#define SD_VOLTAGE_WINDOW_MMC ((uint32_t)0x80FF8000)
#define SD_VOLTAGE_WINDOW_MMC ((uint32_t)0x40FF8000)
#define SD_MAX_VOLT_TRIAL ((uint32_t)0x000000FF)
#define SD_ALLZERO ((uint32_t)0x00000000)
#define SD_WIDE_BUS_SUPPORT ((uint32_t)0x00040000)
@@ -411,7 +412,7 @@ typedef struct
* @}
*/
/** @defgroup SDIO_sd_mmc_card_command_class_definition
/** @defgroup SDIO_command_class_definition
* @{
*/
@@ -426,7 +427,7 @@ typedef struct
* @}
*/
/** @defgroup SDIO_sd_mmc_card_cmd8_definition
/** @defgroup SDIO_cmd8_definition
* @{
*/
@@ -439,7 +440,7 @@ typedef struct
* @}
*/
/** @defgroup SDIO_sd_mmc_card_mmc_extend_definition
/** @defgroup SDIO_mmc_extend_definition
* @{
*/
@@ -465,7 +466,7 @@ typedef struct
* @}
*/
/** @defgroup SDIO_sd_mmc_card_interrupt_flags_definition
/** @defgroup SDIO_interrupt_flags_definition
* @{
*/
@@ -477,9 +478,7 @@ typedef struct
* @}
*/
extern sd_card_info_struct_type sd_card_info;
/** @defgroup SDIO_sd_mmc_card_exported_functions
/** @defgroup SDIO_exported_functions
* @{
*/
@@ -522,3 +521,4 @@ void sd_dma_config(uint32_t *mbuf, uint32_t buf_size, dma_dir_type dir);
#endif
#endif /* __AT32_SDIO_H */

135
project/at_start_f403a/examples/sdio/sd_mmc_card/src/at32_sdio.c
View File

@@ -39,6 +39,7 @@ sdio_data_struct_type sdio_data_init_struct;
static sd_memory_card_type card_type = SDIO_STD_CAPACITY_SD_CARD_V1_1; /* sd card type */
static uint32_t csd_table[4], cid_table[4], rca = 0; /* csd, sid, rca */
static uint32_t ext_csd_table[128];
static sd_data_transfer_mode_type device_mode = SD_TRANSFER_POLLING_MODE; /* working mode */
static uint8_t stop_flag = 0; /* transmit stop flag */
volatile sd_error_status_type transfer_error = SD_OK; /* transmit error flag */
@@ -58,6 +59,7 @@ sd_error_status_type mmc_switch(uint8_t set, uint8_t index, uint8_t value);
sd_error_status_type sd_switch(uint32_t mode, uint32_t group, uint8_t value, uint8_t *rsp);
sd_error_status_type check_card_programming(uint8_t *p_status);
sd_error_status_type speed_change(uint8_t speed);
sd_error_status_type get_ext_csd(void);
sd_error_status_type scr_find(void);
uint8_t convert_from_bytes_to_power_of_two(uint16_t number_of_bytes);
@@ -119,6 +121,7 @@ sd_error_status_type sd_init(void)
if((SDIO_MULTIMEDIA_CARD == card_type) && (sd_card_info.sd_csd_reg.spec_version >= 4))
{
card_type = SDIO_HIGH_SPEED_MULTIMEDIA_CARD;
sd_card_info.card_type = (uint8_t)card_type;
}
if(status == SD_OK)
@@ -126,7 +129,27 @@ sd_error_status_type sd_init(void)
/* select card */
status = sd_deselect_select((uint32_t)(sd_card_info.rca << 16));
}
if(status == SD_OK)
{
if(SDIO_HIGH_SPEED_MULTIMEDIA_CARD == card_type)
{
if(sd_card_info.sd_csd_reg.device_size == 0xFFF)
{
uint32_t sec_count;
/* get ext_csd function for support emmc card. */
status = get_ext_csd();
if(status == SD_OK)
{
card_type = SDIO_HIGH_CAPACITY_MMC_CARD;
sd_card_info.card_type = (uint8_t)card_type;
sec_count = ext_csd_table[212/4];
sd_card_info.card_capacity = (uint64_t)sec_count*512;
}
}
}
}
if(status == SD_OK && ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == card_type) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == card_type) || \
(SDIO_SECURE_DIGITAL_IO_COMBO_CARD == card_type) || (SDIO_HIGH_CAPACITY_SD_CARD == card_type)))
{
@@ -168,6 +191,12 @@ sd_error_status_type sd_init(void)
status = sd_device_mode_set(SD_TRANSFER_DMA_MODE);
}
if(status == SD_OK)
{
/* Set data width */
status = sd_wide_bus_operation_config(SDIO_BUS_WIDTH_D4);
}
return status;
}
@@ -221,7 +250,8 @@ sd_error_status_type sd_power_on(void)
sdio_power_set(SDIOx, SDIO_POWER_ON);
/* enable to output sdio_ck */
sdio_clock_enable(SDIOx, TRUE);
delay_ms(10);
for(retry = 0; retry < 5; retry++)
{
/* send cmd0, get in idle stage */
@@ -735,7 +765,7 @@ sd_error_status_type sd_wide_bus_operation_config(sdio_bus_width_type mode)
{
sd_error_status_type status = SD_OK;
if((card_type == SDIO_MULTIMEDIA_CARD) || (card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD))
if(card_type == SDIO_MULTIMEDIA_CARD || card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD || card_type == SDIO_HIGH_CAPACITY_MMC_CARD)
{
status = mmc_switch(EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, (uint8_t)mode);
}
@@ -801,7 +831,7 @@ sd_error_status_type sd_deselect_select(uint32_t addr)
sdio_command_init_struct.argument = addr;
sdio_command_init_struct.cmd_index = SD_CMD_SEL_DESEL_CARD;
sdio_command_init_struct.rsp_type = SDIO_RESPONSE_SHORT;
sdio_command_init_struct.wait_type = SDIO_WAIT_FOR_INT;
sdio_command_init_struct.wait_type = SDIO_WAIT_FOR_NO;
/* sdio command config */
sdio_command_config(SDIOx, &sdio_command_init_struct);
@@ -844,10 +874,10 @@ sd_error_status_type sdio_command_data_send(sdio_command_struct_type *sdio_cmd_i
{
if(sdio_data_init_t->transfer_direction == SDIO_DATA_TRANSFER_TO_CONTROLLER)
{
sd_dma_config(buf, length, DMA_DIR_PERIPHERAL_TO_MEMORY);
SDIOx->inten |= SDIO_INTR_STS_READ_MASK;
transfer_error = SD_OK;
transfer_end = 0;
sd_dma_config(buf, length, DMA_DIR_PERIPHERAL_TO_MEMORY);
SDIOx->inten |= SDIO_INTR_STS_READ_MASK;
sdio_dma_enable(SDIOx, TRUE);
}
}
@@ -980,10 +1010,10 @@ sd_error_status_type sdio_command_data_send(sdio_command_struct_type *sdio_cmd_i
{
if(sdio_data_init_t->transfer_direction == SDIO_DATA_TRANSFER_TO_CARD)
{
sd_dma_config(buf, length, DMA_DIR_MEMORY_TO_PERIPHERAL);
SDIOx->inten |= SDIO_INTR_STS_WRITE_MASK;
transfer_error = SD_OK;
transfer_end = 0;
sd_dma_config(buf, length, DMA_DIR_MEMORY_TO_PERIPHERAL);
SDIOx->inten |= SDIO_INTR_STS_WRITE_MASK;
sdio_dma_enable(SDIOx, TRUE);
}
@@ -1054,7 +1084,7 @@ sd_error_status_type sd_blocks_erase(long long addr, uint32_t nblks)
return SD_LOCK_UNLOCK_ERROR;
}
if(card_type == SDIO_MULTIMEDIA_CARD || card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD)
if(card_type == SDIO_MULTIMEDIA_CARD || card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD || card_type == SDIO_HIGH_CAPACITY_MMC_CARD)
{
/* send cmd35, set erase group start */
sdio_command_init_struct.argument = start_addr;
@@ -1189,7 +1219,7 @@ sd_error_status_type sd_block_read(uint8_t *buf, long long addr, uint16_t blk_si
SDIOx->dtctrl = 0x0;
if(card_type == SDIO_HIGH_CAPACITY_SD_CARD)
if((card_type == SDIO_HIGH_CAPACITY_SD_CARD) || (card_type == SDIO_HIGH_CAPACITY_MMC_CARD))
{
blk_size = 512;
addr >>= 9;
@@ -1273,7 +1303,7 @@ sd_error_status_type sd_mult_blocks_read(uint8_t *buf, long long addr, uint16_t
SDIOx->dtctrl = 0x0;
if(card_type == SDIO_HIGH_CAPACITY_SD_CARD)
if((card_type == SDIO_HIGH_CAPACITY_SD_CARD) || (card_type == SDIO_HIGH_CAPACITY_MMC_CARD))
{
blk_size = 512;
addr >>= 9;
@@ -1386,7 +1416,7 @@ sd_error_status_type sd_block_write(const uint8_t *buf, long long addr, uint16_t
return SD_LOCK_UNLOCK_ERROR;
}
if(card_type == SDIO_HIGH_CAPACITY_SD_CARD)
if((card_type == SDIO_HIGH_CAPACITY_SD_CARD) || (card_type == SDIO_HIGH_CAPACITY_MMC_CARD))
{
blk_size = 512;
addr >>= 9;
@@ -1508,7 +1538,7 @@ sd_error_status_type sd_mult_blocks_write(const uint8_t *buf, long long addr, ui
return SD_LOCK_UNLOCK_ERROR;
}
if(card_type == SDIO_HIGH_CAPACITY_SD_CARD)
if((card_type == SDIO_HIGH_CAPACITY_SD_CARD) || (card_type == SDIO_HIGH_CAPACITY_MMC_CARD))
{
blk_size = 512;
addr >>= 9;
@@ -1649,7 +1679,7 @@ sd_error_status_type mmc_stream_read(uint8_t *buf, long long addr, uint32_t len)
/* clear dcsm configuration */
sdio_data_init_struct.block_size = SDIO_DATA_BLOCK_SIZE_1B;
sdio_data_init_struct.data_length = 0 ;
sdio_data_init_struct.data_length = 0;
sdio_data_init_struct.timeout = SD_DATATIMEOUT ;
sdio_data_init_struct.transfer_direction = SDIO_DATA_TRANSFER_TO_CARD;
sdio_data_init_struct.transfer_mode = SDIO_DATA_STREAM_TRANSFER;
@@ -1670,7 +1700,7 @@ sd_error_status_type mmc_stream_read(uint8_t *buf, long long addr, uint32_t len)
sdio_command_init_struct.rsp_type = SDIO_RESPONSE_SHORT;
sdio_command_init_struct.wait_type = SDIO_WAIT_FOR_NO;
sdio_data_init_struct.block_size = (sdio_block_size_type)(5 << 4);
sdio_data_init_struct.block_size = SDIO_DATA_BLOCK_SIZE_1B;
sdio_data_init_struct.data_length = len;
sdio_data_init_struct.timeout = SD_DATATIMEOUT ;
sdio_data_init_struct.transfer_direction = SDIO_DATA_TRANSFER_TO_CONTROLLER;
@@ -1725,7 +1755,7 @@ sd_error_status_type mmc_stream_write(uint8_t *buf, long long addr, uint32_t len
sdio_command_init_struct.wait_type = SDIO_WAIT_FOR_NO;
sdio_data_init_struct.block_size = (sdio_block_size_type)(15 << 4);
sdio_data_init_struct.block_size = SDIO_DATA_BLOCK_SIZE_1B;
sdio_data_init_struct.data_length = len;
sdio_data_init_struct.timeout = SD_DATATIMEOUT ;
sdio_data_init_struct.transfer_direction = SDIO_DATA_TRANSFER_TO_CARD;
@@ -2491,6 +2521,77 @@ sd_card_state_type sd_state_get(void)
}
}
/**
* @brief find the sd card ext csd register value.
* @retval sd_error_status_type: sd card error code.
*/
sd_error_status_type get_ext_csd(void)
{
uint32_t index = 0, sts_reg = 0;
sd_error_status_type status = SD_OK;
uint32_t *tmp_ext_csd = ext_csd_table;
sdio_data_init_struct.block_size = SDIO_DATA_BLOCK_SIZE_512B;
sdio_data_init_struct.data_length = 512;
sdio_data_init_struct.timeout = SD_DATATIMEOUT;
sdio_data_init_struct.transfer_direction = SDIO_DATA_TRANSFER_TO_CONTROLLER;
sdio_data_init_struct.transfer_mode = SDIO_DATA_BLOCK_TRANSFER;
sdio_data_config(SDIOx, &sdio_data_init_struct);
sdio_data_state_machine_enable(SDIOx, TRUE);
/* send cmd8 */
sdio_command_init_struct.argument = 0x0;
sdio_command_init_struct.cmd_index = SD_CMD_HS_SEND_EXT_CSD;
sdio_command_init_struct.rsp_type = SDIO_RESPONSE_SHORT;
sdio_command_init_struct.wait_type = SDIO_WAIT_FOR_NO;
/* sdio command config */
sdio_command_config(SDIOx, &sdio_command_init_struct);
/* enable ccsm */
sdio_command_state_machine_enable(SDIOx, TRUE);
status = command_rsp1_error(SD_CMD_HS_SEND_EXT_CSD);
if(status != SD_OK)
{
return status;
}
sts_reg = SDIOx->sts;
while(!(sts_reg & (SDIO_RXERRO_FLAG | SDIO_DTFAIL_FLAG | SDIO_DTTIMEOUT_FLAG | SDIO_DTBLKCMPL_FLAG | SDIO_SBITERR_FLAG)))
{
if(sdio_flag_get(SDIOx, SDIO_RXBUF_FLAG) != RESET)
{
*(tmp_ext_csd + index) = sdio_data_read(SDIOx);
index++;
}
sts_reg = SDIOx->sts;
}
if(sdio_flag_get(SDIOx, SDIO_DTTIMEOUT_FLAG) != RESET)
{
sdio_flag_clear(SDIOx, SDIO_DTTIMEOUT_FLAG);
return SD_DATA_TIMEOUT;
}
else if(sdio_flag_get(SDIOx, SDIO_DTFAIL_FLAG) != RESET)
{
sdio_flag_clear(SDIOx, SDIO_DTFAIL_FLAG);
return SD_DATA_FAIL;
}
else if(sdio_flag_get(SDIOx, SDIO_RXERRO_FLAG) != RESET)
{
sdio_flag_clear(SDIOx, SDIO_RXERRO_FLAG);
return SD_RX_OVERRUN;
}
else if(sdio_flag_get(SDIOx, SDIO_SBITERR_FLAG) != RESET)
{
sdio_flag_clear(SDIOx, SDIO_SBITERR_FLAG);
return SD_START_BIT_ERR;
}
sdio_flag_clear(SDIOx, SDIO_STATIC_FLAGS);
return status;
}
/**
* @brief find the sd card scr register value.
* @retval sd_error_status_type: sd card error code.
@@ -2655,7 +2756,7 @@ sd_error_status_type speed_change(uint8_t speed)
return SD_ERROR;
}
}
else if(card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD)
else if(card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD || card_type == SDIO_HIGH_CAPACITY_MMC_CARD)
{
status = mmc_switch(EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, (uint8_t)speed);

85
project/at_start_f403a/examples/sdio/sd_mmc_card/src/main.c
View File

@@ -39,14 +39,23 @@
#define BLOCK_SIZE (512)
#define BLOCKS_NUMBER (64)
#define MULTI_BUFFER_SIZE (BLOCK_SIZE * BLOCKS_NUMBER)
#define STREAM_BUFFER_SIZE (4096)
#define STREAM_BUFFER_SIZE (2048)
static uint8_t sblock_tbuffer[BLOCK_SIZE], sblock_rbuffer[BLOCK_SIZE];
static uint8_t mblock_tbuffer[MULTI_BUFFER_SIZE], mblock_rbuffer[MULTI_BUFFER_SIZE];
static uint8_t stream_tbuffer[STREAM_BUFFER_SIZE], stream_rbuffer[STREAM_BUFFER_SIZE];
static error_status sd_single_block_test(void);
static error_status sd_multiple_blocks_test(void);
/**
* test result
*/
typedef enum
{
TEST_FAIL = 0,
TEST_SUCCESS,
} test_result_type;
static test_result_type sd_single_block_test(void);
static test_result_type sd_multiple_blocks_test(void);
uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
static void sd_test_error(void);
static void nvic_configuration(void);
@@ -54,10 +63,10 @@ static void nvic_configuration(void);
/**
* @brief sd card single block read/write test.
* @param none
* @retval ERROR: fail.
* SUCCESS: success.
* @retval TEST_FAIL: fail.
* TEST_SUCCESS: success.
*/
static error_status sd_single_block_test(void)
static test_result_type sd_single_block_test(void)
{
sd_error_status_type status = SD_OK;
uint8_t bus_width;
@@ -72,39 +81,39 @@ static error_status sd_single_block_test(void)
status = sd_wide_bus_operation_config((sdio_bus_width_type)bus_width);
if(status != SD_OK)
{
return ERROR;
return TEST_FAIL;
}
/* write block of 512 bytes on address 0 */
status = sd_block_write(sblock_tbuffer, 0x00, BLOCK_SIZE);
if(status != SD_OK)
{
return ERROR;
return TEST_FAIL;
}
/* read block of 512 bytes from address 0 */
status = sd_block_read(sblock_rbuffer, 0x00, BLOCK_SIZE);
if(status != SD_OK)
{
return ERROR;
return TEST_FAIL;
}
if(!buffer_compare(sblock_tbuffer, sblock_rbuffer, BLOCK_SIZE))
{
return ERROR;
return TEST_FAIL;
}
}
return SUCCESS;
return TEST_SUCCESS;
}
/**
* @brief sd card multiple blocks read/write test.
* @param none
* @retval ERROR: fail.
* SUCCESS: success.
* @retval TEST_FAIL: fail.
* TEST_SUCCESS: success.
*/
static error_status sd_multiple_blocks_test(void)
static test_result_type sd_multiple_blocks_test(void)
{
sd_error_status_type status = SD_OK;
uint8_t bus_width;
@@ -119,40 +128,40 @@ static error_status sd_multiple_blocks_test(void)
status = sd_wide_bus_operation_config((sdio_bus_width_type)bus_width);
if(status != SD_OK)
{
return ERROR;
return TEST_FAIL;
}
/* write multiple block of many bytes on address 0 */
status = sd_mult_blocks_write(mblock_tbuffer, 0x00, BLOCK_SIZE, BLOCKS_NUMBER);
if(status != SD_OK)
{
return ERROR;
return TEST_FAIL;
}
/* read block of many bytes from address 0 */
status = sd_mult_blocks_read(mblock_rbuffer, 0x00, BLOCK_SIZE, BLOCKS_NUMBER);
if(status != SD_OK)
{
return ERROR;
return TEST_FAIL;
}
/* check the correctness of written data */
if(!buffer_compare(mblock_tbuffer, mblock_rbuffer, MULTI_BUFFER_SIZE))
{
return ERROR;
return TEST_FAIL;
}
}
return SUCCESS;
return TEST_SUCCESS;
}
/**
* @brief mmc card data stream read/write test.
* @param none
* @retval ERROR: fail.
* SUCCESS: success.
* @retval TEST_FAIL: fail.
* TEST_SUCCESS: success.
*/
static error_status mmc_stream_test(void)
static test_result_type mmc_stream_test(void)
{
sd_error_status_type status = SD_OK;
uint8_t bus_width;
@@ -167,31 +176,31 @@ static error_status mmc_stream_test(void)
status = sd_wide_bus_operation_config((sdio_bus_width_type)bus_width);
if(status != SD_OK)
{
return ERROR;
return TEST_FAIL;
}
/* write stream of many bytes on address 0 */
status = mmc_stream_write(stream_tbuffer, 0x00, STREAM_BUFFER_SIZE);
if (status != SD_OK)
{
return ERROR;
return TEST_FAIL;
}
/* read stream of many bytes from address 0 */
status = mmc_stream_read(stream_rbuffer, 0x00, STREAM_BUFFER_SIZE);
if (status != SD_OK)
{
return ERROR;
return TEST_FAIL;
}
/* check the correctness of written data */
if(!buffer_compare(stream_tbuffer, stream_rbuffer, STREAM_BUFFER_SIZE))
{
return ERROR;
return TEST_FAIL;
}
}
return SUCCESS;
return TEST_SUCCESS;
}
/**
@@ -216,7 +225,7 @@ uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_len
}
/**
* @brief LED2 on off every 300ms for sd test failed.
* @brief LED2 on off every 300ms for sd test error.
* @param none
* @retval none
*/
@@ -236,7 +245,7 @@ static void sd_test_error(void)
static void nvic_configuration(void)
{
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
nvic_irq_enable(SDIO1_IRQn, 0, 0);
nvic_irq_enable(SDIO1_IRQn, 1, 0);
}
/**
@@ -249,10 +258,12 @@ void show_card_info(void)
printf("---------------------\r\n");
switch(sd_card_info.card_type)
{
case SDIO_STD_CAPACITY_SD_CARD_V1_1: printf("card type: SDSC V1.1\r\n");break;
case SDIO_STD_CAPACITY_SD_CARD_V2_0: printf("card type: SDSC V2.0\r\n");break;
case SDIO_HIGH_CAPACITY_SD_CARD: printf("card type: SDHC V2.0\r\n");break;
case SDIO_MULTIMEDIA_CARD: printf("card type: MMC Card\r\n");break;
case SDIO_STD_CAPACITY_SD_CARD_V1_1: printf("card type: SDSC V1.1\r\n");break;
case SDIO_STD_CAPACITY_SD_CARD_V2_0: printf("card type: SDSC V2.0\r\n");break;
case SDIO_HIGH_CAPACITY_SD_CARD: printf("card type: SDHC V2.0\r\n");break;
case SDIO_MULTIMEDIA_CARD: printf("card type: MMC \r\n");break;
case SDIO_HIGH_SPEED_MULTIMEDIA_CARD: printf("card type: MMC V4.2\r\n");break;
case SDIO_HIGH_CAPACITY_MMC_CARD: printf("card type: eMMC \r\n");break;
}
printf("card manufacturer_id: %d\r\n", sd_card_info.sd_cid_reg.manufacturer_id);
printf("card rca: 0x%X\r\n", sd_card_info.rca);
@@ -292,7 +303,7 @@ int main(void)
show_card_info();
/* sd card single block test */
if(SUCCESS != sd_single_block_test())
if(TEST_SUCCESS != sd_single_block_test())
{
printf("sd card single block test fail\r\n");
/* single block test fail, led2 fresh */
@@ -304,7 +315,7 @@ int main(void)
printf("sd card single block test ok\r\n");
/* sd card multiple blocks test */
if(SUCCESS != sd_multiple_blocks_test())
if(TEST_SUCCESS != sd_multiple_blocks_test())
{
printf("sd card multiple blocks test fail\r\n");
/* multiple blocks test fail, led2 fresh */
@@ -316,9 +327,9 @@ int main(void)
printf("sd card multiple blocks test ok\r\n");
/* mmc card stream data transfer test */
if(sd_card_info.card_type == SDIO_MULTIMEDIA_CARD)
if((sd_card_info.card_type == SDIO_MULTIMEDIA_CARD)||(sd_card_info.card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD))
{
if(SUCCESS != mmc_stream_test())
if(TEST_SUCCESS != mmc_stream_test())
{
printf("mmc card stream data test fail\r\n");
/* mmc card stream data test fail, led2 fresh */

38
project/at_start_f403a/examples/sdio/sdio_fatfs/inc/at32_sdio.h
View File

@@ -38,11 +38,11 @@ extern "C" {
* @{
*/
/** @addtogroup 403A_SDIO_sdio_fatfs
/** @addtogroup SDIO_sdio_fatfs
* @{
*/
/** @defgroup SDIO_sdio_fatfs_instance_definition
/** @defgroup SDIO_instance_definition
* @{
*/
@@ -52,7 +52,7 @@ extern "C" {
* @}
*/
/** @defgroup SDIO_sdio_fatfs_exported_types
/** @defgroup SDIO_exported_types
* @{
*/
@@ -242,11 +242,13 @@ typedef struct
uint8_t card_type;
} sd_card_info_struct_type;
extern sd_card_info_struct_type sd_card_info;
/**
* @}
*/
/** @defgroup SDIO_sdio_fatfs_command_index_definition
/** @defgroup SDIO_command_index_definition
* @{
*/
@@ -327,7 +329,7 @@ typedef struct
* @}
*/
/** @defgroup SDIO_sdio_fatfs_paremeters_definition
/** @defgroup SDIO_paremeters_definition
* @{
*/
@@ -338,13 +340,12 @@ typedef struct
#define SDIO_STATIC_FLAGS ((uint32_t)0x000005FF)
#define SDIO_CMD0TIMEOUT ((uint32_t)0x00010000)
#define SDIO_DATATIMEOUT ((uint32_t)0xFFFFFFFF)
#define SDIO_FIFO_Address ((uint32_t)0x40018080)
/**
* @}
*/
/** @defgroup SDIO_sdio_fatfs_response_definition
/** @defgroup SDIO_response_definition
* @{
*/
@@ -357,10 +358,10 @@ typedef struct
#define SD_OCR_ERASE_SEQ_ERR ((uint32_t)0x10000000)
#define SD_OCR_INVALID_ERASE_PARAM ((uint32_t)0x08000000)
#define SD_OCR_WR_PROTECT_VIOLATION ((uint32_t)0x04000000)
#define SD_OCR_LOCK_UNLOCK_ERROR ((uint32_t)0x01000000)
#define SD_OCR_CMD_CRC_ERROR ((uint32_t)0x00800000)
#define SD_OCR_LOCK_UNLOCK_ERROR ((uint32_t)0x01000000)
#define SD_OCR_CMD_CRC_ERROR ((uint32_t)0x00800000)
#define SD_OCR_ILLEGAL_CMD ((uint32_t)0x00400000)
#define SD_OCR_CARD_ECC_ERROR ((uint32_t)0x00200000)
#define SD_OCR_CARD_ECC_ERROR ((uint32_t)0x00200000)
#define SD_OCR_CARD_CONTROLLER_ERR ((uint32_t)0x00100000)
#define SD_OCR_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00080000)
#define SD_OCR_STREAM_RD_UNDERRUN ((uint32_t)0x00040000)
@@ -385,12 +386,12 @@ typedef struct
*/
#define SD_R6_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00002000)
#define SD_R6_ILLEGAL_CMD ((uint32_t)0x00004000)
#define SD_R6_CMD_CRC_ERROR ((uint32_t)0x00008000)
#define SD_R6_CMD_CRC_ERROR ((uint32_t)0x00008000)
#define SD_VOLTAGE_WINDOW_SD ((uint32_t)0x80100000)
#define SD_HIGH_CAPACITY ((uint32_t)0x40000000)
#define SD_STD_CAPACITY ((uint32_t)0x00000000)
#define SD_CHECK_PATTERN ((uint32_t)0x000001AA)
#define SD_VOLTAGE_WINDOW_MMC ((uint32_t)0x80FF8000)
#define SD_VOLTAGE_WINDOW_MMC ((uint32_t)0x40FF8000)
#define SD_MAX_VOLT_TRIAL ((uint32_t)0x000000FF)
#define SD_ALLZERO ((uint32_t)0x00000000)
#define SD_WIDE_BUS_SUPPORT ((uint32_t)0x00040000)
@@ -411,7 +412,7 @@ typedef struct
* @}
*/
/** @defgroup SDIO_sdio_fatfs_command_class_definition
/** @defgroup SDIO_command_class_definition
* @{
*/
@@ -426,7 +427,7 @@ typedef struct
* @}
*/
/** @defgroup SDIO_sdio_fatfs_cmd8_definition
/** @defgroup SDIO_cmd8_definition
* @{
*/
@@ -439,7 +440,7 @@ typedef struct
* @}
*/
/** @defgroup SDIO_sdio_fatfs_mmc_extend_definition
/** @defgroup SDIO_mmc_extend_definition
* @{
*/
@@ -465,7 +466,7 @@ typedef struct
* @}
*/
/** @defgroup SDIO_sdio_fatfs_interrupt_flags_definition
/** @defgroup SDIO_interrupt_flags_definition
* @{
*/
@@ -477,9 +478,7 @@ typedef struct
* @}
*/
extern sd_card_info_struct_type sd_card_info;
/** @defgroup SDIO_sdio_fatfs_exported_functions
/** @defgroup SDIO_exported_functions
* @{
*/
@@ -522,3 +521,4 @@ void sd_dma_config(uint32_t *mbuf, uint32_t buf_size, dma_dir_type dir);
#endif
#endif /* __AT32_SDIO_H */

2
project/at_start_f403a/examples/sdio/sdio_fatfs/mdk_v5/sdio_fatfs.uvprojx
View File

@@ -324,7 +324,7 @@
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>

129
project/at_start_f403a/examples/sdio/sdio_fatfs/src/at32_sdio.c
View File

@@ -40,6 +40,7 @@ sdio_data_struct_type sdio_data_init_struct;
static sd_memory_card_type card_type = SDIO_STD_CAPACITY_SD_CARD_V1_1; /* sd card type */
static uint32_t csd_table[4], cid_table[4], rca = 0; /* csd, sid, rca */
static uint32_t ext_csd_table[128];
static sd_data_transfer_mode_type device_mode = SD_TRANSFER_POLLING_MODE; /* working mode */
static uint8_t stop_flag = 0; /* transmit stop flag */
volatile sd_error_status_type transfer_error = SD_OK; /* transmit error flag */
@@ -59,6 +60,7 @@ sd_error_status_type mmc_switch(uint8_t set, uint8_t index, uint8_t value);
sd_error_status_type sd_switch(uint32_t mode, uint32_t group, uint8_t value, uint8_t *rsp);
sd_error_status_type check_card_programming(uint8_t *p_status);
sd_error_status_type speed_change(uint8_t speed);
sd_error_status_type get_ext_csd(void);
sd_error_status_type scr_find(void);
uint8_t convert_from_bytes_to_power_of_two(uint16_t number_of_bytes);
@@ -120,6 +122,7 @@ sd_error_status_type sd_init(void)
if((SDIO_MULTIMEDIA_CARD == card_type) && (sd_card_info.sd_csd_reg.spec_version >= 4))
{
card_type = SDIO_HIGH_SPEED_MULTIMEDIA_CARD;
sd_card_info.card_type = (uint8_t)card_type;
}
if(status == SD_OK)
@@ -127,7 +130,27 @@ sd_error_status_type sd_init(void)
/* select card */
status = sd_deselect_select((uint32_t)(sd_card_info.rca << 16));
}
if(status == SD_OK)
{
if(SDIO_HIGH_SPEED_MULTIMEDIA_CARD == card_type)
{
if(sd_card_info.sd_csd_reg.device_size == 0xFFF)
{
uint32_t sec_count;
/* get ext_csd function for support emmc card. */
status = get_ext_csd();
if(status == SD_OK)
{
card_type = SDIO_HIGH_CAPACITY_MMC_CARD;
sd_card_info.card_type = (uint8_t)card_type;
sec_count = ext_csd_table[212/4];
sd_card_info.card_capacity = (uint64_t)sec_count*512;
}
}
}
}
if(status == SD_OK && ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == card_type) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == card_type) || \
(SDIO_SECURE_DIGITAL_IO_COMBO_CARD == card_type) || (SDIO_HIGH_CAPACITY_SD_CARD == card_type)))
{
@@ -228,7 +251,8 @@ sd_error_status_type sd_power_on(void)
sdio_power_set(SDIOx, SDIO_POWER_ON);
/* enable to output sdio_ck */
sdio_clock_enable(SDIOx, TRUE);
delay_ms(10);
for(retry = 0; retry < 5; retry++)
{
/* send cmd0, get in idle stage */
@@ -742,7 +766,7 @@ sd_error_status_type sd_wide_bus_operation_config(sdio_bus_width_type mode)
{
sd_error_status_type status = SD_OK;
if((card_type == SDIO_MULTIMEDIA_CARD) || (card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD))
if(card_type == SDIO_MULTIMEDIA_CARD || card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD || card_type == SDIO_HIGH_CAPACITY_MMC_CARD)
{
status = mmc_switch(EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, (uint8_t)mode);
}
@@ -808,7 +832,7 @@ sd_error_status_type sd_deselect_select(uint32_t addr)
sdio_command_init_struct.argument = addr;
sdio_command_init_struct.cmd_index = SD_CMD_SEL_DESEL_CARD;
sdio_command_init_struct.rsp_type = SDIO_RESPONSE_SHORT;
sdio_command_init_struct.wait_type = SDIO_WAIT_FOR_INT;
sdio_command_init_struct.wait_type = SDIO_WAIT_FOR_NO;
/* sdio command config */
sdio_command_config(SDIOx, &sdio_command_init_struct);
@@ -851,10 +875,10 @@ sd_error_status_type sdio_command_data_send(sdio_command_struct_type *sdio_cmd_i
{
if(sdio_data_init_t->transfer_direction == SDIO_DATA_TRANSFER_TO_CONTROLLER)
{
sd_dma_config(buf, length, DMA_DIR_PERIPHERAL_TO_MEMORY);
SDIOx->inten |= SDIO_INTR_STS_READ_MASK;
transfer_error = SD_OK;
transfer_end = 0;
sd_dma_config(buf, length, DMA_DIR_PERIPHERAL_TO_MEMORY);
SDIOx->inten |= SDIO_INTR_STS_READ_MASK;
sdio_dma_enable(SDIOx, TRUE);
}
}
@@ -987,10 +1011,10 @@ sd_error_status_type sdio_command_data_send(sdio_command_struct_type *sdio_cmd_i
{
if(sdio_data_init_t->transfer_direction == SDIO_DATA_TRANSFER_TO_CARD)
{
sd_dma_config(buf, length, DMA_DIR_MEMORY_TO_PERIPHERAL);
SDIOx->inten |= SDIO_INTR_STS_WRITE_MASK;
transfer_error = SD_OK;
transfer_end = 0;
sd_dma_config(buf, length, DMA_DIR_MEMORY_TO_PERIPHERAL);
SDIOx->inten |= SDIO_INTR_STS_WRITE_MASK;
sdio_dma_enable(SDIOx, TRUE);
}
@@ -1061,7 +1085,7 @@ sd_error_status_type sd_blocks_erase(long long addr, uint32_t nblks)
return SD_LOCK_UNLOCK_ERROR;
}
if(card_type == SDIO_MULTIMEDIA_CARD || card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD)
if(card_type == SDIO_MULTIMEDIA_CARD || card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD || card_type == SDIO_HIGH_CAPACITY_MMC_CARD)
{
/* send cmd35, set erase group start */
sdio_command_init_struct.argument = start_addr;
@@ -1196,7 +1220,7 @@ sd_error_status_type sd_block_read(uint8_t *buf, long long addr, uint16_t blk_si
SDIOx->dtctrl = 0x0;
if(card_type == SDIO_HIGH_CAPACITY_SD_CARD)
if((card_type == SDIO_HIGH_CAPACITY_SD_CARD) || (card_type == SDIO_HIGH_CAPACITY_MMC_CARD))
{
blk_size = 512;
addr >>= 9;
@@ -1280,7 +1304,7 @@ sd_error_status_type sd_mult_blocks_read(uint8_t *buf, long long addr, uint16_t
SDIOx->dtctrl = 0x0;
if(card_type == SDIO_HIGH_CAPACITY_SD_CARD)
if((card_type == SDIO_HIGH_CAPACITY_SD_CARD) || (card_type == SDIO_HIGH_CAPACITY_MMC_CARD))
{
blk_size = 512;
addr >>= 9;
@@ -1393,7 +1417,7 @@ sd_error_status_type sd_block_write(const uint8_t *buf, long long addr, uint16_t
return SD_LOCK_UNLOCK_ERROR;
}
if(card_type == SDIO_HIGH_CAPACITY_SD_CARD)
if((card_type == SDIO_HIGH_CAPACITY_SD_CARD) || (card_type == SDIO_HIGH_CAPACITY_MMC_CARD))
{
blk_size = 512;
addr >>= 9;
@@ -1515,7 +1539,7 @@ sd_error_status_type sd_mult_blocks_write(const uint8_t *buf, long long addr, ui
return SD_LOCK_UNLOCK_ERROR;
}
if(card_type == SDIO_HIGH_CAPACITY_SD_CARD)
if((card_type == SDIO_HIGH_CAPACITY_SD_CARD) || (card_type == SDIO_HIGH_CAPACITY_MMC_CARD))
{
blk_size = 512;
addr >>= 9;
@@ -1656,7 +1680,7 @@ sd_error_status_type mmc_stream_read(uint8_t *buf, long long addr, uint32_t len)
/* clear dcsm configuration */
sdio_data_init_struct.block_size = SDIO_DATA_BLOCK_SIZE_1B;
sdio_data_init_struct.data_length = 0 ;
sdio_data_init_struct.data_length = 0;
sdio_data_init_struct.timeout = SD_DATATIMEOUT ;
sdio_data_init_struct.transfer_direction = SDIO_DATA_TRANSFER_TO_CARD;
sdio_data_init_struct.transfer_mode = SDIO_DATA_STREAM_TRANSFER;
@@ -1677,7 +1701,7 @@ sd_error_status_type mmc_stream_read(uint8_t *buf, long long addr, uint32_t len)
sdio_command_init_struct.rsp_type = SDIO_RESPONSE_SHORT;
sdio_command_init_struct.wait_type = SDIO_WAIT_FOR_NO;
sdio_data_init_struct.block_size = (sdio_block_size_type)(5 << 4);
sdio_data_init_struct.block_size = SDIO_DATA_BLOCK_SIZE_1B;
sdio_data_init_struct.data_length = len;
sdio_data_init_struct.timeout = SD_DATATIMEOUT ;
sdio_data_init_struct.transfer_direction = SDIO_DATA_TRANSFER_TO_CONTROLLER;
@@ -1732,7 +1756,7 @@ sd_error_status_type mmc_stream_write(uint8_t *buf, long long addr, uint32_t len
sdio_command_init_struct.wait_type = SDIO_WAIT_FOR_NO;
sdio_data_init_struct.block_size = (sdio_block_size_type)(15 << 4);
sdio_data_init_struct.block_size = SDIO_DATA_BLOCK_SIZE_1B;
sdio_data_init_struct.data_length = len;
sdio_data_init_struct.timeout = SD_DATATIMEOUT ;
sdio_data_init_struct.transfer_direction = SDIO_DATA_TRANSFER_TO_CARD;
@@ -2498,6 +2522,77 @@ sd_card_state_type sd_state_get(void)
}
}
/**
* @brief find the sd card ext csd register value.
* @retval sd_error_status_type: sd card error code.
*/
sd_error_status_type get_ext_csd(void)
{
uint32_t index = 0, sts_reg = 0;
sd_error_status_type status = SD_OK;
uint32_t *tmp_ext_csd = ext_csd_table;
sdio_data_init_struct.block_size = SDIO_DATA_BLOCK_SIZE_512B;
sdio_data_init_struct.data_length = 512;
sdio_data_init_struct.timeout = SD_DATATIMEOUT;
sdio_data_init_struct.transfer_direction = SDIO_DATA_TRANSFER_TO_CONTROLLER;
sdio_data_init_struct.transfer_mode = SDIO_DATA_BLOCK_TRANSFER;
sdio_data_config(SDIOx, &sdio_data_init_struct);
sdio_data_state_machine_enable(SDIOx, TRUE);
/* send cmd8 */
sdio_command_init_struct.argument = 0x0;
sdio_command_init_struct.cmd_index = SD_CMD_HS_SEND_EXT_CSD;
sdio_command_init_struct.rsp_type = SDIO_RESPONSE_SHORT;
sdio_command_init_struct.wait_type = SDIO_WAIT_FOR_NO;
/* sdio command config */
sdio_command_config(SDIOx, &sdio_command_init_struct);
/* enable ccsm */
sdio_command_state_machine_enable(SDIOx, TRUE);
status = command_rsp1_error(SD_CMD_HS_SEND_EXT_CSD);
if(status != SD_OK)
{
return status;
}
sts_reg = SDIOx->sts;
while(!(sts_reg & (SDIO_RXERRO_FLAG | SDIO_DTFAIL_FLAG | SDIO_DTTIMEOUT_FLAG | SDIO_DTBLKCMPL_FLAG | SDIO_SBITERR_FLAG)))
{
if(sdio_flag_get(SDIOx, SDIO_RXBUF_FLAG) != RESET)
{
*(tmp_ext_csd + index) = sdio_data_read(SDIOx);
index++;
}
sts_reg = SDIOx->sts;
}
if(sdio_flag_get(SDIOx, SDIO_DTTIMEOUT_FLAG) != RESET)
{
sdio_flag_clear(SDIOx, SDIO_DTTIMEOUT_FLAG);
return SD_DATA_TIMEOUT;
}
else if(sdio_flag_get(SDIOx, SDIO_DTFAIL_FLAG) != RESET)
{
sdio_flag_clear(SDIOx, SDIO_DTFAIL_FLAG);
return SD_DATA_FAIL;
}
else if(sdio_flag_get(SDIOx, SDIO_RXERRO_FLAG) != RESET)
{
sdio_flag_clear(SDIOx, SDIO_RXERRO_FLAG);
return SD_RX_OVERRUN;
}
else if(sdio_flag_get(SDIOx, SDIO_SBITERR_FLAG) != RESET)
{
sdio_flag_clear(SDIOx, SDIO_SBITERR_FLAG);
return SD_START_BIT_ERR;
}
sdio_flag_clear(SDIOx, SDIO_STATIC_FLAGS);
return status;
}
/**
* @brief find the sd card scr register value.
* @retval sd_error_status_type: sd card error code.
@@ -2662,7 +2757,7 @@ sd_error_status_type speed_change(uint8_t speed)
return SD_ERROR;
}
}
else if(card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD)
else if(card_type == SDIO_HIGH_SPEED_MULTIMEDIA_CARD || card_type == SDIO_HIGH_CAPACITY_MMC_CARD)
{
status = mmc_switch(EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, (uint8_t)speed);

171
project/at_start_f403a/templates/at32_ide/.cproject
View File

@@ -14,40 +14,43 @@
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</storageModule>
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<listOptionValue builtIn="false" value="&quot;../../../../../libraries/cmsis/cm4/core_support/&quot;"/>
<listOptionValue builtIn="false" value="&quot;../../../../at32f403a_407_board/&quot;"/>
@@ -55,48 +58,48 @@
<listOptionValue builtIn="false" value="&quot;../../../../../libraries/cmsis/cm4/device_support/startup/gcc&quot;"/>
<listOptionValue builtIn="false" value="&quot;../../../../../libraries/cmsis/cm4/device_support/&quot;"/>
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<listOptionValue builtIn="false" value="OS_USE_TRACE_SEMIHOSTING_DEBUG"/>
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<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.printsize.1780254647" name="GNU Arm Cross Print Size" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.printsize">
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format.1526792979" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format"/>
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format.1526792979" name="Size format" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format"/>
</tool>
</toolChain>
</folderInfo>
@@ -117,86 +120,86 @@
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4
project/at_start_f403a/templates/at32_ide/.settings/language.settings.xml
View File

@@ -5,7 +5,7 @@
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1731269273129422693" id="org.eclipse.embedcdt.managedbuild.cross.arm.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Arm Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1177565813694130007" id="org.eclipse.embedcdt.managedbuild.cross.arm.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Arm Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
@@ -16,7 +16,7 @@
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1754814433235227471" id="org.eclipse.embedcdt.managedbuild.cross.arm.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Arm Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1194062654190688253" id="org.eclipse.embedcdt.managedbuild.cross.arm.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Arm Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>

14
project/at_start_f403a/templates/at32_ide/ldscripts/AT32F403AxG_FLASH.ld
View File

@@ -33,6 +33,7 @@ MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
SPIM (rx) : ORIGIN = 0x08400000, LENGTH = 16384K
}
/* Define output sections */
@@ -115,6 +116,19 @@ SECTIONS
_edata = .; /* define a global symbol at data end */
} >RAM AT> FLASH
_spim_init_base = LOADADDR(.spim);
_spim_init_length = SIZEOF(.spim);
.spim :
{
. = ALIGN(4);
_spim_start = .; /* create a global symbol at spim start */
*(.spim) /* .spim sections */
*(.spim*) /* .spim* sections */
. = ALIGN(4);
_spim_end = .; /* define a global symbols at end of spim */
} >SPIM
/* Uninitialized data section */
. = ALIGN(4);
.bss :

4
project/at_start_f403a/templates/eclipse_gcc/template/.cproject
View File

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4
project/at_start_f403a/templates/eclipse_gcc/template/.settings/language.settings.xml
View File

@@ -5,7 +5,7 @@
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<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="363393100321850142" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
@@ -16,7 +16,7 @@
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<language-scope id="org.eclipse.cdt.core.gcc"/>
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