diff --git a/AT32F403A_407_periph_lib_V2.2.0.chm b/AT32F403A_407_periph_lib_V2.2.1.chm similarity index 72% rename from AT32F403A_407_periph_lib_V2.2.0.chm rename to AT32F403A_407_periph_lib_V2.2.1.chm index 6b8a019e..cad424ae 100644 Binary files a/AT32F403A_407_periph_lib_V2.2.0.chm and b/AT32F403A_407_periph_lib_V2.2.1.chm differ diff --git a/document/AT32F403A_407_firmware_BSP&Pack_user_guide_EN_V2.0.8.pdf b/document/AT32F403A_407_firmware_BSP&Pack_user_guide_EN_V2.0.8.pdf deleted file mode 100644 index 5d730e13..00000000 Binary files a/document/AT32F403A_407_firmware_BSP&Pack_user_guide_EN_V2.0.8.pdf and /dev/null differ diff --git a/document/AT32F403A_407固件库BSP&Pack应用指南.pdf b/document/AT32F403A_407固件库BSP&Pack应用指南.pdf index 09c6a6b0..50870d5d 100644 Binary files a/document/AT32F403A_407固件库BSP&Pack应用指南.pdf and b/document/AT32F403A_407固件库BSP&Pack应用指南.pdf differ diff --git a/document/ReleaseNotes_AT32F403A_407_Firmware_Library.pdf b/document/ReleaseNotes_AT32F403A_407_Firmware_Library.pdf new file mode 100644 index 00000000..b88e5e26 Binary files /dev/null and b/document/ReleaseNotes_AT32F403A_407_Firmware_Library.pdf differ diff --git a/document/ReleaseNotes_AT32F403A_407_Firmware_Library_Drivers_EN_V2.0.6.pdf b/document/ReleaseNotes_AT32F403A_407_Firmware_Library_Drivers_EN_V2.0.6.pdf deleted file mode 100644 index e9bfec88..00000000 Binary files a/document/ReleaseNotes_AT32F403A_407_Firmware_Library_Drivers_EN_V2.0.6.pdf and /dev/null differ diff --git a/document/ReleaseNotes_AT32F403A_407_Firmware_Library_EN_V2.2.0.pdf b/document/ReleaseNotes_AT32F403A_407_Firmware_Library_EN_V2.2.0.pdf deleted file mode 100644 index 1b5d802d..00000000 Binary files a/document/ReleaseNotes_AT32F403A_407_Firmware_Library_EN_V2.2.0.pdf and /dev/null differ diff --git a/libraries/cmsis/cm4/device_support/at32f403a_407.h b/libraries/cmsis/cm4/device_support/at32f403a_407.h index d00f757b..955eaa3f 100644 --- a/libraries/cmsis/cm4/device_support/at32f403a_407.h +++ b/libraries/cmsis/cm4/device_support/at32f403a_407.h @@ -161,7 +161,7 @@ extern "C" { */ #define __AT32F403A_407_LIBRARY_VERSION_MAJOR (0x02) /*!< [31:24] major version */ #define __AT32F403A_407_LIBRARY_VERSION_MIDDLE (0x02) /*!< [23:16] middle version */ -#define __AT32F403A_407_LIBRARY_VERSION_MINOR (0x00) /*!< [15:8] minor version */ +#define __AT32F403A_407_LIBRARY_VERSION_MINOR (0x01) /*!< [15:8] minor version */ #define __AT32F403A_407_LIBRARY_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __AT32F403A_407_LIBRARY_VERSION ((__AT32F403A_407_LIBRARY_VERSION_MAJOR << 24) | \ (__AT32F403A_407_LIBRARY_VERSION_MIDDLE << 16) | \ diff --git a/libraries/drivers/ReleaseNotes_AT32F403A_407_Firmware_Library_Drivers.pdf b/libraries/drivers/ReleaseNotes_AT32F403A_407_Firmware_Library_Drivers.pdf index 638c90f0..370a1af6 100644 Binary files a/libraries/drivers/ReleaseNotes_AT32F403A_407_Firmware_Library_Drivers.pdf and b/libraries/drivers/ReleaseNotes_AT32F403A_407_Firmware_Library_Drivers.pdf differ diff --git a/libraries/drivers/inc/at32f403a_407_gpio.h b/libraries/drivers/inc/at32f403a_407_gpio.h index 27cbb1f4..a4aaac5b 100644 --- a/libraries/drivers/inc/at32f403a_407_gpio.h +++ b/libraries/drivers/inc/at32f403a_407_gpio.h @@ -911,6 +911,7 @@ flag_status gpio_output_data_bit_read(gpio_type *gpio_x, uint16_t pins); uint16_t gpio_output_data_read(gpio_type *gpio_x); void gpio_bits_set(gpio_type *gpio_x, uint16_t pins); void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins); +void gpio_bits_toggle(gpio_type *gpio_x, uint16_t pins); void gpio_bits_write(gpio_type *gpio_x, uint16_t pins, confirm_state bit_state); void gpio_port_write(gpio_type *gpio_x, uint16_t port_value); void gpio_pin_wp_config(gpio_type *gpio_x, uint16_t pins); diff --git a/libraries/drivers/src/at32f403a_407_flash.c b/libraries/drivers/src/at32f403a_407_flash.c index fb6a0b94..453aefe1 100644 --- a/libraries/drivers/src/at32f403a_407_flash.c +++ b/libraries/drivers/src/at32f403a_407_flash.c @@ -392,7 +392,7 @@ void flash_spim_unlock(void) { FLASH->unlock3 = FLASH_UNLOCK_KEY1; FLASH->unlock3 = FLASH_UNLOCK_KEY2; - UNUSED(*(__IO uint32_t*)USD_BASE); + UNUSED(*(__IO uint32_t*)USD_BASE); } /** @@ -1036,8 +1036,8 @@ void flash_interrupt_enable(uint32_t flash_int, confirm_state new_state) */ void flash_spim_model_select(flash_spim_model_type mode) { + UNUSED(*(__IO uint32_t*)USD_BASE); FLASH->select = mode; - /* dummy read */ flash_spim_dummy_read(); } diff --git a/libraries/drivers/src/at32f403a_407_gpio.c b/libraries/drivers/src/at32f403a_407_gpio.c index a71b8b30..a24bee71 100644 --- a/libraries/drivers/src/at32f403a_407_gpio.c +++ b/libraries/drivers/src/at32f403a_407_gpio.c @@ -341,6 +341,37 @@ void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins) gpio_x->clr = pins; } +/** + * @brief toggle the selected data port bits. + * @param gpio_x: to select the gpio peripheral. + * this parameter can be one of the following values: + * GPIOA, GPIOB, GPIOC, GPIOD, GPIOE. + * @param pins: gpio pin number + * parameter can be any combination of gpio_pin_x, gpio_pin_x as following values: + * - GPIO_PINS_0 + * - GPIO_PINS_1 + * - GPIO_PINS_2 + * - GPIO_PINS_3 + * - GPIO_PINS_4 + * - GPIO_PINS_5 + * - GPIO_PINS_6 + * - GPIO_PINS_7 + * - GPIO_PINS_8 + * - GPIO_PINS_9 + * - GPIO_PINS_10 + * - GPIO_PINS_11 + * - GPIO_PINS_12 + * - GPIO_PINS_13 + * - GPIO_PINS_14 + * - GPIO_PINS_15 + * - GPIO_PINS_ALL + * @retval none + */ +void gpio_bits_toggle(gpio_type *gpio_x, uint16_t pins) +{ + gpio_x->odt ^= pins; +} + /** * @brief set or clear the selected data port bit. * @param gpio_x: to select the gpio peripheral. diff --git a/libraries/drivers/src/at32f403a_407_rtc.c b/libraries/drivers/src/at32f403a_407_rtc.c index 0c62ac84..b58750fb 100644 --- a/libraries/drivers/src/at32f403a_407_rtc.c +++ b/libraries/drivers/src/at32f403a_407_rtc.c @@ -58,11 +58,11 @@ void rtc_counter_set(uint32_t counter_value) } /** - * @brief rtc counter get + * @brief rtc lowlevel counter get * @param none * @retval rtc counter */ -uint32_t rtc_counter_get(void) +uint32_t rtc_lowlevel_counter_get(void) { uint32_t cnt = 0; @@ -72,6 +72,28 @@ uint32_t rtc_counter_get(void) return cnt; } +/** + * @brief rtc counter get + * @param none + * @retval rtc counter + */ +uint32_t rtc_counter_get(void) +{ + uint32_t cnt1 = 0; + uint32_t cnt2 = 0; + + while(1) + { + cnt1 = rtc_lowlevel_counter_get(); + cnt2 = rtc_lowlevel_counter_get(); + + if(cnt1 == cnt2) + { + return cnt1; + } + } +} + /** * @brief rtc divider set * @param div_value (0x0000_0000 ~ 0x000F_FFFF) diff --git a/libraries/drivers/src/at32f403a_407_usart.c b/libraries/drivers/src/at32f403a_407_usart.c index bece228e..ac144328 100644 --- a/libraries/drivers/src/at32f403a_407_usart.c +++ b/libraries/drivers/src/at32f403a_407_usart.c @@ -104,7 +104,7 @@ void usart_reset(usart_type* usart_x) * this parameter can be one of the following values: * - USART_DATA_8BITS * - USART_DATA_9BITS. - * note： + * note: * - when parity check is disabled, the data bit width is the actual data bit number. * - when parity check is enabled, the data bit width is the actual data bit number minus 1, and the MSB bit is replaced with the parity bit. * @param stop_bit: stop bits transmitted diff --git a/middlewares/3rd_party/lwip_2.1.2/src/core/dns.c b/middlewares/3rd_party/lwip_2.1.2/src/core/dns.c index e9d7c49b..15fd71fb 100644 --- a/middlewares/3rd_party/lwip_2.1.2/src/core/dns.c +++ b/middlewares/3rd_party/lwip_2.1.2/src/core/dns.c @@ -98,7 +98,7 @@ #include #ifndef DNS_SERVER_ADDRESS -#define DNS_SERVER_ADDRESS(ipaddr) (ip4_addr_set_u32(ipaddr, ipaddr_addr("192.168.2.235"))) +#define DNS_SERVER_ADDRESS(ipaddr) (ip4_addr_set_u32(ipaddr, ipaddr_addr("114.114.114.114"))) #endif /** Fix error, LwIP 2.1.2 need to define LWIP_RAND by users */ diff --git a/project/at_start_f403a/examples/i2s/fullduplex_dma/readme.txt b/project/at_start_f403a/examples/i2s/fullduplex_dma/readme.txt index afc309c9..7ec1af9e 100644 --- a/project/at_start_f403a/examples/i2s/fullduplex_dma/readme.txt +++ b/project/at_start_f403a/examples/i2s/fullduplex_dma/readme.txt @@ -14,4 +14,5 @@ - pb14(miso_ext) rx <---> pc11(miso_ext) tx - pb15(mosi) tx <---> pc12(mosi) rx - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f403a/examples/i2s/fullduplex_dma/src/main.c b/project/at_start_f403a/examples/i2s/fullduplex_dma/src/main.c index 3da89b93..fbe9c333 100644 --- a/project/at_start_f403a/examples/i2s/fullduplex_dma/src/main.c +++ b/project/at_start_f403a/examples/i2s/fullduplex_dma/src/main.c @@ -43,11 +43,6 @@ uint16_t i2s3_buffer_tx[TXBUF_SIZE]; uint16_t i2s3_buffer_rx[RXBUF_SIZE]; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; -static void gpio_config(void); -static void i2s_config(void); -void tx_data_fill(void); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param none @@ -84,25 +79,18 @@ void tx_data_fill(void) } /** - * @brief i2s configuration. + * @brief dma configuration. * @param none * @retval none */ -static void i2s_config(void) +static void dma_config(void) { dma_init_type dma_init_struct; - i2s_init_type i2s_init_struct; crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); + + /* use dma1_channel1 as spi2 transmit channel */ dma_reset(DMA1_CHANNEL1); - dma_reset(DMA1_CHANNEL2); - dma_reset(DMA1_CHANNEL3); - dma_reset(DMA1_CHANNEL4); - dma_flexible_config(DMA1, FLEX_CHANNEL1, DMA_FLEXIBLE_SPI2_TX); - dma_flexible_config(DMA1, FLEX_CHANNEL2, DMA_FLEXIBLE_I2S2EXT_RX); - dma_flexible_config(DMA1, FLEX_CHANNEL3, DMA_FLEXIBLE_SPI3_RX); - dma_flexible_config(DMA1, FLEX_CHANNEL4, DMA_FLEXIBLE_I2S3EXT_TX); - dma_default_para_init(&dma_init_struct); dma_init_struct.buffer_size = TXBUF_SIZE; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; @@ -111,54 +99,113 @@ static void i2s_config(void) dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_HIGH; dma_init_struct.loop_mode_enable = FALSE; - dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_tx; dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt); dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; dma_init(DMA1_CHANNEL1, &dma_init_struct); - + dma_flexible_config(DMA1, FLEX_CHANNEL1, DMA_FLEXIBLE_SPI2_TX); + + /* use dma1_channel2 as spi2 receive channel */ + dma_reset(DMA1_CHANNEL2); + dma_init_struct.buffer_size = RXBUF_SIZE; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_HIGH; + dma_init_struct.loop_mode_enable = FALSE; dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx; dma_init_struct.peripheral_base_addr = (uint32_t)&(I2S2EXT->dt); dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init(DMA1_CHANNEL2, &dma_init_struct); - + dma_flexible_config(DMA1, FLEX_CHANNEL2, DMA_FLEXIBLE_I2S2EXT_RX); + + /* use dma1_channel3 as spi3 receive channel */ + dma_reset(DMA1_CHANNEL3); + dma_init_struct.buffer_size = RXBUF_SIZE; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_HIGH; + dma_init_struct.loop_mode_enable = FALSE; dma_init_struct.memory_base_addr = (uint32_t)i2s3_buffer_rx; dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt); dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init(DMA1_CHANNEL3, &dma_init_struct); - + dma_flexible_config(DMA1, FLEX_CHANNEL3, DMA_FLEXIBLE_SPI3_RX); + + /* use dma1_channel4 as spi3 transmit channel */ + dma_reset(DMA1_CHANNEL4); + dma_init_struct.buffer_size = TXBUF_SIZE; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_HIGH; + dma_init_struct.loop_mode_enable = FALSE; dma_init_struct.memory_base_addr = (uint32_t)i2s3_buffer_tx; dma_init_struct.peripheral_base_addr = (uint32_t)&(I2S3EXT->dt); dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; dma_init(DMA1_CHANNEL4, &dma_init_struct); + dma_flexible_config(DMA1, FLEX_CHANNEL4, DMA_FLEXIBLE_I2S3EXT_TX); +} - crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); +/** + * @brief i2s configuration. + * @param none + * @retval none + */ +static void i2s_config(void) +{ + i2s_init_type i2s_init_struct; + + /* master i2s initialization */ crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); i2s_default_para_init(&i2s_init_struct); + + /* i2s2 as master transmission */ i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; - i2s_init_struct.mclk_output_enable = FALSE; + i2s_init_struct.mclk_output_enable = TRUE; i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K; i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; - i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX; i2s_init(SPI2, &i2s_init_struct); + + /* i2s2ext as slave reception */ i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX; i2s_init(I2S2EXT, &i2s_init_struct); - - i2s_init_struct.operation_mode = I2S_MODE_SLAVE_RX; - i2s_init(SPI3, &i2s_init_struct); - i2s_init_struct.operation_mode =I2S_MODE_SLAVE_TX; - i2s_init(I2S3EXT, &i2s_init_struct); - - dma_channel_enable(DMA1_CHANNEL1, TRUE); - dma_channel_enable(DMA1_CHANNEL2, TRUE); - dma_channel_enable(DMA1_CHANNEL3, TRUE); - dma_channel_enable(DMA1_CHANNEL4, TRUE); + + /* use dma transmit and receive */ spi_i2s_dma_transmitter_enable(SPI2, TRUE); spi_i2s_dma_receiver_enable(I2S2EXT, TRUE); + + i2s_enable(SPI2, TRUE); + i2s_enable(I2S2EXT, TRUE); + + /* slave i2s initialization */ + crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); + + /* i2s3 as slave reception */ + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; + i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; + i2s_init_struct.mclk_output_enable = TRUE; + i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K; + i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; + i2s_init_struct.operation_mode = I2S_MODE_SLAVE_RX; + i2s_init(SPI3, &i2s_init_struct); + + /* i2s3ext as slave transmission */ + i2s_init_struct.operation_mode =I2S_MODE_SLAVE_TX; + i2s_init(I2S3EXT, &i2s_init_struct); + + /* use dma transmit and receive */ spi_i2s_dma_receiver_enable(SPI3, TRUE); spi_i2s_dma_transmitter_enable(I2S3EXT, TRUE); + + i2s_enable(SPI3, TRUE); + i2s_enable(I2S3EXT, TRUE); } /** @@ -175,54 +222,56 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); gpio_pin_remap_config(SPI3_GMUX_0001, TRUE); - /* master ws pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); - /* master ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + /* master i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* master ext_sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_14; + /* master i2s sdext pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); - /* master sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + /* master i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); - /* slave ws pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_4; + /* slave i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_4; gpio_init(GPIOA, &gpio_initstructure); - /* slave ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_10; + /* slave i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_10; gpio_init(GPIOC, &gpio_initstructure); - /* slave ext_sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_11; + /* slave i2s sdext pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_11; gpio_init(GPIOC, &gpio_initstructure); - /* slave sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + /* slave i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOC, &gpio_initstructure); } @@ -235,18 +284,31 @@ int main(void) { system_clock_config(); at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); + at32_led_on(LED4); tx_data_fill(); gpio_config(); + dma_config(); i2s_config(); - i2s_enable(SPI3, TRUE); - i2s_enable(I2S3EXT, TRUE); - i2s_enable(I2S2EXT, TRUE); - i2s_enable(SPI2, TRUE); - - while(dma_flag_get(DMA1_FDT2_FLAG) == RESET); + + /* enable i2s slave dma to get and fill data */ + dma_channel_enable(DMA1_CHANNEL3, TRUE); + dma_channel_enable(DMA1_CHANNEL4, TRUE); + + /* enable i2s master dma to get and fill data */ + dma_channel_enable(DMA1_CHANNEL2, TRUE); + dma_channel_enable(DMA1_CHANNEL1, TRUE); + + /* wait master and slave spi data receive end */ + while(dma_flag_get(DMA1_FDT2_FLAG) == RESET) + { + } + while(dma_flag_get(DMA1_FDT3_FLAG) == RESET) + { + } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, TXBUF_SIZE); @@ -259,7 +321,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f403a/examples/i2s/halfduplex_dma/readme.txt b/project/at_start_f403a/examples/i2s/halfduplex_dma/readme.txt index d671128b..daac877b 100644 --- a/project/at_start_f403a/examples/i2s/halfduplex_dma/readme.txt +++ b/project/at_start_f403a/examples/i2s/halfduplex_dma/readme.txt @@ -13,4 +13,5 @@ - pb13 <---> pb3 - pb15 <---> pb5 - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f403a/examples/i2s/halfduplex_dma/src/main.c b/project/at_start_f403a/examples/i2s/halfduplex_dma/src/main.c index 6ba8f71e..739f2a41 100644 --- a/project/at_start_f403a/examples/i2s/halfduplex_dma/src/main.c +++ b/project/at_start_f403a/examples/i2s/halfduplex_dma/src/main.c @@ -44,10 +44,6 @@ uint16_t i2s3_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, uint16_t i2s2_buffer_rx[32]; volatile error_status transfer_status = ERROR; -static void gpio_config(void); -static void i2s_config(void); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer_compare function. * @param none @@ -69,18 +65,18 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf } /** - * @brief i2s configuration. + * @brief dma configuration. * @param none * @retval none */ -static void i2s_config(void) +static void dma_config(void) { dma_init_type dma_init_struct; - i2s_init_type i2s_init_struct; crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE); - dma_reset(DMA1_CHANNEL4); + + /* use dma2_channel2 as spi3 transmit channel */ dma_reset(DMA2_CHANNEL2); dma_default_para_init(&dma_init_struct); dma_init_struct.buffer_size = 32; @@ -94,15 +90,36 @@ static void i2s_config(void) dma_init_struct.priority = DMA_PRIORITY_HIGH; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA2_CHANNEL2, &dma_init_struct); - + + /* use dma1_channel4 as spi2 receive channel */ + dma_reset(DMA1_CHANNEL4); + dma_init_struct.buffer_size = 32; dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; + dma_init_struct.memory_inc_enable = TRUE; dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_HIGH; + dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL4, &dma_init_struct); +} +/** + * @brief i2s configuration. + * @param none + * @retval none + */ +static void i2s_config(void) +{ + i2s_init_type i2s_init_struct; + + /* master i2s initialization */ crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); i2s_default_para_init(&i2s_init_struct); + + /* master transmission mode */ i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; i2s_init_struct.mclk_output_enable = TRUE; @@ -110,14 +127,27 @@ static void i2s_config(void) i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX; i2s_init(SPI3, &i2s_init_struct); - - i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX; + + /* use dma transmit */ + spi_i2s_dma_transmitter_enable(SPI3, TRUE); + + i2s_enable(SPI3, TRUE); + + /* slave i2s initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* slave reception mode */ + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; + i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; + i2s_init_struct.mclk_output_enable = TRUE; + i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K; + i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; + i2s_init_struct.operation_mode = I2S_MODE_SLAVE_RX; i2s_init(SPI2, &i2s_init_struct); - dma_channel_enable(DMA2_CHANNEL2, TRUE); - dma_channel_enable(DMA1_CHANNEL4, TRUE); + /* use dma receive */ spi_i2s_dma_receiver_enable(SPI2, TRUE); - i2s_enable(SPI3, TRUE); + i2s_enable(SPI2, TRUE); } @@ -135,48 +165,50 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); - /* master ws pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOA, &gpio_initstructure); - /* master ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_3; + /* master i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_3; gpio_init(GPIOB, &gpio_initstructure); - /* master sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; + /* master i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOB, &gpio_initstructure); - /* master mck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; + /* master i2s mck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOC, &gpio_initstructure); - /* slave ws pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + /* slave i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); - /* slave ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + /* slave i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* slave sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + /* slave i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); } @@ -189,14 +221,25 @@ int main(void) { system_clock_config(); at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); + at32_led_on(LED4); gpio_config(); + dma_config(); i2s_config(); - spi_i2s_dma_transmitter_enable(SPI3, TRUE); + + /* enable i2s slave dma to get data */ + dma_channel_enable(DMA1_CHANNEL4, TRUE); + + /* enable i2s master dma to fill data */ + dma_channel_enable(DMA2_CHANNEL2, TRUE); - while(dma_flag_get(DMA1_FDT4_FLAG) == RESET); + /* wait slave i2s data receive end */ + while(dma_flag_get(DMA1_FDT4_FLAG) == RESET) + { + } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32); @@ -208,7 +251,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f403a/examples/i2s/halfduplex_interrupt/readme.txt b/project/at_start_f403a/examples/i2s/halfduplex_interrupt/readme.txt index 1bdf287d..56c33715 100644 --- a/project/at_start_f403a/examples/i2s/halfduplex_interrupt/readme.txt +++ b/project/at_start_f403a/examples/i2s/halfduplex_interrupt/readme.txt @@ -13,4 +13,5 @@ - pb13 <---> pb3 - pb15 <---> pb5 - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f403a/examples/i2s/halfduplex_interrupt/src/at32f403a_407_int.c b/project/at_start_f403a/examples/i2s/halfduplex_interrupt/src/at32f403a_407_int.c index c2c48a3c..6645c457 100644 --- a/project/at_start_f403a/examples/i2s/halfduplex_interrupt/src/at32f403a_407_int.c +++ b/project/at_start_f403a/examples/i2s/halfduplex_interrupt/src/at32f403a_407_int.c @@ -24,11 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f403a_407_int.h" -#include "at32f403a_407_board.h" - -extern uint16_t i2s3_buffer_tx[]; -extern uint16_t i2s2_buffer_rx[]; -extern __IO uint32_t tx_index, rx_index; /** @addtogroup AT32F403A_periph_examples * @{ @@ -135,37 +130,6 @@ void SysTick_Handler(void) { } - -/** - * @brief This function handles the spi2 interrupt request. - * @param None - * @retval None - */ - void SPI2_I2S2EXT_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) - { - i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); - } -} - -/** - * @brief This function handles the spi3 interrupt request. - * @param None - * @retval None - */ -void SPI3_I2S3EXT_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI3, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]); - if(tx_index == 32) - { - spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, FALSE); - } - } -} - /** * @} */ diff --git a/project/at_start_f403a/examples/i2s/halfduplex_interrupt/src/main.c b/project/at_start_f403a/examples/i2s/halfduplex_interrupt/src/main.c index ada7f621..5cb49c4e 100644 --- a/project/at_start_f403a/examples/i2s/halfduplex_interrupt/src/main.c +++ b/project/at_start_f403a/examples/i2s/halfduplex_interrupt/src/main.c @@ -44,11 +44,6 @@ uint16_t i2s2_buffer_rx[32]; __IO uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; -static void gpio_config(void); -static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); -error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer_compare function. * @param none @@ -100,15 +95,14 @@ error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint1 static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq) { i2s_init_type i2s_init_struct; - + + /* master i2s initialization */ crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); - nvic_irq_enable(SPI3_I2S3EXT_IRQn, 0, 0); - nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); - spi_i2s_reset(SPI2); spi_i2s_reset(SPI3); i2s_default_para_init(&i2s_init_struct); + + /* master transmission mode */ i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; i2s_init_struct.data_channel_format = format; i2s_init_struct.mclk_output_enable = TRUE; @@ -116,14 +110,26 @@ static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_f i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX; i2s_init(SPI3, &i2s_init_struct); - + + /* enable transmit data buffer empty interrupt */ + spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, TRUE); + + /* slave i2s initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); + spi_i2s_reset(SPI2); + + /* slave reception mode */ + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; + i2s_init_struct.data_channel_format = format; + i2s_init_struct.mclk_output_enable = TRUE; + i2s_init_struct.audio_sampling_freq = freq; + i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX; i2s_init(SPI2, &i2s_init_struct); - + + /* enable receive data buffer full interrupt */ spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE); - spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, TRUE); - i2s_enable(SPI2, TRUE); - i2s_enable(SPI3, TRUE); } /** @@ -140,51 +146,83 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); - /* master ws pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOA, &gpio_initstructure); - /* master ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_3; + /* master i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_3; gpio_init(GPIOB, &gpio_initstructure); - /* master sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; + /* master i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOB, &gpio_initstructure); - /* master mck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; + /* master i2s mck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOC, &gpio_initstructure); - /* slave ws pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + /* slave i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); - /* slave ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + /* slave i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* slave sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + /* slave i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); } +/** + * @brief spi2 interrupt function + * @param none + * @retval none + */ + void SPI2_I2S2EXT_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) + { + i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); + } +} + +/** + * @brief spi3 interrupt function + * @param none + * @retval none + */ +void SPI3_I2S3EXT_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI3, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]); + if(tx_index == 32) + { + spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, FALSE); + } + } +} + /** * @brief main function. * @param none @@ -196,22 +234,45 @@ int main(void) nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); system_clock_config(); at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); + at32_led_on(LED4); gpio_config(); i2s_config(I2S_DATA_16BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_48K); + + /* enable slave and master i2s to start communication */ + i2s_enable(SPI2, TRUE); + i2s_enable(SPI3, TRUE); + + /* wait data receive end */ while(rx_index < 32); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32); - for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0; + /* receive buffer clear */ tx_index = 0; rx_index = 0; - + for(index = 0; index < 32; index++) + { + i2s2_buffer_rx[index] = 0; + } + + /* change frame format */ i2s_config(I2S_DATA_24BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_16K); + + /* enable slave and master i2s to start communication */ + i2s_enable(SPI2, TRUE); + i2s_enable(SPI3, TRUE); + + /* wait data receive end */ while(rx_index < 32); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status2 = buffer_compare_24bits(i2s2_buffer_rx, i2s3_buffer_tx, 32); @@ -223,7 +284,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) diff --git a/project/at_start_f403a/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt b/project/at_start_f403a/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt index f65313d5..8de1a367 100644 --- a/project/at_start_f403a/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt +++ b/project/at_start_f403a/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt @@ -13,4 +13,5 @@ - pb13 <---> pb3 - pb15 <---> pb5 - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f403a/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c b/project/at_start_f403a/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c index a015d7f9..46bdae59 100644 --- a/project/at_start_f403a/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c +++ b/project/at_start_f403a/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c @@ -34,6 +34,9 @@ * @{ */ +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15) + uint16_t i2s3_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718, 0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324, @@ -53,11 +56,6 @@ uint16_t spi2_buffer_rx[32]; __IO uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR, transfer_status3 = ERROR; -static void gpio_config(void); -static void spi_config(void); -static void i2s_config(i2s_operation_mode_type i2s3_mode, i2s_operation_mode_type i2s2_mode); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer_compare function. * @param none @@ -86,13 +84,12 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf static void i2s_config(i2s_operation_mode_type i2s3_mode, i2s_operation_mode_type i2s2_mode) { i2s_init_type i2s_init_struct; - + + /* i2s3 initialization */ crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); - - spi_i2s_reset(SPI2); spi_i2s_reset(SPI3); i2s_default_para_init(&i2s_init_struct); + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; i2s_init_struct.mclk_output_enable = FALSE; @@ -100,7 +97,15 @@ static void i2s_config(i2s_operation_mode_type i2s3_mode, i2s_operation_mode_typ i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode = i2s3_mode; i2s_init(SPI3, &i2s_init_struct); - + + /* i2s2 initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + spi_i2s_reset(SPI2); + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; + i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; + i2s_init_struct.mclk_output_enable = FALSE; + i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K; + i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode =i2s2_mode; i2s_init(SPI2, &i2s_init_struct); } @@ -113,12 +118,13 @@ static void i2s_config(i2s_operation_mode_type i2s3_mode, i2s_operation_mode_typ static void spi_config(void) { spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); - - spi_i2s_reset(SPI2); spi_i2s_reset(SPI3); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode-transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode =SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -128,71 +134,92 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI3, &spi_init_struct); - + + spi_enable(SPI3, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + spi_i2s_reset(SPI2); + + /* dual line unidirectional simplex receive-only mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_SIMPLEX_RX; spi_init_struct.master_slave_mode =SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_16BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); spi_enable(SPI2, TRUE); - spi_enable(SPI3, TRUE); + } /** * @brief gpio configuration. - * @param none + * @param spi_i2s_mode:select spi or i2s to be use + * - 0 (spi mode) + * - 1 (i2s mode) * @retval none */ -static void gpio_config(void) +static void gpio_config(uint16_t spi_i2s_mode) { gpio_init_type gpio_initstructure; crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); - /* master ws pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master ws/cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + if(spi_i2s_mode == 0) + { + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + } + else + { + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + } gpio_init(GPIOA, &gpio_initstructure); + if(spi_i2s_mode == 0) + { + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + } /* master ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_3; + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_3; gpio_init(GPIOB, &gpio_initstructure); /* master sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOB, &gpio_initstructure); - /* master mck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; - gpio_init(GPIOC, &gpio_initstructure); - /* slave ws pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); /* slave ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); /* slave sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); } @@ -206,53 +233,97 @@ int main(void) __IO uint32_t index = 0; system_clock_config(); at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); - gpio_config(); + at32_led_on(LED4); + + /* first: i2s communication */ + gpio_config(1); i2s_config(I2S_MODE_MASTER_TX, I2S_MODE_SLAVE_RX); i2s_enable(SPI2, TRUE); i2s_enable(SPI3, TRUE); while(rx_index < 32) { + /* i2s transmit data fill */ while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]); + + /* i2s receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32); + /* receive buffer clear */ tx_index = 0; rx_index = 0; + for(index = 0; index < 32; index++) + { + i2s2_buffer_rx[index] = 0; + } + + /* second: spi communication */ + gpio_config(0); spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + while(rx_index < 32) { + /* spi transmit data fill */ while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI3, spi3_buffer_tx[tx_index++]); + + /* spi receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ transfer_status2 = buffer_compare(spi2_buffer_rx, spi3_buffer_tx, 32); - for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0; + /* receive buffer clear */ tx_index = 0; rx_index = 0; + for(index = 0; index < 32; index++) + { + i2s2_buffer_rx[index] = 0; + } + + /* third: i2s communication */ + gpio_config(1); i2s_config(I2S_MODE_SLAVE_TX, I2S_MODE_MASTER_RX); + + /* when slave transmission mode,the slave trans data need fill in advance */ while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]); + i2s_enable(SPI3, TRUE); i2s_enable(SPI2, TRUE); while(rx_index < 32) { + /* i2s receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); + + /* i2s transmit data fill */ while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]); } + + /* master half duplex receiving mode,the busy flag isnot usefull */ /* test result:the data check */ transfer_status3 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32); @@ -264,7 +335,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f403a/examples/pwc/deepsleep_rtc/src/main.c b/project/at_start_f403a/examples/pwc/deepsleep_rtc/src/main.c index b9e0189c..044f2672 100644 --- a/project/at_start_f403a/examples/pwc/deepsleep_rtc/src/main.c +++ b/project/at_start_f403a/examples/pwc/deepsleep_rtc/src/main.c @@ -122,11 +122,14 @@ void system_clock_recover(void) */ int main(void) { - __IO uint32_t index = 0; + crm_clocks_freq_type crm_clocks_freq_struct = {0}; __IO uint32_t systick_index = 0; /* congfig the system clock */ system_clock_config(); + + /* get system clock */ + crm_clocks_freq_get(&crm_clocks_freq_struct); /* init at start board */ at32_board_init(); @@ -178,8 +181,18 @@ int main(void) /* restore systick register configuration */ SysTick->CTRL |= systick_index; - /* wait 3 LICK cycles to ensure clock stable */ - delay_us(5); + /* wait 3 LICK(maximum 120us) cycles to ensure clock stable */ + /* when wakeup from deepsleep,system clock source changes to HICK */ + if((CRM->misc3_bit.hick_to_sclk == TRUE) && (CRM->misc1_bit.hickdiv == TRUE)) + { + /* HICK is 48MHz */ + delay_us(((120 * 6 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1); + } + else + { + /* HICK is 8MHz */ + delay_us(((120 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1); + } /* wake up from deep sleep mode, congfig the system clock */ system_clock_recover(); diff --git a/project/at_start_f403a/examples/spi/crc_transfer_polling/readme.txt b/project/at_start_f403a/examples/spi/crc_transfer_polling/readme.txt index 9c89d4c4..ec29e71b 100644 --- a/project/at_start_f403a/examples/spi/crc_transfer_polling/readme.txt +++ b/project/at_start_f403a/examples/spi/crc_transfer_polling/readme.txt @@ -9,8 +9,10 @@ crc value by polling mode. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa6(miso) pb15(mosi) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f403a/examples/spi/crc_transfer_polling/src/main.c b/project/at_start_f403a/examples/spi/crc_transfer_polling/src/main.c index 89ff0754..4678f209 100644 --- a/project/at_start_f403a/examples/spi/crc_transfer_polling/src/main.c +++ b/project/at_start_f403a/examples/spi/crc_transfer_polling/src/main.c @@ -34,7 +34,9 @@ * @{ */ -#define BUFFER_SIZE 32 +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 uint16_t spi1_tx_buffer[BUFFER_SIZE] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718, 0x191A, 0x1B1C, 0x1D1E, 0x1F20, @@ -49,10 +51,6 @@ uint32_t tx_index = 0, rx_index = 0; __IO uint16_t crc1_value = 0, crc2_value = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -81,9 +79,12 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf static void spi_config(void) { spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -93,15 +94,31 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - - spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; - spi_init(SPI2, &spi_init_struct); - + + /* hardware crc calculation config */ spi_crc_polynomial_set(SPI1, 7); - spi_crc_polynomial_set(SPI2, 7); spi_crc_enable(SPI1, TRUE); - spi_crc_enable(SPI2, TRUE); + spi_enable(SPI1, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; + spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_16BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init(SPI2, &spi_init_struct); + + /* hardware crc calculation config */ + spi_crc_polynomial_set(SPI2, 7); + spi_crc_enable(SPI2, TRUE); + spi_enable(SPI2, TRUE); } @@ -115,45 +132,70 @@ static void gpio_config(void) gpio_init_type gpio_initstructure; crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* master spi miso pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_6; gpio_init(GPIOA, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* master spi mosi pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* slave spi miso pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* slave spi mosi pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); @@ -168,35 +210,58 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); gpio_config(); spi_config(); - + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + /* transfer procedure:the "BUFFER_SIZE-1" data transfer */ while(tx_index < BUFFER_SIZE - 1) { + /* slave and master transmit data fill */ while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]); while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + + /* slave and master receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2); while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); } + + /* wait master and slave transmit data buffer empty */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); /* transfer procedure:the last data and crc transfer */ + /* slave the last transmit data fill and crc transfer setting */ spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]); spi_crc_next_transmit(SPI2); + + /* master the last transmit data fill and crc transfer setting */ spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index]); spi_crc_next_transmit(SPI1); + + /* wait master and slave the last data transfer end */ while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index] = spi_i2s_data_receive(SPI1); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2); + + /* wait master and slave the crc transfer end */ while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data and crc check */ transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); @@ -221,7 +286,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_clock.h b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_clock.h similarity index 100% rename from project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_clock.h rename to project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_clock.h diff --git a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_conf.h b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_conf.h similarity index 100% rename from project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_conf.h rename to project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_conf.h diff --git a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_int.h b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_int.h similarity index 100% rename from project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_int.h rename to project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_int.h diff --git a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvoptx b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvoptx similarity index 99% rename from project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvoptx rename to project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvoptx index 1547bd13..e954bf80 100644 --- a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvoptx +++ b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvoptx @@ -22,7 +22,7 @@ - use_jtagpin_hardwarecs_dma + fullduplex_dma_jtagpin 0x4 ARM-ADS diff --git a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvprojx b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvprojx similarity index 99% rename from project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvprojx rename to project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvprojx index 57f8dbad..014e9073 100644 --- a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvprojx +++ b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvprojx @@ -7,7 +7,7 @@ - use_jtagpin_hardwarecs_dma + fullduplex_dma_jtagpin 0x4 ARM-ADS 5060960::V5.06 update 7 (build 960)::.\ARMCC @@ -48,7 +48,7 @@ 1 .\objects\ - use_jtagpin_hardwarecs_dma + fullduplex_dma_jtagpin 1 0 1 @@ -482,7 +482,7 @@ - <Project Info> + fullduplex_dma_jtagpin 0 1 diff --git a/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/readme.txt b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/readme.txt new file mode 100644 index 00000000..7a7b9e0d --- /dev/null +++ b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/readme.txt @@ -0,0 +1,18 @@ +/** + ************************************************************************** + * @file readme.txt + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board, in this demo, shows how to use + fullduplex mode transfer data by dma. + the pins connection as follow: + - spi2 slave spi1 master + pb12(cs) <---> pa15(cs) + pb13(sck) <---> pb3(sck) + pb14(miso) <---> pb4(miso) + pb15(mosi) <---> pb5(mosi) + + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f403a_407_clock.c b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/src/at32f403a_407_clock.c similarity index 100% rename from project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f403a_407_clock.c rename to project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/src/at32f403a_407_clock.c diff --git a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f403a_407_int.c b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/src/at32f403a_407_int.c similarity index 93% rename from project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f403a_407_int.c rename to project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/src/at32f403a_407_int.c index 1cf15e57..afec18c1 100644 --- a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f403a_407_int.c +++ b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/src/at32f403a_407_int.c @@ -30,7 +30,7 @@ * @{ */ -/** @addtogroup 403A_SPI_use_jtagpin_hardwarecs_dma +/** @addtogroup 403A_SPI_fullduplex_dma_jtagpin * @{ */ diff --git a/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/src/main.c b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/src/main.c new file mode 100644 index 00000000..81d16cc9 --- /dev/null +++ b/project/at_start_f403a/examples/spi/fullduplex_dma_jtagpin/src/main.c @@ -0,0 +1,337 @@ +/** + ************************************************************************** + * @file main.c + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +#include "at32f403a_407_board.h" +#include "at32f403a_407_clock.h" + +/** @addtogroup AT32F403A_periph_examples + * @{ + */ + +/** @addtogroup 403A_SPI_fullduplex_dma_jtagpin SPI_fullduplex_dma_jtagpin + * @{ + */ + +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15) +#define BUFFER_SIZE 32 + +spi_init_type spi_init_struct; +uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, + 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, + 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, + 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20}; +uint8_t spi2_tx_buffer[BUFFER_SIZE] = {0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, + 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, 0x60, + 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, + 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70}; +uint8_t spi1_rx_buffer[BUFFER_SIZE], spi2_rx_buffer[BUFFER_SIZE]; +volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; + +/** + * @brief buffer compare function. + * @param pbuffer1, pbuffer2: buffers to be compared. + * @param buffer_length: buffer's length + * @retval the result of compare + */ +error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length) +{ + while(buffer_length--) + { + if(*pbuffer1 != *pbuffer2) + { + return ERROR; + } + + pbuffer1++; + pbuffer2++; + } + return SUCCESS; +} + +/** + * @brief dma configuration. + * @param none + * @retval none + */ +static void dma_config(void) +{ + dma_init_type dma_init_struct; + crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); + + /* use dma1_channel1 as spi1 transmit channel */ + dma_reset(DMA1_CHANNEL1); + dma_default_para_init(&dma_init_struct); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; + dma_init_struct.memory_base_addr = (uint32_t)spi1_tx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI1->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA1_CHANNEL1, &dma_init_struct); + dma_flexible_config(DMA1, FLEX_CHANNEL1, DMA_FLEXIBLE_SPI1_TX); + + /* use dma1_channel2 as spi1 receive channel */ + dma_reset(DMA1_CHANNEL2); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; + dma_init_struct.memory_base_addr = (uint32_t)spi1_rx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI1->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA1_CHANNEL2, &dma_init_struct); + dma_flexible_config(DMA1, FLEX_CHANNEL2, DMA_FLEXIBLE_SPI1_RX); + + crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE); + + /* use dma2_channel1 as spi2 transmit channel */ + dma_reset(DMA2_CHANNEL1); + dma_default_para_init(&dma_init_struct); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; + dma_init_struct.memory_base_addr = (uint32_t)spi2_tx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA2_CHANNEL1, &dma_init_struct); + dma_flexible_config(DMA2, FLEX_CHANNEL1, DMA_FLEXIBLE_SPI2_TX); + + /* use dma2_channel2 as spi2 receive channel */ + dma_reset(DMA2_CHANNEL2); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; + dma_init_struct.memory_base_addr = (uint32_t)spi2_rx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA2_CHANNEL2, &dma_init_struct); + dma_flexible_config(DMA2, FLEX_CHANNEL2, DMA_FLEXIBLE_SPI2_RX); +} + +/** + * @brief spi configuration. + * @param none + * @retval none + */ +static void spi_config(void) +{ + /* spi master initialization */ + crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); + spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; + spi_init_struct.master_slave_mode = SPI_MODE_MASTER; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; + spi_init(SPI1, &spi_init_struct); + + /* use dma transmit and receive */ + spi_i2s_dma_transmitter_enable(SPI1, TRUE); + spi_i2s_dma_receiver_enable(SPI1, TRUE); + + spi_enable(SPI1, TRUE); + + /* spi slave initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; + spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init(SPI2, &spi_init_struct); + + /* use dma transmit and receive */ + spi_i2s_dma_transmitter_enable(SPI2, TRUE); + spi_i2s_dma_receiver_enable(SPI2, TRUE); + + spi_enable(SPI2, TRUE); +} + +/** + * @brief gpio configuration. + * @param none + * @retval none + */ +static void gpio_config(void) +{ + gpio_init_type gpio_initstructure; + crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); + gpio_pin_remap_config(SWJTAG_MUX_010, TRUE); + gpio_pin_remap_config(SPI1_MUX_01, TRUE); + gpio_default_para_init(&gpio_initstructure); + + /* spi master gpio initialization */ + /* spi1 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* spi1 sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_3; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi1 miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi1 mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 gpio initialization */ + /* spi2 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_14; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_init(GPIOB, &gpio_initstructure); +} + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + __IO uint32_t index = 0; + system_clock_config(); + at32_board_init(); + at32_led_on(LED4); + dma_config(); + gpio_config(); + spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + /* enable spi slave dma to fill and get data */ + dma_channel_enable(DMA2_CHANNEL1, TRUE); + dma_channel_enable(DMA2_CHANNEL2, TRUE); + + /* enable spi master dma to fill and get data */ + dma_channel_enable(DMA1_CHANNEL1, TRUE); + dma_channel_enable(DMA1_CHANNEL2, TRUE); + + /* wait master and slave spi data receive end */ + while(dma_flag_get(DMA1_FDT2_FLAG) == RESET) + { + } + while(dma_flag_get(DMA2_FDT2_FLAG) == RESET) + { + } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* test result:the data check */ + transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); + transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE); + + /* test result indicate:if SUCCESS ,led2 lights */ + if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS)) + { + at32_led_on(LED2); + } + else + { + at32_led_on(LED3); + } + while(1) + { + } +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f403a/examples/spi/fullduplex_polling/readme.txt b/project/at_start_f403a/examples/spi/fullduplex_polling/readme.txt index 780ce5ef..f75f4e10 100644 --- a/project/at_start_f403a/examples/spi/fullduplex_polling/readme.txt +++ b/project/at_start_f403a/examples/spi/fullduplex_polling/readme.txt @@ -8,9 +8,11 @@ this demo is based on the at-start board, in this demo, shows how to use fullduplex mode transfer data by polling mode. the pins connection as follow: - - spi2 slaver spi1 master + - spi2 spi1 + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa6(miso) pb15(mosi) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f403a/examples/spi/fullduplex_polling/src/main.c b/project/at_start_f403a/examples/spi/fullduplex_polling/src/main.c index a08acb22..24dbb109 100644 --- a/project/at_start_f403a/examples/spi/fullduplex_polling/src/main.c +++ b/project/at_start_f403a/examples/spi/fullduplex_polling/src/main.c @@ -34,7 +34,12 @@ * @{ */ -#define BUFFER_SIZE 32 +#define SPI1_AS_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI1_AS_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) + +#define SPI2_AS_MASTER_CS_HIGH gpio_bits_set(GPIOB, GPIO_PINS_12) +#define SPI2_AS_MASTER_CS_LOW gpio_bits_reset(GPIOB, GPIO_PINS_12) +#define BUFFER_SIZE 32 spi_init_type spi_init_struct; uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, @@ -50,10 +55,6 @@ uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; volatile error_status transfer_status3 = ERROR, transfer_status4 = ERROR; -static void gpio_config(uint16_t spi1_mode, uint16_t spi2_mode); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -82,9 +83,11 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -94,11 +97,23 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + spi_enable(SPI1, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - spi_enable(SPI1, TRUE); spi_enable(SPI2, TRUE); } @@ -113,85 +128,124 @@ static void gpio_config(uint16_t spi1_mode, uint16_t spi2_mode) crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); gpio_default_para_init(&gpio_initstructure); - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* spi1 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; if(spi1_mode == SPI_MODE_MASTER) { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + } + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* spi1 sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + if(spi1_mode == SPI_MODE_MASTER) + { + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + } + else + { + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); /* spi1 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi1_mode == SPI_MODE_MASTER) { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } gpio_initstructure.gpio_pins = GPIO_PINS_6; gpio_init(GPIOA, &gpio_initstructure); /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi1_mode == SPI_MODE_MASTER) { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); - - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + + /* spi2 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; if(spi2_mode == SPI_MODE_SLAVE) { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + } + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + if(spi2_mode == SPI_MODE_SLAVE) + { + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + } + else + { + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); /* spi2 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi2_mode == SPI_MODE_SLAVE) { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); /* spi2 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi2_mode == SPI_MODE_SLAVE) { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + if(spi1_mode == SPI_MODE_MASTER) + { + SPI1_AS_MASTER_CS_HIGH; + } + if(spi2_mode == SPI_MODE_MASTER) + { + SPI2_AS_MASTER_CS_HIGH; + } } /** @@ -204,58 +258,90 @@ int main(void) __IO uint32_t index = 0; system_clock_config(); at32_board_init(); + at32_led_on(LED4); gpio_config(SPI_MODE_MASTER, SPI_MODE_SLAVE); spi_config(); - + + /* start communication: master pull down CS pin select slave */ + SPI1_AS_MASTER_CS_LOW; + /* transfer procedure:the "BUFFER_SIZE" data transfer */ while(tx_index < BUFFER_SIZE) { + /* slave and master transmit data fill */ while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]); while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + + /* slave and master receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2); while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); } - + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI1_AS_MASTER_CS_HIGH; + /* test result:the data check */ transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE); - - /* master &slave mode switch */ + spi_enable(SPI1, FALSE); spi_enable(SPI2, FALSE); + + /* master & slave mode switch */ gpio_config(SPI_MODE_SLAVE, SPI_MODE_MASTER); spi_init_struct.master_slave_mode =SPI_MODE_SLAVE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI1, &spi_init_struct); - + spi_init_struct.master_slave_mode =SPI_MODE_MASTER; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI2, &spi_init_struct); - + + /* receive buffer clear */ tx_index = 0; rx_index = 0; for(index = 0; index < BUFFER_SIZE; index++) + { spi1_rx_buffer[index] = 0; - for(index = 0; index < BUFFER_SIZE; index++) spi2_rx_buffer[index] = 0; - + } + spi_enable(SPI2, TRUE); spi_enable(SPI1, TRUE); + + /* start communication: master pull down CS pin select slave */ + SPI2_AS_MASTER_CS_LOW; /* transfer procedure:the "BUFFER_SIZE" data transfer */ while(tx_index < BUFFER_SIZE) { + /* slave and master transmit data fill */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index]); while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]); + + /* slave and master receive data get */ while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index] = spi_i2s_data_receive(SPI1); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI2_AS_MASTER_CS_HIGH; /* test result:the data check */ transfer_status3 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); @@ -269,7 +355,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_clock.h b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_clock.h similarity index 100% rename from project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_clock.h rename to project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_clock.h diff --git a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_conf.h b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_conf.h similarity index 100% rename from project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_conf.h rename to project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_conf.h diff --git a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_int.h b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_int.h similarity index 100% rename from project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f403a_407_int.h rename to project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_int.h diff --git a/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvoptx b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvoptx new file mode 100644 index 00000000..20ffad06 --- /dev/null +++ b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvoptx @@ -0,0 +1,368 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp; *.cc; *.cxx + 0 + + + + 0 + 0 + + + + halfduplex_dma_jtagpin + 0x4 + ARM-ADS + + 12000000 + + 0 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 0 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F403A_1024 -FS08000000 -FL0100000 -FP0($$Device:-AT32F403AVGT7$Flash\AT32F403A_1024.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + user + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\src\at32f403a_407_clock.c + at32f403a_407_clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\src\at32f403a_407_int.c + at32f403a_407_int.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\src\main.c + main.c + 0 + 0 + + + + + bsp + 0 + 0 + 0 + 0 + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\..\at32f403a_407_board\at32f403a_407_board.c + at32f403a_407_board.c + 0 + 0 + + + + + firmware + 0 + 0 + 0 + 0 + + 3 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_gpio.c + at32f403a_407_gpio.c + 0 + 0 + + + 3 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_misc.c + at32f403a_407_misc.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_crm.c + at32f403a_407_crm.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_usart.c + at32f403a_407_usart.c + 0 + 0 + + + 3 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_dma.c + at32f403a_407_dma.c + 0 + 0 + + + 3 + 10 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_spi.c + at32f403a_407_spi.c + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 4 + 11 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f403a_407.c + system_at32f403a_407.c + 0 + 0 + + + 4 + 12 + 2 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f403a_407.s + startup_at32f403a_407.s + 0 + 0 + + + + + readme + 0 + 0 + 0 + 0 + + 5 + 13 + 5 + 0 + 0 + 0 + ..\readme.txt + readme.txt + 0 + 0 + + + + diff --git a/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvprojx b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvprojx new file mode 100644 index 00000000..1cee1ad3 --- /dev/null +++ b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvprojx @@ -0,0 +1,492 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + halfduplex_dma_jtagpin + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::.\ARMCC + 0 + + + -AT32F403AVGT7 + ArteryTek + ArteryTek.AT32F403A_407_DFP.2.0.2 + IRAM(0x20000000,0x38000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + + 0 + $$Device:-AT32F403AVGT7$Device\Include\at32f403a_407.h + + + + + + + + + + $$Device:-AT32F403AVGT7$SVD\AT32F403Axx_v2.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\objects\ + halfduplex_dma_jtagpin + 1 + 0 + 1 + 1 + 1 + .\listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP + DCM.DLL + -pCM4 + SARMCM3.DLL + + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x38000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x38000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + AT32F403AVGT7,USE_STDPERIPH_DRIVER,AT_START_F403A_V1 + + ..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\inc;..\..\..\..\..\at32f403a_407_board + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + user + + + at32f403a_407_clock.c + 1 + ..\src\at32f403a_407_clock.c + + + at32f403a_407_int.c + 1 + ..\src\at32f403a_407_int.c + + + main.c + 1 + ..\src\main.c + + + + + bsp + + + at32f403a_407_board.c + 1 + ..\..\..\..\..\at32f403a_407_board\at32f403a_407_board.c + + + + + firmware + + + at32f403a_407_gpio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_gpio.c + + + at32f403a_407_misc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_misc.c + + + at32f403a_407_crm.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_crm.c + + + at32f403a_407_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_usart.c + + + at32f403a_407_dma.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_dma.c + + + at32f403a_407_spi.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_spi.c + + + + + cmsis + + + system_at32f403a_407.c + 1 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f403a_407.c + + + startup_at32f403a_407.s + 2 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f403a_407.s + + + + + readme + + + readme.txt + 5 + ..\readme.txt + + + + + + + + + + + + + + + + + fullduplex_dma_jtagpin + 0 + 1 + + + + + diff --git a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/readme.txt similarity index 81% rename from project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt rename to project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/readme.txt index 34f5cf16..e700a19d 100644 --- a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt +++ b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/readme.txt @@ -6,12 +6,12 @@ */ this demo is based on the at-start board, in this demo, shows how to use - dma recieve data. spi3 use jtag pin as spi pin,and config spi in hardware - cs mode. + dma transmit/recieve data. spi3 use jtag pin as spi pin. the pins connection as follow: - spi2 slaver spi3 master - pb12(cs) <---> pa15(cs) pb13(sck) <---> pb3(sck) pb14(miso) <---> pb5(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f403a_407_clock.c b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/src/at32f403a_407_clock.c similarity index 100% rename from project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f403a_407_clock.c rename to project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/src/at32f403a_407_clock.c diff --git a/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/src/at32f403a_407_int.c b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/src/at32f403a_407_int.c new file mode 100644 index 00000000..b1b6d3bc --- /dev/null +++ b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/src/at32f403a_407_int.c @@ -0,0 +1,143 @@ +/** + ************************************************************************** + * @file at32f403a_407_int.c + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f403a_407_int.h" +#include "at32f403a_407_board.h" + +/** @addtogroup AT32F403A_periph_examples + * @{ + */ + +/** @addtogroup 403A_SPI_halfduplex_dma_jtagpin + * @{ + */ + +/** + * @brief this function handles nmi exception. + * @param none + * @retval none + */ +void NMI_Handler(void) +{ +} + +/** + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ +void HardFault_Handler(void) +{ + /* go to infinite loop when hard fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ +void MemManage_Handler(void) +{ + /* go to infinite loop when memory manage exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ +void BusFault_Handler(void) +{ + /* go to infinite loop when bus fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ +void UsageFault_Handler(void) +{ + /* go to infinite loop when usage fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles svcall exception. + * @param none + * @retval none + */ +void SVC_Handler(void) +{ +} + +/** + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief this function handles systick handler. + * @param none + * @retval none + */ +void SysTick_Handler(void) +{ +} + +/** + * @} + */ + +/** + * @} + */ + + + diff --git a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/src/main.c similarity index 60% rename from project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c rename to project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/src/main.c index b5f027aa..b4867af0 100644 --- a/project/at_start_f403a/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c +++ b/project/at_start_f403a/examples/spi/halfduplex_dma_jtagpin/src/main.c @@ -29,11 +29,13 @@ * @{ */ -/** @addtogroup 403A_SPI_use_jtagpin_hardwarecs_dma SPI_use_jtagpin_hardwarecs_dma +/** @addtogroup 403A_SPI_halfduplex_dma_jtagpin SPI_halfduplex_dma_jtagpin * @{ */ -#define BUFFER_SIZE 32 +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15) +#define BUFFER_SIZE 32 uint8_t spi3_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, @@ -42,11 +44,7 @@ uint8_t spi3_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, uint8_t spi2_rx_buffer[BUFFER_SIZE]; __IO uint8_t tx_index = 0; volatile error_status transfer_status = ERROR; - -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - + /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -69,16 +67,16 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe } /** - * @brief spi configuration. + * @brief dma configuration. * @param none * @retval none */ -static void spi_config(void) +static void dma_config(void) { dma_init_type dma_init_struct; - spi_init_type spi_init_struct; - crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); + + /* use dma1_channel4 as spi2 receive channel */ dma_reset(DMA1_CHANNEL4); dma_default_para_init(&dma_init_struct); dma_init_struct.buffer_size = BUFFER_SIZE; @@ -92,10 +90,39 @@ static void spi_config(void) dma_init_struct.priority = DMA_PRIORITY_MEDIUM; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL4, &dma_init_struct); + + crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE); + + /* use dma2_channel2 as spi3 transmit channel */ + dma_reset(DMA2_CHANNEL2); + dma_default_para_init(&dma_init_struct); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; + dma_init_struct.memory_base_addr = (uint32_t)spi3_tx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA2_CHANNEL2, &dma_init_struct); +} +/** + * @brief spi configuration. + * @param none + * @retval none + */ +static void spi_config(void) +{ + spi_init_type spi_init_struct; + + /* spi master initialization */ crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode-transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -103,16 +130,31 @@ static void spi_config(void) spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; - spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI3, &spi_init_struct); - - spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; - spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; - spi_init(SPI2, &spi_init_struct); - - spi_hardware_cs_output_enable(SPI3, TRUE); - spi_i2s_dma_receiver_enable(SPI2, TRUE); + + /* use dma transmit */ + spi_i2s_dma_transmitter_enable(SPI3, TRUE); + spi_enable(SPI3, TRUE); + + /* spi slave initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* single line bidirectional half duplex mode-receiving */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; + spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init(SPI2, &spi_init_struct); + + /* use dma receive */ + spi_i2s_dma_receiver_enable(SPI2, TRUE); + spi_enable(SPI2, TRUE); } @@ -129,44 +171,47 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); gpio_pin_remap_config(SPI3_GMUX_0010, TRUE); - - /* master sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* master cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_3; gpio_init(GPIOB, &gpio_initstructure); /* master mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOB, &gpio_initstructure); - - /* master cs pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_15; - gpio_init(GPIOA, &gpio_initstructure); - + + /* slave cs pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + /* slave sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); /* slave miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); - - /* slave cs */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_12; - gpio_init(GPIOB, &gpio_initstructure); } /** @@ -178,21 +223,37 @@ int main(void) { system_clock_config(); at32_board_init(); - - /* button press:ensure code canbe download normally */ - while(at32_button_press() == NO_BUTTON); + at32_led_on(LED4); gpio_config(); + dma_config(); spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + /* enable spi slave dma to get data */ dma_channel_enable(DMA1_CHANNEL4, TRUE); - - /* transfer procedure:the "BUFFER_SIZE" data transfer */ - while(tx_index < BUFFER_SIZE) + + /* enable spi master dma to fill data */ + dma_channel_enable(DMA2_CHANNEL2, TRUE); + + /* wait master spi data fill end */ + while(dma_flag_get(DMA2_FDT2_FLAG) == RESET) { - while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET); - spi_i2s_data_transmit(SPI3, spi3_tx_buffer[tx_index++]); } - while(!dma_flag_get(DMA1_FDT4_FLAG)); + + /* wait slave spi data get end */ + while(dma_flag_get(DMA1_FDT4_FLAG) == RESET) + { + } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ transfer_status = buffer_compare(spi2_rx_buffer, spi3_tx_buffer, BUFFER_SIZE); @@ -204,7 +265,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f403a/examples/spi/halfduplex_interrupt/readme.txt b/project/at_start_f403a/examples/spi/halfduplex_interrupt/readme.txt index a09be620..b4c9d76d 100644 --- a/project/at_start_f403a/examples/spi/halfduplex_interrupt/readme.txt +++ b/project/at_start_f403a/examples/spi/halfduplex_interrupt/readme.txt @@ -9,7 +9,9 @@ halfduplex mode transfer data by interrupt mode. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f403a/examples/spi/halfduplex_interrupt/src/at32f403a_407_int.c b/project/at_start_f403a/examples/spi/halfduplex_interrupt/src/at32f403a_407_int.c index 96b85c19..b35273a7 100644 --- a/project/at_start_f403a/examples/spi/halfduplex_interrupt/src/at32f403a_407_int.c +++ b/project/at_start_f403a/examples/spi/halfduplex_interrupt/src/at32f403a_407_int.c @@ -24,12 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f403a_407_int.h" -#include "at32f403a_407_board.h" - -extern uint8_t spi1_tx_buffer[]; -extern uint8_t spi2_rx_buffer[]; -extern uint32_t tx_index; -extern uint32_t rx_index; /** @addtogroup AT32F403A_periph_examples * @{ @@ -138,36 +132,6 @@ void SysTick_Handler(void) { } -/** - * @brief This function handles the spi1 interrupt request. - * @param None - * @retval None - */ - void SPI1_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); - if(tx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); - } - } -} - -/** - * @brief This function handles the spi2 interrupt request. - * @param None - * @retval None - */ - void SPI2_I2S2EXT_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) - { - spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); - } -} - /** * @} */ diff --git a/project/at_start_f403a/examples/spi/halfduplex_interrupt/src/main.c b/project/at_start_f403a/examples/spi/halfduplex_interrupt/src/main.c index 9fe5f628..14ec981e 100644 --- a/project/at_start_f403a/examples/spi/halfduplex_interrupt/src/main.c +++ b/project/at_start_f403a/examples/spi/halfduplex_interrupt/src/main.c @@ -33,7 +33,9 @@ * @{ */ -#define BUFFER_SIZE 32 +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 spi_init_type spi_init_struct; @@ -45,10 +47,6 @@ uint8_t spi2_rx_buffer[BUFFER_SIZE]; volatile uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -77,9 +75,14 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI1_IRQn, 0, 0); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode - transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode =SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -89,18 +92,27 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); + + /* enable transmit data buffer empty interrupt */ + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); + /* single line bidirectional half duplex mode - receiving */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; spi_init_struct.master_slave_mode =SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - - nvic_irq_enable(SPI1_IRQn, 0, 0); - nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + + /* enable receive data buffer full interrupt */ spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE); - - spi_enable(SPI2, TRUE); - spi_enable(SPI1, TRUE); } /** @@ -113,35 +125,83 @@ static void gpio_config(void) gpio_init_type gpio_initstructure; crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); + gpio_default_para_init(&gpio_initstructure); - - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); - - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* spi2 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* slave spi miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); +} - while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13)!=RESET); +/** + * @brief spi1 interrupt function + * @param none + * @retval none + */ + void SPI1_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + if(tx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); + } + } +} + +/** + * @brief spi2 interrupt function + * @param none + * @retval none + */ + void SPI2_I2S2EXT_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) + { + spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); + } } /** @@ -153,11 +213,27 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); gpio_config(); /* config spi1 send spi2 receive */ spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + spi_enable(SPI2, TRUE); + spi_enable(SPI1, TRUE); + + /* wait slave data receive end */ while(rx_index < BUFFER_SIZE); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ transfer_status = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); @@ -169,7 +245,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/readme.txt b/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/readme.txt index 26a24ee9..1ba8d7ce 100644 --- a/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/readme.txt +++ b/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/readme.txt @@ -10,7 +10,9 @@ realize data send and receive. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/src/at32f403a_407_int.c b/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/src/at32f403a_407_int.c index 0a759f31..8e488a3f 100644 --- a/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/src/at32f403a_407_int.c +++ b/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/src/at32f403a_407_int.c @@ -24,14 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f403a_407_int.h" -#include "at32f403a_407_board.h" - -extern uint8_t spi1_tx_buffer[]; -extern uint8_t spi2_tx_buffer[]; -extern uint8_t spi1_rx_buffer[]; -extern uint8_t spi2_rx_buffer[]; -extern uint32_t tx_index; -extern uint32_t rx_index; /** @addtogroup AT32F403A_periph_examples * @{ @@ -140,54 +132,6 @@ void SysTick_Handler(void) { } -/** - * @brief This function handles the spi1 interrupt request. - * @param None - * @retval None - */ - void SPI1_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); - if(tx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); - } - } - if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_RDBF_FLAG) != RESET) - { - spi_enable(SPI1, FALSE); - spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); - spi_enable(SPI1, TRUE); - if(rx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, FALSE); - } - } -} - -/** - * @brief This function handles the spi2 interrupt request. - * @param None - * @retval None - */ - void SPI2_I2S2EXT_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]); - if(tx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, FALSE); - } - } - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) - { - spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); - } -} - /** * @} */ diff --git a/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/src/main.c b/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/src/main.c index 84998d95..7d679621 100644 --- a/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/src/main.c +++ b/project/at_start_f403a/examples/spi/halfduplex_transceiver_switch/src/main.c @@ -33,8 +33,9 @@ * @{ */ -#define BUFFER_SIZE 32 - +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 spi_init_type spi_init_struct; uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, @@ -49,10 +50,6 @@ uint8_t spi1_rx_buffer[BUFFER_SIZE], spi2_rx_buffer[BUFFER_SIZE]; volatile uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -81,9 +78,12 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI1_IRQn, 0, 0); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode - transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256; @@ -93,18 +93,27 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + /* enable transmit data buffer empty interrupt */ + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); + + /* single line bidirectional half duplex mode - receiving */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - nvic_irq_enable(SPI1_IRQn, 0, 0); - nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + /* enable receive data buffer full interrupt */ spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE); - - spi_enable(SPI1, TRUE); - spi_enable(SPI2, TRUE); } /** @@ -118,34 +127,100 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); gpio_default_para_init(&gpio_initstructure); - - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + /* slave spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* spi2 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* slave spi miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); +} - while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13)!=RESET); +/** + * @brief spi1 interrupt function + * @param none + * @retval none + */ + void SPI1_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + if(tx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); + } + } + if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_RDBF_FLAG) != RESET) + { + spi_enable(SPI1, FALSE); + spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); + spi_enable(SPI1, TRUE); + if(rx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, FALSE); + spi_enable(SPI1, FALSE); + } + } +} + +/** + * @brief spi2 interrupt function + * @param none + * @retval none + */ + void SPI2_I2S2EXT_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]); + if(tx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, FALSE); + } + } + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) + { + spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); + } } /** @@ -157,37 +232,70 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); gpio_config(); + /* config spi1 send spi2 receive */ spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + spi_enable(SPI2, TRUE); + spi_enable(SPI1, TRUE); + + /* wait data receive end */ while(rx_index < BUFFER_SIZE); - + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + /* test result:the data check */ transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); - + /* config spi2 send spi1 receive */ spi_enable(SPI1, FALSE); spi_enable(SPI2, FALSE); + rx_index = 0; tx_index = 0; spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, FALSE); - + + /* single line bidirectional half duplex mode - receiving */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + /* single line bidirectional half duplex mode - transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, TRUE); spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, TRUE); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + spi_enable(SPI2, TRUE); spi_enable(SPI1, TRUE); + + /* wait slave data receive end */ while(rx_index < BUFFER_SIZE); - + + /* master half duplex receiving modethe busy flag isnot usefull */ + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + /* test result:the data check */ transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE); @@ -198,7 +306,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f403a/examples/spi/only_receive_mode_polling/readme.txt b/project/at_start_f403a/examples/spi/only_receive_mode_polling/readme.txt index 29698128..c3662bd7 100644 --- a/project/at_start_f403a/examples/spi/only_receive_mode_polling/readme.txt +++ b/project/at_start_f403a/examples/spi/only_receive_mode_polling/readme.txt @@ -9,7 +9,9 @@ only receive mode receive data by polling mode. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb15(mosi) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f403a/examples/spi/only_receive_mode_polling/src/main.c b/project/at_start_f403a/examples/spi/only_receive_mode_polling/src/main.c index c895cfac..4582223d 100644 --- a/project/at_start_f403a/examples/spi/only_receive_mode_polling/src/main.c +++ b/project/at_start_f403a/examples/spi/only_receive_mode_polling/src/main.c @@ -33,9 +33,10 @@ * @{ */ -#define BUFFER_SIZE 32 +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 -spi_init_type spi_init_struct; uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, @@ -44,10 +45,6 @@ uint8_t spi2_rx_buffer[BUFFER_SIZE]; uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -76,9 +73,13 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -88,12 +89,23 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + spi_enable(SPI1, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional simplex receive-only mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_SIMPLEX_RX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - - spi_enable(SPI1, TRUE); + spi_enable(SPI2, TRUE); } @@ -108,34 +120,49 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); gpio_default_para_init(&gpio_initstructure); - - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - - /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* master spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); - - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* spi2 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + /* slave spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); - - while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13) != RESET); } /** @@ -147,17 +174,31 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); gpio_config(); spi_config(); - + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + /* transfer procedure:the "BUFFER_SIZE" data transfer */ while(tx_index < BUFFER_SIZE) { + /* master transmit data fill */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + + /* slave receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ transfer_status = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); @@ -169,7 +210,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f403a/examples/spi/w25q_flash/readme.txt b/project/at_start_f403a/examples/spi/w25q_flash/readme.txt index af7438de..cdb06238 100644 --- a/project/at_start_f403a/examples/spi/w25q_flash/readme.txt +++ b/project/at_start_f403a/examples/spi/w25q_flash/readme.txt @@ -5,8 +5,8 @@ ************************************************************************** */ - this demo is based on the at-start board and AT32-Comm-EV board, in this demo, - shows how to use spi access the w25q flash chip. + this demo is based on the at-start board, in this demo,shows how to use spi access + the w25q flash chip. the pins use as follow: - cs <---> pb12(software cs, pb12 as a general io to control flash cs) - sck <---> pb13 diff --git a/project/at_start_f403a/examples/spi/w25q_flash/src/spi_flash.c b/project/at_start_f403a/examples/spi/w25q_flash/src/spi_flash.c index a84751a5..871e5b4e 100644 --- a/project/at_start_f403a/examples/spi/w25q_flash/src/spi_flash.c +++ b/project/at_start_f403a/examples/spi/w25q_flash/src/spi_flash.c @@ -339,6 +339,9 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length) while(dma_flag_get(DMA1_FDT4_FLAG) == RESET); dma_flag_clear(DMA1_FDT4_FLAG); + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); dma_channel_enable(DMA1_CHANNEL4, FALSE); dma_channel_enable(DMA1_CHANNEL5, FALSE); @@ -354,6 +357,9 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length) dummy_data = spi_i2s_data_receive(SPI2); pbuffer++; } + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); #endif } @@ -403,6 +409,9 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length) while(dma_flag_get(DMA1_FDT4_FLAG) == RESET); dma_flag_clear(DMA1_FDT4_FLAG); + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); dma_channel_enable(DMA1_CHANNEL4, FALSE); dma_channel_enable(DMA1_CHANNEL5, FALSE); @@ -418,6 +427,9 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length) *pbuffer = spi_i2s_data_receive(SPI2); pbuffer++; } + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); #endif } @@ -490,7 +502,10 @@ uint8_t spi_byte_write(uint8_t data) spi_i2s_data_transmit(SPI2, data); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); brxbuff = spi_i2s_data_receive(SPI2); + + /* wait spi idle when communication end */ while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + return brxbuff; } diff --git a/project/at_start_f403a/templates/iar_v6.10/template.ewd b/project/at_start_f403a/templates/iar_v6.10/template.ewd index 1d158285..7a0250cf 100644 --- a/project/at_start_f403a/templates/iar_v6.10/template.ewd +++ b/project/at_start_f403a/templates/iar_v6.10/template.ewd @@ -3,7 +3,7 @@ 2 - Debug + template ARM @@ -828,832 +828,6 @@ - - Release - - ARM - - 0 - - C-SPY - 2 - - 22 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 0 - - - - - - - - ANGEL_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - IARROM_ID - 2 - - 1 - 1 - 0 - - - - - - - - - JLINK_ID - 2 - - 12 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - LMIFTDI_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - MACRAIGOR_ID - 2 - - 3 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - PEMICRO_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - - - - - - - RDI_ID - 2 - - 1 - 1 - 0 - - - - - - - - - - - - - - - - - STLINK_ID - 2 - - 1 - 1 - 0 - - - - - - - THIRDPARTY_ID - 2 - - 0 - 1 - 0 - - - - - - - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB6_Plugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin - 1 - - - diff --git a/project/at_start_f403a/templates/iar_v6.10/template.ewp b/project/at_start_f403a/templates/iar_v6.10/template.ewp index f4edcf21..9b9aefa5 100644 --- a/project/at_start_f403a/templates/iar_v6.10/template.ewp +++ b/project/at_start_f403a/templates/iar_v6.10/template.ewp @@ -3,7 +3,7 @@ 2 - Debug + template ARM @@ -17,15 +17,15 @@ 1 - - Release - - ARM - - 0 - - General - 3 - - 18 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 26 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 8 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 11 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - bsp diff --git a/project/at_start_f403a/templates/iar_v7.4/template.ewd b/project/at_start_f403a/templates/iar_v7.4/template.ewd index e1a4b0b0..a816e4cb 100644 --- a/project/at_start_f403a/templates/iar_v7.4/template.ewd +++ b/project/at_start_f403a/templates/iar_v7.4/template.ewd @@ -3,7 +3,7 @@ 2 - Debug + template ARM @@ -1487,1491 +1487,6 @@ - - Release - - ARM - - 0 - - C-SPY - 2 - - 26 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 0 - - - - - - - - ANGEL_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - - CMSISDAP_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - IARROM_ID - 2 - - 1 - 1 - 0 - - - - - - - - - IJET_ID - 2 - - 6 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - JLINK_ID - 2 - - 15 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - LMIFTDI_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - MACRAIGOR_ID - 2 - - 3 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - PEMICRO_ID - 2 - - 1 - 1 - 0 - - - - - - - - - - - - - - - - - - - RDI_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - - - - - - - STLINK_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - - THIRDPARTY_ID - 2 - - 0 - 1 - 0 - - - - - - - - XDS100_ID - 2 - - 4 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $TOOLKIT_DIR$\plugins\middleware\HCCWare\HCCWare.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\AVIX\AVIX.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB7_Plugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - diff --git a/project/at_start_f403a/templates/iar_v7.4/template.ewp b/project/at_start_f403a/templates/iar_v7.4/template.ewp index 37ee939f..b4aa4969 100644 --- a/project/at_start_f403a/templates/iar_v7.4/template.ewp +++ b/project/at_start_f403a/templates/iar_v7.4/template.ewp @@ -3,7 +3,7 @@ 2 - Debug + template ARM @@ -17,15 +17,15 @@ 1 - - Release - - ARM - - 0 - - General - 3 - - 24 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 16 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - bsp diff --git a/project/at_start_f403a/templates/iar_v7.4/template.ewt b/project/at_start_f403a/templates/iar_v7.4/template.ewt index 3640456c..846196ac 100644 --- a/project/at_start_f403a/templates/iar_v7.4/template.ewt +++ b/project/at_start_f403a/templates/iar_v7.4/template.ewt @@ -3,7 +3,7 @@ 2 - Debug + template ARM @@ -1048,1052 +1048,6 @@ - - Release - - ARM - - 0 - - C-STAT - 1 - - 1 - - 0 - - 600 - 0 - 2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - RuntimeChecking - 0 - - 2 - 1 - 0 - - - - - - - - - - - - - - - - - - - - bsp diff --git a/project/at_start_f403a/templates/iar_v8.2/template.ewd b/project/at_start_f403a/templates/iar_v8.2/template.ewd index 45531eaf..144bfcb3 100644 --- a/project/at_start_f403a/templates/iar_v8.2/template.ewd +++ b/project/at_start_f403a/templates/iar_v8.2/template.ewd @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -1453,1456 +1453,4 @@ - - Release - - ARM - - 0 - - C-SPY - 2 - - 29 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 0 - - - - - - - - CADI_ID - 2 - - 0 - 1 - 0 - - - - - - - - - CMSISDAP_ID - 2 - - 4 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - IJET_ID - 2 - - 8 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - JLINK_ID - 2 - - 16 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - LMIFTDI_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - NULINK_ID - 2 - - 0 - 1 - 0 - - - - - - - PEMICRO_ID - 2 - - 3 - 1 - 0 - - - - - - - - STLINK_ID - 2 - - 5 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - THIRDPARTY_ID - 2 - - 0 - 1 - 0 - - - - - - - - TIFET_ID - 2 - - 1 - 1 - 0 - - - - - - - - - - - - - - - - - - - XDS100_ID - 2 - - 6 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - diff --git a/project/at_start_f403a/templates/iar_v8.2/template.ewp b/project/at_start_f403a/templates/iar_v8.2/template.ewp index e12bfaf0..8a319c93 100644 --- a/project/at_start_f403a/templates/iar_v8.2/template.ewp +++ b/project/at_start_f403a/templates/iar_v8.2/template.ewp @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -16,15 +16,15 @@ 1 - - Release - - ARM - - 0 - - General - 3 - - 30 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 34 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 10 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 20 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - bsp diff --git a/project/at_start_f403a/templates/iar_v8.2/template.ewt b/project/at_start_f403a/templates/iar_v8.2/template.ewt index 7eb9bcf9..a02548b6 100644 --- a/project/at_start_f403a/templates/iar_v8.2/template.ewt +++ b/project/at_start_f403a/templates/iar_v8.2/template.ewt @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -1187,1192 +1187,6 @@ - - Release - - ARM - - 0 - - C-STAT - 261 - - 261 - - 0 - - 1 - 600 - 0 - 2 - 0 - 1 - 100 - - - 1.5.2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - RuntimeChecking - 0 - - 2 - 1 - 0 - - - - - - - - - - - - - - - - - - - - bsp diff --git a/project/at_start_f403a/templates/iar_v9.3/template.ewd b/project/at_start_f403a/templates/iar_v9.3/template.ewd index 478ee472..112e2108 100644 --- a/project/at_start_f403a/templates/iar_v9.3/template.ewd +++ b/project/at_start_f403a/templates/iar_v9.3/template.ewd @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -1543,1546 +1543,4 @@ - - Release - - ARM - - 0 - - C-SPY - 2 - - 32 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 0 - - - - - - - - CADI_ID - 2 - - 0 - 1 - 0 - - - - - - - - - CMSISDAP_ID - 2 - - 4 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - IJET_ID - 2 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - JLINK_ID - 2 - - 16 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - LMIFTDI_ID - 2 - - 3 - 1 - 0 - - - - - - - - - - - - - NULINK_ID - 2 - - 0 - 1 - 0 - - - - - - - PEMICRO_ID - 2 - - 3 - 1 - 0 - - - - - - - - STLINK_ID - 2 - - 7 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - THIRDPARTY_ID - 2 - - 0 - 1 - 0 - - - - - - - - TIFET_ID - 2 - - 1 - 1 - 0 - - - - - - - - - - - - - - - - - - - XDS100_ID - 2 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9BE.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - diff --git a/project/at_start_f403a/templates/iar_v9.3/template.ewp b/project/at_start_f403a/templates/iar_v9.3/template.ewp index 41bec244..923d9347 100644 --- a/project/at_start_f403a/templates/iar_v9.3/template.ewp +++ b/project/at_start_f403a/templates/iar_v9.3/template.ewp @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -16,19 +16,19 @@ 1 - - Release - - ARM - - 0 - - General - 3 - - 35 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 37 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 11 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - 0 - inputOutputBased - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 27 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - bsp diff --git a/project/at_start_f403a/templates/iar_v9.3/template.ewt b/project/at_start_f403a/templates/iar_v9.3/template.ewt index bac1e091..4c410611 100644 --- a/project/at_start_f403a/templates/iar_v9.3/template.ewt +++ b/project/at_start_f403a/templates/iar_v9.3/template.ewt @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -22,7 +22,7 @@ 0 1 100 - Debug/C-STAT + template/C-STAT 2.4.1 @@ -1423,1428 +1423,6 @@ - - Release - - ARM - - 0 - - C-STAT - 516 - - 516 - - 0 - - 1 - 600 - 1 - 2 - 0 - 1 - 100 - Release/C-STAT - - - 2.4.1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - RuntimeChecking - 0 - - 2 - 1 - 0 - - - - - - - - - - - - - - - - - - - - bsp diff --git a/project/at_start_f407/examples/i2s/fullduplex_dma/readme.txt b/project/at_start_f407/examples/i2s/fullduplex_dma/readme.txt index afc309c9..7ec1af9e 100644 --- a/project/at_start_f407/examples/i2s/fullduplex_dma/readme.txt +++ b/project/at_start_f407/examples/i2s/fullduplex_dma/readme.txt @@ -14,4 +14,5 @@ - pb14(miso_ext) rx <---> pc11(miso_ext) tx - pb15(mosi) tx <---> pc12(mosi) rx - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/i2s/fullduplex_dma/src/main.c b/project/at_start_f407/examples/i2s/fullduplex_dma/src/main.c index 6a056667..d007754f 100644 --- a/project/at_start_f407/examples/i2s/fullduplex_dma/src/main.c +++ b/project/at_start_f407/examples/i2s/fullduplex_dma/src/main.c @@ -43,11 +43,6 @@ uint16_t i2s3_buffer_tx[TXBUF_SIZE]; uint16_t i2s3_buffer_rx[RXBUF_SIZE]; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; -static void gpio_config(void); -static void i2s_config(void); -void tx_data_fill(void); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param none @@ -84,25 +79,18 @@ void tx_data_fill(void) } /** - * @brief i2s configuration. + * @brief dma configuration. * @param none * @retval none */ -static void i2s_config(void) +static void dma_config(void) { dma_init_type dma_init_struct; - i2s_init_type i2s_init_struct; crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); + + /* use dma1_channel1 as spi2 transmit channel */ dma_reset(DMA1_CHANNEL1); - dma_reset(DMA1_CHANNEL2); - dma_reset(DMA1_CHANNEL3); - dma_reset(DMA1_CHANNEL4); - dma_flexible_config(DMA1, FLEX_CHANNEL1, DMA_FLEXIBLE_SPI2_TX); - dma_flexible_config(DMA1, FLEX_CHANNEL2, DMA_FLEXIBLE_I2S2EXT_RX); - dma_flexible_config(DMA1, FLEX_CHANNEL3, DMA_FLEXIBLE_SPI3_RX); - dma_flexible_config(DMA1, FLEX_CHANNEL4, DMA_FLEXIBLE_I2S3EXT_TX); - dma_default_para_init(&dma_init_struct); dma_init_struct.buffer_size = TXBUF_SIZE; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; @@ -111,54 +99,113 @@ static void i2s_config(void) dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_HIGH; dma_init_struct.loop_mode_enable = FALSE; - dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_tx; dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt); dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; dma_init(DMA1_CHANNEL1, &dma_init_struct); - + dma_flexible_config(DMA1, FLEX_CHANNEL1, DMA_FLEXIBLE_SPI2_TX); + + /* use dma1_channel2 as spi2 receive channel */ + dma_reset(DMA1_CHANNEL2); + dma_init_struct.buffer_size = RXBUF_SIZE; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_HIGH; + dma_init_struct.loop_mode_enable = FALSE; dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx; dma_init_struct.peripheral_base_addr = (uint32_t)&(I2S2EXT->dt); dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init(DMA1_CHANNEL2, &dma_init_struct); - + dma_flexible_config(DMA1, FLEX_CHANNEL2, DMA_FLEXIBLE_I2S2EXT_RX); + + /* use dma1_channel3 as spi3 receive channel */ + dma_reset(DMA1_CHANNEL3); + dma_init_struct.buffer_size = RXBUF_SIZE; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_HIGH; + dma_init_struct.loop_mode_enable = FALSE; dma_init_struct.memory_base_addr = (uint32_t)i2s3_buffer_rx; dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt); dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init(DMA1_CHANNEL3, &dma_init_struct); - + dma_flexible_config(DMA1, FLEX_CHANNEL3, DMA_FLEXIBLE_SPI3_RX); + + /* use dma1_channel4 as spi3 transmit channel */ + dma_reset(DMA1_CHANNEL4); + dma_init_struct.buffer_size = TXBUF_SIZE; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_HIGH; + dma_init_struct.loop_mode_enable = FALSE; dma_init_struct.memory_base_addr = (uint32_t)i2s3_buffer_tx; dma_init_struct.peripheral_base_addr = (uint32_t)&(I2S3EXT->dt); dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; dma_init(DMA1_CHANNEL4, &dma_init_struct); + dma_flexible_config(DMA1, FLEX_CHANNEL4, DMA_FLEXIBLE_I2S3EXT_TX); +} - crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); +/** + * @brief i2s configuration. + * @param none + * @retval none + */ +static void i2s_config(void) +{ + i2s_init_type i2s_init_struct; + + /* master i2s initialization */ crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); i2s_default_para_init(&i2s_init_struct); + + /* i2s2 as master transmission */ i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; - i2s_init_struct.mclk_output_enable = FALSE; + i2s_init_struct.mclk_output_enable = TRUE; i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K; i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; - i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX; i2s_init(SPI2, &i2s_init_struct); + + /* i2s2ext as slave reception */ i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX; i2s_init(I2S2EXT, &i2s_init_struct); - - i2s_init_struct.operation_mode = I2S_MODE_SLAVE_RX; - i2s_init(SPI3, &i2s_init_struct); - i2s_init_struct.operation_mode =I2S_MODE_SLAVE_TX; - i2s_init(I2S3EXT, &i2s_init_struct); - - dma_channel_enable(DMA1_CHANNEL1, TRUE); - dma_channel_enable(DMA1_CHANNEL2, TRUE); - dma_channel_enable(DMA1_CHANNEL3, TRUE); - dma_channel_enable(DMA1_CHANNEL4, TRUE); + + /* use dma transmit and receive */ spi_i2s_dma_transmitter_enable(SPI2, TRUE); spi_i2s_dma_receiver_enable(I2S2EXT, TRUE); + + i2s_enable(SPI2, TRUE); + i2s_enable(I2S2EXT, TRUE); + + /* slave i2s initialization */ + crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); + + /* i2s3 as slave reception */ + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; + i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; + i2s_init_struct.mclk_output_enable = TRUE; + i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K; + i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; + i2s_init_struct.operation_mode = I2S_MODE_SLAVE_RX; + i2s_init(SPI3, &i2s_init_struct); + + /* i2s3ext as slave transmission */ + i2s_init_struct.operation_mode =I2S_MODE_SLAVE_TX; + i2s_init(I2S3EXT, &i2s_init_struct); + + /* use dma transmit and receive */ spi_i2s_dma_receiver_enable(SPI3, TRUE); spi_i2s_dma_transmitter_enable(I2S3EXT, TRUE); + + i2s_enable(SPI3, TRUE); + i2s_enable(I2S3EXT, TRUE); } /** @@ -175,54 +222,56 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); gpio_pin_remap_config(SPI3_GMUX_0001, TRUE); - /* master ws pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); - /* master ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + /* master i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* master ext_sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_14; + /* master i2s sdext pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); - /* master sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + /* master i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); - /* slave ws pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_4; + /* slave i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_4; gpio_init(GPIOA, &gpio_initstructure); - /* slave ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_10; + /* slave i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_10; gpio_init(GPIOC, &gpio_initstructure); - /* slave ext_sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_11; + /* slave i2s sdext pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_11; gpio_init(GPIOC, &gpio_initstructure); - /* slave sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + /* slave i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOC, &gpio_initstructure); } @@ -235,18 +284,31 @@ int main(void) { system_clock_config(); at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); + at32_led_on(LED4); tx_data_fill(); gpio_config(); + dma_config(); i2s_config(); - i2s_enable(SPI3, TRUE); - i2s_enable(I2S3EXT, TRUE); - i2s_enable(I2S2EXT, TRUE); - i2s_enable(SPI2, TRUE); - - while(dma_flag_get(DMA1_FDT2_FLAG) == RESET); + + /* enable i2s slave dma to get and fill data */ + dma_channel_enable(DMA1_CHANNEL3, TRUE); + dma_channel_enable(DMA1_CHANNEL4, TRUE); + + /* enable i2s master dma to get and fill data */ + dma_channel_enable(DMA1_CHANNEL2, TRUE); + dma_channel_enable(DMA1_CHANNEL1, TRUE); + + /* wait master and slave spi data receive end */ + while(dma_flag_get(DMA1_FDT2_FLAG) == RESET) + { + } + while(dma_flag_get(DMA1_FDT3_FLAG) == RESET) + { + } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, TXBUF_SIZE); @@ -259,7 +321,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f407/examples/i2s/halfduplex_dma/readme.txt b/project/at_start_f407/examples/i2s/halfduplex_dma/readme.txt index d671128b..daac877b 100644 --- a/project/at_start_f407/examples/i2s/halfduplex_dma/readme.txt +++ b/project/at_start_f407/examples/i2s/halfduplex_dma/readme.txt @@ -13,4 +13,5 @@ - pb13 <---> pb3 - pb15 <---> pb5 - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/i2s/halfduplex_dma/src/main.c b/project/at_start_f407/examples/i2s/halfduplex_dma/src/main.c index fe7d2bcd..3d5938b8 100644 --- a/project/at_start_f407/examples/i2s/halfduplex_dma/src/main.c +++ b/project/at_start_f407/examples/i2s/halfduplex_dma/src/main.c @@ -44,10 +44,6 @@ uint16_t i2s3_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, uint16_t i2s2_buffer_rx[32]; volatile error_status transfer_status = ERROR; -static void gpio_config(void); -static void i2s_config(void); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer_compare function. * @param none @@ -69,18 +65,18 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf } /** - * @brief i2s configuration. + * @brief dma configuration. * @param none * @retval none */ -static void i2s_config(void) +static void dma_config(void) { dma_init_type dma_init_struct; - i2s_init_type i2s_init_struct; crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE); - dma_reset(DMA1_CHANNEL4); + + /* use dma2_channel2 as spi3 transmit channel */ dma_reset(DMA2_CHANNEL2); dma_default_para_init(&dma_init_struct); dma_init_struct.buffer_size = 32; @@ -94,15 +90,36 @@ static void i2s_config(void) dma_init_struct.priority = DMA_PRIORITY_HIGH; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA2_CHANNEL2, &dma_init_struct); - + + /* use dma1_channel4 as spi2 receive channel */ + dma_reset(DMA1_CHANNEL4); + dma_init_struct.buffer_size = 32; dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; + dma_init_struct.memory_inc_enable = TRUE; dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_HIGH; + dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL4, &dma_init_struct); +} +/** + * @brief i2s configuration. + * @param none + * @retval none + */ +static void i2s_config(void) +{ + i2s_init_type i2s_init_struct; + + /* master i2s initialization */ crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); i2s_default_para_init(&i2s_init_struct); + + /* master transmission mode */ i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; i2s_init_struct.mclk_output_enable = TRUE; @@ -110,14 +127,27 @@ static void i2s_config(void) i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX; i2s_init(SPI3, &i2s_init_struct); - - i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX; + + /* use dma transmit */ + spi_i2s_dma_transmitter_enable(SPI3, TRUE); + + i2s_enable(SPI3, TRUE); + + /* slave i2s initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* slave reception mode */ + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; + i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; + i2s_init_struct.mclk_output_enable = TRUE; + i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K; + i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; + i2s_init_struct.operation_mode = I2S_MODE_SLAVE_RX; i2s_init(SPI2, &i2s_init_struct); - dma_channel_enable(DMA2_CHANNEL2, TRUE); - dma_channel_enable(DMA1_CHANNEL4, TRUE); + /* use dma receive */ spi_i2s_dma_receiver_enable(SPI2, TRUE); - i2s_enable(SPI3, TRUE); + i2s_enable(SPI2, TRUE); } @@ -135,48 +165,50 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); - /* master ws pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOA, &gpio_initstructure); - /* master ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_3; + /* master i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_3; gpio_init(GPIOB, &gpio_initstructure); - /* master sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; + /* master i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOB, &gpio_initstructure); - /* master mck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; + /* master i2s mck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOC, &gpio_initstructure); - /* slave ws pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + /* slave i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); - /* slave ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + /* slave i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* slave sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + /* slave i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); } @@ -189,14 +221,25 @@ int main(void) { system_clock_config(); at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); + at32_led_on(LED4); gpio_config(); + dma_config(); i2s_config(); - spi_i2s_dma_transmitter_enable(SPI3, TRUE); + + /* enable i2s slave dma to get data */ + dma_channel_enable(DMA1_CHANNEL4, TRUE); + + /* enable i2s master dma to fill data */ + dma_channel_enable(DMA2_CHANNEL2, TRUE); - while(dma_flag_get(DMA1_FDT4_FLAG) == RESET); + /* wait slave i2s data receive end */ + while(dma_flag_get(DMA1_FDT4_FLAG) == RESET) + { + } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32); @@ -208,7 +251,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f407/examples/i2s/halfduplex_interrupt/readme.txt b/project/at_start_f407/examples/i2s/halfduplex_interrupt/readme.txt index 1bdf287d..56c33715 100644 --- a/project/at_start_f407/examples/i2s/halfduplex_interrupt/readme.txt +++ b/project/at_start_f407/examples/i2s/halfduplex_interrupt/readme.txt @@ -13,4 +13,5 @@ - pb13 <---> pb3 - pb15 <---> pb5 - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/i2s/halfduplex_interrupt/src/at32f403a_407_int.c b/project/at_start_f407/examples/i2s/halfduplex_interrupt/src/at32f403a_407_int.c index f10cb163..20e648ca 100644 --- a/project/at_start_f407/examples/i2s/halfduplex_interrupt/src/at32f403a_407_int.c +++ b/project/at_start_f407/examples/i2s/halfduplex_interrupt/src/at32f403a_407_int.c @@ -24,11 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f403a_407_int.h" -#include "at32f403a_407_board.h" - -extern uint16_t i2s3_buffer_tx[]; -extern uint16_t i2s2_buffer_rx[]; -extern __IO uint32_t tx_index, rx_index; /** @addtogroup AT32F407_periph_examples * @{ @@ -135,37 +130,6 @@ void SysTick_Handler(void) { } - -/** - * @brief This function handles the spi2 interrupt request. - * @param None - * @retval None - */ - void SPI2_I2S2EXT_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) - { - i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); - } -} - -/** - * @brief This function handles the spi3 interrupt request. - * @param None - * @retval None - */ -void SPI3_I2S3EXT_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI3, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]); - if(tx_index == 32) - { - spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, FALSE); - } - } -} - /** * @} */ diff --git a/project/at_start_f407/examples/i2s/halfduplex_interrupt/src/main.c b/project/at_start_f407/examples/i2s/halfduplex_interrupt/src/main.c index 46075111..5085aea3 100644 --- a/project/at_start_f407/examples/i2s/halfduplex_interrupt/src/main.c +++ b/project/at_start_f407/examples/i2s/halfduplex_interrupt/src/main.c @@ -44,11 +44,6 @@ uint16_t i2s2_buffer_rx[32]; __IO uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; -static void gpio_config(void); -static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); -error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer_compare function. * @param none @@ -100,15 +95,14 @@ error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint1 static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq) { i2s_init_type i2s_init_struct; - + + /* master i2s initialization */ crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); - nvic_irq_enable(SPI3_I2S3EXT_IRQn, 0, 0); - nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); - spi_i2s_reset(SPI2); spi_i2s_reset(SPI3); i2s_default_para_init(&i2s_init_struct); + + /* master transmission mode */ i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; i2s_init_struct.data_channel_format = format; i2s_init_struct.mclk_output_enable = TRUE; @@ -116,14 +110,26 @@ static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_f i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX; i2s_init(SPI3, &i2s_init_struct); - + + /* enable transmit data buffer empty interrupt */ + spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, TRUE); + + /* slave i2s initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); + spi_i2s_reset(SPI2); + + /* slave reception mode */ + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; + i2s_init_struct.data_channel_format = format; + i2s_init_struct.mclk_output_enable = TRUE; + i2s_init_struct.audio_sampling_freq = freq; + i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX; i2s_init(SPI2, &i2s_init_struct); - + + /* enable receive data buffer full interrupt */ spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE); - spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, TRUE); - i2s_enable(SPI2, TRUE); - i2s_enable(SPI3, TRUE); } /** @@ -140,51 +146,83 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); - /* master ws pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOA, &gpio_initstructure); - /* master ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_3; + /* master i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_3; gpio_init(GPIOB, &gpio_initstructure); - /* master sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; + /* master i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOB, &gpio_initstructure); - /* master mck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; + /* master i2s mck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOC, &gpio_initstructure); - /* slave ws pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + /* slave i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); - /* slave ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + /* slave i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* slave sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + /* slave i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); } +/** + * @brief spi2 interrupt function + * @param none + * @retval none + */ + void SPI2_I2S2EXT_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) + { + i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); + } +} + +/** + * @brief spi3 interrupt function + * @param none + * @retval none + */ +void SPI3_I2S3EXT_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI3, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]); + if(tx_index == 32) + { + spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, FALSE); + } + } +} + /** * @brief main function. * @param none @@ -196,22 +234,45 @@ int main(void) nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); system_clock_config(); at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); + at32_led_on(LED4); gpio_config(); i2s_config(I2S_DATA_16BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_48K); + + /* enable slave and master i2s to start communication */ + i2s_enable(SPI2, TRUE); + i2s_enable(SPI3, TRUE); + + /* wait data receive end */ while(rx_index < 32); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32); - for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0; + /* receive buffer clear */ tx_index = 0; rx_index = 0; - + for(index = 0; index < 32; index++) + { + i2s2_buffer_rx[index] = 0; + } + + /* change frame format */ i2s_config(I2S_DATA_24BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_16K); + + /* enable slave and master i2s to start communication */ + i2s_enable(SPI2, TRUE); + i2s_enable(SPI3, TRUE); + + /* wait data receive end */ while(rx_index < 32); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status2 = buffer_compare_24bits(i2s2_buffer_rx, i2s3_buffer_tx, 32); @@ -223,7 +284,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) diff --git a/project/at_start_f407/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt b/project/at_start_f407/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt index f65313d5..8de1a367 100644 --- a/project/at_start_f407/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt +++ b/project/at_start_f407/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt @@ -13,4 +13,5 @@ - pb13 <---> pb3 - pb15 <---> pb5 - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c b/project/at_start_f407/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c index 76f2398e..5322c61a 100644 --- a/project/at_start_f407/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c +++ b/project/at_start_f407/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c @@ -34,6 +34,9 @@ * @{ */ +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15) + uint16_t i2s3_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718, 0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324, @@ -53,11 +56,6 @@ uint16_t spi2_buffer_rx[32]; __IO uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR, transfer_status3 = ERROR; -static void gpio_config(void); -static void spi_config(void); -static void i2s_config(i2s_operation_mode_type i2s3_mode, i2s_operation_mode_type i2s2_mode); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer_compare function. * @param none @@ -86,13 +84,12 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf static void i2s_config(i2s_operation_mode_type i2s3_mode, i2s_operation_mode_type i2s2_mode) { i2s_init_type i2s_init_struct; - + + /* i2s3 initialization */ crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); - - spi_i2s_reset(SPI2); spi_i2s_reset(SPI3); i2s_default_para_init(&i2s_init_struct); + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; i2s_init_struct.mclk_output_enable = FALSE; @@ -100,7 +97,15 @@ static void i2s_config(i2s_operation_mode_type i2s3_mode, i2s_operation_mode_typ i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode = i2s3_mode; i2s_init(SPI3, &i2s_init_struct); - + + /* i2s2 initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + spi_i2s_reset(SPI2); + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; + i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; + i2s_init_struct.mclk_output_enable = FALSE; + i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K; + i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode =i2s2_mode; i2s_init(SPI2, &i2s_init_struct); } @@ -113,12 +118,13 @@ static void i2s_config(i2s_operation_mode_type i2s3_mode, i2s_operation_mode_typ static void spi_config(void) { spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); - - spi_i2s_reset(SPI2); spi_i2s_reset(SPI3); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode-transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode =SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -128,71 +134,92 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI3, &spi_init_struct); - + + spi_enable(SPI3, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + spi_i2s_reset(SPI2); + + /* dual line unidirectional simplex receive-only mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_SIMPLEX_RX; spi_init_struct.master_slave_mode =SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_16BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); spi_enable(SPI2, TRUE); - spi_enable(SPI3, TRUE); + } /** * @brief gpio configuration. - * @param none + * @param spi_i2s_mode:select spi or i2s to be use + * - 0 (spi mode) + * - 1 (i2s mode) * @retval none */ -static void gpio_config(void) +static void gpio_config(uint16_t spi_i2s_mode) { gpio_init_type gpio_initstructure; crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); - /* master ws pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master ws/cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + if(spi_i2s_mode == 0) + { + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + } + else + { + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + } gpio_init(GPIOA, &gpio_initstructure); + if(spi_i2s_mode == 0) + { + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + } /* master ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_3; + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_3; gpio_init(GPIOB, &gpio_initstructure); /* master sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOB, &gpio_initstructure); - /* master mck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; - gpio_init(GPIOC, &gpio_initstructure); - /* slave ws pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); /* slave ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); /* slave sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); } @@ -206,53 +233,97 @@ int main(void) __IO uint32_t index = 0; system_clock_config(); at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); - gpio_config(); + at32_led_on(LED4); + + /* first: i2s communication */ + gpio_config(1); i2s_config(I2S_MODE_MASTER_TX, I2S_MODE_SLAVE_RX); i2s_enable(SPI2, TRUE); i2s_enable(SPI3, TRUE); while(rx_index < 32) { + /* i2s transmit data fill */ while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]); + + /* i2s receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32); + /* receive buffer clear */ tx_index = 0; rx_index = 0; + for(index = 0; index < 32; index++) + { + i2s2_buffer_rx[index] = 0; + } + + /* second: spi communication */ + gpio_config(0); spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + while(rx_index < 32) { + /* spi transmit data fill */ while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI3, spi3_buffer_tx[tx_index++]); + + /* spi receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ transfer_status2 = buffer_compare(spi2_buffer_rx, spi3_buffer_tx, 32); - for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0; + /* receive buffer clear */ tx_index = 0; rx_index = 0; + for(index = 0; index < 32; index++) + { + i2s2_buffer_rx[index] = 0; + } + + /* third: i2s communication */ + gpio_config(1); i2s_config(I2S_MODE_SLAVE_TX, I2S_MODE_MASTER_RX); + + /* when slave transmission mode,the slave trans data need fill in advance */ while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]); + i2s_enable(SPI3, TRUE); i2s_enable(SPI2, TRUE); while(rx_index < 32) { + /* i2s receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); + + /* i2s transmit data fill */ while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]); } + + /* master half duplex receiving mode,the busy flag isnot usefull */ /* test result:the data check */ transfer_status3 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32); @@ -264,7 +335,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f407/examples/pwc/deepsleep_rtc/src/main.c b/project/at_start_f407/examples/pwc/deepsleep_rtc/src/main.c index cd34e9c6..ffb456d0 100644 --- a/project/at_start_f407/examples/pwc/deepsleep_rtc/src/main.c +++ b/project/at_start_f407/examples/pwc/deepsleep_rtc/src/main.c @@ -122,11 +122,14 @@ void system_clock_recover(void) */ int main(void) { - __IO uint32_t index = 0; + crm_clocks_freq_type crm_clocks_freq_struct = {0}; __IO uint32_t systick_index = 0; /* congfig the system clock */ system_clock_config(); + + /* get system clock */ + crm_clocks_freq_get(&crm_clocks_freq_struct); /* init at start board */ at32_board_init(); @@ -178,8 +181,18 @@ int main(void) /* restore systick register configuration */ SysTick->CTRL |= systick_index; - /* wait 3 LICK cycles to ensure clock stable */ - delay_us(5); + /* wait 3 LICK(maximum 120us) cycles to ensure clock stable */ + /* when wakeup from deepsleep,system clock source changes to HICK */ + if((CRM->misc3_bit.hick_to_sclk == TRUE) && (CRM->misc1_bit.hickdiv == TRUE)) + { + /* HICK is 48MHz */ + delay_us(((120 * 6 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1); + } + else + { + /* HICK is 8MHz */ + delay_us(((120 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1); + } /* wake up from deep sleep mode, congfig the system clock */ system_clock_recover(); diff --git a/project/at_start_f407/examples/spi/crc_transfer_polling/readme.txt b/project/at_start_f407/examples/spi/crc_transfer_polling/readme.txt index 9c89d4c4..ec29e71b 100644 --- a/project/at_start_f407/examples/spi/crc_transfer_polling/readme.txt +++ b/project/at_start_f407/examples/spi/crc_transfer_polling/readme.txt @@ -9,8 +9,10 @@ crc value by polling mode. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa6(miso) pb15(mosi) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/spi/crc_transfer_polling/src/main.c b/project/at_start_f407/examples/spi/crc_transfer_polling/src/main.c index babd014f..13f63784 100644 --- a/project/at_start_f407/examples/spi/crc_transfer_polling/src/main.c +++ b/project/at_start_f407/examples/spi/crc_transfer_polling/src/main.c @@ -34,7 +34,9 @@ * @{ */ -#define BUFFER_SIZE 32 +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 uint16_t spi1_tx_buffer[BUFFER_SIZE] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718, 0x191A, 0x1B1C, 0x1D1E, 0x1F20, @@ -49,10 +51,6 @@ uint32_t tx_index = 0, rx_index = 0; __IO uint16_t crc1_value = 0, crc2_value = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -81,9 +79,12 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf static void spi_config(void) { spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -93,15 +94,31 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - - spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; - spi_init(SPI2, &spi_init_struct); - + + /* hardware crc calculation config */ spi_crc_polynomial_set(SPI1, 7); - spi_crc_polynomial_set(SPI2, 7); spi_crc_enable(SPI1, TRUE); - spi_crc_enable(SPI2, TRUE); + spi_enable(SPI1, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; + spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_16BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init(SPI2, &spi_init_struct); + + /* hardware crc calculation config */ + spi_crc_polynomial_set(SPI2, 7); + spi_crc_enable(SPI2, TRUE); + spi_enable(SPI2, TRUE); } @@ -115,45 +132,70 @@ static void gpio_config(void) gpio_init_type gpio_initstructure; crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* master spi miso pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_6; gpio_init(GPIOA, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* master spi mosi pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* slave spi miso pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* slave spi mosi pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); @@ -168,35 +210,58 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); gpio_config(); spi_config(); - + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + /* transfer procedure:the "BUFFER_SIZE-1" data transfer */ while(tx_index < BUFFER_SIZE - 1) { + /* slave and master transmit data fill */ while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]); while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + + /* slave and master receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2); while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); } + + /* wait master and slave transmit data buffer empty */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); /* transfer procedure:the last data and crc transfer */ + /* slave the last transmit data fill and crc transfer setting */ spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]); spi_crc_next_transmit(SPI2); + + /* master the last transmit data fill and crc transfer setting */ spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index]); spi_crc_next_transmit(SPI1); + + /* wait master and slave the last data transfer end */ while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index] = spi_i2s_data_receive(SPI1); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2); + + /* wait master and slave the crc transfer end */ while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data and crc check */ transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); @@ -221,7 +286,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_clock.h b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_clock.h new file mode 100644 index 00000000..20f803ab --- /dev/null +++ b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_clock.h @@ -0,0 +1,44 @@ +/** + ************************************************************************** + * @file at32f403a_407_clock.h + * @brief header file of clock program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F403A_407_CLOCK_H +#define __AT32F403A_407_CLOCK_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f403a_407.h" + +/* exported functions ------------------------------------------------------- */ +void system_clock_config(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __AT32F403A_407_CLOCK_H */ + diff --git a/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_conf.h b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_conf.h new file mode 100644 index 00000000..4608566d --- /dev/null +++ b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_conf.h @@ -0,0 +1,162 @@ +/** + ************************************************************************** + * @file at32f403a_407_conf.h + * @brief at32f403a_407 config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F403A_407_CONF_H +#define __AT32F403A_407_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + * @brief in the following line adjust the value of high speed external crystal (hext) + * used in your application + * + * tip: to avoid modifying this file each time you need to use different hext, you + * can define the hext value in your toolchain compiler preprocessor. + * + */ +#if !defined HEXT_VALUE +#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed external crystal in hz */ +#endif + +/** + * @brief in the following line adjust the high speed external crystal (hext) startup + * timeout value + */ +#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */ +#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */ +#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */ + +/* module define -------------------------------------------------------------*/ +#define CRM_MODULE_ENABLED +#define TMR_MODULE_ENABLED +#define RTC_MODULE_ENABLED +#define BPR_MODULE_ENABLED +#define GPIO_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define USART_MODULE_ENABLED +#define PWC_MODULE_ENABLED +#define CAN_MODULE_ENABLED +#define ADC_MODULE_ENABLED +#define DAC_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define DMA_MODULE_ENABLED +#define DEBUG_MODULE_ENABLED +#define FLASH_MODULE_ENABLED +#define CRC_MODULE_ENABLED +#define WWDT_MODULE_ENABLED +#define WDT_MODULE_ENABLED +#define EXINT_MODULE_ENABLED +#define SDIO_MODULE_ENABLED +#define XMC_MODULE_ENABLED +#define USB_MODULE_ENABLED +#define ACC_MODULE_ENABLED +#define MISC_MODULE_ENABLED +#define EMAC_MODULE_ENABLED + +/* includes ------------------------------------------------------------------*/ +#ifdef CRM_MODULE_ENABLED +#include "at32f403a_407_crm.h" +#endif +#ifdef TMR_MODULE_ENABLED +#include "at32f403a_407_tmr.h" +#endif +#ifdef RTC_MODULE_ENABLED +#include "at32f403a_407_rtc.h" +#endif +#ifdef BPR_MODULE_ENABLED +#include "at32f403a_407_bpr.h" +#endif +#ifdef GPIO_MODULE_ENABLED +#include "at32f403a_407_gpio.h" +#endif +#ifdef I2C_MODULE_ENABLED +#include "at32f403a_407_i2c.h" +#endif +#ifdef USART_MODULE_ENABLED +#include "at32f403a_407_usart.h" +#endif +#ifdef PWC_MODULE_ENABLED +#include "at32f403a_407_pwc.h" +#endif +#ifdef CAN_MODULE_ENABLED +#include "at32f403a_407_can.h" +#endif +#ifdef ADC_MODULE_ENABLED +#include "at32f403a_407_adc.h" +#endif +#ifdef DAC_MODULE_ENABLED +#include "at32f403a_407_dac.h" +#endif +#ifdef SPI_MODULE_ENABLED +#include "at32f403a_407_spi.h" +#endif +#ifdef DMA_MODULE_ENABLED +#include "at32f403a_407_dma.h" +#endif +#ifdef DEBUG_MODULE_ENABLED +#include "at32f403a_407_debug.h" +#endif +#ifdef FLASH_MODULE_ENABLED +#include "at32f403a_407_flash.h" +#endif +#ifdef CRC_MODULE_ENABLED +#include "at32f403a_407_crc.h" +#endif +#ifdef WWDT_MODULE_ENABLED +#include "at32f403a_407_wwdt.h" +#endif +#ifdef WDT_MODULE_ENABLED +#include "at32f403a_407_wdt.h" +#endif +#ifdef EXINT_MODULE_ENABLED +#include "at32f403a_407_exint.h" +#endif +#ifdef SDIO_MODULE_ENABLED +#include "at32f403a_407_sdio.h" +#endif +#ifdef XMC_MODULE_ENABLED +#include "at32f403a_407_xmc.h" +#endif +#ifdef ACC_MODULE_ENABLED +#include "at32f403a_407_acc.h" +#endif +#ifdef MISC_MODULE_ENABLED +#include "at32f403a_407_misc.h" +#endif +#ifdef USB_MODULE_ENABLED +#include "at32f403a_407_usb.h" +#endif +#ifdef EMAC_MODULE_ENABLED +#include "at32f403a_407_emac.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_int.h b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_int.h new file mode 100644 index 00000000..0685ab3c --- /dev/null +++ b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/inc/at32f403a_407_int.h @@ -0,0 +1,56 @@ +/** + ************************************************************************** + * @file at32f403a_407_int.h + * @brief header file of main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F403A_407_INT_H +#define __AT32F403A_407_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f403a_407.h" + +/* exported types ------------------------------------------------------------*/ +/* exported constants --------------------------------------------------------*/ +/* exported macro ------------------------------------------------------------*/ +/* exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvoptx b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvoptx similarity index 99% rename from project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvoptx rename to project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvoptx index 6ca8a32d..3d5b35ac 100644 --- a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvoptx +++ b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvoptx @@ -22,7 +22,7 @@ - use_jtagpin_hardwarecs_dma + fullduplex_dma_jtagpin 0x4 ARM-ADS diff --git a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvprojx b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvprojx similarity index 99% rename from project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvprojx rename to project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvprojx index 2938d72c..c8432ba5 100644 --- a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvprojx +++ b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvprojx @@ -7,7 +7,7 @@ - use_jtagpin_hardwarecs_dma + fullduplex_dma_jtagpin 0x4 ARM-ADS 5060960::V5.06 update 7 (build 960)::.\ARMCC @@ -48,7 +48,7 @@ 1 .\objects\ - use_jtagpin_hardwarecs_dma + fullduplex_dma_jtagpin 1 0 1 @@ -482,7 +482,7 @@ - <Project Info> + fullduplex_dma_jtagpin 0 1 diff --git a/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/readme.txt b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/readme.txt new file mode 100644 index 00000000..7a7b9e0d --- /dev/null +++ b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/readme.txt @@ -0,0 +1,18 @@ +/** + ************************************************************************** + * @file readme.txt + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board, in this demo, shows how to use + fullduplex mode transfer data by dma. + the pins connection as follow: + - spi2 slave spi1 master + pb12(cs) <---> pa15(cs) + pb13(sck) <---> pb3(sck) + pb14(miso) <---> pb4(miso) + pb15(mosi) <---> pb5(mosi) + + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/src/at32f403a_407_clock.c b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/src/at32f403a_407_clock.c new file mode 100644 index 00000000..77832d69 --- /dev/null +++ b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/src/at32f403a_407_clock.c @@ -0,0 +1,98 @@ +/** + ************************************************************************** + * @file at32f403a_407_clock.c + * @brief system clock config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f403a_407_clock.h" + +/** + * @brief system clock config program + * @note the system clock is configured as follow: + * system clock (sclk) = hext / 2 * pll_mult + * system clock source = pll (hext) + * - hext = HEXT_VALUE + * - sclk = 240000000 + * - ahbdiv = 1 + * - ahbclk = 240000000 + * - apb2div = 2 + * - apb2clk = 120000000 + * - apb1div = 2 + * - apb1clk = 120000000 + * - pll_mult = 60 + * - pll_range = GT72MHZ (greater than 72 mhz) + * @param none + * @retval none + */ +void system_clock_config(void) +{ + /* reset crm */ + crm_reset(); + + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + + /* wait till hext is ready */ + while(crm_hext_stable_wait() == ERROR) + { + } + + /* config pll clock resource */ + crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_60, CRM_PLL_OUTPUT_RANGE_GT72MHZ); + + /* config hext division */ + crm_hext_clock_div_set(CRM_HEXT_DIV_2); + + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + + /* wait till pll is ready */ + while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) + { + } + + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); + + /* config apb2clk, the maximum frequency of APB1/APB2 clock is 120 MHz */ + crm_apb2_div_set(CRM_APB2_DIV_2); + + /* config apb1clk, the maximum frequency of APB1/APB2 clock is 120 MHz */ + crm_apb1_div_set(CRM_APB1_DIV_2); + + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); + + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); + + /* wait till pll is used as system clock source */ + while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) + { + } + + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); + + /* update system_core_clock global variable */ + system_core_clock_update(); +} + diff --git a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f403a_407_int.c b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/src/at32f403a_407_int.c similarity index 93% rename from project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f403a_407_int.c rename to project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/src/at32f403a_407_int.c index 94080683..be16a4c0 100644 --- a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f403a_407_int.c +++ b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/src/at32f403a_407_int.c @@ -30,7 +30,7 @@ * @{ */ -/** @addtogroup 407_SPI_use_jtagpin_hardwarecs_dma +/** @addtogroup 407_SPI_fullduplex_dma_jtagpin * @{ */ diff --git a/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/src/main.c b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/src/main.c new file mode 100644 index 00000000..ba5b4b93 --- /dev/null +++ b/project/at_start_f407/examples/spi/fullduplex_dma_jtagpin/src/main.c @@ -0,0 +1,337 @@ +/** + ************************************************************************** + * @file main.c + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +#include "at32f403a_407_board.h" +#include "at32f403a_407_clock.h" + +/** @addtogroup AT32F407_periph_examples + * @{ + */ + +/** @addtogroup 407_SPI_fullduplex_dma_jtagpin SPI_fullduplex_dma_jtagpin + * @{ + */ + +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15) +#define BUFFER_SIZE 32 + +spi_init_type spi_init_struct; +uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, + 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, + 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, + 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20}; +uint8_t spi2_tx_buffer[BUFFER_SIZE] = {0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, + 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, 0x60, + 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, + 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70}; +uint8_t spi1_rx_buffer[BUFFER_SIZE], spi2_rx_buffer[BUFFER_SIZE]; +volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; + +/** + * @brief buffer compare function. + * @param pbuffer1, pbuffer2: buffers to be compared. + * @param buffer_length: buffer's length + * @retval the result of compare + */ +error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length) +{ + while(buffer_length--) + { + if(*pbuffer1 != *pbuffer2) + { + return ERROR; + } + + pbuffer1++; + pbuffer2++; + } + return SUCCESS; +} + +/** + * @brief dma configuration. + * @param none + * @retval none + */ +static void dma_config(void) +{ + dma_init_type dma_init_struct; + crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); + + /* use dma1_channel1 as spi1 transmit channel */ + dma_reset(DMA1_CHANNEL1); + dma_default_para_init(&dma_init_struct); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; + dma_init_struct.memory_base_addr = (uint32_t)spi1_tx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI1->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA1_CHANNEL1, &dma_init_struct); + dma_flexible_config(DMA1, FLEX_CHANNEL1, DMA_FLEXIBLE_SPI1_TX); + + /* use dma1_channel2 as spi1 receive channel */ + dma_reset(DMA1_CHANNEL2); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; + dma_init_struct.memory_base_addr = (uint32_t)spi1_rx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI1->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA1_CHANNEL2, &dma_init_struct); + dma_flexible_config(DMA1, FLEX_CHANNEL2, DMA_FLEXIBLE_SPI1_RX); + + crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE); + + /* use dma2_channel1 as spi2 transmit channel */ + dma_reset(DMA2_CHANNEL1); + dma_default_para_init(&dma_init_struct); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; + dma_init_struct.memory_base_addr = (uint32_t)spi2_tx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA2_CHANNEL1, &dma_init_struct); + dma_flexible_config(DMA2, FLEX_CHANNEL1, DMA_FLEXIBLE_SPI2_TX); + + /* use dma2_channel2 as spi2 receive channel */ + dma_reset(DMA2_CHANNEL2); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; + dma_init_struct.memory_base_addr = (uint32_t)spi2_rx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA2_CHANNEL2, &dma_init_struct); + dma_flexible_config(DMA2, FLEX_CHANNEL2, DMA_FLEXIBLE_SPI2_RX); +} + +/** + * @brief spi configuration. + * @param none + * @retval none + */ +static void spi_config(void) +{ + /* spi master initialization */ + crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); + spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; + spi_init_struct.master_slave_mode = SPI_MODE_MASTER; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; + spi_init(SPI1, &spi_init_struct); + + /* use dma transmit and receive */ + spi_i2s_dma_transmitter_enable(SPI1, TRUE); + spi_i2s_dma_receiver_enable(SPI1, TRUE); + + spi_enable(SPI1, TRUE); + + /* spi slave initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; + spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init(SPI2, &spi_init_struct); + + /* use dma transmit and receive */ + spi_i2s_dma_transmitter_enable(SPI2, TRUE); + spi_i2s_dma_receiver_enable(SPI2, TRUE); + + spi_enable(SPI2, TRUE); +} + +/** + * @brief gpio configuration. + * @param none + * @retval none + */ +static void gpio_config(void) +{ + gpio_init_type gpio_initstructure; + crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); + gpio_pin_remap_config(SWJTAG_MUX_010, TRUE); + gpio_pin_remap_config(SPI1_MUX_01, TRUE); + gpio_default_para_init(&gpio_initstructure); + + /* spi master gpio initialization */ + /* spi1 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* spi1 sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_3; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi1 miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi1 mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 gpio initialization */ + /* spi2 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_14; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_init(GPIOB, &gpio_initstructure); +} + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + __IO uint32_t index = 0; + system_clock_config(); + at32_board_init(); + at32_led_on(LED4); + dma_config(); + gpio_config(); + spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + /* enable spi slave dma to fill and get data */ + dma_channel_enable(DMA2_CHANNEL1, TRUE); + dma_channel_enable(DMA2_CHANNEL2, TRUE); + + /* enable spi master dma to fill and get data */ + dma_channel_enable(DMA1_CHANNEL1, TRUE); + dma_channel_enable(DMA1_CHANNEL2, TRUE); + + /* wait master and slave spi data receive end */ + while(dma_flag_get(DMA1_FDT2_FLAG) == RESET) + { + } + while(dma_flag_get(DMA2_FDT2_FLAG) == RESET) + { + } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* test result:the data check */ + transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); + transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE); + + /* test result indicate:if SUCCESS ,led2 lights */ + if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS)) + { + at32_led_on(LED2); + } + else + { + at32_led_on(LED3); + } + while(1) + { + } +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f407/examples/spi/fullduplex_polling/readme.txt b/project/at_start_f407/examples/spi/fullduplex_polling/readme.txt index 780ce5ef..f75f4e10 100644 --- a/project/at_start_f407/examples/spi/fullduplex_polling/readme.txt +++ b/project/at_start_f407/examples/spi/fullduplex_polling/readme.txt @@ -8,9 +8,11 @@ this demo is based on the at-start board, in this demo, shows how to use fullduplex mode transfer data by polling mode. the pins connection as follow: - - spi2 slaver spi1 master + - spi2 spi1 + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa6(miso) pb15(mosi) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/spi/fullduplex_polling/src/main.c b/project/at_start_f407/examples/spi/fullduplex_polling/src/main.c index f6aefdf7..66eb520f 100644 --- a/project/at_start_f407/examples/spi/fullduplex_polling/src/main.c +++ b/project/at_start_f407/examples/spi/fullduplex_polling/src/main.c @@ -34,7 +34,12 @@ * @{ */ -#define BUFFER_SIZE 32 +#define SPI1_AS_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI1_AS_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) + +#define SPI2_AS_MASTER_CS_HIGH gpio_bits_set(GPIOB, GPIO_PINS_12) +#define SPI2_AS_MASTER_CS_LOW gpio_bits_reset(GPIOB, GPIO_PINS_12) +#define BUFFER_SIZE 32 spi_init_type spi_init_struct; uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, @@ -50,10 +55,6 @@ uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; volatile error_status transfer_status3 = ERROR, transfer_status4 = ERROR; -static void gpio_config(uint16_t spi1_mode, uint16_t spi2_mode); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -82,9 +83,11 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -94,11 +97,23 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + spi_enable(SPI1, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - spi_enable(SPI1, TRUE); spi_enable(SPI2, TRUE); } @@ -113,85 +128,124 @@ static void gpio_config(uint16_t spi1_mode, uint16_t spi2_mode) crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); gpio_default_para_init(&gpio_initstructure); - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* spi1 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; if(spi1_mode == SPI_MODE_MASTER) { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + } + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* spi1 sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + if(spi1_mode == SPI_MODE_MASTER) + { + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + } + else + { + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); /* spi1 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi1_mode == SPI_MODE_MASTER) { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } gpio_initstructure.gpio_pins = GPIO_PINS_6; gpio_init(GPIOA, &gpio_initstructure); /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi1_mode == SPI_MODE_MASTER) { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); - - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + + /* spi2 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; if(spi2_mode == SPI_MODE_SLAVE) { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + } + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + if(spi2_mode == SPI_MODE_SLAVE) + { + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + } + else + { + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); /* spi2 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi2_mode == SPI_MODE_SLAVE) { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); /* spi2 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi2_mode == SPI_MODE_SLAVE) { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + if(spi1_mode == SPI_MODE_MASTER) + { + SPI1_AS_MASTER_CS_HIGH; + } + if(spi2_mode == SPI_MODE_MASTER) + { + SPI2_AS_MASTER_CS_HIGH; + } } /** @@ -204,58 +258,90 @@ int main(void) __IO uint32_t index = 0; system_clock_config(); at32_board_init(); + at32_led_on(LED4); gpio_config(SPI_MODE_MASTER, SPI_MODE_SLAVE); spi_config(); - + + /* start communication: master pull down CS pin select slave */ + SPI1_AS_MASTER_CS_LOW; + /* transfer procedure:the "BUFFER_SIZE" data transfer */ while(tx_index < BUFFER_SIZE) { + /* slave and master transmit data fill */ while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]); while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + + /* slave and master receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2); while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); } - + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI1_AS_MASTER_CS_HIGH; + /* test result:the data check */ transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE); - - /* master &slave mode switch */ + spi_enable(SPI1, FALSE); spi_enable(SPI2, FALSE); + + /* master & slave mode switch */ gpio_config(SPI_MODE_SLAVE, SPI_MODE_MASTER); spi_init_struct.master_slave_mode =SPI_MODE_SLAVE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI1, &spi_init_struct); - + spi_init_struct.master_slave_mode =SPI_MODE_MASTER; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI2, &spi_init_struct); - + + /* receive buffer clear */ tx_index = 0; rx_index = 0; for(index = 0; index < BUFFER_SIZE; index++) + { spi1_rx_buffer[index] = 0; - for(index = 0; index < BUFFER_SIZE; index++) spi2_rx_buffer[index] = 0; - + } + spi_enable(SPI2, TRUE); spi_enable(SPI1, TRUE); + + /* start communication: master pull down CS pin select slave */ + SPI2_AS_MASTER_CS_LOW; /* transfer procedure:the "BUFFER_SIZE" data transfer */ while(tx_index < BUFFER_SIZE) { + /* slave and master transmit data fill */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index]); while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]); + + /* slave and master receive data get */ while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index] = spi_i2s_data_receive(SPI1); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI2_AS_MASTER_CS_HIGH; /* test result:the data check */ transfer_status3 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); @@ -269,7 +355,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_clock.h b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_clock.h new file mode 100644 index 00000000..20f803ab --- /dev/null +++ b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_clock.h @@ -0,0 +1,44 @@ +/** + ************************************************************************** + * @file at32f403a_407_clock.h + * @brief header file of clock program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F403A_407_CLOCK_H +#define __AT32F403A_407_CLOCK_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f403a_407.h" + +/* exported functions ------------------------------------------------------- */ +void system_clock_config(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __AT32F403A_407_CLOCK_H */ + diff --git a/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_conf.h b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_conf.h new file mode 100644 index 00000000..4608566d --- /dev/null +++ b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_conf.h @@ -0,0 +1,162 @@ +/** + ************************************************************************** + * @file at32f403a_407_conf.h + * @brief at32f403a_407 config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F403A_407_CONF_H +#define __AT32F403A_407_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + * @brief in the following line adjust the value of high speed external crystal (hext) + * used in your application + * + * tip: to avoid modifying this file each time you need to use different hext, you + * can define the hext value in your toolchain compiler preprocessor. + * + */ +#if !defined HEXT_VALUE +#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed external crystal in hz */ +#endif + +/** + * @brief in the following line adjust the high speed external crystal (hext) startup + * timeout value + */ +#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */ +#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */ +#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */ + +/* module define -------------------------------------------------------------*/ +#define CRM_MODULE_ENABLED +#define TMR_MODULE_ENABLED +#define RTC_MODULE_ENABLED +#define BPR_MODULE_ENABLED +#define GPIO_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define USART_MODULE_ENABLED +#define PWC_MODULE_ENABLED +#define CAN_MODULE_ENABLED +#define ADC_MODULE_ENABLED +#define DAC_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define DMA_MODULE_ENABLED +#define DEBUG_MODULE_ENABLED +#define FLASH_MODULE_ENABLED +#define CRC_MODULE_ENABLED +#define WWDT_MODULE_ENABLED +#define WDT_MODULE_ENABLED +#define EXINT_MODULE_ENABLED +#define SDIO_MODULE_ENABLED +#define XMC_MODULE_ENABLED +#define USB_MODULE_ENABLED +#define ACC_MODULE_ENABLED +#define MISC_MODULE_ENABLED +#define EMAC_MODULE_ENABLED + +/* includes ------------------------------------------------------------------*/ +#ifdef CRM_MODULE_ENABLED +#include "at32f403a_407_crm.h" +#endif +#ifdef TMR_MODULE_ENABLED +#include "at32f403a_407_tmr.h" +#endif +#ifdef RTC_MODULE_ENABLED +#include "at32f403a_407_rtc.h" +#endif +#ifdef BPR_MODULE_ENABLED +#include "at32f403a_407_bpr.h" +#endif +#ifdef GPIO_MODULE_ENABLED +#include "at32f403a_407_gpio.h" +#endif +#ifdef I2C_MODULE_ENABLED +#include "at32f403a_407_i2c.h" +#endif +#ifdef USART_MODULE_ENABLED +#include "at32f403a_407_usart.h" +#endif +#ifdef PWC_MODULE_ENABLED +#include "at32f403a_407_pwc.h" +#endif +#ifdef CAN_MODULE_ENABLED +#include "at32f403a_407_can.h" +#endif +#ifdef ADC_MODULE_ENABLED +#include "at32f403a_407_adc.h" +#endif +#ifdef DAC_MODULE_ENABLED +#include "at32f403a_407_dac.h" +#endif +#ifdef SPI_MODULE_ENABLED +#include "at32f403a_407_spi.h" +#endif +#ifdef DMA_MODULE_ENABLED +#include "at32f403a_407_dma.h" +#endif +#ifdef DEBUG_MODULE_ENABLED +#include "at32f403a_407_debug.h" +#endif +#ifdef FLASH_MODULE_ENABLED +#include "at32f403a_407_flash.h" +#endif +#ifdef CRC_MODULE_ENABLED +#include "at32f403a_407_crc.h" +#endif +#ifdef WWDT_MODULE_ENABLED +#include "at32f403a_407_wwdt.h" +#endif +#ifdef WDT_MODULE_ENABLED +#include "at32f403a_407_wdt.h" +#endif +#ifdef EXINT_MODULE_ENABLED +#include "at32f403a_407_exint.h" +#endif +#ifdef SDIO_MODULE_ENABLED +#include "at32f403a_407_sdio.h" +#endif +#ifdef XMC_MODULE_ENABLED +#include "at32f403a_407_xmc.h" +#endif +#ifdef ACC_MODULE_ENABLED +#include "at32f403a_407_acc.h" +#endif +#ifdef MISC_MODULE_ENABLED +#include "at32f403a_407_misc.h" +#endif +#ifdef USB_MODULE_ENABLED +#include "at32f403a_407_usb.h" +#endif +#ifdef EMAC_MODULE_ENABLED +#include "at32f403a_407_emac.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_int.h b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_int.h new file mode 100644 index 00000000..0685ab3c --- /dev/null +++ b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/inc/at32f403a_407_int.h @@ -0,0 +1,56 @@ +/** + ************************************************************************** + * @file at32f403a_407_int.h + * @brief header file of main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F403A_407_INT_H +#define __AT32F403A_407_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f403a_407.h" + +/* exported types ------------------------------------------------------------*/ +/* exported constants --------------------------------------------------------*/ +/* exported macro ------------------------------------------------------------*/ +/* exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvoptx b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvoptx new file mode 100644 index 00000000..e99df55f --- /dev/null +++ b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvoptx @@ -0,0 +1,368 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp; *.cc; *.cxx + 0 + + + + 0 + 0 + + + + halfduplex_dma_jtagpin + 0x4 + ARM-ADS + + 12000000 + + 0 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 0 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F407_1024 -FS08000000 -FL0100000 -FP0($$Device:-AT32F407VGT7$Flash\AT32F407_1024.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + user + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\src\at32f403a_407_clock.c + at32f403a_407_clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\src\at32f403a_407_int.c + at32f403a_407_int.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\src\main.c + main.c + 0 + 0 + + + + + bsp + 0 + 0 + 0 + 0 + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\..\at32f403a_407_board\at32f403a_407_board.c + at32f403a_407_board.c + 0 + 0 + + + + + firmware + 0 + 0 + 0 + 0 + + 3 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_gpio.c + at32f403a_407_gpio.c + 0 + 0 + + + 3 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_misc.c + at32f403a_407_misc.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_crm.c + at32f403a_407_crm.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_usart.c + at32f403a_407_usart.c + 0 + 0 + + + 3 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_dma.c + at32f403a_407_dma.c + 0 + 0 + + + 3 + 10 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_spi.c + at32f403a_407_spi.c + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 4 + 11 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f403a_407.c + system_at32f403a_407.c + 0 + 0 + + + 4 + 12 + 2 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f403a_407.s + startup_at32f403a_407.s + 0 + 0 + + + + + readme + 0 + 0 + 0 + 0 + + 5 + 13 + 5 + 0 + 0 + 0 + ..\readme.txt + readme.txt + 0 + 0 + + + + diff --git a/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvprojx b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvprojx new file mode 100644 index 00000000..95784c4b --- /dev/null +++ b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvprojx @@ -0,0 +1,492 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + halfduplex_dma_jtagpin + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::.\ARMCC + 0 + + + -AT32F407VGT7 + ArteryTek + ArteryTek.AT32F403A_407_DFP.2.0.2 + IRAM(0x20000000,0x38000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + + 0 + $$Device:-AT32F407VGT7$Device\Include\at32f403a_407.h + + + + + + + + + + $$Device:-AT32F407VGT7$SVD\AT32F407xx_v2.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\objects\ + halfduplex_dma_jtagpin + 1 + 0 + 1 + 1 + 1 + .\listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP + DCM.DLL + -pCM4 + SARMCM3.DLL + + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x38000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x38000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + AT32F407VGT7,USE_STDPERIPH_DRIVER,AT_START_F407_V1 + + ..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\inc;..\..\..\..\..\at32f403a_407_board + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + user + + + at32f403a_407_clock.c + 1 + ..\src\at32f403a_407_clock.c + + + at32f403a_407_int.c + 1 + ..\src\at32f403a_407_int.c + + + main.c + 1 + ..\src\main.c + + + + + bsp + + + at32f403a_407_board.c + 1 + ..\..\..\..\..\at32f403a_407_board\at32f403a_407_board.c + + + + + firmware + + + at32f403a_407_gpio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_gpio.c + + + at32f403a_407_misc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_misc.c + + + at32f403a_407_crm.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_crm.c + + + at32f403a_407_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_usart.c + + + at32f403a_407_dma.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_dma.c + + + at32f403a_407_spi.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_spi.c + + + + + cmsis + + + system_at32f403a_407.c + 1 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f403a_407.c + + + startup_at32f403a_407.s + 2 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f403a_407.s + + + + + readme + + + readme.txt + 5 + ..\readme.txt + + + + + + + + + + + + + + + + + fullduplex_dma_jtagpin + 0 + 1 + + + + + diff --git a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/readme.txt similarity index 81% rename from project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt rename to project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/readme.txt index 34f5cf16..e700a19d 100644 --- a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt +++ b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/readme.txt @@ -6,12 +6,12 @@ */ this demo is based on the at-start board, in this demo, shows how to use - dma recieve data. spi3 use jtag pin as spi pin,and config spi in hardware - cs mode. + dma transmit/recieve data. spi3 use jtag pin as spi pin. the pins connection as follow: - spi2 slaver spi3 master - pb12(cs) <---> pa15(cs) pb13(sck) <---> pb3(sck) pb14(miso) <---> pb5(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/src/at32f403a_407_clock.c b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/src/at32f403a_407_clock.c new file mode 100644 index 00000000..77832d69 --- /dev/null +++ b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/src/at32f403a_407_clock.c @@ -0,0 +1,98 @@ +/** + ************************************************************************** + * @file at32f403a_407_clock.c + * @brief system clock config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f403a_407_clock.h" + +/** + * @brief system clock config program + * @note the system clock is configured as follow: + * system clock (sclk) = hext / 2 * pll_mult + * system clock source = pll (hext) + * - hext = HEXT_VALUE + * - sclk = 240000000 + * - ahbdiv = 1 + * - ahbclk = 240000000 + * - apb2div = 2 + * - apb2clk = 120000000 + * - apb1div = 2 + * - apb1clk = 120000000 + * - pll_mult = 60 + * - pll_range = GT72MHZ (greater than 72 mhz) + * @param none + * @retval none + */ +void system_clock_config(void) +{ + /* reset crm */ + crm_reset(); + + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + + /* wait till hext is ready */ + while(crm_hext_stable_wait() == ERROR) + { + } + + /* config pll clock resource */ + crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_60, CRM_PLL_OUTPUT_RANGE_GT72MHZ); + + /* config hext division */ + crm_hext_clock_div_set(CRM_HEXT_DIV_2); + + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + + /* wait till pll is ready */ + while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) + { + } + + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); + + /* config apb2clk, the maximum frequency of APB1/APB2 clock is 120 MHz */ + crm_apb2_div_set(CRM_APB2_DIV_2); + + /* config apb1clk, the maximum frequency of APB1/APB2 clock is 120 MHz */ + crm_apb1_div_set(CRM_APB1_DIV_2); + + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); + + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); + + /* wait till pll is used as system clock source */ + while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) + { + } + + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); + + /* update system_core_clock global variable */ + system_core_clock_update(); +} + diff --git a/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/src/at32f403a_407_int.c b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/src/at32f403a_407_int.c new file mode 100644 index 00000000..eaa532ed --- /dev/null +++ b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/src/at32f403a_407_int.c @@ -0,0 +1,143 @@ +/** + ************************************************************************** + * @file at32f403a_407_int.c + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f403a_407_int.h" +#include "at32f403a_407_board.h" + +/** @addtogroup AT32F407_periph_examples + * @{ + */ + +/** @addtogroup 407_SPI_halfduplex_dma_jtagpin + * @{ + */ + +/** + * @brief this function handles nmi exception. + * @param none + * @retval none + */ +void NMI_Handler(void) +{ +} + +/** + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ +void HardFault_Handler(void) +{ + /* go to infinite loop when hard fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ +void MemManage_Handler(void) +{ + /* go to infinite loop when memory manage exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ +void BusFault_Handler(void) +{ + /* go to infinite loop when bus fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ +void UsageFault_Handler(void) +{ + /* go to infinite loop when usage fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles svcall exception. + * @param none + * @retval none + */ +void SVC_Handler(void) +{ +} + +/** + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief this function handles systick handler. + * @param none + * @retval none + */ +void SysTick_Handler(void) +{ +} + +/** + * @} + */ + +/** + * @} + */ + + + diff --git a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/src/main.c similarity index 60% rename from project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c rename to project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/src/main.c index 8eb44f15..17b490da 100644 --- a/project/at_start_f407/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c +++ b/project/at_start_f407/examples/spi/halfduplex_dma_jtagpin/src/main.c @@ -29,11 +29,13 @@ * @{ */ -/** @addtogroup 407_SPI_use_jtagpin_hardwarecs_dma SPI_use_jtagpin_hardwarecs_dma +/** @addtogroup 407_SPI_halfduplex_dma_jtagpin SPI_halfduplex_dma_jtagpin * @{ */ -#define BUFFER_SIZE 32 +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15) +#define BUFFER_SIZE 32 uint8_t spi3_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, @@ -42,11 +44,7 @@ uint8_t spi3_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, uint8_t spi2_rx_buffer[BUFFER_SIZE]; __IO uint8_t tx_index = 0; volatile error_status transfer_status = ERROR; - -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - + /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -69,16 +67,16 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe } /** - * @brief spi configuration. + * @brief dma configuration. * @param none * @retval none */ -static void spi_config(void) +static void dma_config(void) { dma_init_type dma_init_struct; - spi_init_type spi_init_struct; - crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); + + /* use dma1_channel4 as spi2 receive channel */ dma_reset(DMA1_CHANNEL4); dma_default_para_init(&dma_init_struct); dma_init_struct.buffer_size = BUFFER_SIZE; @@ -92,10 +90,39 @@ static void spi_config(void) dma_init_struct.priority = DMA_PRIORITY_MEDIUM; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL4, &dma_init_struct); + + crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE); + + /* use dma2_channel2 as spi3 transmit channel */ + dma_reset(DMA2_CHANNEL2); + dma_default_para_init(&dma_init_struct); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; + dma_init_struct.memory_base_addr = (uint32_t)spi3_tx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA2_CHANNEL2, &dma_init_struct); +} +/** + * @brief spi configuration. + * @param none + * @retval none + */ +static void spi_config(void) +{ + spi_init_type spi_init_struct; + + /* spi master initialization */ crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode-transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -103,16 +130,31 @@ static void spi_config(void) spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; - spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI3, &spi_init_struct); - - spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; - spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; - spi_init(SPI2, &spi_init_struct); - - spi_hardware_cs_output_enable(SPI3, TRUE); - spi_i2s_dma_receiver_enable(SPI2, TRUE); + + /* use dma transmit */ + spi_i2s_dma_transmitter_enable(SPI3, TRUE); + spi_enable(SPI3, TRUE); + + /* spi slave initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* single line bidirectional half duplex mode-receiving */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; + spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init(SPI2, &spi_init_struct); + + /* use dma receive */ + spi_i2s_dma_receiver_enable(SPI2, TRUE); + spi_enable(SPI2, TRUE); } @@ -129,44 +171,47 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); gpio_pin_remap_config(SPI3_GMUX_0010, TRUE); - - /* master sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* master cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_3; gpio_init(GPIOB, &gpio_initstructure); /* master mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOB, &gpio_initstructure); - - /* master cs pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_15; - gpio_init(GPIOA, &gpio_initstructure); - + + /* slave cs pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + /* slave sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); /* slave miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); - - /* slave cs */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_12; - gpio_init(GPIOB, &gpio_initstructure); } /** @@ -178,21 +223,37 @@ int main(void) { system_clock_config(); at32_board_init(); - - /* button press:ensure code canbe download normally */ - while(at32_button_press() == NO_BUTTON); + at32_led_on(LED4); gpio_config(); + dma_config(); spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + /* enable spi slave dma to get data */ dma_channel_enable(DMA1_CHANNEL4, TRUE); - - /* transfer procedure:the "BUFFER_SIZE" data transfer */ - while(tx_index < BUFFER_SIZE) + + /* enable spi master dma to fill data */ + dma_channel_enable(DMA2_CHANNEL2, TRUE); + + /* wait master spi data fill end */ + while(dma_flag_get(DMA2_FDT2_FLAG) == RESET) { - while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET); - spi_i2s_data_transmit(SPI3, spi3_tx_buffer[tx_index++]); } - while(!dma_flag_get(DMA1_FDT4_FLAG)); + + /* wait slave spi data get end */ + while(dma_flag_get(DMA1_FDT4_FLAG) == RESET) + { + } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI3, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ transfer_status = buffer_compare(spi2_rx_buffer, spi3_tx_buffer, BUFFER_SIZE); @@ -204,7 +265,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f407/examples/spi/halfduplex_interrupt/readme.txt b/project/at_start_f407/examples/spi/halfduplex_interrupt/readme.txt index a09be620..b4c9d76d 100644 --- a/project/at_start_f407/examples/spi/halfduplex_interrupt/readme.txt +++ b/project/at_start_f407/examples/spi/halfduplex_interrupt/readme.txt @@ -9,7 +9,9 @@ halfduplex mode transfer data by interrupt mode. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/spi/halfduplex_interrupt/src/at32f403a_407_int.c b/project/at_start_f407/examples/spi/halfduplex_interrupt/src/at32f403a_407_int.c index 03889796..639051bf 100644 --- a/project/at_start_f407/examples/spi/halfduplex_interrupt/src/at32f403a_407_int.c +++ b/project/at_start_f407/examples/spi/halfduplex_interrupt/src/at32f403a_407_int.c @@ -24,12 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f403a_407_int.h" -#include "at32f403a_407_board.h" - -extern uint8_t spi1_tx_buffer[]; -extern uint8_t spi2_rx_buffer[]; -extern uint32_t tx_index; -extern uint32_t rx_index; /** @addtogroup AT32F407_periph_examples * @{ @@ -138,36 +132,6 @@ void SysTick_Handler(void) { } -/** - * @brief This function handles the spi1 interrupt request. - * @param None - * @retval None - */ - void SPI1_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); - if(tx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); - } - } -} - -/** - * @brief This function handles the spi2 interrupt request. - * @param None - * @retval None - */ - void SPI2_I2S2EXT_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) - { - spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); - } -} - /** * @} */ diff --git a/project/at_start_f407/examples/spi/halfduplex_interrupt/src/main.c b/project/at_start_f407/examples/spi/halfduplex_interrupt/src/main.c index 456625e5..b22f606e 100644 --- a/project/at_start_f407/examples/spi/halfduplex_interrupt/src/main.c +++ b/project/at_start_f407/examples/spi/halfduplex_interrupt/src/main.c @@ -33,7 +33,9 @@ * @{ */ -#define BUFFER_SIZE 32 +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 spi_init_type spi_init_struct; @@ -45,10 +47,6 @@ uint8_t spi2_rx_buffer[BUFFER_SIZE]; volatile uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -77,9 +75,14 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI1_IRQn, 0, 0); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode - transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode =SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -89,18 +92,27 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); + + /* enable transmit data buffer empty interrupt */ + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); + /* single line bidirectional half duplex mode - receiving */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; spi_init_struct.master_slave_mode =SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - - nvic_irq_enable(SPI1_IRQn, 0, 0); - nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + + /* enable receive data buffer full interrupt */ spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE); - - spi_enable(SPI2, TRUE); - spi_enable(SPI1, TRUE); } /** @@ -113,35 +125,83 @@ static void gpio_config(void) gpio_init_type gpio_initstructure; crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); + gpio_default_para_init(&gpio_initstructure); - - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); - - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* spi2 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* slave spi miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); +} - while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13)!=RESET); +/** + * @brief spi1 interrupt function + * @param none + * @retval none + */ + void SPI1_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + if(tx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); + } + } +} + +/** + * @brief spi2 interrupt function + * @param none + * @retval none + */ + void SPI2_I2S2EXT_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) + { + spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); + } } /** @@ -153,11 +213,27 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); gpio_config(); /* config spi1 send spi2 receive */ spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + spi_enable(SPI2, TRUE); + spi_enable(SPI1, TRUE); + + /* wait slave data receive end */ while(rx_index < BUFFER_SIZE); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ transfer_status = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); @@ -169,7 +245,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/readme.txt b/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/readme.txt index 26a24ee9..1ba8d7ce 100644 --- a/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/readme.txt +++ b/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/readme.txt @@ -10,7 +10,9 @@ realize data send and receive. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/src/at32f403a_407_int.c b/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/src/at32f403a_407_int.c index c91bc2cb..99636440 100644 --- a/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/src/at32f403a_407_int.c +++ b/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/src/at32f403a_407_int.c @@ -24,14 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f403a_407_int.h" -#include "at32f403a_407_board.h" - -extern uint8_t spi1_tx_buffer[]; -extern uint8_t spi2_tx_buffer[]; -extern uint8_t spi1_rx_buffer[]; -extern uint8_t spi2_rx_buffer[]; -extern uint32_t tx_index; -extern uint32_t rx_index; /** @addtogroup AT32F407_periph_examples * @{ @@ -140,54 +132,6 @@ void SysTick_Handler(void) { } -/** - * @brief This function handles the spi1 interrupt request. - * @param None - * @retval None - */ - void SPI1_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); - if(tx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); - } - } - if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_RDBF_FLAG) != RESET) - { - spi_enable(SPI1, FALSE); - spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); - spi_enable(SPI1, TRUE); - if(rx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, FALSE); - } - } -} - -/** - * @brief This function handles the spi2 interrupt request. - * @param None - * @retval None - */ - void SPI2_I2S2EXT_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]); - if(tx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, FALSE); - } - } - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) - { - spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); - } -} - /** * @} */ diff --git a/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/src/main.c b/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/src/main.c index 1105d61e..b40c5ba0 100644 --- a/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/src/main.c +++ b/project/at_start_f407/examples/spi/halfduplex_transceiver_switch/src/main.c @@ -33,8 +33,9 @@ * @{ */ -#define BUFFER_SIZE 32 - +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 spi_init_type spi_init_struct; uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, @@ -49,10 +50,6 @@ uint8_t spi1_rx_buffer[BUFFER_SIZE], spi2_rx_buffer[BUFFER_SIZE]; volatile uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -81,9 +78,12 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI1_IRQn, 0, 0); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode - transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256; @@ -93,18 +93,27 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + /* enable transmit data buffer empty interrupt */ + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); + + /* single line bidirectional half duplex mode - receiving */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - nvic_irq_enable(SPI1_IRQn, 0, 0); - nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0); - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + /* enable receive data buffer full interrupt */ spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE); - - spi_enable(SPI1, TRUE); - spi_enable(SPI2, TRUE); } /** @@ -118,34 +127,100 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); gpio_default_para_init(&gpio_initstructure); - - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + /* slave spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* spi2 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* slave spi miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); +} - while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13)!=RESET); +/** + * @brief spi1 interrupt function + * @param none + * @retval none + */ + void SPI1_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + if(tx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); + } + } + if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_RDBF_FLAG) != RESET) + { + spi_enable(SPI1, FALSE); + spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); + spi_enable(SPI1, TRUE); + if(rx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, FALSE); + spi_enable(SPI1, FALSE); + } + } +} + +/** + * @brief spi2 interrupt function + * @param none + * @retval none + */ + void SPI2_I2S2EXT_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]); + if(tx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, FALSE); + } + } + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) + { + spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); + } } /** @@ -157,37 +232,70 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); gpio_config(); + /* config spi1 send spi2 receive */ spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + spi_enable(SPI2, TRUE); + spi_enable(SPI1, TRUE); + + /* wait data receive end */ while(rx_index < BUFFER_SIZE); - + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + /* test result:the data check */ transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); - + /* config spi2 send spi1 receive */ spi_enable(SPI1, FALSE); spi_enable(SPI2, FALSE); + rx_index = 0; tx_index = 0; spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, FALSE); - + + /* single line bidirectional half duplex mode - receiving */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + /* single line bidirectional half duplex mode - transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, TRUE); spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, TRUE); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + spi_enable(SPI2, TRUE); spi_enable(SPI1, TRUE); + + /* wait slave data receive end */ while(rx_index < BUFFER_SIZE); - + + /* master half duplex receiving modethe busy flag isnot usefull */ + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + /* test result:the data check */ transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE); @@ -198,7 +306,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f407/examples/spi/only_receive_mode_polling/readme.txt b/project/at_start_f407/examples/spi/only_receive_mode_polling/readme.txt index 29698128..c3662bd7 100644 --- a/project/at_start_f407/examples/spi/only_receive_mode_polling/readme.txt +++ b/project/at_start_f407/examples/spi/only_receive_mode_polling/readme.txt @@ -9,7 +9,9 @@ only receive mode receive data by polling mode. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb15(mosi) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f407/examples/spi/only_receive_mode_polling/src/main.c b/project/at_start_f407/examples/spi/only_receive_mode_polling/src/main.c index 0c6394af..8876f739 100644 --- a/project/at_start_f407/examples/spi/only_receive_mode_polling/src/main.c +++ b/project/at_start_f407/examples/spi/only_receive_mode_polling/src/main.c @@ -33,9 +33,10 @@ * @{ */ -#define BUFFER_SIZE 32 +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 -spi_init_type spi_init_struct; uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, @@ -44,10 +45,6 @@ uint8_t spi2_rx_buffer[BUFFER_SIZE]; uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -76,9 +73,13 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -88,12 +89,23 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + spi_enable(SPI1, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional simplex receive-only mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_SIMPLEX_RX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - - spi_enable(SPI1, TRUE); + spi_enable(SPI2, TRUE); } @@ -108,34 +120,49 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); gpio_default_para_init(&gpio_initstructure); - - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - - /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* master spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); - - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* spi2 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + /* slave spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); - - while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13) != RESET); } /** @@ -147,17 +174,31 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); gpio_config(); spi_config(); - + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + /* transfer procedure:the "BUFFER_SIZE" data transfer */ while(tx_index < BUFFER_SIZE) { + /* master transmit data fill */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + + /* slave receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ transfer_status = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); @@ -169,7 +210,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f407/examples/spi/w25q_flash/readme.txt b/project/at_start_f407/examples/spi/w25q_flash/readme.txt index af7438de..cdb06238 100644 --- a/project/at_start_f407/examples/spi/w25q_flash/readme.txt +++ b/project/at_start_f407/examples/spi/w25q_flash/readme.txt @@ -5,8 +5,8 @@ ************************************************************************** */ - this demo is based on the at-start board and AT32-Comm-EV board, in this demo, - shows how to use spi access the w25q flash chip. + this demo is based on the at-start board, in this demo,shows how to use spi access + the w25q flash chip. the pins use as follow: - cs <---> pb12(software cs, pb12 as a general io to control flash cs) - sck <---> pb13 diff --git a/project/at_start_f407/examples/spi/w25q_flash/src/spi_flash.c b/project/at_start_f407/examples/spi/w25q_flash/src/spi_flash.c index b0d8e07a..e2d72c3e 100644 --- a/project/at_start_f407/examples/spi/w25q_flash/src/spi_flash.c +++ b/project/at_start_f407/examples/spi/w25q_flash/src/spi_flash.c @@ -339,6 +339,9 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length) while(dma_flag_get(DMA1_FDT4_FLAG) == RESET); dma_flag_clear(DMA1_FDT4_FLAG); + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); dma_channel_enable(DMA1_CHANNEL4, FALSE); dma_channel_enable(DMA1_CHANNEL5, FALSE); @@ -354,6 +357,9 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length) dummy_data = spi_i2s_data_receive(SPI2); pbuffer++; } + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); #endif } @@ -403,6 +409,9 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length) while(dma_flag_get(DMA1_FDT4_FLAG) == RESET); dma_flag_clear(DMA1_FDT4_FLAG); + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); dma_channel_enable(DMA1_CHANNEL4, FALSE); dma_channel_enable(DMA1_CHANNEL5, FALSE); @@ -418,6 +427,9 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length) *pbuffer = spi_i2s_data_receive(SPI2); pbuffer++; } + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); #endif } @@ -490,7 +502,10 @@ uint8_t spi_byte_write(uint8_t data) spi_i2s_data_transmit(SPI2, data); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); brxbuff = spi_i2s_data_receive(SPI2); + + /* wait spi idle when communication end */ while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + return brxbuff; } diff --git a/project/at_start_f407/templates/iar_v6.10/template.ewd b/project/at_start_f407/templates/iar_v6.10/template.ewd index 1d158285..7a0250cf 100644 --- a/project/at_start_f407/templates/iar_v6.10/template.ewd +++ b/project/at_start_f407/templates/iar_v6.10/template.ewd @@ -3,7 +3,7 @@ 2 - Debug + template ARM @@ -828,832 +828,6 @@ - - Release - - ARM - - 0 - - C-SPY - 2 - - 22 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 0 - - - - - - - - ANGEL_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - IARROM_ID - 2 - - 1 - 1 - 0 - - - - - - - - - JLINK_ID - 2 - - 12 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - LMIFTDI_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - MACRAIGOR_ID - 2 - - 3 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - PEMICRO_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - - - - - - - RDI_ID - 2 - - 1 - 1 - 0 - - - - - - - - - - - - - - - - - STLINK_ID - 2 - - 1 - 1 - 0 - - - - - - - THIRDPARTY_ID - 2 - - 0 - 1 - 0 - - - - - - - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB6_Plugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin - 1 - - - diff --git a/project/at_start_f407/templates/iar_v6.10/template.ewp b/project/at_start_f407/templates/iar_v6.10/template.ewp index e69827fa..fe3c309c 100644 --- a/project/at_start_f407/templates/iar_v6.10/template.ewp +++ b/project/at_start_f407/templates/iar_v6.10/template.ewp @@ -3,7 +3,7 @@ 2 - Debug + template ARM @@ -17,15 +17,15 @@ 1 - - Release - - ARM - - 0 - - General - 3 - - 18 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 26 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 8 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 11 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - bsp diff --git a/project/at_start_f407/templates/iar_v7.4/template.ewd b/project/at_start_f407/templates/iar_v7.4/template.ewd index eb35913a..18b9eb62 100644 --- a/project/at_start_f407/templates/iar_v7.4/template.ewd +++ b/project/at_start_f407/templates/iar_v7.4/template.ewd @@ -3,7 +3,7 @@ 2 - Debug + template ARM @@ -1487,1491 +1487,6 @@ - - Release - - ARM - - 0 - - C-SPY - 2 - - 26 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 0 - - - - - - - - ANGEL_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - - CMSISDAP_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - IARROM_ID - 2 - - 1 - 1 - 0 - - - - - - - - - IJET_ID - 2 - - 6 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - JLINK_ID - 2 - - 15 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - LMIFTDI_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - MACRAIGOR_ID - 2 - - 3 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - PEMICRO_ID - 2 - - 1 - 1 - 0 - - - - - - - - - - - - - - - - - - - RDI_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - - - - - - - STLINK_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - - THIRDPARTY_ID - 2 - - 0 - 1 - 0 - - - - - - - - XDS100_ID - 2 - - 4 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $TOOLKIT_DIR$\plugins\middleware\HCCWare\HCCWare.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\AVIX\AVIX.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB7_Plugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - diff --git a/project/at_start_f407/templates/iar_v7.4/template.ewp b/project/at_start_f407/templates/iar_v7.4/template.ewp index c42ced65..9f2de75e 100644 --- a/project/at_start_f407/templates/iar_v7.4/template.ewp +++ b/project/at_start_f407/templates/iar_v7.4/template.ewp @@ -3,7 +3,7 @@ 2 - Debug + template ARM @@ -17,15 +17,15 @@ 1 - - Release - - ARM - - 0 - - General - 3 - - 24 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 16 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - bsp diff --git a/project/at_start_f407/templates/iar_v7.4/template.ewt b/project/at_start_f407/templates/iar_v7.4/template.ewt index 3640456c..846196ac 100644 --- a/project/at_start_f407/templates/iar_v7.4/template.ewt +++ b/project/at_start_f407/templates/iar_v7.4/template.ewt @@ -3,7 +3,7 @@ 2 - Debug + template ARM @@ -1048,1052 +1048,6 @@ - - Release - - ARM - - 0 - - C-STAT - 1 - - 1 - - 0 - - 600 - 0 - 2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - RuntimeChecking - 0 - - 2 - 1 - 0 - - - - - - - - - - - - - - - - - - - - bsp diff --git a/project/at_start_f407/templates/iar_v8.2/template.ewd b/project/at_start_f407/templates/iar_v8.2/template.ewd index ce98e7e5..005b042e 100644 --- a/project/at_start_f407/templates/iar_v8.2/template.ewd +++ b/project/at_start_f407/templates/iar_v8.2/template.ewd @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -1453,1456 +1453,4 @@ - - Release - - ARM - - 0 - - C-SPY - 2 - - 29 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 0 - - - - - - - - CADI_ID - 2 - - 0 - 1 - 0 - - - - - - - - - CMSISDAP_ID - 2 - - 4 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - IJET_ID - 2 - - 8 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - JLINK_ID - 2 - - 16 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - LMIFTDI_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - NULINK_ID - 2 - - 0 - 1 - 0 - - - - - - - PEMICRO_ID - 2 - - 3 - 1 - 0 - - - - - - - - STLINK_ID - 2 - - 5 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - THIRDPARTY_ID - 2 - - 0 - 1 - 0 - - - - - - - - TIFET_ID - 2 - - 1 - 1 - 0 - - - - - - - - - - - - - - - - - - - XDS100_ID - 2 - - 6 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - diff --git a/project/at_start_f407/templates/iar_v8.2/template.ewp b/project/at_start_f407/templates/iar_v8.2/template.ewp index af3a07ad..c8f3b6b2 100644 --- a/project/at_start_f407/templates/iar_v8.2/template.ewp +++ b/project/at_start_f407/templates/iar_v8.2/template.ewp @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -16,15 +16,15 @@ 1 - - Release - - ARM - - 0 - - General - 3 - - 30 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 34 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 10 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 20 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - bsp diff --git a/project/at_start_f407/templates/iar_v8.2/template.ewt b/project/at_start_f407/templates/iar_v8.2/template.ewt index 7eb9bcf9..a02548b6 100644 --- a/project/at_start_f407/templates/iar_v8.2/template.ewt +++ b/project/at_start_f407/templates/iar_v8.2/template.ewt @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -1187,1192 +1187,6 @@ - - Release - - ARM - - 0 - - C-STAT - 261 - - 261 - - 0 - - 1 - 600 - 0 - 2 - 0 - 1 - 100 - - - 1.5.2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - RuntimeChecking - 0 - - 2 - 1 - 0 - - - - - - - - - - - - - - - - - - - - bsp diff --git a/project/at_start_f407/templates/iar_v9.3/template.ewd b/project/at_start_f407/templates/iar_v9.3/template.ewd index d36d5379..68cd29d4 100644 --- a/project/at_start_f407/templates/iar_v9.3/template.ewd +++ b/project/at_start_f407/templates/iar_v9.3/template.ewd @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -1543,1546 +1543,4 @@ - - Release - - ARM - - 0 - - C-SPY - 2 - - 32 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 0 - - - - - - - - CADI_ID - 2 - - 0 - 1 - 0 - - - - - - - - - CMSISDAP_ID - 2 - - 4 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - IJET_ID - 2 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - JLINK_ID - 2 - - 16 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - LMIFTDI_ID - 2 - - 3 - 1 - 0 - - - - - - - - - - - - - NULINK_ID - 2 - - 0 - 1 - 0 - - - - - - - PEMICRO_ID - 2 - - 3 - 1 - 0 - - - - - - - - STLINK_ID - 2 - - 7 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - THIRDPARTY_ID - 2 - - 0 - 1 - 0 - - - - - - - - TIFET_ID - 2 - - 1 - 1 - 0 - - - - - - - - - - - - - - - - - - - XDS100_ID - 2 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9BE.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - diff --git a/project/at_start_f407/templates/iar_v9.3/template.ewp b/project/at_start_f407/templates/iar_v9.3/template.ewp index 89ae7758..7340b45c 100644 --- a/project/at_start_f407/templates/iar_v9.3/template.ewp +++ b/project/at_start_f407/templates/iar_v9.3/template.ewp @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -16,19 +16,19 @@ 1 - - Release - - ARM - - 0 - - General - 3 - - 35 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 37 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 11 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - 0 - inputOutputBased - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 27 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - bsp diff --git a/project/at_start_f407/templates/iar_v9.3/template.ewt b/project/at_start_f407/templates/iar_v9.3/template.ewt index bac1e091..4c410611 100644 --- a/project/at_start_f407/templates/iar_v9.3/template.ewt +++ b/project/at_start_f407/templates/iar_v9.3/template.ewt @@ -2,7 +2,7 @@ 3 - Debug + template ARM @@ -22,7 +22,7 @@ 0 1 100 - Debug/C-STAT + template/C-STAT 2.4.1 @@ -1423,1428 +1423,6 @@ - - Release - - ARM - - 0 - - C-STAT - 516 - - 516 - - 0 - - 1 - 600 - 1 - 2 - 0 - 1 - 100 - Release/C-STAT - - - 2.4.1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - RuntimeChecking - 0 - - 2 - 1 - 0 - - - - - - - - - - - - - - - - - - - - bsp diff --git a/utilities/at32f403a_407_usart_iap_demo/tool_release/IAP_Programmer.exe b/utilities/at32f403a_407_usart_iap_demo/tool_release/IAP_Programmer.exe index 78db0faa..6b12b624 100644 Binary files a/utilities/at32f403a_407_usart_iap_demo/tool_release/IAP_Programmer.exe and b/utilities/at32f403a_407_usart_iap_demo/tool_release/IAP_Programmer.exe differ diff --git a/utilities/at32f403a_407_usb_iap_demo/tool_release/IAP_Programmer.exe b/utilities/at32f403a_407_usb_iap_demo/tool_release/IAP_Programmer.exe index 78db0faa..6b12b624 100644 Binary files a/utilities/at32f403a_407_usb_iap_demo/tool_release/IAP_Programmer.exe and b/utilities/at32f403a_407_usb_iap_demo/tool_release/IAP_Programmer.exe differ