update version to v2.1.5

libraries/cmsis/cm4/device_support/at32f403a_407.h

@@ -76,6 +76,9 @@ extern "C" {
     #define AT32F407xx
 #endif
 
+/**
+  * define with package
+  */
 #if defined (AT32F403AVCT7) || defined (AT32F403AVET7) || defined (AT32F403AVGT7)
 
     #define AT32F403AVx
@@ -103,6 +106,42 @@ extern "C" {
     #define AT32F407Vx
 #endif
 
+/**
+  * define with memory density
+  */
+#if defined (AT32F403AVCT7) || defined (AT32F403ARCT7) || defined (AT32F403ACCT7) || \
+    defined (AT32F403ACCU7)
+
+    #define AT32F403AxC
+#endif
+
+#if defined (AT32F403AVET7) || defined (AT32F403ACET7) || defined (AT32F403ARET7) || \
+    defined (AT32F403ACEU7)
+
+    #define AT32F403AxE
+#endif
+
+#if defined (AT32F403AVGT7) || defined (AT32F403ACGT7) || defined (AT32F403ARGT7) || \
+    defined (AT32F403ACGU7)
+
+    #define AT32F403AxG
+#endif
+
+#if defined (AT32F407RCT7)  || defined (AT32F407VCT7)  || defined (AT32F407AVCT7)
+
+    #define AT32F407xC
+#endif
+
+#if defined (AT32F407VET7)  || defined (AT32F407RET7)
+
+    #define AT32F407xE
+#endif
+
+#if defined (AT32F407RGT7)  || defined (AT32F407VGT7)  || (AT32F407AVGT7)
+
+    #define AT32F407xG
+#endif
+
 #ifndef USE_STDPERIPH_DRIVER
 /**
   * @brief comment the line below if you will not use the peripherals drivers.
@@ -122,7 +161,7 @@ extern "C" {
   */
 #define __AT32F403A_407_LIBRARY_VERSION_MAJOR    (0x02) /*!< [31:24] major version */
 #define __AT32F403A_407_LIBRARY_VERSION_MIDDLE   (0x01) /*!< [23:16] middle version */
-#define __AT32F403A_407_LIBRARY_VERSION_MINOR    (0x04) /*!< [15:8]  minor version */
+#define __AT32F403A_407_LIBRARY_VERSION_MINOR    (0x05) /*!< [15:8]  minor version */
 #define __AT32F403A_407_LIBRARY_VERSION_RC       (0x00) /*!< [7:0]  release candidate */
 #define __AT32F403A_407_LIBRARY_VERSION          ((__AT32F403A_407_LIBRARY_VERSION_MAJOR << 24)  | \
                                                   (__AT32F403A_407_LIBRARY_VERSION_MIDDLE << 16) | \

libraries/cmsis/cm4/device_support/startup/gcc/linker/AT32F403AxG_FLASH.ld

@@ -31,7 +31,7 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
 /* Specify the memory areas */
 MEMORY
 {
-FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1000K
+FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K
 RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 96K
 SPIM (rx)       : ORIGIN = 0x08400000, LENGTH = 16384K
 }

libraries/cmsis/cm4/device_support/startup/gcc/linker/AT32F407xG_FLASH.ld

@@ -31,7 +31,7 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
 /* Specify the memory areas */
 MEMORY
 {
-FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1000K
+FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K
 RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 96K
 SPIM (rx)       : ORIGIN = 0x08400000, LENGTH = 16384K
 }

libraries/drivers/inc/at32f403a_407_crc.h

@@ -66,6 +66,17 @@ typedef enum
   CRC_REVERSE_OUTPUT_DATA                = 0x01  /*!< output data reverse by word */
 } crc_reverse_output_type;
 
+/**
+  * @brief crc polynomial size
+  */
+typedef enum
+{
+  CRC_POLY_SIZE_32B                      = 0x00, /*!< polynomial size 32 bits */
+  CRC_POLY_SIZE_16B                      = 0x01, /*!< polynomial size 16 bits */
+  CRC_POLY_SIZE_8B                       = 0x02, /*!< polynomial size 8 bits */
+  CRC_POLY_SIZE_7B                       = 0x03  /*!< polynomial size 7 bits */
+} crc_poly_size_type;
+
 /**
  * @brief type define crc register all
  */
@@ -97,7 +108,7 @@ typedef struct
   };
 
   /**
-    * @brief crc ctrl register, offset:0x08
+    * @brief crc ctrl register, offset:0x08 
     */
   union
   {
@@ -105,7 +116,8 @@ typedef struct
     struct
     {
       __IO uint32_t rst                  : 1 ; /* [0] */
-      __IO uint32_t reserved1            : 4 ; /* [4:1] */
+      __IO uint32_t reserved1            : 2 ; /* [2:1] */
+      __IO uint32_t poly_size            : 2 ; /* [4:3] */
       __IO uint32_t revid                : 2 ; /* [6:5] */
       __IO uint32_t revod                : 1 ; /* [7] */
       __IO uint32_t reserved2            : 24 ;/* [31:8] */
@@ -129,6 +141,18 @@ typedef struct
     } idt_bit;
   };
 
+  /**
+    * @brief crc polynomial register, offset:0x14 
+    */
+  union
+  {
+    __IO uint32_t poly;
+    struct
+    {
+      __IO uint32_t poly                 : 32; /* [31:0] */
+    } poly_bit;
+  };
+
 } crc_type;
 
 /**
@@ -150,6 +174,10 @@ uint8_t crc_common_data_get(void);
 void crc_init_data_set(uint32_t value);
 void crc_reverse_input_data_set(crc_reverse_input_type value);
 void crc_reverse_output_data_set(crc_reverse_output_type value);
+void crc_poly_value_set(uint32_t value);
+uint32_t crc_poly_value_get(void);
+void crc_poly_size_set(crc_poly_size_type size);
+crc_poly_size_type crc_poly_size_get(void);
 
 /**
   * @}

libraries/drivers/inc/at32f403a_407_flash.h

@@ -698,6 +698,8 @@ uint8_t flash_ssb_status_get(void);
 void flash_interrupt_enable(uint32_t flash_int, confirm_state new_state);
 void flash_spim_model_select(flash_spim_model_type mode);
 void flash_spim_encryption_range_set(uint32_t decode_address);
+void flash_spim_dummy_read(void);
+flash_status_type flash_spim_mass_program(uint32_t address, uint8_t *buf, uint32_t cnt);
 flash_status_type flash_slib_enable(uint32_t pwd, uint16_t start_sector, uint16_t data_start_sector, uint16_t end_sector);
 error_status flash_slib_disable(uint32_t pwd);
 uint32_t flash_slib_remaining_count_get(void);

libraries/drivers/inc/at32f403a_407_gpio.h

@@ -213,8 +213,8 @@ extern "C" {
 #define SPI3_GMUX_0010                   IOMUX_MAKE_VALUE(0x28, 24, 4, 0x02) /*!< spi3_cs/i2s3_ws(pa15), spi3_sck/i2s3_ck(pb3),  spi3_miso(pb4),  spi3_mosi/i2s3_sd(pb5),  i2s3_mck(pb10) */
 #define SPI3_GMUX_0011                   IOMUX_MAKE_VALUE(0x28, 24, 4, 0x03) /*!< spi3_cs/i2s3_ws(pa4),  spi3_sck/i2s3_ck(pc10), spi3_miso(pc11), spi3_mosi/i2s3_sd(pc12), i2s3_mck(pb10) */
 #define SPI4_GMUX_0001                   IOMUX_MAKE_VALUE(0x28, 28, 4, 0x01) /*!< spi4_cs/i2s4_ws(pe12), spi4_sck/i2s4_ck(pe11), spi4_miso(pe13), spi4_mosi/i2s4_sd(pe14), i2s4_mck(pc8) */
-#define SPI4_GMUX_0010                   IOMUX_MAKE_VALUE(0x28, 28, 4, 0x02) /*!< spi4_cs/i2s4_ws(pb6),  spi4_sck/i2s4_ck(pb7),  spi4_miso(pb8),  spi4_mosi/i2s4_sd(pb8),  i2s4_mck(pc8) */
+#define SPI4_GMUX_0010                   IOMUX_MAKE_VALUE(0x28, 28, 4, 0x02) /*!< spi4_cs/i2s4_ws(pb6),  spi4_sck/i2s4_ck(pb7),  spi4_miso(pb8),  spi4_mosi/i2s4_sd(pb9),  i2s4_mck(pc8) */
-#define SPI4_GMUX_0011                   IOMUX_MAKE_VALUE(0x28, 28, 4, 0x03) /*!< spi4_cs/i2s4_ws(pb6),  spi4_sck/i2s4_ck(pb7),  spi4_miso(pb8),  spi4_mosi/i2s4_sd(pb8),  i2s4_mck(pa10) */
+#define SPI4_GMUX_0011                   IOMUX_MAKE_VALUE(0x28, 28, 4, 0x03) /*!< spi4_cs/i2s4_ws(pb6),  spi4_sck/i2s4_ck(pb7),  spi4_miso(pb8),  spi4_mosi/i2s4_sd(pb9),  i2s4_mck(pa10) */
 
 /**
   * @}

libraries/drivers/inc/at32f403a_407_usb.h

@@ -199,9 +199,9 @@ typedef enum
 typedef enum
 {
   EPT_CONTROL_TYPE                       = 0x00, /*!< usb transfer type control */
-  EPT_BULK_TYPE                          = 0x01, /*!< usb transfer type bulk */
+  EPT_ISO_TYPE                           = 0x01, /*!< usb transfer type iso */
-  EPT_INT_TYPE                           = 0x02, /*!< usb transfer type interrut */
+  EPT_BULK_TYPE                          = 0x02, /*!< usb transfer type bulk */
-  EPT_ISO_TYPE                           = 0x03  /*!< usb transfer type iso */
+  EPT_INT_TYPE                           = 0x03  /*!< usb transfer type interrupt */
 }ept_trans_type;
 
 /**

libraries/drivers/inc/at32f403a_407_xmc.h

@@ -532,7 +532,7 @@ void xmc_norsram_default_para_init(xmc_norsram_init_type* xmc_nor_sram_init_stru
 void xmc_norsram_timing_default_para_init(xmc_norsram_timing_init_type* xmc_rw_timing_struct,
                                           xmc_norsram_timing_init_type* xmc_w_timing_struct);
 void xmc_nor_sram_enable(xmc_nor_sram_subbank_type xmc_subbank, confirm_state new_state);
-void xmc_ext_timing_config(xmc_nor_sram_subbank_type xmc_sub_bank, uint16_t w2w_timing, uint16_t r2r_timing);
+void xmc_ext_timing_config(volatile xmc_nor_sram_subbank_type xmc_sub_bank, uint16_t w2w_timing, uint16_t r2r_timing);
 void xmc_nand_reset(xmc_class_bank_type xmc_bank);
 void xmc_nand_init(xmc_nand_init_type* xmc_nand_init_struct);
 void xmc_nand_timing_config(xmc_nand_timinginit_type* xmc_common_spacetiming_struct,

libraries/drivers/src/at32f403a_407_adc.c

@@ -114,7 +114,7 @@ void adc_combine_mode_select(adc_combine_mode_type combine_mode)
   *         - ADC_LEFT_ALIGNMENT
   * @param  ordinary_channel_length: configure the adc ordinary channel sequence length.
   *         this parameter can be:
-  *         - (0x1~0xf)
+  *         - (0x1~0x10)
   * @retval none
   */
 void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
@@ -140,7 +140,7 @@ void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
   *         - ADC_LEFT_ALIGNMENT
   * @param  ordinary_channel_length: configure the adc ordinary channel sequence length.
   *         this parameter can be:
-  *         - (0x1~0xf)
+  *         - (0x1~0x10)
   * @retval none
   */
 void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
@@ -345,117 +345,42 @@ void adc_voltage_monitor_single_channel_select(adc_type *adc_x, adc_channel_sele
   */
 void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
 {
-  switch(adc_channel)
+  uint32_t tmp_reg;
+  if(adc_channel < ADC_CHANNEL_10)
   {
-    case ADC_CHANNEL_0:
+    tmp_reg = adc_x->spt2;
-      adc_x->spt2_bit.cspt0 = adc_sampletime;
+    tmp_reg &= ~(0x07 << 3 * adc_channel);
-      break;
+    tmp_reg |= adc_sampletime << 3 * adc_channel;
-    case ADC_CHANNEL_1:
+    adc_x->spt2 = tmp_reg;
-      adc_x->spt2_bit.cspt1 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_2:
-      adc_x->spt2_bit.cspt2 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_3:
-      adc_x->spt2_bit.cspt3 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_4:
-      adc_x->spt2_bit.cspt4 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_5:
-      adc_x->spt2_bit.cspt5 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_6:
-      adc_x->spt2_bit.cspt6 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_7:
-      adc_x->spt2_bit.cspt7 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_8:
-      adc_x->spt2_bit.cspt8 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_9:
-      adc_x->spt2_bit.cspt9 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_10:
-      adc_x->spt1_bit.cspt10 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_11:
-      adc_x->spt1_bit.cspt11 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_12:
-      adc_x->spt1_bit.cspt12 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_13:
-      adc_x->spt1_bit.cspt13 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_14:
-      adc_x->spt1_bit.cspt14 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_15:
-      adc_x->spt1_bit.cspt15 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_16:
-      adc_x->spt1_bit.cspt16 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_17:
-      adc_x->spt1_bit.cspt17 = adc_sampletime;
-      break;
-    default:
-      break;
   }
-  switch(adc_sequence)
+  else
   {
-    case 1:
+    tmp_reg = adc_x->spt1;
-      adc_x->osq3_bit.osn1 = adc_channel;
+    tmp_reg &= ~(0x07 << 3 * (adc_channel - ADC_CHANNEL_10));
-      break;
+    tmp_reg |= adc_sampletime << 3 * (adc_channel - ADC_CHANNEL_10);
-    case 2:
+    adc_x->spt1 = tmp_reg;
-      adc_x->osq3_bit.osn2 = adc_channel;
+  }
-      break;
+
-    case 3:
+  if(adc_sequence >= 13)
-      adc_x->osq3_bit.osn3 = adc_channel;
+  {
-      break;
+    tmp_reg = adc_x->osq1;
-    case 4:
+    tmp_reg &= ~(0x01F << 5 * (adc_sequence - 13));
-      adc_x->osq3_bit.osn4 = adc_channel;
+    tmp_reg |= adc_channel << 5 * (adc_sequence - 13);
-      break;
+    adc_x->osq1 = tmp_reg;
-    case 5:
+  }
-      adc_x->osq3_bit.osn5 = adc_channel;
+  else if(adc_sequence >= 7)
-      break;
+  {
-    case 6:
+    tmp_reg = adc_x->osq2;
-      adc_x->osq3_bit.osn6 = adc_channel;
+    tmp_reg &= ~(0x01F << 5 * (adc_sequence - 7));
-      break;
+    tmp_reg |= adc_channel << 5 * (adc_sequence - 7);
-    case 7:
+    adc_x->osq2 = tmp_reg;
-      adc_x->osq2_bit.osn7 = adc_channel;
+  }
-      break;
+  else
-    case 8:
+  {
-      adc_x->osq2_bit.osn8 = adc_channel;
+    tmp_reg = adc_x->osq3;
-      break;
+    tmp_reg &= ~(0x01F << 5 * (adc_sequence - 1));
-    case 9:
+    tmp_reg |= adc_channel << 5 * (adc_sequence - 1);
-      adc_x->osq2_bit.osn9 = adc_channel;
+    adc_x->osq3 = tmp_reg;
-      break;
-    case 10:
-      adc_x->osq2_bit.osn10 = adc_channel;
-      break;
-    case 11:
-      adc_x->osq2_bit.osn11 = adc_channel;
-      break;
-    case 12:
-      adc_x->osq2_bit.osn12 = adc_channel;
-      break;
-    case 13:
-      adc_x->osq1_bit.osn13 = adc_channel;
-      break;
-    case 14:
-      adc_x->osq1_bit.osn14 = adc_channel;
-      break;
-    case 15:
-      adc_x->osq1_bit.osn15 = adc_channel;
-      break;
-    case 16:
-      adc_x->osq1_bit.osn16 = adc_channel;
-      break;
-    default:
-      break;
   }
 }
 
@@ -503,66 +428,23 @@ void adc_preempt_channel_length_set(adc_type *adc_x, uint8_t adc_channel_lenght)
   */
 void adc_preempt_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
 {
-  uint16_t sequence_index=0;
+  uint32_t tmp_reg;
-  switch(adc_channel)
+  uint8_t sequence_index;
+  if(adc_channel < ADC_CHANNEL_10)
   {
-    case ADC_CHANNEL_0:
+    tmp_reg = adc_x->spt2;
-      adc_x->spt2_bit.cspt0 = adc_sampletime;
+    tmp_reg &= ~(0x07 << 3 * adc_channel);
-      break;
+    tmp_reg |= adc_sampletime << 3 * adc_channel;
-    case ADC_CHANNEL_1:
+    adc_x->spt2 = tmp_reg;
-      adc_x->spt2_bit.cspt1 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_2:
-      adc_x->spt2_bit.cspt2 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_3:
-      adc_x->spt2_bit.cspt3 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_4:
-      adc_x->spt2_bit.cspt4 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_5:
-      adc_x->spt2_bit.cspt5 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_6:
-      adc_x->spt2_bit.cspt6 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_7:
-      adc_x->spt2_bit.cspt7 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_8:
-      adc_x->spt2_bit.cspt8 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_9:
-      adc_x->spt2_bit.cspt9 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_10:
-      adc_x->spt1_bit.cspt10 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_11:
-      adc_x->spt1_bit.cspt11 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_12:
-      adc_x->spt1_bit.cspt12 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_13:
-      adc_x->spt1_bit.cspt13 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_14:
-      adc_x->spt1_bit.cspt14 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_15:
-      adc_x->spt1_bit.cspt15 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_16:
-      adc_x->spt1_bit.cspt16 = adc_sampletime;
-      break;
-    case ADC_CHANNEL_17:
-      adc_x->spt1_bit.cspt17 = adc_sampletime;
-      break;
-    default:
-      break;
   }
+  else
+  {
+    tmp_reg = adc_x->spt1;
+    tmp_reg &= ~(0x07 << 3 * (adc_channel - ADC_CHANNEL_10));
+    tmp_reg |= adc_sampletime << 3 * (adc_channel - ADC_CHANNEL_10);
+    adc_x->spt1 = tmp_reg;
+  }
+
   sequence_index = adc_sequence + 3 - adc_x->psq_bit.pclen;
   switch(sequence_index)
   {

libraries/drivers/src/at32f403a_407_crc.c

@@ -147,6 +147,52 @@ void crc_reverse_output_data_set(crc_reverse_output_type value)
   CRC->ctrl_bit.revod = value;
 }
 
+/**
+  * @brief  config crc polynomial value
+  * @param  value
+  *         32-bit new data of crc poly value
+  * @retval none.
+  */
+void crc_poly_value_set(uint32_t value)
+{
+  CRC->poly = value;
+}
+
+/**
+  * @brief  return crc polynomial value
+  * @param  none
+  * @retval 32-bit value of the polynomial value.
+  */
+uint32_t crc_poly_value_get(void)
+{
+  return (CRC->poly);
+}
+
+/**
+  * @brief  config crc polynomial data size
+  * @param  size
+  *         this parameter can be one of the following values:
+  *         - CRC_POLY_SIZE_32B
+  *         - CRC_POLY_SIZE_16B
+  *         - CRC_POLY_SIZE_8B
+  *         - CRC_POLY_SIZE_7B
+  * @retval none.
+  */
+void crc_poly_size_set(crc_poly_size_type size)
+{
+  CRC->ctrl_bit.poly_size = size;
+}
+
+/**
+  * @brief  return crc polynomial data size
+  * @param  none
+  * @retval polynomial data size.
+  */
+crc_poly_size_type crc_poly_size_get(void)
+{
+  return (crc_poly_size_type)(CRC->ctrl_bit.poly_size);
+}
+
 /**
   * @}
   */

libraries/drivers/src/at32f403a_407_exint.c

@@ -123,15 +123,15 @@ void exint_init(exint_init_type *exint_struct)
   */
 void exint_flag_clear(uint32_t exint_line)
 {
-	if((EXINT->swtrg & exint_line) == exint_line)
+  if((EXINT->swtrg & exint_line) == exint_line)
-	{
+  {
-		EXINT->intsts = exint_line;
+    EXINT->intsts = exint_line;
-		EXINT->intsts = exint_line;
+    EXINT->intsts = exint_line;
-	}
+  }
-	else
+  else
-	{
+  {
-		EXINT->intsts = exint_line;
+    EXINT->intsts = exint_line;
-	}
+  }
 }
 
 /**

libraries/drivers/src/at32f403a_407_flash.c

@@ -480,8 +480,11 @@ flash_status_type flash_sector_erase(uint32_t sector_address)
 
     /* disable the secers bit */
     FLASH->ctrl3_bit.secers = FALSE;
+
+    /* dummy read */
+    flash_spim_dummy_read();
   }
-  
+
   /* return the erase status */
   return status;
 }
@@ -576,7 +579,7 @@ flash_status_type flash_bank2_erase(void)
 flash_status_type flash_spim_all_erase(void)
 {
   flash_status_type status = FLASH_OPERATE_DONE;
- 
+
   FLASH->ctrl3_bit.chpers = TRUE;
   FLASH->ctrl3_bit.erstr = TRUE;
 
@@ -586,6 +589,9 @@ flash_status_type flash_spim_all_erase(void)
   /* disable the chpers bit */
   FLASH->ctrl3_bit.chpers = FALSE;
 
+  /* dummy read */
+  flash_spim_dummy_read();
+
   /* return the erase status */
   return status;
 }
@@ -601,7 +607,7 @@ flash_status_type flash_user_system_data_erase(void)
 {
   flash_status_type status = FLASH_OPERATE_DONE;
   uint16_t fap_val = FAP_RELIEVE_KEY;
- 
+
   /* get the flash access protection status */
   if(flash_fap_status_get() != RESET)
   {
@@ -682,6 +688,9 @@ flash_status_type flash_word_program(uint32_t address, uint32_t data)
 
     /* disable the fprgm bit */
     FLASH->ctrl3_bit.fprgm = FALSE;
+
+    /* dummy read */
+    flash_spim_dummy_read();
   }
 
   /* return the program status */
@@ -728,6 +737,9 @@ flash_status_type flash_halfword_program(uint32_t address, uint16_t data)
 
     /* disable the fprgm bit */
     FLASH->ctrl3_bit.fprgm = FALSE;
+
+    /* dummy read */
+    flash_spim_dummy_read();
   }
 
   /* return the program status */
@@ -779,7 +791,7 @@ flash_status_type flash_byte_program(uint32_t address, uint8_t data)
 flash_status_type flash_user_system_data_program(uint32_t address, uint8_t data)
 {
   flash_status_type status = FLASH_OPERATE_DONE;
- 
+
   if(address == USD_BASE)
   {
     if(data != 0xA5)
@@ -1024,6 +1036,9 @@ void flash_interrupt_enable(uint32_t flash_int, confirm_state new_state)
 void flash_spim_model_select(flash_spim_model_type mode)
 {
   FLASH->select = mode;
+
+  /* dummy read */
+  flash_spim_dummy_read();
 }
 
 /**
@@ -1038,6 +1053,62 @@ void flash_spim_encryption_range_set(uint32_t decode_address)
   FLASH->da = decode_address;
 }
 
+/**
+  * @brief  operate the flash spim dummy read.
+  * @param  none
+  * @retval none
+  */
+void flash_spim_dummy_read(void)
+{
+  UNUSED(*(__IO uint32_t*)FLASH_SPIM_START_ADDR);
+  UNUSED(*(__IO uint32_t*)(FLASH_SPIM_START_ADDR + 0x1000));
+  UNUSED(*(__IO uint32_t*)(FLASH_SPIM_START_ADDR + 0x2000));
+}
+
+/**
+  * @brief  mass program for flash spim.
+  * @param  address: specifies the start address to be programmed, word or halfword alignment is recommended.
+  * @param  buf: specifies the pointer of data to be programmed.
+  * @param  cnt: specifies the data counter to be programmed.
+  * @retval status: the returned value can be: FLASH_PROGRAM_ERROR,
+  *         FLASH_EPP_ERROR, FLASH_OPERATE_DONE or FLASH_OPERATE_TIMEOUT.
+  */
+flash_status_type flash_spim_mass_program(uint32_t address, uint8_t *buf, uint32_t cnt)
+{
+  flash_status_type status = FLASH_OPERATE_DONE;
+  uint32_t index, temp_offset;
+  if(address >= FLASH_SPIM_START_ADDR)
+  {
+    temp_offset = cnt % 4;
+    if((temp_offset != 0) && (temp_offset != 2))
+      return status;
+
+    FLASH->ctrl3_bit.fprgm = TRUE;
+    for(index = 0; index < cnt / 4; index++)
+    {
+      *(__IO uint32_t*)(address + index * 4) = *(uint32_t*)(buf + index * 4);
+      /* wait for operation to be completed */
+      status = flash_spim_operation_wait_for(SPIM_PROGRAMMING_TIMEOUT);
+      if(status != FLASH_OPERATE_DONE)
+        return status;
+    }
+    if(temp_offset == 2)
+    {
+      *(__IO uint16_t*)(address + index * 4) = *(uint16_t*)(buf + index * 4);
+      /* wait for operation to be completed */
+      status = flash_spim_operation_wait_for(SPIM_PROGRAMMING_TIMEOUT);
+    }
+    /* disable the fprgm bit */
+    FLASH->ctrl3_bit.fprgm = FALSE;
+
+    /* dummy read */
+    flash_spim_dummy_read();
+  }
+
+  /* return the program status */
+  return status;
+}
+
 /**
   * @brief  enable security library function.
   * @param  pwd: slib password
@@ -1056,7 +1127,7 @@ flash_status_type flash_slib_enable(uint32_t pwd, uint16_t start_sector, uint16_
   if((start_sector>=data_start_sector) || ((data_start_sector > end_sector) && \
      (data_start_sector != 0x7FF)) || (start_sector > end_sector))
     return FLASH_PROGRAM_ERROR;
-  
+
   /* unlock slib cfg register */
   FLASH->slib_unlock = SLIB_UNLOCK_KEY;
   while(FLASH->slib_misc_sts_bit.slib_ulkf==RESET);

libraries/drivers/src/at32f403a_407_i2c.c

@@ -622,14 +622,14 @@ flag_status i2c_flag_get(i2c_type *i2c_x, uint32_t flag)
   * @retval none
   */
 void i2c_flag_clear(i2c_type *i2c_x, uint32_t flag)
-{  
+{
   i2c_x->sts1 = (uint16_t)~(flag & (uint32_t)0x0000DF00);
-  
+
   if(i2c_x->sts1 & I2C_ADDR7F_FLAG)
   {
     UNUSED(i2c_x->sts2);
   }
-  
+
   if(i2c_x->sts1 & I2C_STOPF_FLAG)
   {
     i2c_x->ctrl1_bit.i2cen = TRUE;

libraries/drivers/src/at32f403a_407_tmr.c

@@ -296,8 +296,7 @@ uint32_t tmr_counter_value_get(tmr_type *tmr_x)
   *         this parameter can be one of the following values:
   *         TMR1, TMR2, TMR3, TMR4, TMR5, TMR6, TMR7, TMR8,
   *         TMR9, TMR10, TMR11, TMR12, TMR13, TMR14
-  * @param  tmr_div_value (for 16 bit tmr 0x0000~0xFFFF,
+  * @param  tmr_div_value (0x0000~0xFFFF)
-  *                        for 32 bit tmr 0x0000_0000~0xFFFF_FFFF)
   * @retval none
   */
 void tmr_div_value_set(tmr_type *tmr_x, uint32_t tmr_div_value)
@@ -342,7 +341,7 @@ void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_chan
 
   chx_offset = (8 + tmr_channel);
   chcx_offset = (9 + tmr_channel);
-  
+
   /* get channel idle state bit position in ctrl2 register */
   channel_index = (uint16_t)(tmr_output_struct->oc_idle_state << chx_offset);
 
@@ -835,7 +834,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct
   switch(channel)
   {
     case TMR_SELECT_CHANNEL_1:
-	  tmr_x->cctrl_bit.c1en       = FALSE;
+    tmr_x->cctrl_bit.c1en       = FALSE;
       tmr_x->cctrl_bit.c1p        = (uint32_t)input_struct->input_polarity_select;
       tmr_x->cctrl_bit.c1cp       = (input_struct->input_polarity_select & 0x2) >> 1;
       tmr_x->cm1_input_bit.c1c    = input_struct->input_mapped_select;
@@ -845,7 +844,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct
       break;
 
     case TMR_SELECT_CHANNEL_2:
-	  tmr_x->cctrl_bit.c2en       = FALSE;
+    tmr_x->cctrl_bit.c2en       = FALSE;
       tmr_x->cctrl_bit.c2p        = (uint32_t)input_struct->input_polarity_select;
       tmr_x->cctrl_bit.c2cp       = (input_struct->input_polarity_select & 0x2) >> 1;
       tmr_x->cm1_input_bit.c2c    = input_struct->input_mapped_select;
@@ -855,7 +854,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct
       break;
 
     case TMR_SELECT_CHANNEL_3:
-	  tmr_x->cctrl_bit.c3en       = FALSE;
+    tmr_x->cctrl_bit.c3en       = FALSE;
       tmr_x->cctrl_bit.c3p        = (uint32_t)input_struct->input_polarity_select;
       tmr_x->cctrl_bit.c3cp       = (input_struct->input_polarity_select & 0x2) >> 1;
       tmr_x->cm2_input_bit.c3c    = input_struct->input_mapped_select;
@@ -865,7 +864,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct
       break;
 
     case TMR_SELECT_CHANNEL_4:
-	  tmr_x->cctrl_bit.c4en       = FALSE;
+    tmr_x->cctrl_bit.c4en       = FALSE;
       tmr_x->cctrl_bit.c4p        = (uint32_t)input_struct->input_polarity_select;
       tmr_x->cm2_input_bit.c4c    = input_struct->input_mapped_select;
       tmr_x->cm2_input_bit.c4df   = input_struct->input_filter_value;
@@ -1728,7 +1727,7 @@ void tmr_dma_control_config(tmr_type *tmr_x, tmr_dma_transfer_length_type dma_le
 }
 
 /**
-  * @brief  config tmr break mode and dead-time
+  * @brief  config tmr brake mode and dead-time
   * @param  tmr_x: select the tmr peripheral.
   *         this parameter can be one of the following values:
   *         TMR1, TMR8

libraries/drivers/src/at32f403a_407_usart.c

@@ -104,6 +104,9 @@ void usart_reset(usart_type* usart_x)
   *         this parameter can be one of the following values:
   *         - USART_DATA_8BITS
   *         - USART_DATA_9BITS.
+  *         note：
+  *         - when parity check is disabled, the data bit width is the actual data bit number.
+  *         - when parity check is enabled, the data bit width is the actual data bit number minus 1, and the MSB bit is replaced with the parity bit.
   * @param  stop_bit: stop bits transmitted
   *         this parameter can be one of the following values:
   *         - USART_STOP_1_BIT

libraries/drivers/src/at32f403a_407_xmc.c

@@ -216,7 +216,7 @@ void xmc_nor_sram_enable(xmc_nor_sram_subbank_type xmc_subbank, confirm_state ne
   * @param  r2r_timing :read timing
   * @retval none
   */
-void xmc_ext_timing_config(xmc_nor_sram_subbank_type xmc_sub_bank, uint16_t w2w_timing, uint16_t r2r_timing)
+void xmc_ext_timing_config(volatile xmc_nor_sram_subbank_type xmc_sub_bank, uint16_t w2w_timing, uint16_t r2r_timing)
 {
   XMC_BANK1->ext_bit[xmc_sub_bank].buslatr2r = r2r_timing;
   XMC_BANK1->ext_bit[xmc_sub_bank].buslatw2w = w2w_timing;

middlewares/usbd_class/audio/audio_class.c

@@ -197,8 +197,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
           audio_set_interface(udev, setup);
           usbd_ctrl_send_status(pudev);
           break;
-
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;

middlewares/usbd_class/audio/audio_desc.c

@@ -52,7 +52,10 @@ static usbd_desc_t *get_device_config_string(void);
 static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
 static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
 static void get_serial_num(void);
-static uint8_t g_usbd_desc_buffer[256];
+#if defined ( __ICCARM__ ) /* iar compiler */
+  #pragma data_alignment=4
+#endif
+ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
 
 /**
   * @brief device descriptor handler structure

middlewares/usbd_class/audio_hid/audio_hid_class.c

@@ -216,7 +216,12 @@ usb_sts_type class_audio_setup_handler(void *udev, usb_setup_type *setup)
           usbd_ctrl_send_status(pudev);
           break;
 
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;
@@ -293,7 +298,12 @@ usb_sts_type class_hid_setup_handler(void *udev, usb_setup_type *setup)
         case USB_STD_REQ_SET_INTERFACE:
           paudio_hid->alt_setting = setup->wValue;
           break;
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;

middlewares/usbd_class/audio_hid/audio_hid_desc.c

@@ -54,7 +54,10 @@ static usbd_desc_t *get_device_config_string(void);
 static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
 static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
 static void get_serial_num(void);
-static uint8_t g_usbd_desc_buffer[256];
+#if defined ( __ICCARM__ ) /* iar compiler */
+  #pragma data_alignment=4
+#endif
+ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
 
 /**
   * @brief device descriptor handler structure
@@ -373,7 +376,7 @@ ALIGNED_HEAD static uint8_t g_usbd_configuration[USBD_AUHID_CONFIG_DESC_SIZE] AL
   0x11,                                  /* bmAttributes: endpoint attributes */
   LBYTE(AUDIO_FEEDBACK_MAXPACKET_SIZE),  /* wMaxPacketSize: maximum packe size this endpoint */
   HBYTE(AUDIO_FEEDBACK_MAXPACKET_SIZE),  /* wMaxPacketSize: maximum packe size this endpoint */
-  1,                   					 /* bInterval: interval for polling endpoint for data transfers */
+  1,                              /* bInterval: interval for polling endpoint for data transfers */
   FEEDBACK_REFRESH_TIME,                 /* bRefresh: this field indicates the rate at which an iso syncronization
                                                       pipe provides new syncronization feedback data. this rate must be a power of
                                                       2, therefore only the power is reported back and the range of this field is from

middlewares/usbd_class/cdc/cdc_class.c

@@ -180,7 +180,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
         case USB_STD_REQ_SET_INTERFACE:
           pcdc->alt_setting = setup->wValue;
           break;
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;

middlewares/usbd_class/cdc/cdc_desc.c

@@ -53,7 +53,10 @@ static usbd_desc_t *get_device_config_string(void);
 static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
 static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
 static void get_serial_num(void);
-static uint8_t g_usbd_desc_buffer[256];
+#if defined ( __ICCARM__ ) /* iar compiler */
+  #pragma data_alignment=4
+#endif
+ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
 
 /**
   * @brief device descriptor handler structure

middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_class.c

@@ -66,8 +66,8 @@ const static unsigned char _asciimap[128] =
   0x00,// ACK
   0x00,// BEL
   0x2A,// BS Backspace
-  0x2B,// TAB	Tab
+  0x2B,// TAB  Tab
-  0x28,// LF	Enter
+  0x28,// LF  Enter
   0x00,// VT
   0x00,// FF
   0x00,// CR
@@ -185,7 +185,7 @@ const static unsigned char _asciimap[128] =
   0x31|SHIFT,// |
   0x30|SHIFT,// }
   0x35|SHIFT,// ~
-  0	// DEL
+  0  // DEL
 };
 
 linecoding_type linecoding_vcpkybrd =
@@ -356,7 +356,12 @@ static usb_sts_type cdc_class_setup_handler(void *udev, usb_setup_type *setup)
         case USB_STD_REQ_SET_INTERFACE:
           vcpkybrd->alt_setting = setup->wValue;
           break;
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;
@@ -431,7 +436,12 @@ static usb_sts_type keyboard_class_setup_handler(void *udev, usb_setup_type *set
         case USB_STD_REQ_SET_INTERFACE:
           vcpkybrd->alt_setting = setup->wValue;
           break;
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;

middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_desc.c

@@ -52,7 +52,10 @@ static usbd_desc_t *get_device_config_string(void);
 static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
 static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
 static void get_serial_num(void);
-static uint8_t g_usbd_desc_buffer[256];
+#if defined ( __ICCARM__ ) /* iar compiler */
+  #pragma data_alignment=4
+#endif
+ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
 
 /**
   * @brief device descriptor handler structure

middlewares/usbd_class/composite_cdc_msc/cdc_msc_class.c

@@ -228,7 +228,12 @@ static usb_sts_type cdc_class_setup_handler(void *udev, usb_setup_type *setup)
         case USB_STD_REQ_SET_INTERFACE:
           pcdc->alt_setting = setup->wValue;
           break;
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;
@@ -297,7 +302,10 @@ static usb_sts_type msc_class_setup_handler(void *udev, usb_setup_type *setup)
           }
           bot_scsi_clear_feature(udev, setup->wIndex);
           break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;

middlewares/usbd_class/composite_cdc_msc/cdc_msc_class.h

@@ -266,7 +266,7 @@ typedef struct
   uint32_t blk_nbr[MSC_SUPPORT_MAX_LUN];
   uint32_t blk_size[MSC_SUPPORT_MAX_LUN];
   
-  uint32_t blk_addr;
+  uint64_t blk_addr;
   uint32_t blk_len;
   
   uint32_t data_len;

middlewares/usbd_class/composite_cdc_msc/cdc_msc_desc.c

@@ -56,7 +56,10 @@ static usbd_desc_t *get_device_config_string(void);
 static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
 static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
 static void get_serial_num(void);
-static uint8_t g_usbd_desc_buffer[256];
+#if defined ( __ICCARM__ ) /* iar compiler */
+  #pragma data_alignment=4
+#endif
+ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
 
 /**
   * @brief device descriptor handler structure

middlewares/usbd_class/composite_cdc_msc/msc_bot_scsi.c

@@ -43,11 +43,11 @@
   #pragma data_alignment=4
 #endif
 ALIGNED_HEAD uint8_t page00_inquiry_data[] ALIGNED_TAIL = {
-	0x00,		
+  0x00,    
-	0x00, 
+  0x00, 
-	0x00, 
+  0x00, 
-	0x00,
+  0x00,
-	0x00, 
+  0x00, 
 
 };
 #if defined ( __ICCARM__ ) /* iar compiler */

middlewares/usbd_class/custom_hid/custom_hid_class.c

@@ -180,7 +180,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
         case USB_STD_REQ_SET_INTERFACE:
           pcshid->alt_setting = setup->wValue;
           break;
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;

middlewares/usbd_class/custom_hid/custom_hid_desc.c

@@ -52,7 +52,10 @@ static usbd_desc_t *get_device_config_string(void);
 static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
 static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
 static void get_serial_num(void);
-static uint8_t g_usbd_desc_buffer[256];
+#if defined ( __ICCARM__ ) /* iar compiler */
+  #pragma data_alignment=4
+#endif
+ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
 
 /**
   * @brief  custom hid device descriptor handler structure

middlewares/usbd_class/hid_iap/hid_iap_class.c

@@ -171,7 +171,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
         case USB_STD_REQ_SET_INTERFACE:
           piap->alt_setting = setup->wValue;
           break;
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;

middlewares/usbd_class/hid_iap/hid_iap_desc.c

@@ -55,7 +55,10 @@ static usbd_desc_t *get_device_config_string(void);
 static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
 static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
 static void get_serial_num(void);
-static uint8_t g_usbd_desc_buffer[256];
+#if defined ( __ICCARM__ ) /* iar compiler */
+  #pragma data_alignment=4
+#endif
+ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
 
 /**
   * @brief  hid device descriptor handler structure

middlewares/usbd_class/keyboard/keyboard_class.c

@@ -54,133 +54,133 @@ const static unsigned char _asciimap[128] =
 {
   0x00,// NUL
   0x00,// SOH
-	0x00,// STX
+  0x00,// STX
-	0x00,// ETX
+  0x00,// ETX
-	0x00,// EOT
+  0x00,// EOT
-	0x00,// ENQ
+  0x00,// ENQ
-	0x00,// ACK
+  0x00,// ACK
-	0x00,// BEL
+  0x00,// BEL
-	0x2A,// BS Backspace
+  0x2A,// BS Backspace
-	0x2B,// TAB	Tab
+  0x2B,// TAB  Tab
-	0x28,// LF	Enter
+  0x28,// LF  Enter
-	0x00,// VT
+  0x00,// VT
-	0x00,// FF
+  0x00,// FF
-	0x00,// CR
+  0x00,// CR
-	0x00,// SO
+  0x00,// SO
-	0x00,// SI
+  0x00,// SI
-	0x00,// DEL
+  0x00,// DEL
-	0x00,// DC1
+  0x00,// DC1
-	0x00,// DC2
+  0x00,// DC2
-	0x00,// DC3
+  0x00,// DC3
-	0x00,// DC4
+  0x00,// DC4
-	0x00,// NAK
+  0x00,// NAK
-	0x00,// SYN
+  0x00,// SYN
-	0x00,// ETB
+  0x00,// ETB
-	0x00,// CAN
+  0x00,// CAN
-	0x00,// EM
+  0x00,// EM
-	0x00,// SUB
+  0x00,// SUB
-	0x00,// ESC
+  0x00,// ESC
-	0x00,// FS
+  0x00,// FS
-	0x00,// GS
+  0x00,// GS
-	0x00,// RS
+  0x00,// RS
-	0x00,// US
+  0x00,// US
 
-	0x2C,//  ' '
+  0x2C,//  ' '
-	0x1E|SHIFT,// !
+  0x1E|SHIFT,// !
-	0x34|SHIFT,// "
+  0x34|SHIFT,// "
-	0x20|SHIFT,// #
+  0x20|SHIFT,// #
-	0x21|SHIFT,// $
+  0x21|SHIFT,// $
-	0x22|SHIFT,// %
+  0x22|SHIFT,// %
-	0x24|SHIFT,// &
+  0x24|SHIFT,// &
-	0x34,      // '
+  0x34,      // '
-	0x26|SHIFT,// (
+  0x26|SHIFT,// (
-	0x27|SHIFT,// )
+  0x27|SHIFT,// )
-	0x25|SHIFT,// *
+  0x25|SHIFT,// *
-	0x2E|SHIFT,// +
+  0x2E|SHIFT,// +
-	0x36,// ,
+  0x36,// ,
-	0x2D,// -
+  0x2D,// -
-	0x37,// .
+  0x37,// .
-	0x38,// /
+  0x38,// /
-	0x27,// 0
+  0x27,// 0
-	0x1E,// 1
+  0x1E,// 1
-	0x1F,// 2
+  0x1F,// 2
-	0x20,// 3
+  0x20,// 3
-	0x21,// 4
+  0x21,// 4
-	0x22,// 5
+  0x22,// 5
-	0x23,// 6
+  0x23,// 6
-	0x24,// 7
+  0x24,// 7
-	0x25,// 8
+  0x25,// 8
-	0x26,// 9
+  0x26,// 9
-	0x33|SHIFT,// :
+  0x33|SHIFT,// :
-	0x33,      // ;
+  0x33,      // ;
-	0x36|SHIFT,// <
+  0x36|SHIFT,// <
-	0x2E,      // =
+  0x2E,      // =
-	0x37|SHIFT,// >
+  0x37|SHIFT,// >
-	0x38|SHIFT,// ?
+  0x38|SHIFT,// ?
-	0x1F|SHIFT,// @
+  0x1F|SHIFT,// @
-	0x04|SHIFT,// A
+  0x04|SHIFT,// A
-	0x05|SHIFT,// B
+  0x05|SHIFT,// B
-	0x06|SHIFT,// C
+  0x06|SHIFT,// C
-	0x07|SHIFT,// D
+  0x07|SHIFT,// D
-	0x08|SHIFT,// E
+  0x08|SHIFT,// E
-	0x09|SHIFT,// F
+  0x09|SHIFT,// F
-	0x0A|SHIFT,// G
+  0x0A|SHIFT,// G
-	0x0B|SHIFT,// H
+  0x0B|SHIFT,// H
-	0x0C|SHIFT,// I
+  0x0C|SHIFT,// I
-	0x0D|SHIFT,// J
+  0x0D|SHIFT,// J
-	0x0E|SHIFT,// K
+  0x0E|SHIFT,// K
-	0x0F|SHIFT,// L
+  0x0F|SHIFT,// L
-	0x10|SHIFT,// M
+  0x10|SHIFT,// M
-	0x11|SHIFT,// N
+  0x11|SHIFT,// N
-	0x12|SHIFT,// O
+  0x12|SHIFT,// O
-	0x13|SHIFT,// P
+  0x13|SHIFT,// P
-	0x14|SHIFT,// Q
+  0x14|SHIFT,// Q
-	0x15|SHIFT,// R
+  0x15|SHIFT,// R
-	0x16|SHIFT,// S
+  0x16|SHIFT,// S
-	0x17|SHIFT,// T
+  0x17|SHIFT,// T
-	0x18|SHIFT,// U
+  0x18|SHIFT,// U
-	0x19|SHIFT,// V
+  0x19|SHIFT,// V
-	0x1A|SHIFT,// W
+  0x1A|SHIFT,// W
-	0x1B|SHIFT,// X
+  0x1B|SHIFT,// X
-	0x1C|SHIFT,// Y
+  0x1C|SHIFT,// Y
-	0x1D|SHIFT,// Z
+  0x1D|SHIFT,// Z
-	0x2F,      // [
+  0x2F,      // [
-	0x31,      // bslash
+  0x31,      // bslash
-	0x30,      // ]
+  0x30,      // ]
-	0x23|SHIFT,// ^
+  0x23|SHIFT,// ^
-	0x2D|SHIFT,// _
+  0x2D|SHIFT,// _
-	0x35,      // `
+  0x35,      // `
-	0x04,      // a
+  0x04,      // a
-	0x05,      // b
+  0x05,      // b
-	0x06,      // c
+  0x06,      // c
-	0x07,      // d
+  0x07,      // d
-	0x08,      // e
+  0x08,      // e
-	0x09,      // f
+  0x09,      // f
-	0x0A,      // g
+  0x0A,      // g
-	0x0B,      // h
+  0x0B,      // h
-	0x0C,      // i
+  0x0C,      // i
-	0x0D,      // j
+  0x0D,      // j
-	0x0E,      // k
+  0x0E,      // k
-	0x0F,      // l
+  0x0F,      // l
-	0x10,      // m
+  0x10,      // m
-	0x11,      // n
+  0x11,      // n
-	0x12,      // o
+  0x12,      // o
-	0x13,      // p
+  0x13,      // p
-	0x14,      // q
+  0x14,      // q
-	0x15,      // r
+  0x15,      // r
-	0x16,      // s
+  0x16,      // s
-	0x17,      // t
+  0x17,      // t
-	0x18,      // u
+  0x18,      // u
-	0x19,      // v
+  0x19,      // v
-	0x1A,      // w
+  0x1A,      // w
-	0x1B,      // x
+  0x1B,      // x
-	0x1C,      // y
+  0x1C,      // y
-	0x1D,      // z
+  0x1D,      // z
-	0x2f|SHIFT,//
+  0x2f|SHIFT,//
-	0x31|SHIFT,// |
+  0x31|SHIFT,// |
-	0x30|SHIFT,// }
+  0x30|SHIFT,// }
-	0x35|SHIFT,// ~
+  0x35|SHIFT,// ~
-	0	// DEL
+  0  // DEL
 };
 
 /* usb device class handler */
@@ -301,7 +301,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
         case USB_STD_REQ_SET_INTERFACE:
           pkeyboard->alt_setting = setup->wValue;
           break;
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;

middlewares/usbd_class/keyboard/keyboard_desc.c

@@ -53,7 +53,10 @@ static usbd_desc_t *get_device_config_string(void);
 static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
 static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
 static void get_serial_num(void);
-static uint8_t g_usbd_desc_buffer[256];
+#if defined ( __ICCARM__ ) /* iar compiler */
+  #pragma data_alignment=4
+#endif
+ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
 
 /**
   * @brief  keyboard device descriptor handler structure

middlewares/usbd_class/mouse/mouse_class.c

@@ -166,6 +166,10 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
         case USB_STD_REQ_SET_INTERFACE:
           pmouse->alt_setting = setup->wValue;
           break;
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
           usbd_ctrl_unsupport(pudev);
           break;

middlewares/usbd_class/mouse/mouse_desc.c

@@ -53,7 +53,10 @@ static usbd_desc_t *get_device_config_string(void);
 static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
 static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
 static void get_serial_num(void);
-static uint8_t g_usbd_desc_buffer[256];
+#if defined ( __ICCARM__ ) /* iar compiler */
+  #pragma data_alignment=4
+#endif
+ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
 
 /**
   * @brief  mouse device descriptor handler structure

middlewares/usbd_class/msc/msc_bot_scsi.c

@@ -42,11 +42,11 @@
   #pragma data_alignment=4
 #endif
 ALIGNED_HEAD uint8_t page00_inquiry_data[] ALIGNED_TAIL = {
-	0x00,
+  0x00,
-	0x00,
+  0x00,
-	0x00,
+  0x00,
-	0x00,
+  0x00,
-	0x00,
+  0x00,
 
 };
 #if defined ( __ICCARM__ ) /* iar compiler */

middlewares/usbd_class/msc/msc_bot_scsi.h

@@ -197,7 +197,7 @@ typedef struct
   uint32_t blk_nbr[MSC_SUPPORT_MAX_LUN];
   uint32_t blk_size[MSC_SUPPORT_MAX_LUN];
 
-  uint32_t blk_addr;
+  uint64_t blk_addr;
   uint32_t blk_len;
 
   uint32_t data_len;

middlewares/usbd_class/msc/msc_class.c

@@ -164,7 +164,10 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
           }
           bot_scsi_clear_feature(udev, setup->wIndex);
           break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;

middlewares/usbd_class/msc/msc_desc.c

@@ -54,7 +54,10 @@ static usbd_desc_t *get_device_config_string(void);
 static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
 static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
 static void get_serial_num(void);
-static uint8_t g_usbd_desc_buffer[256];
+#if defined ( __ICCARM__ ) /* iar compiler */
+  #pragma data_alignment=4
+#endif
+ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
 
 /**
   * @brief device descriptor handler structure

middlewares/usbd_class/printer/printer_class.c

@@ -163,7 +163,12 @@ static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup)
         case USB_STD_REQ_SET_INTERFACE:
           pprter->alt_setting = setup->wValue;
           break;
+        case USB_STD_REQ_CLEAR_FEATURE:
+          break;
+        case USB_STD_REQ_SET_FEATURE:
+          break;
         default:
+          usbd_ctrl_unsupport(pudev);
           break;
       }
       break;

middlewares/usbd_class/printer/printer_desc.c

@@ -54,7 +54,10 @@ static usbd_desc_t *get_device_config_string(void);
 static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf);
 static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len);
 static void get_serial_num(void);
-static uint8_t g_usbd_desc_buffer[256];
+#if defined ( __ICCARM__ ) /* iar compiler */
+  #pragma data_alignment=4
+#endif
+ALIGNED_HEAD static uint8_t g_usbd_desc_buffer[256] ALIGNED_TAIL;
 
 /**
   * @brief device descriptor handler structure

middlewares/usbd_drivers/inc/usb_std.h

@@ -248,8 +248,13 @@ typedef struct
 /**
   * @brief min and max define
   */
+#ifndef MIN
 #define MIN(a, b)  (uint16_t)(((a) < (b)) ? (a) : (b)) /*!< min define*/
+#endif
+
+#ifndef MAX
 #define MAX(a, b)  (uint16_t)(((a) > (b)) ? (a) : (b)) /*!< max define*/
+#endif
 
 /**
   * @brief low byte and high byte define

middlewares/usbd_drivers/src/usbd_sdr.c

@@ -395,9 +395,11 @@ usb_sts_type usbd_interface_request(usbd_core_type *udev)
   usb_setup_type *setup = &udev->setup;
   switch(udev->conn_state)
   {
+    case USB_CONN_STATE_DEFAULT:
+    case USB_CONN_STATE_ADDRESSED:
     case USB_CONN_STATE_CONFIGURED:
-      udev->class_handler->setup_handler(udev, &udev->setup);
+      ret = udev->class_handler->setup_handler(udev, &udev->setup);
-      if(setup->wLength == 0)
+      if(setup->wLength == 0 && ret == USB_OK)
       {
         usbd_ctrl_send_status(udev);
       }
@@ -421,9 +423,10 @@ usb_sts_type usbd_endpoint_request(usbd_core_type *udev)
   uint8_t ept_addr = LBYTE(setup->wIndex);
   usb_ept_info *ept_info;
 
-  if((setup->bmRequestType & USB_REQ_TYPE_RESERVED) == USB_REQ_TYPE_CLASS)
+  if((setup->bmRequestType & USB_REQ_TYPE_RESERVED) != USB_REQ_TYPE_STANDARD)
   {
     udev->class_handler->setup_handler(udev, &udev->setup);
+    return ret;
   }
   switch(setup->bRequest)
   {
@@ -435,6 +438,17 @@ usb_sts_type usbd_endpoint_request(usbd_core_type *udev)
           {
             usbd_set_stall(udev, ept_addr);
           }
+          if((ept_addr & 0x80) != 0)
+          {
+           ept_info = &udev->ept_in[ept_addr & 0x7F];
+          }
+          else
+          {
+            ept_info = &udev->ept_out[ept_addr & 0x7F];
+          }
+          ept_info->status = 0x0000;
+          usbd_ctrl_send(udev, (uint8_t *)(&ept_info->status), 2);
+          
           break;
         case USB_CONN_STATE_CONFIGURED:
         {

project/at32f403a_407_board/at32f403a_407_board.c

@@ -93,16 +93,24 @@ static __IO uint32_t fac_ms;
 PUTCHAR_PROTOTYPE
 {
   while(usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET);
-  usart_data_transmit(PRINT_UART, ch);
+  usart_data_transmit(PRINT_UART, (uint16_t)ch);
+  while(usart_flag_get(PRINT_UART, USART_TDC_FLAG) == RESET);
   return ch;
 }
 
+#if (defined (__GNUC__) && !defined (__clang__)) || (defined (__ICCARM__))
 #if defined (__GNUC__) && !defined (__clang__)
 int _write(int fd, char *pbuffer, int size)
+#elif defined ( __ICCARM__ )
+#pragma module_name = "?__write"
+int __write(int fd, char *pbuffer, int size)
+#endif
 {
   for(int i = 0; i < size; i ++)
   {
-    __io_putchar(*pbuffer++);
+    while(usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET);
+    usart_data_transmit(PRINT_UART, (uint16_t)(*pbuffer++));
+    while(usart_flag_get(PRINT_UART, USART_TDC_FLAG) == RESET);
   }
 
   return size;

project/at_start_f403a/examples/acc/calibration/readme.txt

@@ -7,4 +7,4 @@
 
   this demo is based on the at-start board, in this demo, acc will calibration
   hick when usb is connecting.
-  for more detailed information. please refer to the application note document AN0107.
+  for more detailed information. please refer to the application note document AN0107.

project/at_start_f403a/examples/acc/calibration/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/acc/calibration/src/main.c

@@ -158,11 +158,7 @@ void system_clock_config_for_acc(void)
   /* reset crm */
   crm_reset();
 
-  #ifdef SCLK_FROM_HICK
   crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE);
-  #elif defined SCLK_FROM_HEXT
-  crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
-  #endif
 
   /* wait till hick is ready */
   while(SET != crm_flag_get(CRM_HICK_STABLE_FLAG))

project/at_start_f403a/examples/adc/combine_mode_ordinary_simult/readme.txt

@@ -11,4 +11,4 @@
   - adc1_ordinary_valuetab[n][0] ---> (adc2_channel_7<<16) | adc1_channel_4
   - adc1_ordinary_valuetab[n][1] ---> (adc2_channel_8<<16) | adc1_channel_5
   - adc1_ordinary_valuetab[n][2] ---> (adc2_channel_9<<16) | adc1_channel_6
-  for more detailed information. please refer to the application note document AN0112.
+  for more detailed information. please refer to the application note document AN0112.

project/at_start_f403a/examples/adc/combine_mode_ordinary_simult/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/adc/current_vref_value_check/readme.txt

@@ -9,4 +9,4 @@
   the adc1 internal channel17 to check vref value.
   the convert data as follow:
   - adc1_ordinary_value ---> adc1_channel_17
-  for more detailed information. please refer to the application note document AN0112.
+  for more detailed information. please refer to the application note document AN0112.

project/at_start_f403a/examples/adc/current_vref_value_check/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/adc/exint_trigger_partitioned/readme.txt

@@ -17,4 +17,4 @@
   trigger source:
   - ordinary   -->  exint line11(pc11)
   - preempt  -->  exint line15(pa15)
-  for more detailed information. please refer to the application note document AN0112.
+  for more detailed information. please refer to the application note document AN0112.

project/at_start_f403a/examples/adc/exint_trigger_partitioned/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/adc/internal_temperature_sensor/readme.txt

@@ -9,4 +9,4 @@
   the internal_temperature_sensor.
   the convert data as follow:
   - adc1_ordinary_value ---> adc1_channel_16
-  for more detailed information. please refer to the application note document AN0112.
+  for more detailed information. please refer to the application note document AN0112.

project/at_start_f403a/examples/adc/internal_temperature_sensor/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/adc/repeat_conversion_loop_transfer/readme.txt

@@ -11,4 +11,4 @@
   - adc1_ordinary_valuetab[0] ---> adc1_channel_4
   - adc1_ordinary_valuetab[1] ---> adc1_channel_5
   - adc1_ordinary_valuetab[2] ---> adc1_channel_6
-  for more detailed information. please refer to the application note document AN0112.
+  for more detailed information. please refer to the application note document AN0112.

project/at_start_f403a/examples/adc/repeat_conversion_loop_transfer/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/adc/software_trigger_repeat/readme.txt

@@ -11,4 +11,4 @@
   - adc1_ordinary_valuetab[0] ---> adc1_channel_4
   - adc1_ordinary_valuetab[1] ---> adc1_channel_5
   - adc1_ordinary_valuetab[2] ---> adc1_channel_6
-  for more detailed information. please refer to the application note document AN0112.
+  for more detailed information. please refer to the application note document AN0112.

project/at_start_f403a/examples/adc/software_trigger_repeat/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/adc/tmr_trigger_automatic_preempted/readme.txt

@@ -15,4 +15,4 @@
   - adc1_preempt_valuetab[n][0] --->  adc1_channel_7
   - adc1_preempt_valuetab[n][1] --->  adc1_channel_8
   - adc1_preempt_valuetab[n][2] --->  adc1_channel_9
-  for more detailed information. please refer to the application note document AN0112.
+  for more detailed information. please refer to the application note document AN0112.

project/at_start_f403a/examples/adc/tmr_trigger_automatic_preempted/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/adc/triple_adc_synchro_trigger/readme.txt

@@ -14,4 +14,4 @@
   - adc3_ordinary_valuetab[n][0] --->  adc3_channel_10
   - adc3_ordinary_valuetab[n][1] --->  adc3_channel_11
   - adc3_ordinary_valuetab[n][2] --->  adc3_channel_12
-  for more detailed information. please refer to the application note document AN0112.
+  for more detailed information. please refer to the application note document AN0112.

project/at_start_f403a/examples/adc/triple_adc_synchro_trigger/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/adc/voltage_monitoring/readme.txt

@@ -12,4 +12,4 @@
   - adc1_ordinary_valuetab[1] ---> adc1_channel_5
   - adc1_ordinary_valuetab[2] ---> adc1_channel_6
   the voltage monitoring channel is: adc1_channel_5
-  for more detailed information. please refer to the application note document AN0112.
+  for more detailed information. please refer to the application note document AN0112.

project/at_start_f403a/examples/adc/voltage_monitoring/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/bpr/bpr_data/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/bpr/tamper/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/can/communication_mode/readme.txt

@@ -13,4 +13,4 @@
   - can tx      --->   pb9
   - can rx      --->   pb8
 
-  for more detailed information. please refer to the application note document AN0095.
+  for more detailed information. please refer to the application note document AN0095.

project/at_start_f403a/examples/can/communication_mode/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/can/filter/readme.txt

@@ -14,4 +14,4 @@
   - can tx      --->   pb9
   - can rx      --->   pb8
 
-  for more detailed information. please refer to the application note document AN0095.
+  for more detailed information. please refer to the application note document AN0095.

project/at_start_f403a/examples/can/filter/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/can/loopback_mode/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/cortex_m4/bit_band/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/cortex_m4/cmsis_dsp/readme.txt

@@ -8,4 +8,4 @@
   this demo is based on the at-start board, demonstrates the use the maximum,
   minimum, mean, standard deviation, variance and matrix functions to calculate
   statistical values of marks obtained in a class.  for more detailed information.
-  please refer to the application note document AN0036.
+  please refer to the application note document AN0036.

project/at_start_f403a/examples/cortex_m4/cmsis_dsp/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/cortex_m4/fpu/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/cortex_m4/systick_interrupt/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/crc/calculation/readme.txt

@@ -8,4 +8,4 @@
   this demo is based on the at-start board, in this demo, shows how to use 
   crc calculation unit to get a crc code of a given buffer of data word(32-bit),
   if get a correct crc value led3 will be turn on, else led4 will be turn on.  
-  for more detailed information. please refer to the application note document AN0109.
+  for more detailed information. please refer to the application note document AN0109.

project/at_start_f403a/examples/crc/calculation/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/crm/clock_failure_detection/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/crm/clock_failure_detection/src/main.c

@@ -90,9 +90,9 @@ void clock_failure_detection_handler(void)
 /**
   * @brief  config sclk 240 mhz with hick clock source.
   * @note   the system clock is configured as follow:
-  *         - system clock        = hick / 2 * pll_mult
+  *         system clock (sclk)   = hick / 2 * pll_mult
-  *         - system clock source = pll (hick)
+  *         system clock source   = pll (hick)
-  *         - hick                = 8000000
+  *         - hick                = HICK_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/crm/sysclk_switch/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/crm/sysclk_switch/src/main.c

@@ -87,9 +87,9 @@ static void switch_system_clock(void)
 /**
   * @brief  config sclk 64 mhz with hick clock source.
   * @note   the system clock is configured as follow:
-  *         - system clock        = hick / 2 * pll_mult
+  *         system clock (sclk)   = hick / 2 * pll_mult
-  *         - system clock source = pll (hick)
+  *         system clock source   = pll (hick)
-  *         - hick                = 8000000
+  *         - hick                = HICK_VALUE
   *         - sclk                = 64000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 64000000
@@ -161,9 +161,9 @@ static void sclk_64m_hick_config(void)
 /**
   * @brief  config sclk 96 mhz with hext clock source.
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hick                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 96000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 96000000

project/at_start_f403a/examples/dac/double_mode_dma_sinewave/readme.txt

@@ -8,4 +8,4 @@
   this demo is based on the at-start board, in this demo, pa4 pa5 output sine
   waveform
 
-  for more detailed information. please refer to the application note document AN0101.
+  for more detailed information. please refer to the application note document AN0101.

project/at_start_f403a/examples/dac/double_mode_dma_sinewave/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/dac/double_mode_dma_squarewave/readme.txt

@@ -8,4 +8,4 @@
   this demo is based on the at-start board, in this demo, pa4 pa5 output 
   square waveform.
 
-  for more detailed information. please refer to the application note document AN0101.
+  for more detailed information. please refer to the application note document AN0101.

project/at_start_f403a/examples/dac/double_mode_dma_squarewave/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/dac/one_dac_dma_escalator/readme.txt

@@ -8,4 +8,4 @@
   this demo is based on the at-start board, in this demo, pa4 output an 
   escalator waveform.
 
-  for more detailed information. please refer to the application note document AN0101.
+  for more detailed information. please refer to the application note document AN0101.

project/at_start_f403a/examples/dac/one_dac_dma_escalator/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/dac/one_dac_noisewave/readme.txt

@@ -8,4 +8,4 @@
   this demo is based on the at-start board, in this demo, pa4 output a noise 
   waveform.
 
-  for more detailed information. please refer to the application note document AN0101.
+  for more detailed information. please refer to the application note document AN0101.

project/at_start_f403a/examples/dac/one_dac_noisewave/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/dac/two_dac_trianglewave/readme.txt

@@ -8,4 +8,4 @@
   this demo is based on the at-start board, in this demo, pa4 pa5 output
   triangle waveform. 
 
-  for more detailed information. please refer to the application note document AN0101.
+  for more detailed information. please refer to the application note document AN0101.

project/at_start_f403a/examples/dac/two_dac_trianglewave/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/debug/tmr1/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000

project/at_start_f403a/examples/dma/data_to_gpio_flexible/src/at32f403a_407_clock.c

@@ -28,9 +28,9 @@
 /**
   * @brief  system clock config program
   * @note   the system clock is configured as follow:
-  *         - system clock        = hext / 2 * pll_mult
+  *         system clock (sclk)   = hext / 2 * pll_mult
-  *         - system clock source = pll (hext)
+  *         system clock source   = pll (hext)
-  *         - hext                = 8000000
+  *         - hext                = HEXT_VALUE
   *         - sclk                = 240000000
   *         - ahbdiv              = 1
   *         - ahbclk              = 240000000