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update version to v2.2.2

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Artery-MCU
2025-11-27 18:17:29 +08:00
parent 9cdb243884
commit 29f8bfd95b
2032 changed files with 6969 additions and 7796 deletions
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3
project/at_start_f403a/examples/acc/calibration/inc/at32f403a_407_clock.h
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@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/acc/calibration/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/acc/calibration/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/acc/calibration/inc/usb_conf.h
View File

@@ -3,7 +3,8 @@
* @file usb_conf.h
* @brief usb config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/acc/calibration/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/acc/calibration/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/acc/calibration/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/combine_mode_ordinary_simult/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/combine_mode_ordinary_simult/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/combine_mode_ordinary_simult/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

9
project/at_start_f403a/examples/adc/combine_mode_ordinary_simult/readme.txt
View File

@@ -8,7 +8,8 @@
this demo is based on the at-start board, in this demo, shows how to use
combine_mode(ordinary_simult).
the convert data as follow:
- adc1_ordinary_valuetab[n][0] ---> (adc2_channel_7<<16) | adc1_channel_4
- adc1_ordinary_valuetab[n][1] ---> (adc2_channel_8<<16) | adc1_channel_5
- adc1_ordinary_valuetab[n][2] ---> (adc2_channel_9<<16) | adc1_channel_6
for more detailed information. please refer to the application note document AN0112.
- adc1_ordinary_valuetab[0] ---> (adc2_channel_7<<16) | adc1_channel_4
- adc1_ordinary_valuetab[1] ---> (adc2_channel_8<<16) | adc1_channel_5
- adc1_ordinary_valuetab[2] ---> (adc2_channel_9<<16) | adc1_channel_6
for more detailed information. please refer to the application note document AN0112.

3
project/at_start_f403a/examples/adc/combine_mode_ordinary_simult/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

22
project/at_start_f403a/examples/adc/combine_mode_ordinary_simult/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -24,10 +25,6 @@
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407_int.h"
#include "at32f403a_407_board.h"
extern __IO uint32_t adc1_ordinary_valuetab[5][3];
extern __IO uint32_t dma1_trans_complete_flag;
/** @addtogroup AT32F403A_periph_examples
* @{
@@ -134,21 +131,6 @@ void SysTick_Handler(void)
{
}
/**
* @brief this function handles dma1_channel1 handler.
* @param none
* @retval none
*/
void DMA1_Channel1_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
{
dma_flag_clear(DMA1_FDT1_FLAG);
dma1_trans_complete_flag = 1;
}
}
/**
* @}
*/

80
project/at_start_f403a/examples/adc/combine_mode_ordinary_simult/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -33,13 +34,9 @@
* @{
*/
__IO uint32_t adc1_ordinary_valuetab[5][3];
__IO uint32_t adc1_ordinary_valuetab[3];
__IO uint32_t dma1_trans_complete_flag = 0;
static void gpio_config(void);
static void dma_config(void);
static void adc_config(void);
__IO uint32_t conversion_times_index = 0;
/**
* @brief gpio configuration.
@@ -74,7 +71,7 @@ static void dma_config(void)
nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
dma_reset(DMA1_CHANNEL1);
dma_default_para_init(&dma_init_struct);
dma_init_struct.buffer_size = 15;
dma_init_struct.buffer_size = 3;
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_WORD;
@@ -83,11 +80,10 @@ static void dma_config(void)
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_WORD;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_HIGH;
dma_init_struct.loop_mode_enable = FALSE;
dma_init_struct.loop_mode_enable = TRUE;
dma_init(DMA1_CHANNEL1, &dma_init_struct);
dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
dma_channel_enable(DMA1_CHANNEL1, TRUE);
}
/**
@@ -100,11 +96,15 @@ static void adc_config(void)
adc_base_config_type adc_base_struct;
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
crm_adc_clock_div_set(CRM_ADC_DIV_6);
adc_reset(ADC1);
adc_reset(ADC2);
crm_adc_clock_div_set(CRM_ADC_DIV_4);
adc_base_default_para_init(&adc_base_struct);
/* select combine mode */
adc_combine_mode_select(ADC_ORDINARY_SMLT_ONLY_MODE);
adc_base_default_para_init(&adc_base_struct);
/* ADC1 config */
adc_base_struct.sequence_mode = TRUE;
adc_base_struct.repeat_mode = FALSE;
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
@@ -116,6 +116,7 @@ static void adc_config(void)
adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
adc_dma_mode_enable(ADC1, TRUE);
/* ADC2 config */
adc_base_config(ADC2, &adc_base_struct);
adc_ordinary_channel_set(ADC2, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_239_5);
adc_ordinary_channel_set(ADC2, ADC_CHANNEL_8, 2, ADC_SAMPLETIME_239_5);
@@ -124,6 +125,8 @@ static void adc_config(void)
adc_enable(ADC1, TRUE);
adc_enable(ADC2, TRUE);
/* ADC calibration */
adc_calibration_init(ADC1);
while(adc_calibration_init_status_get(ADC1));
adc_calibration_start(ADC1);
@@ -134,6 +137,20 @@ static void adc_config(void)
while(adc_calibration_status_get(ADC2));
}
/**
* @brief this function handles dma1_channel1 handler.
* @param none
* @retval none
*/
void DMA1_Channel1_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
{
dma_flag_clear(DMA1_FDT1_FLAG);
dma1_trans_complete_flag++;
}
}
/**
* @brief main function.
* @param none
@@ -141,7 +158,6 @@ static void adc_config(void)
*/
int main(void)
{
__IO uint32_t index = 0;
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
system_clock_config();
at32_board_init();
@@ -152,25 +168,31 @@ int main(void)
gpio_config();
dma_config();
adc_config();
/* enable DMA after ADC activation */
dma_channel_enable(DMA1_CHANNEL1, TRUE);
printf("combine_mode_ordinary_simult \r\n");
while(dma1_trans_complete_flag == 0)
{
delay_ms(100);
adc_ordinary_software_trigger_enable(ADC1, TRUE);
}
for(index = 0; index < 5; index++)
{
printf("adc1_ordinary_channel4[%d] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][0] & 0xFFFF);
printf("adc1_ordinary_channel5[%d] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][1] & 0xFFFF);
printf("adc1_ordinary_channel6[%d] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][2] & 0xFFFF);
printf("adc2_ordinary_channel7[%d] = 0x%x\r\n",index, (adc1_ordinary_valuetab[index][0] >> 16) & 0xFFFF);
printf("adc2_ordinary_channel8[%d] = 0x%x\r\n",index, (adc1_ordinary_valuetab[index][1] >> 16) & 0xFFFF);
printf("adc2_ordinary_channel9[%d] = 0x%x\r\n",index, (adc1_ordinary_valuetab[index][2] >> 16) & 0xFFFF);
printf("\r\n");
}
at32_led_on(LED2);
while(1)
{
/* ordinary software start conversion */
adc_ordinary_software_trigger_enable(ADC1, TRUE);
/* wait conversion end */
while(conversion_times_index == dma1_trans_complete_flag)
{
}
conversion_times_index = dma1_trans_complete_flag;
printf("conversion_times_index = %d\r\n",conversion_times_index);
printf("adc1_ordinary_channel4 = 0x%x\r\n", adc1_ordinary_valuetab[0] & 0xFFFF);
printf("adc1_ordinary_channel5 = 0x%x\r\n", adc1_ordinary_valuetab[1] & 0xFFFF);
printf("adc1_ordinary_channel6 = 0x%x\r\n", adc1_ordinary_valuetab[2] & 0xFFFF);
printf("adc2_ordinary_channel7 = 0x%x\r\n", (adc1_ordinary_valuetab[0] >> 16) & 0xFFFF);
printf("adc2_ordinary_channel8 = 0x%x\r\n", (adc1_ordinary_valuetab[1] >> 16) & 0xFFFF);
printf("adc2_ordinary_channel9 = 0x%x\r\n", (adc1_ordinary_valuetab[2] >> 16) & 0xFFFF);
printf("\r\n");
at32_led_toggle(LED2);
delay_sec(1);
}
}

3
project/at_start_f403a/examples/adc/current_vref_value_check/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/current_vref_value_check/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/current_vref_value_check/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/current_vref_value_check/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

7
project/at_start_f403a/examples/adc/current_vref_value_check/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -24,8 +25,6 @@
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407_int.h"
#include "at32f403a_407_board.h"
/** @addtogroup AT32F403A_periph_examples
* @{
@@ -132,8 +131,6 @@ void SysTick_Handler(void)
{
}
/**
* @}
*/

29
project/at_start_f403a/examples/adc/current_vref_value_check/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -35,9 +36,6 @@
__IO uint16_t adc1_ordinary_value = 0;
static void dma_config(void);
static void adc_config(void);
/**
* @brief dma configuration.
* @param none
@@ -60,8 +58,6 @@ static void dma_config(void)
dma_init_struct.priority = DMA_PRIORITY_HIGH;
dma_init_struct.loop_mode_enable = TRUE;
dma_init(DMA1_CHANNEL1, &dma_init_struct);
dma_channel_enable(DMA1_CHANNEL1, TRUE);
}
/**
@@ -73,11 +69,14 @@ static void adc_config(void)
{
adc_base_config_type adc_base_struct;
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
crm_adc_clock_div_set(CRM_ADC_DIV_6);
adc_reset(ADC1);
crm_adc_clock_div_set(CRM_ADC_DIV_4);
adc_base_default_para_init(&adc_base_struct);
/* select combine mode */
adc_combine_mode_select(ADC_INDEPENDENT_MODE);
adc_base_default_para_init(&adc_base_struct);
/* ADC1 config */
adc_base_struct.sequence_mode = FALSE;
adc_base_struct.repeat_mode = FALSE;
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
@@ -89,6 +88,8 @@ static void adc_config(void)
adc_tempersensor_vintrv_enable(TRUE);
adc_enable(ADC1, TRUE);
/* ADC calibration */
adc_calibration_init(ADC1);
while(adc_calibration_init_status_get(ADC1));
adc_calibration_start(ADC1);
@@ -102,7 +103,6 @@ static void adc_config(void)
*/
int main(void)
{
__IO uint32_t index = 0;
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
system_clock_config();
at32_board_init();
@@ -112,13 +112,22 @@ int main(void)
uart_print_init(115200);
dma_config();
adc_config();
/* enable DMA after ADC activation */
dma_channel_enable(DMA1_CHANNEL1, TRUE);
printf("adc1_vref_check \r\n");
while(1)
{
at32_led_on(LED2);
at32_led_toggle(LED2);
delay_sec(1);
/* ordinary software start conversion */
adc_ordinary_software_trigger_enable(ADC1, TRUE);
/* wait conversion end */
while(dma_flag_get(DMA1_FDT1_FLAG) == RESET);
dma_flag_clear(DMA1_FDT1_FLAG);
printf("vref_value = %f V\r\n", ((double)1.2 * 4095) / adc1_ordinary_value);
}

3
project/at_start_f403a/examples/adc/exint_trigger_partitioned/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/exint_trigger_partitioned/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/exint_trigger_partitioned/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

17
project/at_start_f403a/examples/adc/exint_trigger_partitioned/readme.txt
View File

@@ -8,13 +8,14 @@
this demo is based on the at-start board, in this demo, shows how to use
the exint line trigger source trigger adc in partitioned mode.
the convert data as follow:
- adc1_ordinary_valuetab[n][0] ---> adc1_channel_4
- adc1_ordinary_valuetab[n][1] ---> adc1_channel_5
- adc1_ordinary_valuetab[n][2] ---> adc1_channel_6
- adc1_preempt_valuetab[n][0] ---> adc1_channel_7
- adc1_preempt_valuetab[n][1] ---> adc1_channel_8
- adc1_preempt_valuetab[n][2] ---> adc1_channel_9
- adc1_ordinary_valuetab[0] ---> adc1_channel_4
- adc1_ordinary_valuetab[1] ---> adc1_channel_5
- adc1_ordinary_valuetab[2] ---> adc1_channel_6
- adc1_preempt_valuetab[0] ---> adc1_channel_7
- adc1_preempt_valuetab[1] ---> adc1_channel_8
- adc1_preempt_valuetab[2] ---> adc1_channel_9
trigger source:
- ordinary --> exint line11(pc11)
- preempt --> exint line15(pa15)
for more detailed information. please refer to the application note document AN0112.
- preempt --> exint line15(pa15)
for more detailed information. please refer to the application note document AN0112.

3
project/at_start_f403a/examples/adc/exint_trigger_partitioned/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

43
project/at_start_f403a/examples/adc/exint_trigger_partitioned/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -24,11 +25,6 @@
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407_int.h"
#include "at32f403a_407_board.h"
extern __IO uint16_t adc1_preempt_valuetab[3][3];
extern __IO uint16_t dma_trans_complete_flag;
extern __IO uint16_t preempt_trigger_count;
/** @addtogroup AT32F403A_periph_examples
* @{
@@ -135,41 +131,6 @@ void SysTick_Handler(void)
{
}
/**
* @brief this function handles dma1_channel1 handler.
* @param none
* @retval none
*/
void DMA1_Channel1_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
{
dma_flag_clear(DMA1_FDT1_FLAG);
dma_trans_complete_flag = 1;
}
}
/**
* @brief this function handles adc1_2 handler.
* @param none
* @retval none
*/
void ADC1_2_IRQHandler(void)
{
if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
{
adc_flag_clear(ADC1, ADC_PCCE_FLAG);
if(preempt_trigger_count < 3)
{
adc1_preempt_valuetab[preempt_trigger_count][0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
adc1_preempt_valuetab[preempt_trigger_count][1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
adc1_preempt_valuetab[preempt_trigger_count][2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
preempt_trigger_count++;
}
}
}
/**
* @}
*/

107
project/at_start_f403a/examples/adc/exint_trigger_partitioned/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -33,16 +34,12 @@
* @{
*/
__IO uint16_t adc1_ordinary_valuetab[3][3] = {0};
__IO uint16_t adc1_preempt_valuetab[3][3] = {0};
__IO uint16_t adc1_ordinary_valuetab[3] = {0};
__IO uint16_t adc1_preempt_valuetab[3] = {0};
__IO uint16_t dma_trans_complete_flag = 0;
__IO uint16_t ordinary_conversion_times_index = 0;
__IO uint16_t preempt_trigger_count = 0;
static void gpio_config(void);
static void exint_config(void);
static void dma_config(void);
static void adc_config(void);
__IO uint16_t preempt_conversion_times_index = 0;
/**
* @brief gpio configuration.
@@ -79,6 +76,9 @@ static void exint_config(void)
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOC, GPIO_PINS_SOURCE11);
gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOA, GPIO_PINS_SOURCE15);
gpio_default_para_init(&gpio_initstructure);
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
@@ -91,9 +91,6 @@ static void exint_config(void)
gpio_initstructure.gpio_pins = GPIO_PINS_15;
gpio_init(GPIOA, &gpio_initstructure);
gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOC, GPIO_PINS_SOURCE11);
gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOA, GPIO_PINS_SOURCE15);
exint_default_para_init(&exint_init_struct);
exint_init_struct.line_enable = TRUE;
exint_init_struct.line_mode = EXINT_LINE_EVENT;
@@ -117,7 +114,7 @@ static void dma_config(void)
nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
dma_reset(DMA1_CHANNEL1);
dma_default_para_init(&dma_init_struct);
dma_init_struct.buffer_size = 9;
dma_init_struct.buffer_size = 3;
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
@@ -126,11 +123,10 @@ static void dma_config(void)
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_HIGH;
dma_init_struct.loop_mode_enable = FALSE;
dma_init_struct.loop_mode_enable = TRUE;
dma_init(DMA1_CHANNEL1, &dma_init_struct);
dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
dma_channel_enable(DMA1_CHANNEL1, TRUE);
}
/**
@@ -142,12 +138,15 @@ static void adc_config(void)
{
adc_base_config_type adc_base_struct;
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
crm_adc_clock_div_set(CRM_ADC_DIV_6);
adc_reset(ADC1);
crm_adc_clock_div_set(CRM_ADC_DIV_4);
nvic_irq_enable(ADC1_2_IRQn, 0, 0);
adc_base_default_para_init(&adc_base_struct);
/* select combine mode */
adc_combine_mode_select(ADC_INDEPENDENT_MODE);
adc_base_default_para_init(&adc_base_struct);
/* ADC1 config */
adc_base_struct.sequence_mode = TRUE;
adc_base_struct.repeat_mode = FALSE;
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
@@ -169,12 +168,45 @@ static void adc_config(void)
adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE);
adc_enable(ADC1, TRUE);
/* ADC calibration */
adc_calibration_init(ADC1);
while(adc_calibration_init_status_get(ADC1));
adc_calibration_start(ADC1);
while(adc_calibration_status_get(ADC1));
}
/**
* @brief this function handles dma1_channel1 handler.
* @param none
* @retval none
*/
void DMA1_Channel1_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
{
dma_flag_clear(DMA1_FDT1_FLAG);
dma_trans_complete_flag++;
}
}
/**
* @brief this function handles adc1_2 handler.
* @param none
* @retval none
*/
void ADC1_2_IRQHandler(void)
{
if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
{
adc_flag_clear(ADC1, ADC_PCCE_FLAG);
adc1_preempt_valuetab[0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
adc1_preempt_valuetab[1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
adc1_preempt_valuetab[2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
preempt_trigger_count++;
}
}
/**
* @brief main function.
* @param none
@@ -182,7 +214,6 @@ static void adc_config(void)
*/
int main(void)
{
__IO uint32_t index = 0;
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
system_clock_config();
at32_board_init();
@@ -194,22 +225,36 @@ int main(void)
exint_config();
dma_config();
adc_config();
/* enable DMA after ADC activation */
dma_channel_enable(DMA1_CHANNEL1, TRUE);
printf("exint_trigger_partitioned \r\n");
while(dma_trans_complete_flag == 0);
while(preempt_trigger_count != 3);
for(index = 0; index < 3; index++)
{
printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][0]);
printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][1]);
printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][2]);
printf("adc1_preempt_valuetab[%d][0] = 0x%x\r\n",index, adc1_preempt_valuetab[index][0]);
printf("adc1_preempt_valuetab[%d][1] = 0x%x\r\n",index, adc1_preempt_valuetab[index][1]);
printf("adc1_preempt_valuetab[%d][2] = 0x%x\r\n",index, adc1_preempt_valuetab[index][2]);
printf("\r\n");
}
at32_led_on(LED2);
while(1)
{
/* wait ordinary conversion end */
if(ordinary_conversion_times_index != dma_trans_complete_flag)
{
ordinary_conversion_times_index = dma_trans_complete_flag;
printf("ordinary_conversion_times_index = %d\r\n",ordinary_conversion_times_index);
printf("adc1_ordinary_valuetab[0] = 0x%x\r\n", adc1_ordinary_valuetab[0]);
printf("adc1_ordinary_valuetab[1] = 0x%x\r\n", adc1_ordinary_valuetab[1]);
printf("adc1_ordinary_valuetab[2] = 0x%x\r\n", adc1_ordinary_valuetab[2]);
printf("\r\n");
at32_led_toggle(LED2);
}
/* wait preempt conversion end */
if(preempt_conversion_times_index != preempt_trigger_count)
{
preempt_conversion_times_index = preempt_trigger_count;
printf("preempt_conversion_times_index = %d\r\n",preempt_conversion_times_index);
printf("adc1_preempt_valuetab[0] = 0x%x\r\n", adc1_preempt_valuetab[0]);
printf("adc1_preempt_valuetab[1] = 0x%x\r\n", adc1_preempt_valuetab[1]);
printf("adc1_preempt_valuetab[2] = 0x%x\r\n", adc1_preempt_valuetab[2]);
printf("\r\n");
at32_led_toggle(LED3);
}
}
}

3
project/at_start_f403a/examples/adc/internal_temperature_sensor/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/internal_temperature_sensor/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/internal_temperature_sensor/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/internal_temperature_sensor/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/internal_temperature_sensor/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

38
project/at_start_f403a/examples/adc/internal_temperature_sensor/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -40,9 +41,6 @@
__IO uint16_t adc1_ordinary_value = 0;
static void dma_config(void);
static void adc_config(void);
/**
* @brief dma configuration.
* @param none
@@ -65,8 +63,6 @@ static void dma_config(void)
dma_init_struct.priority = DMA_PRIORITY_HIGH;
dma_init_struct.loop_mode_enable = TRUE;
dma_init(DMA1_CHANNEL1, &dma_init_struct);
dma_channel_enable(DMA1_CHANNEL1, TRUE);
}
/**
@@ -78,13 +74,16 @@ static void adc_config(void)
{
adc_base_config_type adc_base_struct;
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
crm_adc_clock_div_set(CRM_ADC_DIV_6);
adc_reset(ADC1);
crm_adc_clock_div_set(CRM_ADC_DIV_4);
adc_base_default_para_init(&adc_base_struct);
/* select combine mode */
adc_combine_mode_select(ADC_INDEPENDENT_MODE);
adc_base_default_para_init(&adc_base_struct);
/* ADC1 config */
adc_base_struct.sequence_mode = FALSE;
adc_base_struct.repeat_mode = TRUE;
adc_base_struct.repeat_mode = FALSE;
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
adc_base_struct.ordinary_channel_length = 1;
adc_base_config(ADC1, &adc_base_struct);
@@ -94,6 +93,8 @@ static void adc_config(void)
adc_tempersensor_vintrv_enable(TRUE);
adc_enable(ADC1, TRUE);
/* ADC calibration */
adc_calibration_init(ADC1);
while(adc_calibration_init_status_get(ADC1));
adc_calibration_start(ADC1);
@@ -107,7 +108,6 @@ static void adc_config(void)
*/
int main(void)
{
__IO uint32_t index = 0;
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
system_clock_config();
at32_board_init();
@@ -117,15 +117,25 @@ int main(void)
uart_print_init(115200);
dma_config();
adc_config();
/* enable DMA after ADC activation */
dma_channel_enable(DMA1_CHANNEL1, TRUE);
printf("internal_temperature_sensor \r\n");
adc_ordinary_software_trigger_enable(ADC1, TRUE);
while(1)
{
at32_led_on(LED2);
delay_sec(1);
while(dma_flag_get(DMA1_FDT1_FLAG) == RESET);
/* ordinary software start conversion */
adc_ordinary_software_trigger_enable(ADC1, TRUE);
/* wait conversion end */
while(dma_flag_get(DMA1_FDT1_FLAG) == RESET)
{
}
dma_flag_clear(DMA1_FDT1_FLAG);
printf("internal_temperature = %f deg C\r\n",(ADC_TEMP_BASE - (double)adc1_ordinary_value * ADC_VREF / 4096) / ADC_TEMP_SLOPE + 25);
printf("internal_temperature = %f deg C\r\n",(ADC_TEMP_BASE - (double)adc1_ordinary_value * ADC_VREF / 4095) / ADC_TEMP_SLOPE + 25);
at32_led_toggle(LED2);
delay_sec(1);
}
}

3
project/at_start_f403a/examples/adc/repeat_conversion_loop_transfer/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/repeat_conversion_loop_transfer/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/repeat_conversion_loop_transfer/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/repeat_conversion_loop_transfer/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

21
project/at_start_f403a/examples/adc/repeat_conversion_loop_transfer/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -24,9 +25,6 @@
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407_int.h"
#include "at32f403a_407_board.h"
extern __IO uint16_t dma_trans_complete_flag;
/** @addtogroup AT32F403A_periph_examples
* @{
@@ -133,21 +131,6 @@ void SysTick_Handler(void)
{
}
/**
* @brief this function handles dma1_channel1 handler.
* @param none
* @retval none
*/
void DMA1_Channel1_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
{
dma_flag_clear(DMA1_FDT1_FLAG);
dma_trans_complete_flag++;
}
}
/**
* @}
*/

39
project/at_start_f403a/examples/adc/repeat_conversion_loop_transfer/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -36,10 +37,6 @@
__IO uint16_t adc1_ordinary_valuetab[3] = {0};
__IO uint16_t dma_trans_complete_flag = 0;
static void gpio_config(void);
static void dma_config(void);
static void adc_config(void);
/**
* @brief gpio configuration.
* @param none
@@ -81,7 +78,6 @@ static void dma_config(void)
dma_init(DMA1_CHANNEL1, &dma_init_struct);
dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
dma_channel_enable(DMA1_CHANNEL1, TRUE);
}
/**
@@ -93,11 +89,14 @@ static void adc_config(void)
{
adc_base_config_type adc_base_struct;
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
crm_adc_clock_div_set(CRM_ADC_DIV_6);
adc_reset(ADC1);
crm_adc_clock_div_set(CRM_ADC_DIV_4);
adc_base_default_para_init(&adc_base_struct);
/* select combine mode */
adc_combine_mode_select(ADC_INDEPENDENT_MODE);
adc_base_default_para_init(&adc_base_struct);
/* ADC1 config */
adc_base_struct.sequence_mode = TRUE;
adc_base_struct.repeat_mode = TRUE;
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
@@ -110,12 +109,28 @@ static void adc_config(void)
adc_dma_mode_enable(ADC1, TRUE);
adc_enable(ADC1, TRUE);
/* ADC calibration */
adc_calibration_init(ADC1);
while(adc_calibration_init_status_get(ADC1));
adc_calibration_start(ADC1);
while(adc_calibration_status_get(ADC1));
}
/**
* @brief this function handles dma1_channel1 handler.
* @param none
* @retval none
*/
void DMA1_Channel1_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
{
dma_flag_clear(DMA1_FDT1_FLAG);
dma_trans_complete_flag++;
}
}
/**
* @brief main function.
* @param none
@@ -123,7 +138,6 @@ static void adc_config(void)
*/
int main(void)
{
__IO uint32_t index = 0;
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
system_clock_config();
at32_board_init();
@@ -134,9 +148,16 @@ int main(void)
gpio_config();
dma_config();
adc_config();
/* enable DMA after ADC activation */
dma_channel_enable(DMA1_CHANNEL1, TRUE);
printf("repeat_conversion_loop_transfer \r\n");
printf("please_debug_check_data_and_conversion_times \r\n");
/* ordinary software start conversion */
adc_ordinary_software_trigger_enable(ADC1, TRUE);
at32_led_on(LED2);
while(1)
{

44
project/at_start_f403a/examples/adc/software_trigger_repeat/inc/at32f403a_407_clock.h
View File

@@ -1,44 +0,0 @@
/**
**************************************************************************
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F403A_407_CLOCK_H
#define __AT32F403A_407_CLOCK_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407.h"
/* exported functions ------------------------------------------------------- */
void system_clock_config(void);
#ifdef __cplusplus
}
#endif
#endif /* __AT32F403A_407_CLOCK_H */

162
project/at_start_f403a/examples/adc/software_trigger_repeat/inc/at32f403a_407_conf.h
View File

@@ -1,162 +0,0 @@
/**
**************************************************************************
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F403A_407_CONF_H
#define __AT32F403A_407_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief in the following line adjust the value of high speed external crystal (hext)
* used in your application
*
* tip: to avoid modifying this file each time you need to use different hext, you
* can define the hext value in your toolchain compiler preprocessor.
*
*/
#if !defined HEXT_VALUE
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed external crystal in hz */
#endif
/**
* @brief in the following line adjust the high speed external crystal (hext) startup
* timeout value
*/
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */
/* module define -------------------------------------------------------------*/
#define CRM_MODULE_ENABLED
#define TMR_MODULE_ENABLED
#define RTC_MODULE_ENABLED
#define BPR_MODULE_ENABLED
#define GPIO_MODULE_ENABLED
#define I2C_MODULE_ENABLED
#define USART_MODULE_ENABLED
#define PWC_MODULE_ENABLED
#define CAN_MODULE_ENABLED
#define ADC_MODULE_ENABLED
#define DAC_MODULE_ENABLED
#define SPI_MODULE_ENABLED
#define DMA_MODULE_ENABLED
#define DEBUG_MODULE_ENABLED
#define FLASH_MODULE_ENABLED
#define CRC_MODULE_ENABLED
#define WWDT_MODULE_ENABLED
#define WDT_MODULE_ENABLED
#define EXINT_MODULE_ENABLED
#define SDIO_MODULE_ENABLED
#define XMC_MODULE_ENABLED
#define USB_MODULE_ENABLED
#define ACC_MODULE_ENABLED
#define MISC_MODULE_ENABLED
#define EMAC_MODULE_ENABLED
/* includes ------------------------------------------------------------------*/
#ifdef CRM_MODULE_ENABLED
#include "at32f403a_407_crm.h"
#endif
#ifdef TMR_MODULE_ENABLED
#include "at32f403a_407_tmr.h"
#endif
#ifdef RTC_MODULE_ENABLED
#include "at32f403a_407_rtc.h"
#endif
#ifdef BPR_MODULE_ENABLED
#include "at32f403a_407_bpr.h"
#endif
#ifdef GPIO_MODULE_ENABLED
#include "at32f403a_407_gpio.h"
#endif
#ifdef I2C_MODULE_ENABLED
#include "at32f403a_407_i2c.h"
#endif
#ifdef USART_MODULE_ENABLED
#include "at32f403a_407_usart.h"
#endif
#ifdef PWC_MODULE_ENABLED
#include "at32f403a_407_pwc.h"
#endif
#ifdef CAN_MODULE_ENABLED
#include "at32f403a_407_can.h"
#endif
#ifdef ADC_MODULE_ENABLED
#include "at32f403a_407_adc.h"
#endif
#ifdef DAC_MODULE_ENABLED
#include "at32f403a_407_dac.h"
#endif
#ifdef SPI_MODULE_ENABLED
#include "at32f403a_407_spi.h"
#endif
#ifdef DMA_MODULE_ENABLED
#include "at32f403a_407_dma.h"
#endif
#ifdef DEBUG_MODULE_ENABLED
#include "at32f403a_407_debug.h"
#endif
#ifdef FLASH_MODULE_ENABLED
#include "at32f403a_407_flash.h"
#endif
#ifdef CRC_MODULE_ENABLED
#include "at32f403a_407_crc.h"
#endif
#ifdef WWDT_MODULE_ENABLED
#include "at32f403a_407_wwdt.h"
#endif
#ifdef WDT_MODULE_ENABLED
#include "at32f403a_407_wdt.h"
#endif
#ifdef EXINT_MODULE_ENABLED
#include "at32f403a_407_exint.h"
#endif
#ifdef SDIO_MODULE_ENABLED
#include "at32f403a_407_sdio.h"
#endif
#ifdef XMC_MODULE_ENABLED
#include "at32f403a_407_xmc.h"
#endif
#ifdef ACC_MODULE_ENABLED
#include "at32f403a_407_acc.h"
#endif
#ifdef MISC_MODULE_ENABLED
#include "at32f403a_407_misc.h"
#endif
#ifdef USB_MODULE_ENABLED
#include "at32f403a_407_usb.h"
#endif
#ifdef EMAC_MODULE_ENABLED
#include "at32f403a_407_emac.h"
#endif
#ifdef __cplusplus
}
#endif
#endif

56
project/at_start_f403a/examples/adc/software_trigger_repeat/inc/at32f403a_407_int.h
View File

@@ -1,56 +0,0 @@
/**
**************************************************************************
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F403A_407_INT_H
#define __AT32F403A_407_INT_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407.h"
/* exported types ------------------------------------------------------------*/
/* exported constants --------------------------------------------------------*/
/* exported macro ------------------------------------------------------------*/
/* exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif

368
project/at_start_f403a/examples/adc/software_trigger_repeat/mdk_v5/software_trigger_repeat.uvoptx
View File

@@ -1,368 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc; *.md</tExt>
<pExt>*.plm</pExt>
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</Extensions>
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</OPTLEX>
<ListingPage>
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</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
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</OPTXL>
<OPTFL>
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</OPTFL>
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<DebugOpt>
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<sDll></sDll>
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<sDlgPa></sDlgPa>
<sIfile></sIfile>
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<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>BIN\CMSIS_AGDI.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F403A_1024 -FS08000000 -FL0100000 -FP0($$Device:-AT32F403AVGT7$Flash\AT32F403A_1024.FLM))</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
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<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
</TargetOption>
</Target>
<Group>
<GroupName>user</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
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<bDave2>0</bDave2>
<PathWithFileName>..\src\at32f403a_407_clock.c</PathWithFileName>
<FilenameWithoutPath>at32f403a_407_clock.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
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<PathWithFileName>..\src\at32f403a_407_int.c</PathWithFileName>
<FilenameWithoutPath>at32f403a_407_int.c</FilenameWithoutPath>
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</File>
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<FilenameWithoutPath>main.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
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</File>
</Group>
<Group>
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</File>
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492
project/at_start_f403a/examples/adc/software_trigger_repeat/mdk_v5/software_trigger_repeat.uvprojx
View File

@@ -1,492 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>software_trigger_repeat</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>-AT32F403AVGT7</Device>
<Vendor>ArteryTek</Vendor>
<PackID>ArteryTek.AT32F403A_407_DFP.2.0.2</PackID>
<Cpu>IRAM(0x20000000,0x38000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
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<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
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<ButtonStop>0</ButtonStop>
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<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\objects\</OutputDirectory>
<OutputName>software_trigger_repeat</OutputName>
<CreateExecutable>1</CreateExecutable>
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<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
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<SVCSIdString></SVCSIdString>
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<CommonProperty>
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</CommonProperty>
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<SimDllArguments> -REMAP</SimDllArguments>
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<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
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<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
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<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
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<uLtcg>0</uLtcg>
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<Ra1Chk>0</Ra1Chk>
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<Ra3Chk>0</Ra3Chk>
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<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
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<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x38000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x100000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x100000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x38000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>AT32F403AVGT7,USE_STDPERIPH_DRIVER,AT_START_F403A_V1</Define>
<Undefine></Undefine>
<IncludePath>..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\inc;..\..\..\..\..\at32f403a_407_board</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<ClangAsOpt>1</ClangAsOpt>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>user</GroupName>
<Files>
<File>
<FileName>at32f403a_407_clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\at32f403a_407_clock.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_int.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\at32f403a_407_int.c</FilePath>
</File>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\main.c</FilePath>
</File>
</Files>
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<GroupName>bsp</GroupName>
<Files>
<File>
<FileName>at32f403a_407_board.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\at32f403a_407_board\at32f403a_407_board.c</FilePath>
</File>
</Files>
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<GroupName>firmware</GroupName>
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<File>
<FileName>at32f403a_407_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_gpio.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_misc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_misc.c</FilePath>
</File>
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<FileName>at32f403a_407_crm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_crm.c</FilePath>
</File>
<File>
<FileName>at32f403a_407_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_dma.c</FilePath>
</File>
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<FileName>at32f403a_407_adc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_adc.c</FilePath>
</File>
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<FileName>at32f403a_407_usart.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f403a_407_usart.c</FilePath>
</File>
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<GroupName>cmsis</GroupName>
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<File>
<FileName>system_at32f403a_407.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f403a_407.c</FilePath>
</File>
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<FileName>startup_at32f403a_407.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f403a_407.s</FilePath>
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<File>
<FileName>readme.txt</FileName>
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<FilePath>..\readme.txt</FilePath>
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<apis/>
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<LayerInfo>
<Layers>
<Layer>
<LayName>&lt;Project Info&gt;</LayName>
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</LayerInfo>
</Project>

14
project/at_start_f403a/examples/adc/software_trigger_repeat/readme.txt
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@@ -1,14 +0,0 @@
/**
**************************************************************************
* @file readme.txt
* @brief readme
**************************************************************************
*/
this demo is based on the at-start board, in this demo, shows how to use
the software trigger source trigger adc.
the convert data as follow:
- adc1_ordinary_valuetab[0] ---> adc1_channel_4
- adc1_ordinary_valuetab[1] ---> adc1_channel_5
- adc1_ordinary_valuetab[2] ---> adc1_channel_6
for more detailed information. please refer to the application note document AN0112.

98
project/at_start_f403a/examples/adc/software_trigger_repeat/src/at32f403a_407_clock.c
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@@ -1,98 +0,0 @@
/**
**************************************************************************
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407_clock.h"
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 240000000
* - ahbdiv = 1
* - ahbclk = 240000000
* - apb2div = 2
* - apb2clk = 120000000
* - apb1div = 2
* - apb1clk = 120000000
* - pll_mult = 60
* - pll_range = GT72MHZ (greater than 72 mhz)
* @param none
* @retval none
*/
void system_clock_config(void)
{
/* reset crm */
crm_reset();
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
/* wait till hext is ready */
while(crm_hext_stable_wait() == ERROR)
{
}
/* config pll clock resource */
crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_60, CRM_PLL_OUTPUT_RANGE_GT72MHZ);
/* config hext division */
crm_hext_clock_div_set(CRM_HEXT_DIV_2);
/* enable pll */
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
/* wait till pll is ready */
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
{
}
/* config ahbclk */
crm_ahb_div_set(CRM_AHB_DIV_1);
/* config apb2clk, the maximum frequency of APB1/APB2 clock is 120 MHz */
crm_apb2_div_set(CRM_APB2_DIV_2);
/* config apb1clk, the maximum frequency of APB1/APB2 clock is 120 MHz */
crm_apb1_div_set(CRM_APB1_DIV_2);
/* enable auto step mode */
crm_auto_step_mode_enable(TRUE);
/* select pll as system clock source */
crm_sysclk_switch(CRM_SCLK_PLL);
/* wait till pll is used as system clock source */
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
{
}
/* disable auto step mode */
crm_auto_step_mode_enable(FALSE);
/* update system_core_clock global variable */
system_core_clock_update();
}

157
project/at_start_f403a/examples/adc/software_trigger_repeat/src/at32f403a_407_int.c
View File

@@ -1,157 +0,0 @@
/**
**************************************************************************
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407_int.h"
#include "at32f403a_407_board.h"
extern __IO uint16_t dma_trans_complete_flag;
/** @addtogroup AT32F403A_periph_examples
* @{
*/
/** @addtogroup 403A_ADC_software_trigger_repeat
* @{
*/
/**
* @brief this function handles nmi exception.
* @param none
* @retval none
*/
void NMI_Handler(void)
{
}
/**
* @brief this function handles hard fault exception.
* @param none
* @retval none
*/
void HardFault_Handler(void)
{
/* go to infinite loop when hard fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles memory manage exception.
* @param none
* @retval none
*/
void MemManage_Handler(void)
{
/* go to infinite loop when memory manage exception occurs */
while(1)
{
}
}
/**
* @brief this function handles bus fault exception.
* @param none
* @retval none
*/
void BusFault_Handler(void)
{
/* go to infinite loop when bus fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles usage fault exception.
* @param none
* @retval none
*/
void UsageFault_Handler(void)
{
/* go to infinite loop when usage fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles svcall exception.
* @param none
* @retval none
*/
void SVC_Handler(void)
{
}
/**
* @brief this function handles debug monitor exception.
* @param none
* @retval none
*/
void DebugMon_Handler(void)
{
}
/**
* @brief this function handles pendsv_handler exception.
* @param none
* @retval none
*/
void PendSV_Handler(void)
{
}
/**
* @brief this function handles systick handler.
* @param none
* @retval none
*/
void SysTick_Handler(void)
{
}
/**
* @brief this function handles dma1_channel1 handler.
* @param none
* @retval none
*/
void DMA1_Channel1_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
{
dma_flag_clear(DMA1_FDT1_FLAG);
dma_trans_complete_flag++;
}
}
/**
* @}
*/
/**
* @}
*/

152
project/at_start_f403a/examples/adc/software_trigger_repeat/src/main.c
View File

@@ -1,152 +0,0 @@
/**
**************************************************************************
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
#include "at32f403a_407_board.h"
#include "at32f403a_407_clock.h"
/** @addtogroup AT32F403A_periph_examples
* @{
*/
/** @addtogroup 403A_ADC_software_trigger_repeat ADC_software_trigger_repeat
* @{
*/
__IO uint16_t adc1_ordinary_valuetab[3] = {0};
__IO uint16_t dma_trans_complete_flag = 0;
static void gpio_config(void);
static void dma_config(void);
static void adc_config(void);
/**
* @brief gpio configuration.
* @param none
* @retval none
*/
static void gpio_config(void)
{
gpio_init_type gpio_initstructure;
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
gpio_default_para_init(&gpio_initstructure);
gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6;
gpio_init(GPIOA, &gpio_initstructure);
}
/**
* @brief dma configuration.
* @param none
* @retval none
*/
static void dma_config(void)
{
dma_init_type dma_init_struct;
crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
dma_reset(DMA1_CHANNEL1);
dma_default_para_init(&dma_init_struct);
dma_init_struct.buffer_size = 3;
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_HIGH;
dma_init_struct.loop_mode_enable = TRUE;
dma_init(DMA1_CHANNEL1, &dma_init_struct);
dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
dma_channel_enable(DMA1_CHANNEL1, TRUE);
}
/**
* @brief adc configuration.
* @param none
* @retval none
*/
static void adc_config(void)
{
adc_base_config_type adc_base_struct;
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
crm_adc_clock_div_set(CRM_ADC_DIV_6);
/* select combine mode */
adc_combine_mode_select(ADC_INDEPENDENT_MODE);
adc_base_default_para_init(&adc_base_struct);
adc_base_struct.sequence_mode = TRUE;
adc_base_struct.repeat_mode = TRUE;
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
adc_base_struct.ordinary_channel_length = 3;
adc_base_config(ADC1, &adc_base_struct);
adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_239_5);
adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_239_5);
adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_239_5);
adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
adc_dma_mode_enable(ADC1, TRUE);
adc_enable(ADC1, TRUE);
adc_calibration_init(ADC1);
while(adc_calibration_init_status_get(ADC1));
adc_calibration_start(ADC1);
while(adc_calibration_status_get(ADC1));
}
/**
* @brief main function.
* @param none
* @retval none
*/
int main(void)
{
__IO uint32_t index = 0;
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
system_clock_config();
at32_board_init();
at32_led_off(LED2);
at32_led_off(LED3);
at32_led_off(LED4);
uart_print_init(115200);
gpio_config();
dma_config();
adc_config();
printf("software_trigger_repeat \r\n");
printf("please_debug_check_data_and_conversion_times \r\n");
adc_ordinary_software_trigger_enable(ADC1, TRUE);
at32_led_on(LED2);
while(1)
{
}
}
/**
* @}
*/
/**
* @}
*/

3
project/at_start_f403a/examples/adc/tmr_trigger_automatic_preempted/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/tmr_trigger_automatic_preempted/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/tmr_trigger_automatic_preempted/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

15
project/at_start_f403a/examples/adc/tmr_trigger_automatic_preempted/readme.txt
View File

@@ -9,10 +9,11 @@
the preempt group automatic conversion(whitch ordinary trigger source is
tmr).
the convert data as follow:
- adc1_ordinary_valuetab[n][0] ---> adc1_channel_4
- adc1_ordinary_valuetab[n][1] ---> adc1_channel_5
- adc1_ordinary_valuetab[n][2] ---> adc1_channel_6
- adc1_preempt_valuetab[n][0] ---> adc1_channel_7
- adc1_preempt_valuetab[n][1] ---> adc1_channel_8
- adc1_preempt_valuetab[n][2] ---> adc1_channel_9
for more detailed information. please refer to the application note document AN0112.
- adc1_ordinary_valuetab[0] ---> adc1_channel_4
- adc1_ordinary_valuetab[1] ---> adc1_channel_5
- adc1_ordinary_valuetab[2] ---> adc1_channel_6
- adc1_preempt_valuetab[0] ---> adc1_channel_7
- adc1_preempt_valuetab[1] ---> adc1_channel_8
- adc1_preempt_valuetab[2] ---> adc1_channel_9
for more detailed information. please refer to the application note document AN0112.

3
project/at_start_f403a/examples/adc/tmr_trigger_automatic_preempted/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

46
project/at_start_f403a/examples/adc/tmr_trigger_automatic_preempted/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -24,12 +25,6 @@
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407_int.h"
#include "at32f403a_407_board.h"
extern __IO uint16_t adc1_ordinary_valuetab[5][3];
extern __IO uint16_t adc1_preempt_valuetab[5][3];
extern __IO uint16_t dma_trans_complete_flag;
extern __IO uint16_t preempt_conversion_count;
/** @addtogroup AT32F403A_periph_examples
* @{
@@ -136,43 +131,6 @@ void SysTick_Handler(void)
{
}
/**
* @brief this function handles dma1_channel1 handler.
* @param none
* @retval none
*/
void DMA1_Channel1_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
{
dma_flag_clear(DMA1_FDT1_FLAG);
dma_trans_complete_flag = 1;
}
}
/**
* @brief this function handles adc1_2 handler.
* @param none
* @retval none
*/
void ADC1_2_IRQHandler(void)
{
if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
{
adc_flag_clear(ADC1, ADC_PCCE_FLAG);
if(preempt_conversion_count < 5)
{
adc1_preempt_valuetab[preempt_conversion_count][0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
adc1_preempt_valuetab[preempt_conversion_count][1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
adc1_preempt_valuetab[preempt_conversion_count][2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
preempt_conversion_count++;
}
at32_led_toggle(LED3);
}
}
/**
* @}
*/

107
project/at_start_f403a/examples/adc/tmr_trigger_automatic_preempted/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -33,16 +34,12 @@
* @{
*/
__IO uint16_t adc1_ordinary_valuetab[5][3] = {0};
__IO uint16_t adc1_preempt_valuetab[5][3] = {0};
__IO uint16_t adc1_ordinary_valuetab[3] = {0};
__IO uint16_t adc1_preempt_valuetab[3] = {0};
__IO uint16_t dma_trans_complete_flag = 0;
__IO uint16_t ordinary_conversion_times_index = 0;
__IO uint16_t preempt_conversion_count = 0;
static void gpio_config(void);
static void dma_config(void);
static void tmr1_config(void);
static void adc_config(void);
__IO uint16_t preempt_conversion_times_index = 0;
/**
* @brief gpio configuration.
@@ -77,7 +74,7 @@ static void dma_config(void)
nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
dma_reset(DMA1_CHANNEL1);
dma_default_para_init(&dma_init_struct);
dma_init_struct.buffer_size = 15;
dma_init_struct.buffer_size = 3;
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
@@ -86,11 +83,10 @@ static void dma_config(void)
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_HIGH;
dma_init_struct.loop_mode_enable = FALSE;
dma_init_struct.loop_mode_enable = TRUE;
dma_init(DMA1_CHANNEL1, &dma_init_struct);
dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
dma_channel_enable(DMA1_CHANNEL1, TRUE);
}
/**
@@ -118,8 +114,8 @@ static void tmr1_config(void)
crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
/* (systemclock/(systemclock/10000))/1000 = 10Hz(100ms) */
tmr_base_init(TMR1, 999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
/* (systemclock/(systemclock/10000))/10000 = 1Hz(1s) */
tmr_base_init(TMR1, 9999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
@@ -129,7 +125,7 @@ static void tmr1_config(void)
tmr_oc_init_structure.oc_output_state = TRUE;
tmr_oc_init_structure.oc_idle_state = FALSE;
tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 500);
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 5000);
}
/**
@@ -141,12 +137,15 @@ static void adc_config(void)
{
adc_base_config_type adc_base_struct;
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
crm_adc_clock_div_set(CRM_ADC_DIV_6);
adc_reset(ADC1);
crm_adc_clock_div_set(CRM_ADC_DIV_4);
nvic_irq_enable(ADC1_2_IRQn, 0, 0);
adc_base_default_para_init(&adc_base_struct);
/* select combine mode */
adc_combine_mode_select(ADC_INDEPENDENT_MODE);
adc_base_default_para_init(&adc_base_struct);
/* ADC1 config */
adc_base_struct.sequence_mode = TRUE;
adc_base_struct.repeat_mode = FALSE;
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
@@ -167,14 +166,44 @@ static void adc_config(void)
adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE);
adc_enable(ADC1, TRUE);
/* ADC calibration */
adc_calibration_init(ADC1);
while(adc_calibration_init_status_get(ADC1));
adc_calibration_start(ADC1);
while(adc_calibration_status_get(ADC1));
}
/**
* @brief this function handles dma1_channel1 handler.
* @param none
* @retval none
*/
void DMA1_Channel1_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
{
dma_flag_clear(DMA1_FDT1_FLAG);
dma_trans_complete_flag++;
}
}
/**
* @brief this function handles adc1_2 handler.
* @param none
* @retval none
*/
void ADC1_2_IRQHandler(void)
{
if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
{
adc_flag_clear(ADC1, ADC_PCCE_FLAG);
adc1_preempt_valuetab[0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
adc1_preempt_valuetab[1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
adc1_preempt_valuetab[2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
preempt_conversion_count++;
}
}
/**
* @brief main function.
@@ -183,7 +212,6 @@ static void adc_config(void)
*/
int main(void)
{
__IO uint32_t index = 0;
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
system_clock_config();
at32_board_init();
@@ -195,26 +223,39 @@ int main(void)
tmr1_config();
dma_config();
adc_config();
/* enable DMA after ADC activation */
dma_channel_enable(DMA1_CHANNEL1, TRUE);
printf("tmr_trigger_automatic_preempted \r\n");
tmr_counter_enable(TMR1, TRUE);
tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1, TRUE);
tmr_output_enable(TMR1, TRUE);
while(preempt_conversion_count < 5);
while(dma_trans_complete_flag == 0);
tmr_counter_enable(TMR1, FALSE);
for(index = 0; index < 5; index++)
{
printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][0]);
printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][1]);
printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][2]);
printf("adc1_preempted_valuetab[%d][0] = 0x%x\r\n", index, adc1_preempt_valuetab[index][0]);
printf("adc1_preempted_valuetab[%d][1] = 0x%x\r\n", index, adc1_preempt_valuetab[index][1]);
printf("adc1_preempted_valuetab[%d][2] = 0x%x\r\n", index, adc1_preempt_valuetab[index][2]);
printf("\r\n");
}
at32_led_on(LED2);
while(1)
{
/* wait ordinary conversion end */
if(ordinary_conversion_times_index != dma_trans_complete_flag)
{
ordinary_conversion_times_index = dma_trans_complete_flag;
printf("ordinary_conversion_times_index = %d\r\n",ordinary_conversion_times_index);
printf("adc1_ordinary_valuetab[0] = 0x%x\r\n", adc1_ordinary_valuetab[0]);
printf("adc1_ordinary_valuetab[1] = 0x%x\r\n", adc1_ordinary_valuetab[1]);
printf("adc1_ordinary_valuetab[2] = 0x%x\r\n", adc1_ordinary_valuetab[2]);
printf("\r\n");
at32_led_toggle(LED2);
}
/* wait preempt conversion end */
if(preempt_conversion_times_index != preempt_conversion_count)
{
preempt_conversion_times_index = preempt_conversion_count;
printf("preempt_conversion_times_index = %d\r\n",preempt_conversion_times_index);
printf("adc1_preempt_valuetab[0] = 0x%x\r\n", adc1_preempt_valuetab[0]);
printf("adc1_preempt_valuetab[1] = 0x%x\r\n", adc1_preempt_valuetab[1]);
printf("adc1_preempt_valuetab[2] = 0x%x\r\n", adc1_preempt_valuetab[2]);
printf("\r\n");
at32_led_toggle(LED3);
}
}
}

3
project/at_start_f403a/examples/adc/triple_adc_synchro_trigger/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/triple_adc_synchro_trigger/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/triple_adc_synchro_trigger/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

15
project/at_start_f403a/examples/adc/triple_adc_synchro_trigger/readme.txt
View File

@@ -8,10 +8,11 @@
this demo is based on the at-start board, in this demo, shows how to use
the same trigger source trigger 3 adcs.
the convert data as follow:
- adc1_ordinary_valuetab[n][0] ---> (adc2_channel_7<<16) | adc1_channel_4
- adc1_ordinary_valuetab[n][1] ---> (adc2_channel_8<<16) | adc1_channel_5
- adc1_ordinary_valuetab[n][2] ---> (adc2_channel_9<<16) | adc1_channel_6
- adc3_ordinary_valuetab[n][0] ---> adc3_channel_10
- adc3_ordinary_valuetab[n][1] ---> adc3_channel_11
- adc3_ordinary_valuetab[n][2] ---> adc3_channel_12
for more detailed information. please refer to the application note document AN0112.
- adc1_ordinary_valuetab[0] ---> (adc2_channel_7<<16) | adc1_channel_4
- adc1_ordinary_valuetab[1] ---> (adc2_channel_8<<16) | adc1_channel_5
- adc1_ordinary_valuetab[2] ---> (adc2_channel_9<<16) | adc1_channel_6
- adc3_ordinary_valuetab[0] ---> adc3_channel_10
- adc3_ordinary_valuetab[1] ---> adc3_channel_11
- adc3_ordinary_valuetab[2] ---> adc3_channel_12
for more detailed information. please refer to the application note document AN0112.

3
project/at_start_f403a/examples/adc/triple_adc_synchro_trigger/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

37
project/at_start_f403a/examples/adc/triple_adc_synchro_trigger/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -24,12 +25,6 @@
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407_int.h"
#include "at32f403a_407_board.h"
extern __IO uint32_t adc1_ordinary_valuetab[5][3];
extern __IO uint16_t adc3_ordinary_valuetab[5][3];
extern __IO uint32_t dma1_trans_complete_flag;
extern __IO uint32_t dma2_trans_complete_flag;
/** @addtogroup AT32F403A_periph_examples
* @{
@@ -136,34 +131,6 @@ void SysTick_Handler(void)
{
}
/**
* @brief this function handles dma1_channel1 handler.
* @param none
* @retval none
*/
void DMA1_Channel1_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
{
dma_flag_clear(DMA1_FDT1_FLAG);
dma1_trans_complete_flag = 1;
}
}
/**
* @brief this function handles dma2_channel4_5 handler.
* @param none
* @retval none
*/
void DMA2_Channel4_5_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA2_FDT5_FLAG) != RESET)
{
dma_flag_clear(DMA2_FDT5_FLAG);
dma2_trans_complete_flag = 1;
}
}
/**
* @}
*/

110
project/at_start_f403a/examples/adc/triple_adc_synchro_trigger/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -33,15 +34,12 @@
* @{
*/
__IO uint32_t adc1_ordinary_valuetab[5][3];
__IO uint16_t adc3_ordinary_valuetab[5][3];
__IO uint32_t adc1_ordinary_valuetab[3];
__IO uint16_t adc3_ordinary_valuetab[3];
__IO uint32_t dma1_trans_complete_flag = 0;
__IO uint16_t adc12_ordinary_conversion_times_index = 0;
__IO uint32_t dma2_trans_complete_flag = 0;
static void gpio_config(void);
static void dma_config(void);
static void tmr1_config(void);
static void adc_config(void);
__IO uint16_t adc3_ordinary_conversion_times_index = 0;
/**
* @brief gpio configuration.
@@ -84,7 +82,7 @@ static void dma_config(void)
dma_reset(DMA1_CHANNEL1);
dma_reset(DMA2_CHANNEL5);
dma_default_para_init(&dma_init_struct);
dma_init_struct.buffer_size = 15;
dma_init_struct.buffer_size = 3;
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_WORD;
@@ -93,7 +91,7 @@ static void dma_config(void)
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_WORD;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_HIGH;
dma_init_struct.loop_mode_enable = FALSE;
dma_init_struct.loop_mode_enable = TRUE;
dma_init(DMA1_CHANNEL1, &dma_init_struct);
dma_init_struct.memory_base_addr = (uint32_t)adc3_ordinary_valuetab;
@@ -104,8 +102,6 @@ static void dma_config(void)
dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
dma_interrupt_enable(DMA2_CHANNEL5, DMA_FDT_INT, TRUE);
dma_channel_enable(DMA1_CHANNEL1, TRUE);
dma_channel_enable(DMA2_CHANNEL5, TRUE);
}
/**
@@ -122,8 +118,8 @@ static void tmr1_config(void)
crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
/* (systemclock/(systemclock/10000))/1000 = 10Hz(100ms) */
tmr_base_init(TMR1, 999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
/* (systemclock/(systemclock/10000))/10000 = 1Hz(1s) */
tmr_base_init(TMR1, 9999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_OVERFLOW);
@@ -140,11 +136,16 @@ static void adc_config(void)
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_ADC3_PERIPH_CLOCK, TRUE);
crm_adc_clock_div_set(CRM_ADC_DIV_6);
adc_reset(ADC1);
adc_reset(ADC2);
adc_reset(ADC3);
crm_adc_clock_div_set(CRM_ADC_DIV_4);
adc_base_default_para_init(&adc_base_struct);
/* select combine mode */
adc_combine_mode_select(ADC_ORDINARY_SMLT_ONLY_MODE);
adc_base_default_para_init(&adc_base_struct);
/* ADC1 config */
adc_base_struct.sequence_mode = TRUE;
adc_base_struct.repeat_mode = FALSE;
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
@@ -156,12 +157,14 @@ static void adc_config(void)
adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_TMR1TRGOUT, TRUE);
adc_dma_mode_enable(ADC1, TRUE);
/* ADC2 config */
adc_base_config(ADC2, &adc_base_struct);
adc_ordinary_channel_set(ADC2, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_239_5);
adc_ordinary_channel_set(ADC2, ADC_CHANNEL_8, 2, ADC_SAMPLETIME_239_5);
adc_ordinary_channel_set(ADC2, ADC_CHANNEL_9, 3, ADC_SAMPLETIME_239_5);
adc_ordinary_conversion_trigger_set(ADC2, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
/* ADC3 config */
adc_base_config(ADC3, &adc_base_struct);
adc_ordinary_channel_set(ADC3, ADC_CHANNEL_10, 1, ADC_SAMPLETIME_239_5);
adc_ordinary_channel_set(ADC3, ADC_CHANNEL_11, 2, ADC_SAMPLETIME_239_5);
@@ -171,6 +174,8 @@ static void adc_config(void)
adc_enable(ADC1, TRUE);
adc_enable(ADC2, TRUE);
/* ADC calibration */
adc_calibration_init(ADC1);
while(adc_calibration_init_status_get(ADC1));
adc_calibration_start(ADC1);
@@ -187,6 +192,34 @@ static void adc_config(void)
while(adc_calibration_status_get(ADC3));
}
/**
* @brief this function handles dma1_channel1 handler.
* @param none
* @retval none
*/
void DMA1_Channel1_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
{
dma_flag_clear(DMA1_FDT1_FLAG);
dma1_trans_complete_flag++;
}
}
/**
* @brief this function handles dma2_channel4_5 handler.
* @param none
* @retval none
*/
void DMA2_Channel4_5_IRQHandler(void)
{
if(dma_interrupt_flag_get(DMA2_FDT5_FLAG) != RESET)
{
dma_flag_clear(DMA2_FDT5_FLAG);
dma2_trans_complete_flag++;
}
}
/**
* @brief main function.
* @param none
@@ -194,7 +227,6 @@ static void adc_config(void)
*/
int main(void)
{
__IO uint32_t index = 0;
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
system_clock_config();
at32_board_init();
@@ -207,28 +239,38 @@ int main(void)
dma_config();
adc_config();
/* enable DMA after ADC activation */
dma_channel_enable(DMA1_CHANNEL1, TRUE);
dma_channel_enable(DMA2_CHANNEL5, TRUE);
printf("triple_adc_synchro_trigger \r\n");
tmr_counter_enable(TMR1, TRUE);
while(dma1_trans_complete_flag == 0);
while(dma2_trans_complete_flag == 0);
tmr_counter_enable(TMR1, FALSE);
for(index = 0; index < 5; index++)
{
printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][0]);
printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][1]);
printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][2]);
printf("adc3_ordinary_valuetab[%d][0] = 0x%x\r\n", index, adc3_ordinary_valuetab[index][0]);
printf("adc3_ordinary_valuetab[%d][1] = 0x%x\r\n", index, adc3_ordinary_valuetab[index][1]);
printf("adc3_ordinary_valuetab[%d][2] = 0x%x\r\n", index, adc3_ordinary_valuetab[index][2]);
printf("\r\n");
}
at32_led_on(LED2);
while(1)
{
/* wait ordinary conversion end */
if(adc12_ordinary_conversion_times_index != dma1_trans_complete_flag)
{
adc12_ordinary_conversion_times_index = dma1_trans_complete_flag;
printf("adc12_ordinary_conversion_times_index = %d\r\n",adc12_ordinary_conversion_times_index);
printf("adc1_ordinary_valuetab[0] = 0x%x\r\n", adc1_ordinary_valuetab[0]);
printf("adc1_ordinary_valuetab[1] = 0x%x\r\n", adc1_ordinary_valuetab[1]);
printf("adc1_ordinary_valuetab[2] = 0x%x\r\n", adc1_ordinary_valuetab[2]);
printf("\r\n");
at32_led_toggle(LED2);
}
/* wait preempt conversion end */
if(adc3_ordinary_conversion_times_index != dma2_trans_complete_flag)
{
adc3_ordinary_conversion_times_index = dma2_trans_complete_flag;
printf("adc3_ordinary_conversion_times_index = %d\r\n",adc3_ordinary_conversion_times_index);
printf("adc3_ordinary_valuetab[0] = 0x%x\r\n", adc3_ordinary_valuetab[0]);
printf("adc3_ordinary_valuetab[1] = 0x%x\r\n", adc3_ordinary_valuetab[1]);
printf("adc3_ordinary_valuetab[2] = 0x%x\r\n", adc3_ordinary_valuetab[2]);
printf("\r\n");
at32_led_toggle(LED3);
}
}
}

3
project/at_start_f403a/examples/adc/voltage_monitoring/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/voltage_monitoring/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/voltage_monitoring/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/adc/voltage_monitoring/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

22
project/at_start_f403a/examples/adc/voltage_monitoring/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -24,10 +25,6 @@
/* includes ------------------------------------------------------------------*/
#include "at32f403a_407_int.h"
#include "at32f403a_407_board.h"
extern __IO uint16_t adc1_ordinary_valuetab[3];
extern __IO uint16_t vmor_flag_index;
/** @addtogroup AT32F403A_periph_examples
* @{
@@ -135,21 +132,6 @@ void SysTick_Handler(void)
{
}
/**
* @brief this function handles adc1_2 handler.
* @param none
* @retval none
*/
void ADC1_2_IRQHandler(void)
{
if(adc_interrupt_flag_get(ADC1, ADC_VMOR_FLAG) != RESET)
{
at32_led_toggle(LED3);
adc_flag_clear(ADC1, ADC_VMOR_FLAG);
vmor_flag_index = 1;
}
}
/**
* @}
*/

44
project/at_start_f403a/examples/adc/voltage_monitoring/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
@@ -35,10 +36,7 @@
__IO uint16_t adc1_ordinary_valuetab[3] = {0};
__IO uint16_t vmor_flag_index = 0;
static void gpio_config(void);
static void dma_config(void);
static void adc_config(void);
__IO uint16_t error_times_index = 0;
/**
* @brief gpio configuration.
@@ -78,8 +76,6 @@ static void dma_config(void)
dma_init_struct.priority = DMA_PRIORITY_HIGH;
dma_init_struct.loop_mode_enable = TRUE;
dma_init(DMA1_CHANNEL1, &dma_init_struct);
dma_channel_enable(DMA1_CHANNEL1, TRUE);
}
/**
@@ -91,12 +87,15 @@ static void adc_config(void)
{
adc_base_config_type adc_base_struct;
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
crm_adc_clock_div_set(CRM_ADC_DIV_6);
adc_reset(ADC1);
crm_adc_clock_div_set(CRM_ADC_DIV_4);
nvic_irq_enable(ADC1_2_IRQn, 0, 0);
adc_base_default_para_init(&adc_base_struct);
/* select combine mode */
adc_combine_mode_select(ADC_INDEPENDENT_MODE);
adc_base_default_para_init(&adc_base_struct);
/* ADC1 config */
adc_base_struct.sequence_mode = TRUE;
adc_base_struct.repeat_mode = FALSE;
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
@@ -113,12 +112,29 @@ static void adc_config(void)
adc_interrupt_enable(ADC1, ADC_VMOR_INT, TRUE);
adc_enable(ADC1, TRUE);
/* ADC calibration */
adc_calibration_init(ADC1);
while(adc_calibration_init_status_get(ADC1));
adc_calibration_start(ADC1);
while(adc_calibration_status_get(ADC1));
}
/**
* @brief this function handles adc1_2 handler.
* @param none
* @retval none
*/
void ADC1_2_IRQHandler(void)
{
if(adc_interrupt_flag_get(ADC1, ADC_VMOR_FLAG) != RESET)
{
at32_led_toggle(LED3);
adc_flag_clear(ADC1, ADC_VMOR_FLAG);
vmor_flag_index++;
}
}
/**
* @brief main function.
* @param none
@@ -126,7 +142,6 @@ static void adc_config(void)
*/
int main(void)
{
__IO uint32_t index = 0;
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
system_clock_config();
at32_board_init();
@@ -137,14 +152,19 @@ int main(void)
gpio_config();
dma_config();
adc_config();
/* enable DMA after ADC activation */
dma_channel_enable(DMA1_CHANNEL1, TRUE);
printf("voltage_monitoring \r\n");
while(1)
{
at32_led_toggle(LED2);
delay_sec(1);
if(vmor_flag_index == 1)
if(error_times_index != vmor_flag_index)
{
vmor_flag_index = 0;
error_times_index = vmor_flag_index;
printf("error_times_index = %d\r\n",error_times_index);
printf("out of range:adc1_channel_5 value is = %x!\r\n", adc1_ordinary_valuetab[1]);
}
adc_ordinary_software_trigger_enable(ADC1, TRUE);

3
project/at_start_f403a/examples/bpr/bpr_data/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/bpr/bpr_data/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/bpr/bpr_data/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/bpr/bpr_data/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/bpr/bpr_data/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/bpr/bpr_data/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/bpr/tamper/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/bpr/tamper/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/bpr/tamper/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/bpr/tamper/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/bpr/tamper/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/bpr/tamper/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/communication_mode/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/communication_mode/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/communication_mode/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/communication_mode/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/communication_mode/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/communication_mode/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/filter/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/filter/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/filter/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/filter/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/filter/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/filter/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/loopback_mode/inc/at32f403a_407_clock.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/loopback_mode/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/loopback_mode/inc/at32f403a_407_int.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/loopback_mode/src/at32f403a_407_clock.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/loopback_mode/src/at32f403a_407_int.c
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/can/loopback_mode/src/main.c
View File

@@ -3,7 +3,8 @@
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/cortex_m4/bit_band/inc/at32f403a_407_clock.h
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@@ -3,7 +3,8 @@
* @file at32f403a_407_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

3
project/at_start_f403a/examples/cortex_m4/bit_band/inc/at32f403a_407_conf.h
View File

@@ -3,7 +3,8 @@
* @file at32f403a_407_conf.h
* @brief at32f403a_407 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.

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