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document/ReleaseNotes_AT32F415_Firmware_Library.htm
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|
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|
||||
<div class=WordSection1 style='layout-grid:15.6pt'>
|
||||
|
||||
<p class=MsoNormal align=center style='text-align:center;word-break:break-all'><b><i><span
|
||||
lang=EN-US style='font-size:16.0pt;font-family:"Arial",sans-serif;color:#0070C0'>Release
|
||||
Notes for </span></i></b></p>
|
||||
|
||||
<p class=MsoNormal align=center style='text-align:center;word-break:break-all'><b><i><span
|
||||
lang=EN-US style='font-size:16.0pt;font-family:"Arial",sans-serif;color:#0070C0'>AT32F415
|
||||
Firmware Library</span></i></b></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.1.7-2025/08/04</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span lang=EN-US>Drivers</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>GPIO</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>新增</span><span lang=EN-US>gpio_bits_toggle()</span><span
|
||||
style='font-family:宋体'>函数。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>TMR</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新</span><span lang=EN-US>tmr_pwm_input_config()</span><span
|
||||
style='font-family:宋体'>、</span><span lang=EN-US>tmr_encoder_mode_config()</span><span
|
||||
style='font-family:宋体'>和</span><span lang=EN-US>tmr_output_channel_config()</span><span
|
||||
style='font-family:宋体'>函数。通道模式配置前关闭通道使能，否则通道模式无法切换。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>USART</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新</span><span lang=EN-US>usart_flag_clear()</span><span
|
||||
style='font-family:宋体'>函数，更改</span><span lang=EN-US>USART_RDBF_FLAG</span><span
|
||||
style='font-family:宋体'>的清除方式为读</span><span lang=EN-US>DT</span><span
|
||||
style='font-family:宋体'>寄存器清。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span lang=EN-US>Middlewares</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>USB</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新</span><span lang=EN-US>host</span><span
|
||||
style='font-family:宋体'>模式下</span><span lang=EN-US>usbh_hch_in_handler()</span><span
|
||||
style='font-family:宋体'>函数，在</span><span lang=EN-US>NAK</span><span
|
||||
style='font-family:宋体'>时的中断传输和同步传输不使能通道。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新</span><span lang=EN-US>keyboard class</span><span
|
||||
style='font-family:宋体'>，在</span><span lang=EN-US>keyboard_type</span><span
|
||||
style='font-family:宋体'>结构体中新增成员</span><span lang=EN-US>send_state</span><span
|
||||
style='font-family:宋体'>用于记录发送状态，并更新函数</span><span lang=EN-US>usb_keyboard_class_send_report</span><span
|
||||
style='font-family:宋体'>用于发送时的流控处理，避免发送数据出错。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新</span><span lang=EN-US>audio class</span><span
|
||||
style='font-family:宋体'>，修改</span><span lang=EN-US>audio sampling frequency</span><span
|
||||
style='font-family:宋体'>请求的配置，解决部分主机下的兼容性问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span lang=EN-US>Demos</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>PWC</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新</span><span lang=EN-US>deepsleep_ertc_alarm</span><span
|
||||
style='font-family:宋体'>和</span><span lang=EN-US>deepsleep_ertc_tamper</span><span
|
||||
style='font-family:宋体'>示例配置流程，并更新唤醒稳定延时方式。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>USB</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>调整</span><span lang=EN-US>keyboard</span><span
|
||||
style='font-family:宋体'>中进</span><span lang=EN-US>deepsleep</span><span
|
||||
style='font-family:宋体'>为额外低功耗模式和配置流程，并更新唤醒稳定延时方式。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>调整</span><span lang=EN-US>mouse</span><span
|
||||
style='font-family:宋体'>中进</span><span lang=EN-US>deepsleep</span><span
|
||||
style='font-family:宋体'>为额外低功耗模式和配置流程，并更新唤醒稳定延时方式。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新</span><span lang=EN-US>msc</span><span
|
||||
style='font-family:宋体'>中宏定义</span><span lang=EN-US>USB_FLASH_ADDR_OFFSET</span><span
|
||||
style='font-family:宋体'>值，由</span><span lang=EN-US>0x08005000</span><span
|
||||
style='font-family:宋体'>改为</span><span lang=EN-US>0x08008000</span><span
|
||||
style='font-family:宋体'>，解决不同环境下编译范围溢出导致出错问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新所有</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>相关</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>，调整</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>时钟分频配置以</span><span lang=EN-US>SCLK</span><span
|
||||
style='font-family:宋体'>作为参照。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>SPI</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新所有</span><span lang=EN-US>SPI</span><span
|
||||
style='font-family:宋体'>示例代码的结构和框架，移除</span><span lang=EN-US>usb_jtagpin_hardwarecs_dma</span><span
|
||||
style='font-family:宋体'>并新增</span><span lang=EN-US>fullduplex_dma</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>ADC</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>删除功能重复的</span><span lang=EN-US>software_trigger_repeat</span><span
|
||||
style='font-family:宋体'>示例。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新有使用到</span><span lang=EN-US>DMA</span><span
|
||||
style='font-family:宋体'>的相关示例，调整为</span><span lang=EN-US>ADC</span><span
|
||||
style='font-family:宋体'>循环触发转换，</span><span lang=EN-US>DMA</span><span
|
||||
style='font-family:宋体'>循环取数据的方式。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新所有</span><span lang=EN-US>ADC</span><span
|
||||
style='font-family:宋体'>示例，调整初始化流程，加强特定环境下的</span><span lang=EN-US>ADC</span><span
|
||||
style='font-family:宋体'>抗干扰能力，防止干扰可能导致的数据乱序现象。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>templates</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新</span><span lang=EN-US>eclipse_gcc</span><span
|
||||
style='font-family:宋体'>中工程配置的</span><span lang=EN-US>include</span><span
|
||||
style='font-family:宋体'>路径，防止多工程导入时</span><span lang=EN-US>workspace_project_locations</span><span
|
||||
style='font-family:宋体'>参数错误导致编译报错。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>Board</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新</span><span lang=EN-US>board.c</span><span
|
||||
style='font-family:宋体'>中部分参数变量的写法，解决新版编译器下编译警告。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>Cortex-m4</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新</span><span lang=EN-US>systick_interrupt</span><span
|
||||
style='font-family:宋体'>中判断延时的写法由大于改为大于等于，避免翻转</span><span lang=EN-US>IO</span><span
|
||||
style='font-family:宋体'>多</span><span lang=EN-US>1ms</span><span
|
||||
style='font-family:宋体'>问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:42.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>l<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span lang=EN-US>Keil</span><span
|
||||
style='font-family:宋体'>工程</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:63.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US style='font-family:Wingdings'>w<span
|
||||
style='font:7.0pt "Times New Roman"'> </span></span><span
|
||||
style='font-family:宋体'>更新部分</span><span lang=EN-US>Keil</span><span
|
||||
style='font-family:宋体'>工程的</span><span lang=EN-US>IROM size</span><span
|
||||
style='font-family:宋体'>配置。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新部分注释。</span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'> </span></b></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.1.6-2024/12/13</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新内核</span><span lang=EN-US>DSP</span><span
|
||||
style='font-family:宋体'>库。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>CAN</span><span
|
||||
style='font-family:宋体'>驱动。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>SDIO</span><span
|
||||
style='font-family:宋体'>协议层驱动，并新增</span><span lang=EN-US>emmc_card demo</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>驱动。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>5.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>I2C eeprom
|
||||
demo</span><span style='font-family:宋体'>，增加多页写逻辑。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>6.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>优化</span><span lang=EN-US>PWR</span><span
|
||||
style='font-family:宋体'>驱动和</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>7.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新部分注释。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.1.5-2024/08/08</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>驱动。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>调整</span><span lang=EN-US>sdio demo</span><span
|
||||
style='font-family:宋体'>中总线时钟频率。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>i2c_flag_clear</span><span
|
||||
style='font-family:宋体'>和</span><span lang=EN-US>i2c_init</span><span
|
||||
style='font-family:宋体'>函数。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>msc iap
|
||||
demo</span><span style='font-family:宋体'>，完善兼容性问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>5.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>I2C dma</span><span
|
||||
style='font-family:宋体'>相关</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>的初始化配置流程。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>6.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>修正部分</span><span lang=EN-US>demo AC6</span><span
|
||||
style='font-family:宋体'>环境下编译问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>7.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新部分注释。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.1.4-2024/02/01</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>slib demo</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.1.3-2024/01/26</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>usbd_core_type
|
||||
4</span><span style='font-family:宋体'>字节对齐。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>USB hid report</span><span
|
||||
style='font-family:宋体'>描述符。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新工程中</span><span lang=EN-US>sram size</span><span
|
||||
style='font-family:宋体'>相关。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>新增比较器输出参数定义。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>5.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新部分注释。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.1.2-2024/01/05</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>timer</span><span
|
||||
style='font-family:宋体'>下</span><span lang=EN-US>input_capture demo</span><span
|
||||
style='font-family:宋体'>的计数计算方式。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新部分</span><span lang=EN-US>USB demo
|
||||
HID</span><span style='font-family:宋体'>识别慢问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>systick interrupt
|
||||
demo</span><span style='font-family:宋体'>中</span><span lang=EN-US>systick</span><span
|
||||
style='font-family:宋体'>的初始化函数。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>新增</span><span lang=EN-US>winusb demo</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>5.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>各</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>中更新</span><span lang=EN-US>xx_interrupt_flag_get</span><span
|
||||
style='font-family:宋体'>函数调用方式。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.1.1-2023/10/26</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>驱动。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新部分注释及</span><span lang=EN-US>readme</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.1.0-2023/08/04</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span lang=EN-US>utilities</span><span style='font-family:宋体'>下各</span><span
|
||||
lang=EN-US>demo</span><span style='font-family:宋体'>增加</span><span lang=EN-US>AT32IDE</span><span
|
||||
style='font-family:宋体'>工程支持。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span lang=EN-US>CRC</span><span style='font-family:宋体'>驱动新增多项式及多项式宽度可修改的支持。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>驱动及</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>，完善数据对齐问题，优化代码流程。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>完善</span><span lang=EN-US>IAR9</span><span
|
||||
style='font-family:宋体'>使用</span><span lang=EN-US>printf</span><span
|
||||
style='font-family:宋体'>时的重定向兼容性问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>5.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>新增按</span><span lang=EN-US>FLASH</span><span
|
||||
style='font-family:宋体'>容量区分的宏定义并更新</span><span lang=EN-US>FLASH demo</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>6.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新部分注释。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.0.9-2023/02/16</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>完善</span><span lang=EN-US>utilities</span><span
|
||||
style='font-family:宋体'>下</span><span lang=EN-US>freertos demo</span><span
|
||||
style='font-family:宋体'>的</span><span lang=EN-US>AC6</span><span
|
||||
style='font-family:宋体'>编译问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>在</span><span lang=EN-US>at32f415_conf.h</span><span
|
||||
style='font-family:宋体'>中新增了</span><span lang=EN-US>LEXT_VALUE</span><span
|
||||
style='font-family:宋体'>宏定义。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>调整</span><span lang=EN-US>system_clock_config</span><span
|
||||
style='font-family:宋体'>系统时钟配置函数中</span><span lang=EN-US>crm_reset</span><span
|
||||
style='font-family:宋体'>函数的调用位置，避免进行系统时钟来回切换使用时出错。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>调整</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>设置地址的时机，并修改</span><span lang=EN-US>USB host</span><span
|
||||
style='font-family:宋体'>枚举超时处理流程。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>5.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新部分注释。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.0.8-2022/11/18</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>移除各文件中文件头部分的版本及日期记录项。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>新增一份</span><span lang=EN-US>release
|
||||
notes drivers</span><span style='font-family:宋体'>，单独记录</span><span lang=EN-US>drivers</span><span
|
||||
style='font-family:宋体'>部分的更新，文件位于</span><span lang=EN-US>libraries\drivers</span><span
|
||||
style='font-family:宋体'>目录下。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>I2C</span><span
|
||||
style='font-family:宋体'>中断和</span><span lang=EN-US>DMA demo</span><span
|
||||
style='font-family:宋体'>为非阻塞方式。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>修正</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>的</span><span lang=EN-US>cdc_msc</span><span
|
||||
style='font-family:宋体'>复合类在</span><span lang=EN-US>linux</span><span
|
||||
style='font-family:宋体'>失败的问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>5.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>的</span><span lang=EN-US>virtual msc iap demo</span><span
|
||||
style='font-family:宋体'>以支持</span><span lang=EN-US>linux</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>6.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>的</span><span lang=EN-US>audio</span><span
|
||||
style='font-family:宋体'>相关内容，以提供更好的兼容性。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>7.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新了</span><span lang=EN-US>IAR_Programmer.exe</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>8.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span lang=EN-US>USART interrupt demo</span><span
|
||||
style='font-family:宋体'>的中断函数中，标志位的检测加入了中断使能判断。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>9.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span lang=EN-US>ADC</span><span style='font-family:宋体'>新增</span><span
|
||||
lang=EN-US>repeat_conversion_loop_transfer demo</span><span style='font-family:
|
||||
宋体'>，采用</span><span lang=EN-US>DMA</span><span style='font-family:宋体'>循环取</span><span
|
||||
lang=EN-US>ADC</span><span style='font-family:宋体'>数据。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.0.7-2022/08/16</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>I2C eeprom
|
||||
demo</span><span style='font-family:宋体'>，增加</span><span lang=EN-US>16 </span><span
|
||||
style='font-family:宋体'>位地址支持。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>新增</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>主机</span><span lang=EN-US>CDC demo</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span lang=EN-US>template</span><span style='font-family:宋体'>下新增</span><span
|
||||
lang=EN-US>IAR v9.3</span><span style='font-family:宋体'>的工程</span><span
|
||||
lang=EN-US>demo</span><span style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>修正</span><span lang=EN-US>gcc</span><span
|
||||
style='font-family:宋体'>环境下</span><span lang=EN-US>printf</span><span
|
||||
style='font-family:宋体'>无法输出的问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>5.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>启动文件支持</span><span lang=EN-US>configuration
|
||||
wizard</span><span style='font-family:宋体'>图形配置。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.0.6-2022/06/21</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>新增</span><span lang=EN-US>FLASH</span><span
|
||||
style='font-family:宋体'>访问保护使能</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>新增</span><span lang=EN-US>IO toggle
|
||||
demo</span><span style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>优化部分</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>及驱动流程，更正注释。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.0.5-2022/05/20</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>修改</span><span lang=EN-US>USB
|
||||
virtual msc iap demo</span><span style='font-family:宋体'>的分区表描述符。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>新增</span><span lang=EN-US>USB composite_vcp_msc
|
||||
demo</span><span style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>修改了</span><span lang=EN-US>SD</span><span
|
||||
style='font-family:宋体'>卡相关</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>，优化了卡初始化识别流程。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更正了部分</span><span lang=EN-US>CAN
|
||||
demo</span><span style='font-family:宋体'>中波特率分频设置。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>5.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>优化部分</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>及驱动流程，更正注释。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.0.4-2022/04/02</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>新增</span><span lang=EN-US>wdt_standby
|
||||
demo</span><span style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>导入</span><span lang=EN-US>DSP</span><span
|
||||
style='font-family:宋体'>相关源码及新增</span><span lang=EN-US>cmsis_dsp demo</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>优化部分</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>及驱动流程，更正注释。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.0.3-2022/02/11</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span lang=EN-US>USB</span><span style='font-family:宋体'>中新增</span><span
|
||||
lang=EN-US>virtual_comport demo</span><span style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>完善</span><span lang=EN-US>USB msc
|
||||
iap demo</span><span style='font-family:宋体'>在不同系统下的兼容问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>优化部分</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>及驱动流程，更正注释。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.0.2-2021/12/31</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>修正中断优先级组参数定义错误的问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>统一</span><span lang=EN-US>printf</span><span
|
||||
style='font-family:宋体'>的串口初始化及重定向函数到</span><span lang=EN-US>xx_board.c</span><span
|
||||
style='font-family:宋体'>中，并去除各</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>中的相关内容。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新部分</span><span lang=EN-US>demo</span><span
|
||||
style='font-family:宋体'>，以支持</span><span lang=EN-US>AC6</span><span
|
||||
style='font-family:宋体'>、</span><span lang=EN-US> –O3</span><span
|
||||
style='font-family:宋体'>优化等级编译。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span lang=EN-US>USB</span><span style='font-family:宋体'>中新增</span><span
|
||||
lang=EN-US>composite_audio_hid demo</span><span style='font-family:宋体'>，并完善回馈及同步机制。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.0.1-2021/12/17</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>修正各外设的</span><span lang=EN-US>flag</span><span
|
||||
style='font-family:宋体'>清除函数，防止位域方式下的误操作问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>2.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>统一</span><span lang=EN-US>pwc_wakeup_pin_enable</span><span
|
||||
style='font-family:宋体'>函数接口。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>3.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>修正</span><span lang=EN-US>USB</span><span
|
||||
style='font-family:宋体'>设备类数组</span><span lang=EN-US>4</span><span
|
||||
style='font-family:宋体'>字节对齐问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>4.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>virtual_msc_iap
|
||||
demo</span><span style='font-family:宋体'>的虚拟空间大小为</span><span lang=EN-US>100 MB</span><span
|
||||
style='font-family:宋体'>。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>5.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>修正</span><span lang=EN-US>composite_vcp_keyboard
|
||||
demo</span><span style='font-family:宋体'>中虚拟串口</span><span lang=EN-US>bulk</span><span
|
||||
style='font-family:宋体'>传输结束问题。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>6.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>USB demo</span><span
|
||||
style='font-family:宋体'>中</span><span lang=EN-US>keyboard</span><span
|
||||
style='font-family:宋体'>相关的发送函数。</span></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>7.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span style='font-family:宋体'>更新</span><span lang=EN-US>ADC demo</span><span
|
||||
style='font-family:宋体'>中</span><span lang=EN-US>timer</span><span
|
||||
style='font-family:宋体'>触发</span><span lang=EN-US>adc</span><span
|
||||
style='font-family:宋体'>转换的定时器频率配置流程。</span></p>
|
||||
|
||||
<p class=MsoNormal><span lang=EN-US> </span></p>
|
||||
|
||||
<p class=MsoNormal style='word-break:break-all'><b><span lang=EN-US
|
||||
style='font-family:"Arial",sans-serif;color:#7030A0'>V2.0.0-2021/11/26</span></b></p>
|
||||
|
||||
<p class=MsoListParagraph style='margin-left:21.0pt;text-indent:-21.0pt;
|
||||
word-break:break-all'><span lang=EN-US>1.<span style='font:7.0pt "Times New Roman"'>
|
||||
</span></span><span lang=EN-US>AT32F415</span><span style='font-family:宋体'>系列固件库初始发布版。</span></p>
|
||||
|
||||
</div>
|
||||
|
||||
</body>
|
||||
|
||||
</html>
|
||||
Binary file not shown.
File diff suppressed because it is too large
Load Diff
132
libraries/cmsis/cm4/core_support/arm_common_tables_f16.h
Normal file
132
libraries/cmsis/cm4/core_support/arm_common_tables_f16.h
Normal file
@@ -0,0 +1,132 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_common_tables_f16.h
|
||||
* Description: Extern declaration for common tables
|
||||
*
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_COMMON_TABLES_F16_H
|
||||
#define _ARM_COMMON_TABLES_F16_H
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
|
||||
|
||||
/* F16 */
|
||||
#if !defined(__CC_ARM) && defined(ARM_FLOAT16_SUPPORTED)
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_16)
|
||||
extern const float16_t twiddleCoefF16_16[32];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_32)
|
||||
extern const float16_t twiddleCoefF16_32[64];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_64)
|
||||
extern const float16_t twiddleCoefF16_64[128];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_128)
|
||||
extern const float16_t twiddleCoefF16_128[256];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_256)
|
||||
extern const float16_t twiddleCoefF16_256[512];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_512)
|
||||
extern const float16_t twiddleCoefF16_512[1024];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_1024)
|
||||
extern const float16_t twiddleCoefF16_1024[2048];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048)
|
||||
extern const float16_t twiddleCoefF16_2048[4096];
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096)
|
||||
extern const float16_t twiddleCoefF16_4096[8192];
|
||||
#define twiddleCoefF16 twiddleCoefF16_4096
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
|
||||
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_32)
|
||||
extern const float16_t twiddleCoefF16_rfft_32[32];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_64)
|
||||
extern const float16_t twiddleCoefF16_rfft_64[64];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_128)
|
||||
extern const float16_t twiddleCoefF16_rfft_128[128];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_256)
|
||||
extern const float16_t twiddleCoefF16_rfft_256[256];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_512)
|
||||
extern const float16_t twiddleCoefF16_rfft_512[512];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_1024)
|
||||
extern const float16_t twiddleCoefF16_rfft_1024[1024];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_2048)
|
||||
extern const float16_t twiddleCoefF16_rfft_2048[2048];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_4096)
|
||||
extern const float16_t twiddleCoefF16_rfft_4096[4096];
|
||||
#endif
|
||||
|
||||
#endif /* ARMAC5 */
|
||||
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
|
||||
|
||||
#if !defined(__CC_ARM) && defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
extern const float16_t exp_tab_f16[8];
|
||||
extern const float16_t __logf_lut_f16[8];
|
||||
#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _ARM_COMMON_TABLES_F16_H */
|
||||
|
||||
|
||||
@@ -1,76 +1,86 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs.h
|
||||
* Description: Constant structs that are initialized for user convenience.
|
||||
* For example, some can be given as arguments to the arm_cfft_f32() function.
|
||||
*
|
||||
* $Date: 27. January 2017
|
||||
* $Revision: V.1.5.1
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_CONST_STRUCTS_H
|
||||
#define _ARM_CONST_STRUCTS_H
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_common_tables.h"
|
||||
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len16;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len32;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len64;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len128;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len256;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len512;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len1024;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len2048;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len4096;
|
||||
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
|
||||
|
||||
#endif
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs.h
|
||||
* Description: Constant structs that are initialized for user convenience.
|
||||
* For example, some can be given as arguments to the arm_cfft_f32() function.
|
||||
*
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_CONST_STRUCTS_H
|
||||
#define _ARM_CONST_STRUCTS_H
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_common_tables.h"
|
||||
#include "dsp/transform_functions.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len16;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len32;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len64;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len128;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len256;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len512;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len1024;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len2048;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len4096;
|
||||
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
77
libraries/cmsis/cm4/core_support/arm_const_structs_f16.h
Normal file
77
libraries/cmsis/cm4/core_support/arm_const_structs_f16.h
Normal file
@@ -0,0 +1,77 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs_f16.h
|
||||
* Description: Constant structs that are initialized for user convenience.
|
||||
* For example, some can be given as arguments to the arm_cfft_f16() function.
|
||||
*
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_CONST_STRUCTS_F16_H
|
||||
#define _ARM_CONST_STRUCTS_F16_H
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_common_tables.h"
|
||||
#include "arm_common_tables_f16.h"
|
||||
#include "dsp/transform_functions_f16.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if !defined(__CC_ARM) && defined(ARM_FLOAT16_SUPPORTED)
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
|
||||
extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len16;
|
||||
#endif
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
|
||||
extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len32;
|
||||
#endif
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
|
||||
extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len64;
|
||||
#endif
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
|
||||
extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len128;
|
||||
#endif
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
|
||||
extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len256;
|
||||
#endif
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
|
||||
extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len512;
|
||||
#endif
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
|
||||
extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len1024;
|
||||
#endif
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
|
||||
extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len2048;
|
||||
#endif
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
|
||||
extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len4096;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
59
libraries/cmsis/cm4/core_support/arm_math_f16.h
Normal file
59
libraries/cmsis/cm4/core_support/arm_math_f16.h
Normal file
@@ -0,0 +1,59 @@
|
||||
/******************************************************************************
|
||||
* @file arm_math_f16.h
|
||||
* @brief Public header file for f16 function of the CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_MATH_F16_H
|
||||
#define _ARM_MATH_F16_H
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
#include "dsp/basic_math_functions_f16.h"
|
||||
#include "dsp/interpolation_functions_f16.h"
|
||||
#include "dsp/bayes_functions_f16.h"
|
||||
#include "dsp/matrix_functions_f16.h"
|
||||
#include "dsp/complex_math_functions_f16.h"
|
||||
#include "dsp/statistics_functions_f16.h"
|
||||
#include "dsp/controller_functions_f16.h"
|
||||
#include "dsp/support_functions_f16.h"
|
||||
#include "dsp/distance_functions_f16.h"
|
||||
#include "dsp/svm_functions_f16.h"
|
||||
#include "dsp/fast_math_functions_f16.h"
|
||||
#include "dsp/transform_functions_f16.h"
|
||||
#include "dsp/filtering_functions_f16.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _ARM_MATH_F16_H */
|
||||
|
||||
|
||||
206
libraries/cmsis/cm4/core_support/arm_math_memory.h
Normal file
206
libraries/cmsis/cm4/core_support/arm_math_memory.h
Normal file
@@ -0,0 +1,206 @@
|
||||
/******************************************************************************
|
||||
* @file arm_math_memory.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_MATH_MEMORY_H_
|
||||
|
||||
#define _ARM_MATH_MEMORY_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
@brief definition to read/write two 16 bit values.
|
||||
@deprecated
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#define __SIMD32_TYPE int32_t __packed
|
||||
#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
|
||||
#define __SIMD32_TYPE int32_t
|
||||
#elif defined ( __GNUC__ )
|
||||
#define __SIMD32_TYPE int32_t
|
||||
#elif defined ( __ICCARM__ )
|
||||
#define __SIMD32_TYPE int32_t __packed
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#define __SIMD32_TYPE int32_t
|
||||
#elif defined ( __CSMC__ )
|
||||
#define __SIMD32_TYPE int32_t
|
||||
#elif defined ( __TASKING__ )
|
||||
#define __SIMD32_TYPE __un(aligned) int32_t
|
||||
#elif defined(_MSC_VER )
|
||||
#define __SIMD32_TYPE int32_t
|
||||
#else
|
||||
#error Unknown compiler
|
||||
#endif
|
||||
|
||||
#define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr))
|
||||
#define __SIMD32_CONST(addr) ( (__SIMD32_TYPE * ) (addr))
|
||||
#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE * ) (addr))
|
||||
#define __SIMD64(addr) (*( int64_t **) & (addr))
|
||||
|
||||
|
||||
/* SIMD replacement */
|
||||
|
||||
|
||||
/**
|
||||
@brief Read 2 Q15 from Q15 pointer.
|
||||
@param[in] pQ15 points to input value
|
||||
@return Q31 value
|
||||
*/
|
||||
__STATIC_FORCEINLINE q31_t read_q15x2 (
|
||||
q15_t const * pQ15)
|
||||
{
|
||||
q31_t val;
|
||||
|
||||
#ifdef __ARM_FEATURE_UNALIGNED
|
||||
memcpy (&val, pQ15, 4);
|
||||
#else
|
||||
val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ;
|
||||
#endif
|
||||
|
||||
return (val);
|
||||
}
|
||||
|
||||
/**
|
||||
@brief Read 2 Q15 from Q15 pointer and increment pointer afterwards.
|
||||
@param[in] pQ15 points to input value
|
||||
@return Q31 value
|
||||
*/
|
||||
#define read_q15x2_ia(pQ15) read_q15x2((*(pQ15) += 2) - 2)
|
||||
|
||||
/**
|
||||
@brief Read 2 Q15 from Q15 pointer and decrement pointer afterwards.
|
||||
@param[in] pQ15 points to input value
|
||||
@return Q31 value
|
||||
*/
|
||||
#define read_q15x2_da(pQ15) read_q15x2((*(pQ15) -= 2) + 2)
|
||||
|
||||
/**
|
||||
@brief Write 2 Q15 to Q15 pointer and increment pointer afterwards.
|
||||
@param[in] pQ15 points to input value
|
||||
@param[in] value Q31 value
|
||||
@return none
|
||||
*/
|
||||
__STATIC_FORCEINLINE void write_q15x2_ia (
|
||||
q15_t ** pQ15,
|
||||
q31_t value)
|
||||
{
|
||||
q31_t val = value;
|
||||
#ifdef __ARM_FEATURE_UNALIGNED
|
||||
memcpy (*pQ15, &val, 4);
|
||||
#else
|
||||
(*pQ15)[0] = (q15_t)(val & 0x0FFFF);
|
||||
(*pQ15)[1] = (q15_t)((val >> 16) & 0x0FFFF);
|
||||
#endif
|
||||
|
||||
*pQ15 += 2;
|
||||
}
|
||||
|
||||
/**
|
||||
@brief Write 2 Q15 to Q15 pointer.
|
||||
@param[in] pQ15 points to input value
|
||||
@param[in] value Q31 value
|
||||
@return none
|
||||
*/
|
||||
__STATIC_FORCEINLINE void write_q15x2 (
|
||||
q15_t * pQ15,
|
||||
q31_t value)
|
||||
{
|
||||
q31_t val = value;
|
||||
|
||||
#ifdef __ARM_FEATURE_UNALIGNED
|
||||
memcpy (pQ15, &val, 4);
|
||||
#else
|
||||
pQ15[0] = (q15_t)(val & 0x0FFFF);
|
||||
pQ15[1] = (q15_t)(val >> 16);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
@brief Read 4 Q7 from Q7 pointer
|
||||
@param[in] pQ7 points to input value
|
||||
@return Q31 value
|
||||
*/
|
||||
__STATIC_FORCEINLINE q31_t read_q7x4 (
|
||||
q7_t const * pQ7)
|
||||
{
|
||||
q31_t val;
|
||||
|
||||
#ifdef __ARM_FEATURE_UNALIGNED
|
||||
memcpy (&val, pQ7, 4);
|
||||
#else
|
||||
val =((pQ7[3] & 0x0FF) << 24) | ((pQ7[2] & 0x0FF) << 16) | ((pQ7[1] & 0x0FF) << 8) | (pQ7[0] & 0x0FF);
|
||||
#endif
|
||||
return (val);
|
||||
}
|
||||
|
||||
/**
|
||||
@brief Read 4 Q7 from Q7 pointer and increment pointer afterwards.
|
||||
@param[in] pQ7 points to input value
|
||||
@return Q31 value
|
||||
*/
|
||||
#define read_q7x4_ia(pQ7) read_q7x4((*(pQ7) += 4) - 4)
|
||||
|
||||
/**
|
||||
@brief Read 4 Q7 from Q7 pointer and decrement pointer afterwards.
|
||||
@param[in] pQ7 points to input value
|
||||
@return Q31 value
|
||||
*/
|
||||
#define read_q7x4_da(pQ7) read_q7x4((*(pQ7) -= 4) + 4)
|
||||
|
||||
/**
|
||||
@brief Write 4 Q7 to Q7 pointer and increment pointer afterwards.
|
||||
@param[in] pQ7 points to input value
|
||||
@param[in] value Q31 value
|
||||
@return none
|
||||
*/
|
||||
__STATIC_FORCEINLINE void write_q7x4_ia (
|
||||
q7_t ** pQ7,
|
||||
q31_t value)
|
||||
{
|
||||
q31_t val = value;
|
||||
#ifdef __ARM_FEATURE_UNALIGNED
|
||||
memcpy (*pQ7, &val, 4);
|
||||
#else
|
||||
(*pQ7)[0] = (q7_t)(val & 0x0FF);
|
||||
(*pQ7)[1] = (q7_t)((val >> 8) & 0x0FF);
|
||||
(*pQ7)[2] = (q7_t)((val >> 16) & 0x0FF);
|
||||
(*pQ7)[3] = (q7_t)((val >> 24) & 0x0FF);
|
||||
|
||||
#endif
|
||||
*pQ7 += 4;
|
||||
}
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*ifndef _ARM_MATH_MEMORY_H_ */
|
||||
616
libraries/cmsis/cm4/core_support/arm_math_types.h
Normal file
616
libraries/cmsis/cm4/core_support/arm_math_types.h
Normal file
@@ -0,0 +1,616 @@
|
||||
/******************************************************************************
|
||||
* @file arm_math_types.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_MATH_TYPES_H_
|
||||
|
||||
#define _ARM_MATH_TYPES_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/* Compiler specific diagnostic adjustment */
|
||||
#if defined ( __CC_ARM )
|
||||
|
||||
#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
|
||||
|
||||
#elif defined ( __APPLE_CC__ )
|
||||
#pragma GCC diagnostic ignored "-Wold-style-cast"
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wsign-conversion"
|
||||
#pragma GCC diagnostic ignored "-Wconversion"
|
||||
#pragma GCC diagnostic ignored "-Wunused-parameter"
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
|
||||
#elif defined ( __TI_ARM__ )
|
||||
|
||||
#elif defined ( __CSMC__ )
|
||||
|
||||
#elif defined ( __TASKING__ )
|
||||
|
||||
#elif defined ( _MSC_VER )
|
||||
|
||||
#else
|
||||
#error Unknown compiler
|
||||
#endif
|
||||
|
||||
|
||||
/* Included for instrinsics definitions */
|
||||
#if defined (_MSC_VER )
|
||||
#include <stdint.h>
|
||||
#define __STATIC_FORCEINLINE static __forceinline
|
||||
#define __STATIC_INLINE static __inline
|
||||
#define __ALIGNED(x) __declspec(align(x))
|
||||
#elif defined ( __APPLE_CC__ )
|
||||
#include <stdint.h>
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#define __STATIC_FORCEINLINE static inline __attribute__((always_inline))
|
||||
#define __STATIC_INLINE static inline
|
||||
#elif defined (__GNUC_PYTHON__)
|
||||
#include <stdint.h>
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#define __STATIC_FORCEINLINE static inline __attribute__((always_inline))
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#else
|
||||
#include "cmsis_compiler.h"
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#include <string.h>
|
||||
#include <math.h>
|
||||
#include <float.h>
|
||||
#include <limits.h>
|
||||
|
||||
/* evaluate ARM DSP feature */
|
||||
#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
|
||||
#define ARM_MATH_DSP 1
|
||||
#endif
|
||||
|
||||
#if defined(ARM_MATH_NEON)
|
||||
#if defined(_MSC_VER) && defined(_M_ARM64EC)
|
||||
#include <arm64_neon.h>
|
||||
#else
|
||||
#include <arm_neon.h>
|
||||
#endif
|
||||
#if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
|
||||
#if !defined(ARM_MATH_NEON_FLOAT16)
|
||||
#define ARM_MATH_NEON_FLOAT16
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
|
||||
#if defined(__ARM_FEATURE_MVE)
|
||||
#if __ARM_FEATURE_MVE
|
||||
#if !defined(ARM_MATH_MVEI)
|
||||
#define ARM_MATH_MVEI
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if (__ARM_FEATURE_MVE & 2)
|
||||
#if !defined(ARM_MATH_MVEF)
|
||||
#define ARM_MATH_MVEF
|
||||
#endif
|
||||
#if !defined(ARM_MATH_MVE_FLOAT16)
|
||||
#define ARM_MATH_MVE_FLOAT16
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /*defined(__ARM_FEATURE_MVE)*/
|
||||
#endif /*!defined(ARM_MATH_AUTOVECTORIZE)*/
|
||||
|
||||
|
||||
#if defined (ARM_MATH_HELIUM)
|
||||
#if !defined(ARM_MATH_MVEF)
|
||||
#define ARM_MATH_MVEF
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_MATH_MVEI)
|
||||
#define ARM_MATH_MVEI
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_MATH_MVE_FLOAT16)
|
||||
#define ARM_MATH_MVE_FLOAT16
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
/* Enter low optimization region - place directly above function definition */
|
||||
#if defined( __ARM_ARCH_7EM__ )
|
||||
#define LOW_OPTIMIZATION_ENTER \
|
||||
_Pragma ("push") \
|
||||
_Pragma ("O1")
|
||||
#else
|
||||
#define LOW_OPTIMIZATION_ENTER
|
||||
#endif
|
||||
|
||||
/* Exit low optimization region - place directly after end of function definition */
|
||||
#if defined ( __ARM_ARCH_7EM__ )
|
||||
#define LOW_OPTIMIZATION_EXIT \
|
||||
_Pragma ("pop")
|
||||
#else
|
||||
#define LOW_OPTIMIZATION_EXIT
|
||||
#endif
|
||||
|
||||
/* Enter low optimization region - place directly above function definition */
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
|
||||
|
||||
/* Exit low optimization region - place directly after end of function definition */
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
|
||||
|
||||
#elif defined (__ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
|
||||
#define LOW_OPTIMIZATION_ENTER
|
||||
#define LOW_OPTIMIZATION_EXIT
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
|
||||
|
||||
#elif defined ( __APPLE_CC__ )
|
||||
#define LOW_OPTIMIZATION_ENTER
|
||||
#define LOW_OPTIMIZATION_EXIT
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#define LOW_OPTIMIZATION_ENTER \
|
||||
__attribute__(( optimize("-O1") ))
|
||||
#define LOW_OPTIMIZATION_EXIT
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
/* Enter low optimization region - place directly above function definition */
|
||||
#if defined ( __ARM_ARCH_7EM__ )
|
||||
#define LOW_OPTIMIZATION_ENTER \
|
||||
_Pragma ("optimize=low")
|
||||
#else
|
||||
#define LOW_OPTIMIZATION_ENTER
|
||||
#endif
|
||||
|
||||
/* Exit low optimization region - place directly after end of function definition */
|
||||
#define LOW_OPTIMIZATION_EXIT
|
||||
|
||||
/* Enter low optimization region - place directly above function definition */
|
||||
#if defined ( __ARM_ARCH_7EM__ )
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
|
||||
_Pragma ("optimize=low")
|
||||
#else
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
|
||||
#endif
|
||||
|
||||
/* Exit low optimization region - place directly after end of function definition */
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
|
||||
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#define LOW_OPTIMIZATION_ENTER
|
||||
#define LOW_OPTIMIZATION_EXIT
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
|
||||
|
||||
#elif defined ( __CSMC__ )
|
||||
#define LOW_OPTIMIZATION_ENTER
|
||||
#define LOW_OPTIMIZATION_EXIT
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
|
||||
|
||||
#elif defined ( __TASKING__ )
|
||||
#define LOW_OPTIMIZATION_ENTER
|
||||
#define LOW_OPTIMIZATION_EXIT
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
|
||||
|
||||
#elif defined ( _MSC_VER ) || defined(__GNUC_PYTHON__)
|
||||
#define LOW_OPTIMIZATION_ENTER
|
||||
#define LOW_OPTIMIZATION_EXIT
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
|
||||
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/* Compiler specific diagnostic adjustment */
|
||||
#if defined ( __CC_ARM )
|
||||
|
||||
#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
|
||||
|
||||
#elif defined ( __APPLE_CC__ )
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
|
||||
#elif defined ( __TI_ARM__ )
|
||||
|
||||
#elif defined ( __CSMC__ )
|
||||
|
||||
#elif defined ( __TASKING__ )
|
||||
|
||||
#elif defined ( _MSC_VER )
|
||||
|
||||
#else
|
||||
#error Unknown compiler
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(__ARM_FEATURE_MVE) && __ARM_FEATURE_MVE
|
||||
#include <arm_mve.h>
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief 8-bit fractional data type in 1.7 format.
|
||||
*/
|
||||
typedef int8_t q7_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit fractional data type in 1.15 format.
|
||||
*/
|
||||
typedef int16_t q15_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit fractional data type in 1.31 format.
|
||||
*/
|
||||
typedef int32_t q31_t;
|
||||
|
||||
/**
|
||||
* @brief 64-bit fractional data type in 1.63 format.
|
||||
*/
|
||||
typedef int64_t q63_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit floating-point type definition.
|
||||
*/
|
||||
#if !defined(__ICCARM__) || !(__ARM_FEATURE_MVE & 2)
|
||||
typedef float float32_t;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief 64-bit floating-point type definition.
|
||||
*/
|
||||
typedef double float64_t;
|
||||
|
||||
/**
|
||||
* @brief vector types
|
||||
*/
|
||||
#if defined(ARM_MATH_NEON) || (defined (ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE))
|
||||
/**
|
||||
* @brief 64-bit fractional 128-bit vector data type in 1.63 format
|
||||
*/
|
||||
typedef int64x2_t q63x2_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit fractional 128-bit vector data type in 1.31 format.
|
||||
*/
|
||||
typedef int32x4_t q31x4_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit fractional 128-bit vector data type with 16-bit alignment in 1.15 format.
|
||||
*/
|
||||
typedef __ALIGNED(2) int16x8_t q15x8_t;
|
||||
|
||||
/**
|
||||
* @brief 8-bit fractional 128-bit vector data type with 8-bit alignment in 1.7 format.
|
||||
*/
|
||||
typedef __ALIGNED(1) int8x16_t q7x16_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit fractional 128-bit vector pair data type in 1.31 format.
|
||||
*/
|
||||
typedef int32x4x2_t q31x4x2_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit fractional 128-bit vector quadruplet data type in 1.31 format.
|
||||
*/
|
||||
typedef int32x4x4_t q31x4x4_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit fractional 128-bit vector pair data type in 1.15 format.
|
||||
*/
|
||||
typedef int16x8x2_t q15x8x2_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit fractional 128-bit vector quadruplet data type in 1.15 format.
|
||||
*/
|
||||
typedef int16x8x4_t q15x8x4_t;
|
||||
|
||||
/**
|
||||
* @brief 8-bit fractional 128-bit vector pair data type in 1.7 format.
|
||||
*/
|
||||
typedef int8x16x2_t q7x16x2_t;
|
||||
|
||||
/**
|
||||
* @brief 8-bit fractional 128-bit vector quadruplet data type in 1.7 format.
|
||||
*/
|
||||
typedef int8x16x4_t q7x16x4_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit fractional data type in 9.23 format.
|
||||
*/
|
||||
typedef int32_t q23_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit fractional 128-bit vector data type in 9.23 format.
|
||||
*/
|
||||
typedef int32x4_t q23x4_t;
|
||||
|
||||
/**
|
||||
* @brief 64-bit status 128-bit vector data type.
|
||||
*/
|
||||
typedef int64x2_t status64x2_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit status 128-bit vector data type.
|
||||
*/
|
||||
typedef int32x4_t status32x4_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit status 128-bit vector data type.
|
||||
*/
|
||||
typedef int16x8_t status16x8_t;
|
||||
|
||||
/**
|
||||
* @brief 8-bit status 128-bit vector data type.
|
||||
*/
|
||||
typedef int8x16_t status8x16_t;
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(ARM_MATH_NEON) || (defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)) /* floating point vector*/
|
||||
/**
|
||||
* @brief 32-bit floating-point 128-bit vector type
|
||||
*/
|
||||
typedef float32x4_t f32x4_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit floating-point 128-bit vector pair data type
|
||||
*/
|
||||
typedef float32x4x2_t f32x4x2_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit floating-point 128-bit vector quadruplet data type
|
||||
*/
|
||||
typedef float32x4x4_t f32x4x4_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit ubiquitous 128-bit vector data type
|
||||
*/
|
||||
typedef union _any32x4_t
|
||||
{
|
||||
float32x4_t f;
|
||||
int32x4_t i;
|
||||
} any32x4_t;
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(ARM_MATH_NEON)
|
||||
/**
|
||||
* @brief 32-bit fractional 64-bit vector data type in 1.31 format.
|
||||
*/
|
||||
typedef int32x2_t q31x2_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit fractional 64-bit vector data type in 1.15 format.
|
||||
*/
|
||||
typedef __ALIGNED(2) int16x4_t q15x4_t;
|
||||
|
||||
/**
|
||||
* @brief 8-bit fractional 64-bit vector data type in 1.7 format.
|
||||
*/
|
||||
typedef __ALIGNED(1) int8x8_t q7x8_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit float 64-bit vector data type.
|
||||
*/
|
||||
typedef float32x2_t f32x2_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit floating-point 128-bit vector triplet data type
|
||||
*/
|
||||
typedef float32x4x3_t f32x4x3_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief 32-bit fractional 128-bit vector triplet data type in 1.31 format
|
||||
*/
|
||||
typedef int32x4x3_t q31x4x3_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit fractional 128-bit vector triplet data type in 1.15 format
|
||||
*/
|
||||
typedef int16x8x3_t q15x8x3_t;
|
||||
|
||||
/**
|
||||
* @brief 8-bit fractional 128-bit vector triplet data type in 1.7 format
|
||||
*/
|
||||
typedef int8x16x3_t q7x16x3_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit floating-point 64-bit vector pair data type
|
||||
*/
|
||||
typedef float32x2x2_t f32x2x2_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit floating-point 64-bit vector triplet data type
|
||||
*/
|
||||
typedef float32x2x3_t f32x2x3_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit floating-point 64-bit vector quadruplet data type
|
||||
*/
|
||||
typedef float32x2x4_t f32x2x4_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief 32-bit fractional 64-bit vector pair data type in 1.31 format
|
||||
*/
|
||||
typedef int32x2x2_t q31x2x2_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit fractional 64-bit vector triplet data type in 1.31 format
|
||||
*/
|
||||
typedef int32x2x3_t q31x2x3_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit fractional 64-bit vector quadruplet data type in 1.31 format
|
||||
*/
|
||||
typedef int32x4x3_t q31x2x4_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit fractional 64-bit vector pair data type in 1.15 format
|
||||
*/
|
||||
typedef int16x4x2_t q15x4x2_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit fractional 64-bit vector triplet data type in 1.15 format
|
||||
*/
|
||||
typedef int16x4x2_t q15x4x3_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit fractional 64-bit vector quadruplet data type in 1.15 format
|
||||
*/
|
||||
typedef int16x4x3_t q15x4x4_t;
|
||||
|
||||
/**
|
||||
* @brief 8-bit fractional 64-bit vector pair data type in 1.7 format
|
||||
*/
|
||||
typedef int8x8x2_t q7x8x2_t;
|
||||
|
||||
/**
|
||||
* @brief 8-bit fractional 64-bit vector triplet data type in 1.7 format
|
||||
*/
|
||||
typedef int8x8x3_t q7x8x3_t;
|
||||
|
||||
/**
|
||||
* @brief 8-bit fractional 64-bit vector quadruplet data type in 1.7 format
|
||||
*/
|
||||
typedef int8x8x4_t q7x8x4_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit ubiquitous 64-bit vector data type
|
||||
*/
|
||||
typedef union _any32x2_t
|
||||
{
|
||||
float32x2_t f;
|
||||
int32x2_t i;
|
||||
} any32x2_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief 32-bit status 64-bit vector data type.
|
||||
*/
|
||||
typedef int32x4_t status32x2_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit status 64-bit vector data type.
|
||||
*/
|
||||
typedef int16x8_t status16x4_t;
|
||||
|
||||
/**
|
||||
* @brief 8-bit status 64-bit vector data type.
|
||||
*/
|
||||
typedef int8x16_t status8x8_t;
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define F64_MAX ((float64_t)DBL_MAX)
|
||||
#define F32_MAX ((float32_t)FLT_MAX)
|
||||
|
||||
|
||||
|
||||
#define F64_MIN (-DBL_MAX)
|
||||
#define F32_MIN (-FLT_MAX)
|
||||
|
||||
|
||||
|
||||
#define F64_ABSMAX ((float64_t)DBL_MAX)
|
||||
#define F32_ABSMAX ((float32_t)FLT_MAX)
|
||||
|
||||
|
||||
|
||||
#define F64_ABSMIN ((float64_t)0.0)
|
||||
#define F32_ABSMIN ((float32_t)0.0)
|
||||
|
||||
|
||||
#define Q31_MAX ((q31_t)(0x7FFFFFFFL))
|
||||
#define Q15_MAX ((q15_t)(0x7FFF))
|
||||
#define Q7_MAX ((q7_t)(0x7F))
|
||||
#define Q31_MIN ((q31_t)(0x80000000L))
|
||||
#define Q15_MIN ((q15_t)(0x8000))
|
||||
#define Q7_MIN ((q7_t)(0x80))
|
||||
|
||||
#define Q31_ABSMAX ((q31_t)(0x7FFFFFFFL))
|
||||
#define Q15_ABSMAX ((q15_t)(0x7FFF))
|
||||
#define Q7_ABSMAX ((q7_t)(0x7F))
|
||||
#define Q31_ABSMIN ((q31_t)0)
|
||||
#define Q15_ABSMIN ((q15_t)0)
|
||||
#define Q7_ABSMIN ((q7_t)0)
|
||||
|
||||
/* Dimension C vector space */
|
||||
#define CMPLX_DIM 2
|
||||
|
||||
/**
|
||||
* @brief Error status returned by some functions in the library.
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
ARM_MATH_SUCCESS = 0, /**< No error */
|
||||
ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
|
||||
ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */
|
||||
ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation */
|
||||
ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */
|
||||
ARM_MATH_SINGULAR = -5, /**< Input matrix is singular and cannot be inverted */
|
||||
ARM_MATH_TEST_FAILURE = -6, /**< Test Failed */
|
||||
ARM_MATH_DECOMPOSITION_FAILURE = -7 /**< Decomposition Failed */
|
||||
} arm_status;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*ifndef _ARM_MATH_TYPES_H_ */
|
||||
163
libraries/cmsis/cm4/core_support/arm_math_types_f16.h
Normal file
163
libraries/cmsis/cm4/core_support/arm_math_types_f16.h
Normal file
@@ -0,0 +1,163 @@
|
||||
/******************************************************************************
|
||||
* @file arm_math_types_f16.h
|
||||
* @brief Public header file for f16 function of the CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_MATH_TYPES_F16_H
|
||||
#define _ARM_MATH_TYPES_F16_H
|
||||
|
||||
#include "arm_math_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if !defined( __CC_ARM )
|
||||
|
||||
/**
|
||||
* @brief 16-bit floating-point type definition.
|
||||
* This is already defined in arm_mve.h
|
||||
*
|
||||
* This is not fully supported on ARM AC5.
|
||||
*/
|
||||
|
||||
/*
|
||||
|
||||
Check if the type __fp16 is available.
|
||||
If it is not available, f16 version of the kernels
|
||||
won't be built.
|
||||
|
||||
*/
|
||||
#if !(__ARM_FEATURE_MVE & 2)
|
||||
#if !defined(DISABLEFLOAT16)
|
||||
#if defined(__ARM_FP16_FORMAT_IEEE) || defined(__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
typedef __fp16 float16_t;
|
||||
#define ARM_FLOAT16_SUPPORTED
|
||||
#endif
|
||||
#endif
|
||||
#else
|
||||
/* When Vector float16, this flag is always defined and can't be disabled */
|
||||
#define ARM_FLOAT16_SUPPORTED
|
||||
#endif
|
||||
|
||||
#if defined(ARM_MATH_NEON) || (defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)) /* floating point vector*/
|
||||
|
||||
#if defined(ARM_MATH_MVE_FLOAT16) || defined(ARM_MATH_NEON_FLOAT16)
|
||||
|
||||
/**
|
||||
* @brief 16-bit floating-point 128-bit vector data type
|
||||
*/
|
||||
typedef __ALIGNED(2) float16x8_t f16x8_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit floating-point 128-bit vector pair data type
|
||||
*/
|
||||
typedef float16x8x2_t f16x8x2_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit floating-point 128-bit vector quadruplet data type
|
||||
*/
|
||||
typedef float16x8x4_t f16x8x4_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit ubiquitous 128-bit vector data type
|
||||
*/
|
||||
typedef union _any16x8_t
|
||||
{
|
||||
float16x8_t f;
|
||||
int16x8_t i;
|
||||
} any16x8_t;
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(ARM_MATH_NEON)
|
||||
|
||||
|
||||
#if defined(ARM_MATH_NEON_FLOAT16)
|
||||
/**
|
||||
* @brief 16-bit float 64-bit vector data type.
|
||||
*/
|
||||
typedef __ALIGNED(2) float16x4_t f16x4_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit floating-point 128-bit vector triplet data type
|
||||
*/
|
||||
typedef float16x8x3_t f16x8x3_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit floating-point 64-bit vector pair data type
|
||||
*/
|
||||
typedef float16x4x2_t f16x4x2_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit floating-point 64-bit vector triplet data type
|
||||
*/
|
||||
typedef float16x4x3_t f16x4x3_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit floating-point 64-bit vector quadruplet data type
|
||||
*/
|
||||
typedef float16x4x4_t f16x4x4_t;
|
||||
|
||||
/**
|
||||
* @brief 16-bit ubiquitous 64-bit vector data type
|
||||
*/
|
||||
typedef union _any16x4_t
|
||||
{
|
||||
float16x4_t f;
|
||||
int16x4_t i;
|
||||
} any16x4_t;
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
#if defined(__ICCARM__)
|
||||
|
||||
#define F16INFINITY ((float16_t) INFINITY)
|
||||
|
||||
#else
|
||||
|
||||
#define F16INFINITY ((float16_t)__builtin_inf())
|
||||
|
||||
#endif
|
||||
|
||||
#define F16_MAX ((float16_t)__FLT16_MAX__)
|
||||
#define F16_MIN (-(_Float16)__FLT16_MAX__)
|
||||
|
||||
#define F16_ABSMAX ((float16_t)__FLT16_MAX__)
|
||||
#define F16_ABSMIN ((float16_t)0.0f16)
|
||||
|
||||
#endif /* ARM_FLOAT16_SUPPORTED*/
|
||||
#endif /* !defined( __CC_ARM ) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _ARM_MATH_F16_H */
|
||||
@@ -1,235 +1,231 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_mve_tables.h
|
||||
* Description: common tables like fft twiddle factors, Bitreverse, reciprocal etc
|
||||
* used for MVE implementation only
|
||||
*
|
||||
* $Date: 08. January 2020
|
||||
* $Revision: V1.7.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2020 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_MVE_TABLES_H
|
||||
#define _ARM_MVE_TABLES_H
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_16_f32[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_16_f32[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_16_f32[2];
|
||||
extern float32_t rearranged_twiddle_stride1_16_f32[8];
|
||||
extern float32_t rearranged_twiddle_stride2_16_f32[8];
|
||||
extern float32_t rearranged_twiddle_stride3_16_f32[8];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_64_f32[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_64_f32[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_64_f32[3];
|
||||
extern float32_t rearranged_twiddle_stride1_64_f32[40];
|
||||
extern float32_t rearranged_twiddle_stride2_64_f32[40];
|
||||
extern float32_t rearranged_twiddle_stride3_64_f32[40];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_256_f32[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_256_f32[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_256_f32[4];
|
||||
extern float32_t rearranged_twiddle_stride1_256_f32[168];
|
||||
extern float32_t rearranged_twiddle_stride2_256_f32[168];
|
||||
extern float32_t rearranged_twiddle_stride3_256_f32[168];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_f32[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_f32[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_f32[5];
|
||||
extern float32_t rearranged_twiddle_stride1_1024_f32[680];
|
||||
extern float32_t rearranged_twiddle_stride2_1024_f32[680];
|
||||
extern float32_t rearranged_twiddle_stride3_1024_f32[680];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) || defined(ARM_TABLE_TWIDDLECOEF_F32_8192)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_f32[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_f32[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_f32[6];
|
||||
extern float32_t rearranged_twiddle_stride1_4096_f32[2728];
|
||||
extern float32_t rearranged_twiddle_stride2_4096_f32[2728];
|
||||
extern float32_t rearranged_twiddle_stride3_4096_f32[2728];
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVEI)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q31[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q31[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q31[2];
|
||||
extern q31_t rearranged_twiddle_stride1_16_q31[8];
|
||||
extern q31_t rearranged_twiddle_stride2_16_q31[8];
|
||||
extern q31_t rearranged_twiddle_stride3_16_q31[8];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q31[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q31[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q31[3];
|
||||
extern q31_t rearranged_twiddle_stride1_64_q31[40];
|
||||
extern q31_t rearranged_twiddle_stride2_64_q31[40];
|
||||
extern q31_t rearranged_twiddle_stride3_64_q31[40];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q31[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q31[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q31[4];
|
||||
extern q31_t rearranged_twiddle_stride1_256_q31[168];
|
||||
extern q31_t rearranged_twiddle_stride2_256_q31[168];
|
||||
extern q31_t rearranged_twiddle_stride3_256_q31[168];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q31[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q31[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q31[5];
|
||||
extern q31_t rearranged_twiddle_stride1_1024_q31[680];
|
||||
extern q31_t rearranged_twiddle_stride2_1024_q31[680];
|
||||
extern q31_t rearranged_twiddle_stride3_1024_q31[680];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q31_8192)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q31[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q31[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q31[6];
|
||||
extern q31_t rearranged_twiddle_stride1_4096_q31[2728];
|
||||
extern q31_t rearranged_twiddle_stride2_4096_q31[2728];
|
||||
extern q31_t rearranged_twiddle_stride3_4096_q31[2728];
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVEI)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q15[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q15[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q15[2];
|
||||
extern q15_t rearranged_twiddle_stride1_16_q15[8];
|
||||
extern q15_t rearranged_twiddle_stride2_16_q15[8];
|
||||
extern q15_t rearranged_twiddle_stride3_16_q15[8];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q15[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q15[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q15[3];
|
||||
extern q15_t rearranged_twiddle_stride1_64_q15[40];
|
||||
extern q15_t rearranged_twiddle_stride2_64_q15[40];
|
||||
extern q15_t rearranged_twiddle_stride3_64_q15[40];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q15[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q15[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q15[4];
|
||||
extern q15_t rearranged_twiddle_stride1_256_q15[168];
|
||||
extern q15_t rearranged_twiddle_stride2_256_q15[168];
|
||||
extern q15_t rearranged_twiddle_stride3_256_q15[168];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q15[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q15[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q15[5];
|
||||
extern q15_t rearranged_twiddle_stride1_1024_q15[680];
|
||||
extern q15_t rearranged_twiddle_stride2_1024_q15[680];
|
||||
extern q15_t rearranged_twiddle_stride3_1024_q15[680];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q15_8192)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q15[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q15[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q15[6];
|
||||
extern q15_t rearranged_twiddle_stride1_4096_q15[2728];
|
||||
extern q15_t rearranged_twiddle_stride2_4096_q15[2728];
|
||||
extern q15_t rearranged_twiddle_stride3_4096_q15[2728];
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVEI)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
|
||||
|
||||
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
|
||||
|
||||
#endif /*_ARM_MVE_TABLES_H*/
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_mve_tables.h
|
||||
* Description: common tables like fft twiddle factors, Bitreverse, reciprocal etc
|
||||
* used for MVE implementation only
|
||||
*
|
||||
* @version V1.10.0
|
||||
* @date 04 October 2021
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_MVE_TABLES_H
|
||||
#define _ARM_MVE_TABLES_H
|
||||
|
||||
#include "arm_math_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_16_f32[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_16_f32[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_16_f32[2];
|
||||
extern float32_t rearranged_twiddle_stride1_16_f32[8];
|
||||
extern float32_t rearranged_twiddle_stride2_16_f32[8];
|
||||
extern float32_t rearranged_twiddle_stride3_16_f32[8];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_64_f32[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_64_f32[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_64_f32[3];
|
||||
extern float32_t rearranged_twiddle_stride1_64_f32[40];
|
||||
extern float32_t rearranged_twiddle_stride2_64_f32[40];
|
||||
extern float32_t rearranged_twiddle_stride3_64_f32[40];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_256_f32[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_256_f32[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_256_f32[4];
|
||||
extern float32_t rearranged_twiddle_stride1_256_f32[168];
|
||||
extern float32_t rearranged_twiddle_stride2_256_f32[168];
|
||||
extern float32_t rearranged_twiddle_stride3_256_f32[168];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_f32[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_f32[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_f32[5];
|
||||
extern float32_t rearranged_twiddle_stride1_1024_f32[680];
|
||||
extern float32_t rearranged_twiddle_stride2_1024_f32[680];
|
||||
extern float32_t rearranged_twiddle_stride3_1024_f32[680];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) || defined(ARM_TABLE_TWIDDLECOEF_F32_8192)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_f32[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_f32[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_f32[6];
|
||||
extern float32_t rearranged_twiddle_stride1_4096_f32[2728];
|
||||
extern float32_t rearranged_twiddle_stride2_4096_f32[2728];
|
||||
extern float32_t rearranged_twiddle_stride3_4096_f32[2728];
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q31[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q31[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q31[2];
|
||||
extern q31_t rearranged_twiddle_stride1_16_q31[8];
|
||||
extern q31_t rearranged_twiddle_stride2_16_q31[8];
|
||||
extern q31_t rearranged_twiddle_stride3_16_q31[8];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q31[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q31[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q31[3];
|
||||
extern q31_t rearranged_twiddle_stride1_64_q31[40];
|
||||
extern q31_t rearranged_twiddle_stride2_64_q31[40];
|
||||
extern q31_t rearranged_twiddle_stride3_64_q31[40];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q31[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q31[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q31[4];
|
||||
extern q31_t rearranged_twiddle_stride1_256_q31[168];
|
||||
extern q31_t rearranged_twiddle_stride2_256_q31[168];
|
||||
extern q31_t rearranged_twiddle_stride3_256_q31[168];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q31[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q31[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q31[5];
|
||||
extern q31_t rearranged_twiddle_stride1_1024_q31[680];
|
||||
extern q31_t rearranged_twiddle_stride2_1024_q31[680];
|
||||
extern q31_t rearranged_twiddle_stride3_1024_q31[680];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q31_8192)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q31[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q31[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q31[6];
|
||||
extern q31_t rearranged_twiddle_stride1_4096_q31[2728];
|
||||
extern q31_t rearranged_twiddle_stride2_4096_q31[2728];
|
||||
extern q31_t rearranged_twiddle_stride3_4096_q31[2728];
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q15[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q15[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q15[2];
|
||||
extern q15_t rearranged_twiddle_stride1_16_q15[8];
|
||||
extern q15_t rearranged_twiddle_stride2_16_q15[8];
|
||||
extern q15_t rearranged_twiddle_stride3_16_q15[8];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q15[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q15[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q15[3];
|
||||
extern q15_t rearranged_twiddle_stride1_64_q15[40];
|
||||
extern q15_t rearranged_twiddle_stride2_64_q15[40];
|
||||
extern q15_t rearranged_twiddle_stride3_64_q15[40];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q15[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q15[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q15[4];
|
||||
extern q15_t rearranged_twiddle_stride1_256_q15[168];
|
||||
extern q15_t rearranged_twiddle_stride2_256_q15[168];
|
||||
extern q15_t rearranged_twiddle_stride3_256_q15[168];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q15[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q15[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q15[5];
|
||||
extern q15_t rearranged_twiddle_stride1_1024_q15[680];
|
||||
extern q15_t rearranged_twiddle_stride2_1024_q15[680];
|
||||
extern q15_t rearranged_twiddle_stride3_1024_q15[680];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q15_8192)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q15[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q15[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q15[6];
|
||||
extern q15_t rearranged_twiddle_stride1_4096_q15[2728];
|
||||
extern q15_t rearranged_twiddle_stride2_4096_q15[2728];
|
||||
extern q15_t rearranged_twiddle_stride3_4096_q15[2728];
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*_ARM_MVE_TABLES_H*/
|
||||
|
||||
|
||||
109
libraries/cmsis/cm4/core_support/arm_mve_tables_f16.h
Normal file
109
libraries/cmsis/cm4/core_support/arm_mve_tables_f16.h
Normal file
@@ -0,0 +1,109 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_mve_tables_f16.h
|
||||
* Description: common tables like fft twiddle factors, Bitreverse, reciprocal etc
|
||||
* used for MVE implementation only
|
||||
*
|
||||
* @version V1.10.0
|
||||
* @date 04 October 2021
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_MVE_TABLES_F16_H
|
||||
#define _ARM_MVE_TABLES_F16_H
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_16) || defined(ARM_TABLE_TWIDDLECOEF_F16_32)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_16_f16[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_16_f16[2];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_16_f16[2];
|
||||
extern float16_t rearranged_twiddle_stride1_16_f16[8];
|
||||
extern float16_t rearranged_twiddle_stride2_16_f16[8];
|
||||
extern float16_t rearranged_twiddle_stride3_16_f16[8];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_64) || defined(ARM_TABLE_TWIDDLECOEF_F16_128)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_64_f16[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_64_f16[3];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_64_f16[3];
|
||||
extern float16_t rearranged_twiddle_stride1_64_f16[40];
|
||||
extern float16_t rearranged_twiddle_stride2_64_f16[40];
|
||||
extern float16_t rearranged_twiddle_stride3_64_f16[40];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_256) || defined(ARM_TABLE_TWIDDLECOEF_F16_512)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_256_f16[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_256_f16[4];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_256_f16[4];
|
||||
extern float16_t rearranged_twiddle_stride1_256_f16[168];
|
||||
extern float16_t rearranged_twiddle_stride2_256_f16[168];
|
||||
extern float16_t rearranged_twiddle_stride3_256_f16[168];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_1024) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_f16[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_f16[5];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_f16[5];
|
||||
extern float16_t rearranged_twiddle_stride1_1024_f16[680];
|
||||
extern float16_t rearranged_twiddle_stride2_1024_f16[680];
|
||||
extern float16_t rearranged_twiddle_stride3_1024_f16[680];
|
||||
#endif
|
||||
|
||||
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096) || defined(ARM_TABLE_TWIDDLECOEF_F16_8192)
|
||||
|
||||
extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_f16[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_f16[6];
|
||||
extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_f16[6];
|
||||
extern float16_t rearranged_twiddle_stride1_4096_f16[2728];
|
||||
extern float16_t rearranged_twiddle_stride2_4096_f16[2728];
|
||||
extern float16_t rearranged_twiddle_stride3_4096_f16[2728];
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
|
||||
|
||||
#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*_ARM_MVE_TABLES_F16_H*/
|
||||
|
||||
@@ -1,372 +1,373 @@
|
||||
/******************************************************************************
|
||||
* @file arm_vec_math.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.7.0
|
||||
* @date 15. October 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_VEC_MATH_H
|
||||
#define _ARM_VEC_MATH_H
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_common_tables.h"
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#define INV_NEWTON_INIT_F32 0x7EF127EA
|
||||
|
||||
static const float32_t __logf_rng_f32=0.693147180f;
|
||||
|
||||
|
||||
/* fast inverse approximation (3x newton) */
|
||||
__STATIC_INLINE f32x4_t vrecip_medprec_f32(
|
||||
f32x4_t x)
|
||||
{
|
||||
q31x4_t m;
|
||||
f32x4_t b;
|
||||
any32x4_t xinv;
|
||||
f32x4_t ax = vabsq(x);
|
||||
|
||||
xinv.f = ax;
|
||||
m = 0x3F800000 - (xinv.i & 0x7F800000);
|
||||
xinv.i = xinv.i + m;
|
||||
xinv.f = 1.41176471f - 0.47058824f * xinv.f;
|
||||
xinv.i = xinv.i + m;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
xinv.f = vdupq_m(xinv.f, INFINITY, vcmpeqq(x, 0.0f));
|
||||
/*
|
||||
* restore sign
|
||||
*/
|
||||
xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq(x, 0.0f));
|
||||
|
||||
return xinv.f;
|
||||
}
|
||||
|
||||
/* fast inverse approximation (4x newton) */
|
||||
__STATIC_INLINE f32x4_t vrecip_hiprec_f32(
|
||||
f32x4_t x)
|
||||
{
|
||||
q31x4_t m;
|
||||
f32x4_t b;
|
||||
any32x4_t xinv;
|
||||
f32x4_t ax = vabsq(x);
|
||||
|
||||
xinv.f = ax;
|
||||
|
||||
m = 0x3F800000 - (xinv.i & 0x7F800000);
|
||||
xinv.i = xinv.i + m;
|
||||
xinv.f = 1.41176471f - 0.47058824f * xinv.f;
|
||||
xinv.i = xinv.i + m;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
xinv.f = vdupq_m(xinv.f, INFINITY, vcmpeqq(x, 0.0f));
|
||||
/*
|
||||
* restore sign
|
||||
*/
|
||||
xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq(x, 0.0f));
|
||||
|
||||
return xinv.f;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vdiv_f32(
|
||||
f32x4_t num, f32x4_t den)
|
||||
{
|
||||
return vmulq(num, vrecip_hiprec_f32(den));
|
||||
}
|
||||
|
||||
/**
|
||||
@brief Single-precision taylor dev.
|
||||
@param[in] x f32 quad vector input
|
||||
@param[in] coeffs f32 quad vector coeffs
|
||||
@return destination f32 quad vector
|
||||
*/
|
||||
|
||||
__STATIC_INLINE f32x4_t vtaylor_polyq_f32(
|
||||
f32x4_t x,
|
||||
const float32_t * coeffs)
|
||||
{
|
||||
f32x4_t A = vfmasq(vdupq_n_f32(coeffs[4]), x, coeffs[0]);
|
||||
f32x4_t B = vfmasq(vdupq_n_f32(coeffs[6]), x, coeffs[2]);
|
||||
f32x4_t C = vfmasq(vdupq_n_f32(coeffs[5]), x, coeffs[1]);
|
||||
f32x4_t D = vfmasq(vdupq_n_f32(coeffs[7]), x, coeffs[3]);
|
||||
f32x4_t x2 = vmulq(x, x);
|
||||
f32x4_t x4 = vmulq(x2, x2);
|
||||
f32x4_t res = vfmaq(vfmaq_f32(A, B, x2), vfmaq_f32(C, D, x2), x4);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vmant_exp_f32(
|
||||
f32x4_t x,
|
||||
int32x4_t * e)
|
||||
{
|
||||
any32x4_t r;
|
||||
int32x4_t n;
|
||||
|
||||
r.f = x;
|
||||
n = r.i >> 23;
|
||||
n = n - 127;
|
||||
r.i = r.i - (n << 23);
|
||||
|
||||
*e = n;
|
||||
return r.f;
|
||||
}
|
||||
|
||||
|
||||
__STATIC_INLINE f32x4_t vlogq_f32(f32x4_t vecIn)
|
||||
{
|
||||
q31x4_t vecExpUnBiased;
|
||||
f32x4_t vecTmpFlt0, vecTmpFlt1;
|
||||
f32x4_t vecAcc0, vecAcc1, vecAcc2, vecAcc3;
|
||||
f32x4_t vecExpUnBiasedFlt;
|
||||
|
||||
/*
|
||||
* extract exponent
|
||||
*/
|
||||
vecTmpFlt1 = vmant_exp_f32(vecIn, &vecExpUnBiased);
|
||||
|
||||
vecTmpFlt0 = vecTmpFlt1 * vecTmpFlt1;
|
||||
/*
|
||||
* a = (__logf_lut_f32[4] * r.f) + (__logf_lut_f32[0]);
|
||||
*/
|
||||
vecAcc0 = vdupq_n_f32(__logf_lut_f32[0]);
|
||||
vecAcc0 = vfmaq(vecAcc0, vecTmpFlt1, __logf_lut_f32[4]);
|
||||
/*
|
||||
* b = (__logf_lut_f32[6] * r.f) + (__logf_lut_f32[2]);
|
||||
*/
|
||||
vecAcc1 = vdupq_n_f32(__logf_lut_f32[2]);
|
||||
vecAcc1 = vfmaq(vecAcc1, vecTmpFlt1, __logf_lut_f32[6]);
|
||||
/*
|
||||
* c = (__logf_lut_f32[5] * r.f) + (__logf_lut_f32[1]);
|
||||
*/
|
||||
vecAcc2 = vdupq_n_f32(__logf_lut_f32[1]);
|
||||
vecAcc2 = vfmaq(vecAcc2, vecTmpFlt1, __logf_lut_f32[5]);
|
||||
/*
|
||||
* d = (__logf_lut_f32[7] * r.f) + (__logf_lut_f32[3]);
|
||||
*/
|
||||
vecAcc3 = vdupq_n_f32(__logf_lut_f32[3]);
|
||||
vecAcc3 = vfmaq(vecAcc3, vecTmpFlt1, __logf_lut_f32[7]);
|
||||
/*
|
||||
* a = a + b * xx;
|
||||
*/
|
||||
vecAcc0 = vfmaq(vecAcc0, vecAcc1, vecTmpFlt0);
|
||||
/*
|
||||
* c = c + d * xx;
|
||||
*/
|
||||
vecAcc2 = vfmaq(vecAcc2, vecAcc3, vecTmpFlt0);
|
||||
/*
|
||||
* xx = xx * xx;
|
||||
*/
|
||||
vecTmpFlt0 = vecTmpFlt0 * vecTmpFlt0;
|
||||
vecExpUnBiasedFlt = vcvtq_f32_s32(vecExpUnBiased);
|
||||
/*
|
||||
* r.f = a + c * xx;
|
||||
*/
|
||||
vecAcc0 = vfmaq(vecAcc0, vecAcc2, vecTmpFlt0);
|
||||
/*
|
||||
* add exponent
|
||||
* r.f = r.f + ((float32_t) m) * __logf_rng_f32;
|
||||
*/
|
||||
vecAcc0 = vfmaq(vecAcc0, vecExpUnBiasedFlt, __logf_rng_f32);
|
||||
// set log0 down to -inf
|
||||
vecAcc0 = vdupq_m(vecAcc0, -INFINITY, vcmpeqq(vecIn, 0.0f));
|
||||
return vecAcc0;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vexpq_f32(
|
||||
f32x4_t x)
|
||||
{
|
||||
// Perform range reduction [-log(2),log(2)]
|
||||
int32x4_t m = vcvtq_s32_f32(vmulq_n_f32(x, 1.4426950408f));
|
||||
f32x4_t val = vfmsq_f32(x, vcvtq_f32_s32(m), vdupq_n_f32(0.6931471805f));
|
||||
|
||||
// Polynomial Approximation
|
||||
f32x4_t poly = vtaylor_polyq_f32(val, exp_tab);
|
||||
|
||||
// Reconstruct
|
||||
poly = (f32x4_t) (vqaddq_s32((q31x4_t) (poly), vqshlq_n_s32(m, 23)));
|
||||
|
||||
poly = vdupq_m(poly, 0.0f, vcmpltq_n_s32(m, -126));
|
||||
return poly;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t arm_vec_exponent_f32(f32x4_t x, int32_t nb)
|
||||
{
|
||||
f32x4_t r = x;
|
||||
nb--;
|
||||
while (nb > 0) {
|
||||
r = vmulq(r, x);
|
||||
nb--;
|
||||
}
|
||||
return (r);
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vrecip_f32(f32x4_t vecIn)
|
||||
{
|
||||
f32x4_t vecSx, vecW, vecTmp;
|
||||
any32x4_t v;
|
||||
|
||||
vecSx = vabsq(vecIn);
|
||||
|
||||
v.f = vecIn;
|
||||
v.i = vsubq(vdupq_n_s32(INV_NEWTON_INIT_F32), v.i);
|
||||
|
||||
vecW = vmulq(vecSx, v.f);
|
||||
|
||||
// v.f = v.f * (8 + w * (-28 + w * (56 + w * (-70 + w *(56 + w * (-28 + w * (8 - w)))))));
|
||||
vecTmp = vsubq(vdupq_n_f32(8.0f), vecW);
|
||||
vecTmp = vfmasq(vecW, vecTmp, -28.0f);
|
||||
vecTmp = vfmasq(vecW, vecTmp, 56.0f);
|
||||
vecTmp = vfmasq(vecW, vecTmp, -70.0f);
|
||||
vecTmp = vfmasq(vecW, vecTmp, 56.0f);
|
||||
vecTmp = vfmasq(vecW, vecTmp, -28.0f);
|
||||
vecTmp = vfmasq(vecW, vecTmp, 8.0f);
|
||||
v.f = vmulq(v.f, vecTmp);
|
||||
|
||||
v.f = vdupq_m(v.f, INFINITY, vcmpeqq(vecIn, 0.0f));
|
||||
/*
|
||||
* restore sign
|
||||
*/
|
||||
v.f = vnegq_m(v.f, v.f, vcmpltq(vecIn, 0.0f));
|
||||
return v.f;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vtanhq_f32(
|
||||
f32x4_t val)
|
||||
{
|
||||
f32x4_t x =
|
||||
vminnmq_f32(vmaxnmq_f32(val, vdupq_n_f32(-10.f)), vdupq_n_f32(10.0f));
|
||||
f32x4_t exp2x = vexpq_f32(vmulq_n_f32(x, 2.f));
|
||||
f32x4_t num = vsubq_n_f32(exp2x, 1.f);
|
||||
f32x4_t den = vaddq_n_f32(exp2x, 1.f);
|
||||
f32x4_t tanh = vmulq_f32(num, vrecip_f32(den));
|
||||
return tanh;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vpowq_f32(
|
||||
f32x4_t val,
|
||||
f32x4_t n)
|
||||
{
|
||||
return vexpq_f32(vmulq_f32(n, vlogq_f32(val)));
|
||||
}
|
||||
|
||||
#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)*/
|
||||
|
||||
#if (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM))
|
||||
#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */
|
||||
|
||||
#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "NEMath.h"
|
||||
/**
|
||||
* @brief Vectorized integer exponentiation
|
||||
* @param[in] x value
|
||||
* @param[in] nb integer exponent >= 1
|
||||
* @return x^nb
|
||||
*
|
||||
*/
|
||||
__STATIC_INLINE float32x4_t arm_vec_exponent_f32(float32x4_t x, int32_t nb)
|
||||
{
|
||||
float32x4_t r = x;
|
||||
nb --;
|
||||
while(nb > 0)
|
||||
{
|
||||
r = vmulq_f32(r , x);
|
||||
nb--;
|
||||
}
|
||||
return(r);
|
||||
}
|
||||
|
||||
|
||||
__STATIC_INLINE float32x4_t __arm_vec_sqrt_f32_neon(float32x4_t x)
|
||||
{
|
||||
float32x4_t x1 = vmaxq_f32(x, vdupq_n_f32(FLT_MIN));
|
||||
float32x4_t e = vrsqrteq_f32(x1);
|
||||
e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
|
||||
e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
|
||||
return vmulq_f32(x, e);
|
||||
}
|
||||
|
||||
__STATIC_INLINE int16x8_t __arm_vec_sqrt_q15_neon(int16x8_t vec)
|
||||
{
|
||||
float32x4_t tempF;
|
||||
int32x4_t tempHI,tempLO;
|
||||
|
||||
tempLO = vmovl_s16(vget_low_s16(vec));
|
||||
tempF = vcvtq_n_f32_s32(tempLO,15);
|
||||
tempF = __arm_vec_sqrt_f32_neon(tempF);
|
||||
tempLO = vcvtq_n_s32_f32(tempF,15);
|
||||
|
||||
tempHI = vmovl_s16(vget_high_s16(vec));
|
||||
tempF = vcvtq_n_f32_s32(tempHI,15);
|
||||
tempF = __arm_vec_sqrt_f32_neon(tempF);
|
||||
tempHI = vcvtq_n_s32_f32(tempF,15);
|
||||
|
||||
return(vcombine_s16(vqmovn_s32(tempLO),vqmovn_s32(tempHI)));
|
||||
}
|
||||
|
||||
__STATIC_INLINE int32x4_t __arm_vec_sqrt_q31_neon(int32x4_t vec)
|
||||
{
|
||||
float32x4_t temp;
|
||||
|
||||
temp = vcvtq_n_f32_s32(vec,31);
|
||||
temp = __arm_vec_sqrt_f32_neon(temp);
|
||||
return(vcvtq_n_s32_f32(temp,31));
|
||||
}
|
||||
|
||||
#endif /* (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* _ARM_VEC_MATH_H */
|
||||
|
||||
/**
|
||||
*
|
||||
* End of file.
|
||||
*/
|
||||
/******************************************************************************
|
||||
* @file arm_vec_math.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_VEC_MATH_H
|
||||
#define _ARM_VEC_MATH_H
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_common_tables.h"
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#define INV_NEWTON_INIT_F32 0x7EF127EA
|
||||
|
||||
static const float32_t __logf_rng_f32=0.693147180f;
|
||||
|
||||
|
||||
/* fast inverse approximation (3x newton) */
|
||||
__STATIC_INLINE f32x4_t vrecip_medprec_f32(
|
||||
f32x4_t x)
|
||||
{
|
||||
q31x4_t m;
|
||||
f32x4_t b;
|
||||
any32x4_t xinv;
|
||||
f32x4_t ax = vabsq(x);
|
||||
|
||||
xinv.f = ax;
|
||||
m = 0x3F800000 - (xinv.i & 0x7F800000);
|
||||
xinv.i = xinv.i + m;
|
||||
xinv.f = 1.41176471f - 0.47058824f * xinv.f;
|
||||
xinv.i = xinv.i + m;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
xinv.f = vdupq_m(xinv.f, INFINITY, vcmpeqq(x, 0.0f));
|
||||
/*
|
||||
* restore sign
|
||||
*/
|
||||
xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq(x, 0.0f));
|
||||
|
||||
return xinv.f;
|
||||
}
|
||||
|
||||
/* fast inverse approximation (4x newton) */
|
||||
__STATIC_INLINE f32x4_t vrecip_hiprec_f32(
|
||||
f32x4_t x)
|
||||
{
|
||||
q31x4_t m;
|
||||
f32x4_t b;
|
||||
any32x4_t xinv;
|
||||
f32x4_t ax = vabsq(x);
|
||||
|
||||
xinv.f = ax;
|
||||
|
||||
m = 0x3F800000 - (xinv.i & 0x7F800000);
|
||||
xinv.i = xinv.i + m;
|
||||
xinv.f = 1.41176471f - 0.47058824f * xinv.f;
|
||||
xinv.i = xinv.i + m;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
xinv.f = vdupq_m(xinv.f, INFINITY, vcmpeqq(x, 0.0f));
|
||||
/*
|
||||
* restore sign
|
||||
*/
|
||||
xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq(x, 0.0f));
|
||||
|
||||
return xinv.f;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vdiv_f32(
|
||||
f32x4_t num, f32x4_t den)
|
||||
{
|
||||
return vmulq(num, vrecip_hiprec_f32(den));
|
||||
}
|
||||
|
||||
/**
|
||||
@brief Single-precision taylor dev.
|
||||
@param[in] x f32 quad vector input
|
||||
@param[in] coeffs f32 quad vector coeffs
|
||||
@return destination f32 quad vector
|
||||
*/
|
||||
|
||||
__STATIC_INLINE f32x4_t vtaylor_polyq_f32(
|
||||
f32x4_t x,
|
||||
const float32_t * coeffs)
|
||||
{
|
||||
f32x4_t A = vfmasq(vdupq_n_f32(coeffs[4]), x, coeffs[0]);
|
||||
f32x4_t B = vfmasq(vdupq_n_f32(coeffs[6]), x, coeffs[2]);
|
||||
f32x4_t C = vfmasq(vdupq_n_f32(coeffs[5]), x, coeffs[1]);
|
||||
f32x4_t D = vfmasq(vdupq_n_f32(coeffs[7]), x, coeffs[3]);
|
||||
f32x4_t x2 = vmulq(x, x);
|
||||
f32x4_t x4 = vmulq(x2, x2);
|
||||
f32x4_t res = vfmaq(vfmaq_f32(A, B, x2), vfmaq_f32(C, D, x2), x4);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vmant_exp_f32(
|
||||
f32x4_t x,
|
||||
int32x4_t * e)
|
||||
{
|
||||
any32x4_t r;
|
||||
int32x4_t n;
|
||||
|
||||
r.f = x;
|
||||
n = r.i >> 23;
|
||||
n = n - 127;
|
||||
r.i = r.i - (n << 23);
|
||||
|
||||
*e = n;
|
||||
return r.f;
|
||||
}
|
||||
|
||||
|
||||
__STATIC_INLINE f32x4_t vlogq_f32(f32x4_t vecIn)
|
||||
{
|
||||
q31x4_t vecExpUnBiased;
|
||||
f32x4_t vecTmpFlt0, vecTmpFlt1;
|
||||
f32x4_t vecAcc0, vecAcc1, vecAcc2, vecAcc3;
|
||||
f32x4_t vecExpUnBiasedFlt;
|
||||
|
||||
/*
|
||||
* extract exponent
|
||||
*/
|
||||
vecTmpFlt1 = vmant_exp_f32(vecIn, &vecExpUnBiased);
|
||||
|
||||
vecTmpFlt0 = vecTmpFlt1 * vecTmpFlt1;
|
||||
/*
|
||||
* a = (__logf_lut_f32[4] * r.f) + (__logf_lut_f32[0]);
|
||||
*/
|
||||
vecAcc0 = vdupq_n_f32(__logf_lut_f32[0]);
|
||||
vecAcc0 = vfmaq(vecAcc0, vecTmpFlt1, __logf_lut_f32[4]);
|
||||
/*
|
||||
* b = (__logf_lut_f32[6] * r.f) + (__logf_lut_f32[2]);
|
||||
*/
|
||||
vecAcc1 = vdupq_n_f32(__logf_lut_f32[2]);
|
||||
vecAcc1 = vfmaq(vecAcc1, vecTmpFlt1, __logf_lut_f32[6]);
|
||||
/*
|
||||
* c = (__logf_lut_f32[5] * r.f) + (__logf_lut_f32[1]);
|
||||
*/
|
||||
vecAcc2 = vdupq_n_f32(__logf_lut_f32[1]);
|
||||
vecAcc2 = vfmaq(vecAcc2, vecTmpFlt1, __logf_lut_f32[5]);
|
||||
/*
|
||||
* d = (__logf_lut_f32[7] * r.f) + (__logf_lut_f32[3]);
|
||||
*/
|
||||
vecAcc3 = vdupq_n_f32(__logf_lut_f32[3]);
|
||||
vecAcc3 = vfmaq(vecAcc3, vecTmpFlt1, __logf_lut_f32[7]);
|
||||
/*
|
||||
* a = a + b * xx;
|
||||
*/
|
||||
vecAcc0 = vfmaq(vecAcc0, vecAcc1, vecTmpFlt0);
|
||||
/*
|
||||
* c = c + d * xx;
|
||||
*/
|
||||
vecAcc2 = vfmaq(vecAcc2, vecAcc3, vecTmpFlt0);
|
||||
/*
|
||||
* xx = xx * xx;
|
||||
*/
|
||||
vecTmpFlt0 = vecTmpFlt0 * vecTmpFlt0;
|
||||
vecExpUnBiasedFlt = vcvtq_f32_s32(vecExpUnBiased);
|
||||
/*
|
||||
* r.f = a + c * xx;
|
||||
*/
|
||||
vecAcc0 = vfmaq(vecAcc0, vecAcc2, vecTmpFlt0);
|
||||
/*
|
||||
* add exponent
|
||||
* r.f = r.f + ((float32_t) m) * __logf_rng_f32;
|
||||
*/
|
||||
vecAcc0 = vfmaq(vecAcc0, vecExpUnBiasedFlt, __logf_rng_f32);
|
||||
// set log0 down to -inf
|
||||
vecAcc0 = vdupq_m(vecAcc0, -INFINITY, vcmpeqq(vecIn, 0.0f));
|
||||
return vecAcc0;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vexpq_f32(
|
||||
f32x4_t x)
|
||||
{
|
||||
// Perform range reduction [-log(2),log(2)]
|
||||
int32x4_t m = vcvtq_s32_f32(vmulq_n_f32(x, 1.4426950408f));
|
||||
f32x4_t val = vfmsq_f32(x, vcvtq_f32_s32(m), vdupq_n_f32(0.6931471805f));
|
||||
|
||||
// Polynomial Approximation
|
||||
f32x4_t poly = vtaylor_polyq_f32(val, exp_tab);
|
||||
|
||||
// Reconstruct
|
||||
poly = (f32x4_t) (vqaddq_s32((q31x4_t) (poly), vqshlq_n_s32(m, 23)));
|
||||
|
||||
poly = vdupq_m(poly, 0.0f, vcmpltq_n_s32(m, -126));
|
||||
return poly;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t arm_vec_exponent_f32(f32x4_t x, int32_t nb)
|
||||
{
|
||||
f32x4_t r = x;
|
||||
nb--;
|
||||
while (nb > 0) {
|
||||
r = vmulq(r, x);
|
||||
nb--;
|
||||
}
|
||||
return (r);
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vrecip_f32(f32x4_t vecIn)
|
||||
{
|
||||
f32x4_t vecSx, vecW, vecTmp;
|
||||
any32x4_t v;
|
||||
|
||||
vecSx = vabsq(vecIn);
|
||||
|
||||
v.f = vecIn;
|
||||
v.i = vsubq(vdupq_n_s32(INV_NEWTON_INIT_F32), v.i);
|
||||
|
||||
vecW = vmulq(vecSx, v.f);
|
||||
|
||||
// v.f = v.f * (8 + w * (-28 + w * (56 + w * (-70 + w *(56 + w * (-28 + w * (8 - w)))))));
|
||||
vecTmp = vsubq(vdupq_n_f32(8.0f), vecW);
|
||||
vecTmp = vfmasq(vecW, vecTmp, -28.0f);
|
||||
vecTmp = vfmasq(vecW, vecTmp, 56.0f);
|
||||
vecTmp = vfmasq(vecW, vecTmp, -70.0f);
|
||||
vecTmp = vfmasq(vecW, vecTmp, 56.0f);
|
||||
vecTmp = vfmasq(vecW, vecTmp, -28.0f);
|
||||
vecTmp = vfmasq(vecW, vecTmp, 8.0f);
|
||||
v.f = vmulq(v.f, vecTmp);
|
||||
|
||||
v.f = vdupq_m(v.f, INFINITY, vcmpeqq(vecIn, 0.0f));
|
||||
/*
|
||||
* restore sign
|
||||
*/
|
||||
v.f = vnegq_m(v.f, v.f, vcmpltq(vecIn, 0.0f));
|
||||
return v.f;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vtanhq_f32(
|
||||
f32x4_t val)
|
||||
{
|
||||
f32x4_t x =
|
||||
vminnmq_f32(vmaxnmq_f32(val, vdupq_n_f32(-10.f)), vdupq_n_f32(10.0f));
|
||||
f32x4_t exp2x = vexpq_f32(vmulq_n_f32(x, 2.f));
|
||||
f32x4_t num = vsubq_n_f32(exp2x, 1.f);
|
||||
f32x4_t den = vaddq_n_f32(exp2x, 1.f);
|
||||
f32x4_t tanh = vmulq_f32(num, vrecip_f32(den));
|
||||
return tanh;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f32x4_t vpowq_f32(
|
||||
f32x4_t val,
|
||||
f32x4_t n)
|
||||
{
|
||||
return vexpq_f32(vmulq_f32(n, vlogq_f32(val)));
|
||||
}
|
||||
|
||||
#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)*/
|
||||
|
||||
#if (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */
|
||||
|
||||
#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "NEMath.h"
|
||||
/**
|
||||
* @brief Vectorized integer exponentiation
|
||||
* @param[in] x value
|
||||
* @param[in] nb integer exponent >= 1
|
||||
* @return x^nb
|
||||
*
|
||||
*/
|
||||
__STATIC_INLINE float32x4_t arm_vec_exponent_f32(float32x4_t x, int32_t nb)
|
||||
{
|
||||
float32x4_t r = x;
|
||||
nb --;
|
||||
while(nb > 0)
|
||||
{
|
||||
r = vmulq_f32(r , x);
|
||||
nb--;
|
||||
}
|
||||
return(r);
|
||||
}
|
||||
|
||||
|
||||
__STATIC_INLINE float32x4_t __arm_vec_sqrt_f32_neon(float32x4_t x)
|
||||
{
|
||||
float32x4_t x1 = vmaxq_f32(x, vdupq_n_f32(FLT_MIN));
|
||||
float32x4_t e = vrsqrteq_f32(x1);
|
||||
e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
|
||||
e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
|
||||
return vmulq_f32(x, e);
|
||||
}
|
||||
|
||||
__STATIC_INLINE int16x8_t __arm_vec_sqrt_q15_neon(int16x8_t vec)
|
||||
{
|
||||
float32x4_t tempF;
|
||||
int32x4_t tempHI,tempLO;
|
||||
|
||||
tempLO = vmovl_s16(vget_low_s16(vec));
|
||||
tempF = vcvtq_n_f32_s32(tempLO,15);
|
||||
tempF = __arm_vec_sqrt_f32_neon(tempF);
|
||||
tempLO = vcvtq_n_s32_f32(tempF,15);
|
||||
|
||||
tempHI = vmovl_s16(vget_high_s16(vec));
|
||||
tempF = vcvtq_n_f32_s32(tempHI,15);
|
||||
tempF = __arm_vec_sqrt_f32_neon(tempF);
|
||||
tempHI = vcvtq_n_s32_f32(tempF,15);
|
||||
|
||||
return(vcombine_s16(vqmovn_s32(tempLO),vqmovn_s32(tempHI)));
|
||||
}
|
||||
|
||||
__STATIC_INLINE int32x4_t __arm_vec_sqrt_q31_neon(int32x4_t vec)
|
||||
{
|
||||
float32x4_t temp;
|
||||
|
||||
temp = vcvtq_n_f32_s32(vec,31);
|
||||
temp = __arm_vec_sqrt_f32_neon(temp);
|
||||
return(vcvtq_n_s32_f32(temp,31));
|
||||
}
|
||||
|
||||
#endif /* (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* _ARM_VEC_MATH_H */
|
||||
|
||||
/**
|
||||
*
|
||||
* End of file.
|
||||
*/
|
||||
|
||||
312
libraries/cmsis/cm4/core_support/arm_vec_math_f16.h
Normal file
312
libraries/cmsis/cm4/core_support/arm_vec_math_f16.h
Normal file
@@ -0,0 +1,312 @@
|
||||
/******************************************************************************
|
||||
* @file arm_vec_math_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_VEC_MATH_F16_H
|
||||
#define _ARM_VEC_MATH_F16_H
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_common_tables_f16.h"
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
|
||||
static const float16_t __logf_rng_f16=0.693147180f16;
|
||||
|
||||
/* fast inverse approximation (3x newton) */
|
||||
__STATIC_INLINE f16x8_t vrecip_medprec_f16(
|
||||
f16x8_t x)
|
||||
{
|
||||
q15x8_t m;
|
||||
f16x8_t b;
|
||||
any16x8_t xinv;
|
||||
f16x8_t ax = vabsq(x);
|
||||
|
||||
xinv.f = ax;
|
||||
|
||||
m = 0x03c00 - (xinv.i & 0x07c00);
|
||||
xinv.i = xinv.i + m;
|
||||
xinv.f = 1.41176471f16 - 0.47058824f16 * xinv.f;
|
||||
xinv.i = xinv.i + m;
|
||||
|
||||
b = 2.0f16 - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f16 - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f16 - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
xinv.f = vdupq_m_n_f16(xinv.f, F16INFINITY, vcmpeqq_n_f16(x, 0.0f));
|
||||
/*
|
||||
* restore sign
|
||||
*/
|
||||
xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq_n_f16(x, 0.0f));
|
||||
|
||||
return xinv.f;
|
||||
}
|
||||
|
||||
/* fast inverse approximation (4x newton) */
|
||||
__STATIC_INLINE f16x8_t vrecip_hiprec_f16(
|
||||
f16x8_t x)
|
||||
{
|
||||
q15x8_t m;
|
||||
f16x8_t b;
|
||||
any16x8_t xinv;
|
||||
f16x8_t ax = vabsq(x);
|
||||
|
||||
xinv.f = ax;
|
||||
|
||||
m = 0x03c00 - (xinv.i & 0x07c00);
|
||||
xinv.i = xinv.i + m;
|
||||
xinv.f = 1.41176471f16 - 0.47058824f16 * xinv.f;
|
||||
xinv.i = xinv.i + m;
|
||||
|
||||
b = 2.0f16 - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f16 - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f16 - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
b = 2.0f16 - xinv.f * ax;
|
||||
xinv.f = xinv.f * b;
|
||||
|
||||
xinv.f = vdupq_m_n_f16(xinv.f, F16INFINITY, vcmpeqq_n_f16(x, 0.0f));
|
||||
/*
|
||||
* restore sign
|
||||
*/
|
||||
xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq_n_f16(x, 0.0f));
|
||||
|
||||
return xinv.f;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f16x8_t vdiv_f16(
|
||||
f16x8_t num, f16x8_t den)
|
||||
{
|
||||
return vmulq(num, vrecip_hiprec_f16(den));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
@brief Single-precision taylor dev.
|
||||
@param[in] x f16 vector input
|
||||
@param[in] coeffs f16 vector coeffs
|
||||
@return destination f16 vector
|
||||
*/
|
||||
|
||||
__STATIC_INLINE float16x8_t vtaylor_polyq_f16(
|
||||
float16x8_t x,
|
||||
const float16_t * coeffs)
|
||||
{
|
||||
float16x8_t A = vfmasq(vdupq_n_f16(coeffs[4]), x, coeffs[0]);
|
||||
float16x8_t B = vfmasq(vdupq_n_f16(coeffs[6]), x, coeffs[2]);
|
||||
float16x8_t C = vfmasq(vdupq_n_f16(coeffs[5]), x, coeffs[1]);
|
||||
float16x8_t D = vfmasq(vdupq_n_f16(coeffs[7]), x, coeffs[3]);
|
||||
float16x8_t x2 = vmulq(x, x);
|
||||
float16x8_t x4 = vmulq(x2, x2);
|
||||
float16x8_t res = vfmaq(vfmaq_f16(A, B, x2), vfmaq_f16(C, D, x2), x4);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
#define VMANT_EXP_F16(x) \
|
||||
any16x8_t r; \
|
||||
int16x8_t n; \
|
||||
\
|
||||
r.f = x; \
|
||||
n = r.i >> 10; \
|
||||
n = n - 15; \
|
||||
r.i = r.i - (n << 10);\
|
||||
\
|
||||
vecExpUnBiased = n; \
|
||||
vecTmpFlt1 = r.f;
|
||||
|
||||
__STATIC_INLINE float16x8_t vlogq_f16(float16x8_t vecIn)
|
||||
{
|
||||
q15x8_t vecExpUnBiased;
|
||||
float16x8_t vecTmpFlt0, vecTmpFlt1;
|
||||
float16x8_t vecAcc0, vecAcc1, vecAcc2, vecAcc3;
|
||||
float16x8_t vecExpUnBiasedFlt;
|
||||
|
||||
/*
|
||||
* extract exponent
|
||||
*/
|
||||
VMANT_EXP_F16(vecIn);
|
||||
|
||||
vecTmpFlt0 = vecTmpFlt1 * vecTmpFlt1;
|
||||
/*
|
||||
* a = (__logf_lut_f16[4] * r.f) + (__logf_lut_f16[0]);
|
||||
*/
|
||||
vecAcc0 = vdupq_n_f16(__logf_lut_f16[0]);
|
||||
vecAcc0 = vfmaq(vecAcc0, vecTmpFlt1, __logf_lut_f16[4]);
|
||||
/*
|
||||
* b = (__logf_lut_f16[6] * r.f) + (__logf_lut_f16[2]);
|
||||
*/
|
||||
vecAcc1 = vdupq_n_f16(__logf_lut_f16[2]);
|
||||
vecAcc1 = vfmaq(vecAcc1, vecTmpFlt1, __logf_lut_f16[6]);
|
||||
/*
|
||||
* c = (__logf_lut_f16[5] * r.f) + (__logf_lut_f16[1]);
|
||||
*/
|
||||
vecAcc2 = vdupq_n_f16(__logf_lut_f16[1]);
|
||||
vecAcc2 = vfmaq(vecAcc2, vecTmpFlt1, __logf_lut_f16[5]);
|
||||
/*
|
||||
* d = (__logf_lut_f16[7] * r.f) + (__logf_lut_f16[3]);
|
||||
*/
|
||||
vecAcc3 = vdupq_n_f16(__logf_lut_f16[3]);
|
||||
vecAcc3 = vfmaq(vecAcc3, vecTmpFlt1, __logf_lut_f16[7]);
|
||||
/*
|
||||
* a = a + b * xx;
|
||||
*/
|
||||
vecAcc0 = vfmaq(vecAcc0, vecAcc1, vecTmpFlt0);
|
||||
/*
|
||||
* c = c + d * xx;
|
||||
*/
|
||||
vecAcc2 = vfmaq(vecAcc2, vecAcc3, vecTmpFlt0);
|
||||
/*
|
||||
* xx = xx * xx;
|
||||
*/
|
||||
vecTmpFlt0 = vecTmpFlt0 * vecTmpFlt0;
|
||||
vecExpUnBiasedFlt = vcvtq_f16_s16(vecExpUnBiased);
|
||||
/*
|
||||
* r.f = a + c * xx;
|
||||
*/
|
||||
vecAcc0 = vfmaq(vecAcc0, vecAcc2, vecTmpFlt0);
|
||||
/*
|
||||
* add exponent
|
||||
* r.f = r.f + ((float32_t) m) * __logf_rng_f16;
|
||||
*/
|
||||
vecAcc0 = vfmaq(vecAcc0, vecExpUnBiasedFlt, __logf_rng_f16);
|
||||
// set log0 down to -inf
|
||||
vecAcc0 = vdupq_m_n_f16(vecAcc0, -(_Float16)F16INFINITY, vcmpeqq_n_f16(vecIn, 0.0f));
|
||||
return vecAcc0;
|
||||
}
|
||||
|
||||
__STATIC_INLINE float16x8_t vexpq_f16(
|
||||
float16x8_t x)
|
||||
{
|
||||
// Perform range reduction [-log(2),log(2)]
|
||||
int16x8_t m = vcvtq_s16_f16(vmulq_n_f16(x, 1.4426950408f16));
|
||||
float16x8_t val = vfmsq_f16(x, vcvtq_f16_s16(m), vdupq_n_f16(0.6931471805f16));
|
||||
|
||||
// Polynomial Approximation
|
||||
float16x8_t poly = vtaylor_polyq_f16(val, exp_tab_f16);
|
||||
|
||||
// Reconstruct
|
||||
poly = (float16x8_t) (vqaddq_s16((int16x8_t) (poly), vqshlq_n_s16(m, 10)));
|
||||
|
||||
poly = vdupq_m_n_f16(poly, 0.0f16, vcmpltq_n_s16(m, -14));
|
||||
return poly;
|
||||
}
|
||||
|
||||
__STATIC_INLINE float16x8_t arm_vec_exponent_f16(float16x8_t x, int16_t nb)
|
||||
{
|
||||
float16x8_t r = x;
|
||||
nb--;
|
||||
while (nb > 0) {
|
||||
r = vmulq(r, x);
|
||||
nb--;
|
||||
}
|
||||
return (r);
|
||||
}
|
||||
|
||||
__STATIC_INLINE f16x8_t vpowq_f16(
|
||||
f16x8_t val,
|
||||
f16x8_t n)
|
||||
{
|
||||
return vexpq_f16(vmulq_f16(n, vlogq_f16(val)));
|
||||
}
|
||||
|
||||
#define INV_NEWTON_INIT_F16 0x7773
|
||||
|
||||
__STATIC_INLINE f16x8_t vrecip_f16(f16x8_t vecIn)
|
||||
{
|
||||
f16x8_t vecSx, vecW, vecTmp;
|
||||
any16x8_t v;
|
||||
|
||||
vecSx = vabsq(vecIn);
|
||||
|
||||
v.f = vecIn;
|
||||
v.i = vsubq(vdupq_n_s16(INV_NEWTON_INIT_F16), v.i);
|
||||
|
||||
vecW = vmulq(vecSx, v.f);
|
||||
|
||||
// v.f = v.f * (8 + w * (-28 + w * (56 + w * (-70 + w *(56 + w * (-28 + w * (8 - w)))))));
|
||||
vecTmp = vsubq(vdupq_n_f16(8.0f16), vecW);
|
||||
vecTmp = vfmasq_n_f16(vecW, vecTmp, -28.0f16);
|
||||
vecTmp = vfmasq_n_f16(vecW, vecTmp, 56.0f16);
|
||||
vecTmp = vfmasq_n_f16(vecW, vecTmp, -70.0f16);
|
||||
vecTmp = vfmasq_n_f16(vecW, vecTmp, 56.0f16);
|
||||
vecTmp = vfmasq_n_f16(vecW, vecTmp, -28.0f16);
|
||||
vecTmp = vfmasq_n_f16(vecW, vecTmp, 8.0f16);
|
||||
v.f = vmulq(v.f, vecTmp);
|
||||
|
||||
v.f = vdupq_m_n_f16(v.f, F16INFINITY, vcmpeqq_n_f16(vecIn, 0.0f));
|
||||
/*
|
||||
* restore sign
|
||||
*/
|
||||
v.f = vnegq_m(v.f, v.f, vcmpltq_n_f16(vecIn, 0.0f));
|
||||
return v.f;
|
||||
}
|
||||
|
||||
__STATIC_INLINE f16x8_t vtanhq_f16(
|
||||
f16x8_t val)
|
||||
{
|
||||
f16x8_t x =
|
||||
vminnmq_f16(vmaxnmq_f16(val, vdupq_n_f16(-10.f16)), vdupq_n_f16(10.0f16));
|
||||
f16x8_t exp2x = vexpq_f16(vmulq_n_f16(x, 2.f16));
|
||||
f16x8_t num = vsubq_n_f16(exp2x, 1.f16);
|
||||
f16x8_t den = vaddq_n_f16(exp2x, 1.f16);
|
||||
f16x8_t tanh = vmulq_f16(num, vrecip_f16(den));
|
||||
return tanh;
|
||||
}
|
||||
|
||||
#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)*/
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ARM FLOAT16 SUPPORTED */
|
||||
|
||||
#endif /* _ARM_VEC_MATH_F16_H */
|
||||
|
||||
/**
|
||||
*
|
||||
* End of file.
|
||||
*/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,283 +1,283 @@
|
||||
/******************************************************************************
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.1.0
|
||||
* @date 09. October 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Arm Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* Arm Compiler 6.6 LTM (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
|
||||
#include "cmsis_armclang_ltm.h"
|
||||
|
||||
/*
|
||||
* Arm Compiler above 6.10.1 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iccarm.h>
|
||||
|
||||
|
||||
/*
|
||||
* TI Arm Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT __restrict
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __packed__
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION @packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.1.0
|
||||
* @date 09. October 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Arm Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* Arm Compiler 6.6 LTM (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
|
||||
#include "cmsis_armclang_ltm.h"
|
||||
|
||||
/*
|
||||
* Arm Compiler above 6.10.1 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iccarm.h>
|
||||
|
||||
|
||||
/*
|
||||
* TI Arm Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT __restrict
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __packed__
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION @packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,39 +1,39 @@
|
||||
/******************************************************************************
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.4
|
||||
* @date 23. July 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 4U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.5
|
||||
* @date 02. February 2022
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2022 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 6U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**************************************************************************
|
||||
/**************************************************************************//**
|
||||
* @file core_cm4.h
|
||||
* @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File
|
||||
* @version V5.1.1
|
||||
* @date 27. March 2020
|
||||
* @version V5.1.2
|
||||
* @date 04. June 2021
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
|
||||
@@ -623,22 +623,22 @@ typedef struct
|
||||
#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
|
||||
|
||||
/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
|
||||
#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
|
||||
#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
|
||||
#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */
|
||||
|
||||
#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */
|
||||
#define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */
|
||||
#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */
|
||||
|
||||
#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
|
||||
#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
|
||||
#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */
|
||||
|
||||
#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
|
||||
#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
|
||||
#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
|
||||
|
||||
#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
|
||||
#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
|
||||
#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
|
||||
|
||||
#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */
|
||||
#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */
|
||||
#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
|
||||
|
||||
/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
|
||||
|
||||
880
libraries/cmsis/cm4/core_support/dsp/basic_math_functions.h
Normal file
880
libraries/cmsis/cm4/core_support/dsp/basic_math_functions.h
Normal file
@@ -0,0 +1,880 @@
|
||||
/******************************************************************************
|
||||
* @file basic_math_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _BASIC_MATH_FUNCTIONS_H_
|
||||
#define _BASIC_MATH_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup groupMath Basic Math Functions
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Q7 vector multiplication.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_mult_q7(
|
||||
const q7_t * pSrcA,
|
||||
const q7_t * pSrcB,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 vector multiplication.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_mult_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 vector multiplication.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_mult_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector multiplication.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_mult_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector multiplication.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_mult_f64(
|
||||
const float64_t * pSrcA,
|
||||
const float64_t * pSrcB,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector addition.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_add_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector addition.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_add_f64(
|
||||
const float64_t * pSrcA,
|
||||
const float64_t * pSrcB,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q7 vector addition.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_add_q7(
|
||||
const q7_t * pSrcA,
|
||||
const q7_t * pSrcB,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 vector addition.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_add_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 vector addition.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_add_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector subtraction.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_sub_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector subtraction.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_sub_f64(
|
||||
const float64_t * pSrcA,
|
||||
const float64_t * pSrcB,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q7 vector subtraction.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_sub_q7(
|
||||
const q7_t * pSrcA,
|
||||
const q7_t * pSrcB,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 vector subtraction.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_sub_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 vector subtraction.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_sub_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Multiplies a floating-point vector by a scalar.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] scale scale factor to be applied
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_scale_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t scale,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Multiplies a floating-point vector by a scalar.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] scale scale factor to be applied
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_scale_f64(
|
||||
const float64_t * pSrc,
|
||||
float64_t scale,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Multiplies a Q7 vector by a scalar.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] scaleFract fractional portion of the scale value
|
||||
* @param[in] shift number of bits to shift the result by
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_scale_q7(
|
||||
const q7_t * pSrc,
|
||||
q7_t scaleFract,
|
||||
int8_t shift,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Multiplies a Q15 vector by a scalar.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] scaleFract fractional portion of the scale value
|
||||
* @param[in] shift number of bits to shift the result by
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_scale_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t scaleFract,
|
||||
int8_t shift,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Multiplies a Q31 vector by a scalar.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] scaleFract fractional portion of the scale value
|
||||
* @param[in] shift number of bits to shift the result by
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_scale_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t scaleFract,
|
||||
int8_t shift,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q7 vector absolute value.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[out] pDst points to the output buffer
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_abs_q7(
|
||||
const q7_t * pSrc,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector absolute value.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[out] pDst points to the output buffer
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_abs_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector absolute value.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[out] pDst points to the output buffer
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_abs_f64(
|
||||
const float64_t * pSrc,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 vector absolute value.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[out] pDst points to the output buffer
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_abs_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 vector absolute value.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[out] pDst points to the output buffer
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_abs_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Dot product of floating-point vectors.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[out] result output result returned here
|
||||
*/
|
||||
void arm_dot_prod_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float32_t * result);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Dot product of floating-point vectors.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[out] result output result returned here
|
||||
*/
|
||||
void arm_dot_prod_f64(
|
||||
const float64_t * pSrcA,
|
||||
const float64_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float64_t * result);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Dot product of Q7 vectors.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[out] result output result returned here
|
||||
*/
|
||||
void arm_dot_prod_q7(
|
||||
const q7_t * pSrcA,
|
||||
const q7_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q31_t * result);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Dot product of Q15 vectors.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[out] result output result returned here
|
||||
*/
|
||||
void arm_dot_prod_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q63_t * result);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Dot product of Q31 vectors.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[out] result output result returned here
|
||||
*/
|
||||
void arm_dot_prod_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q63_t * result);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Shifts the elements of a Q7 vector a specified number of bits.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_shift_q7(
|
||||
const q7_t * pSrc,
|
||||
int8_t shiftBits,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Shifts the elements of a Q15 vector a specified number of bits.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_shift_q15(
|
||||
const q15_t * pSrc,
|
||||
int8_t shiftBits,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Shifts the elements of a Q31 vector a specified number of bits.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_shift_q31(
|
||||
const q31_t * pSrc,
|
||||
int8_t shiftBits,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Adds a constant offset to a floating-point vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] offset is the offset to be added
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_offset_f64(
|
||||
const float64_t * pSrc,
|
||||
float64_t offset,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Adds a constant offset to a floating-point vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] offset is the offset to be added
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_offset_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t offset,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Adds a constant offset to a Q7 vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] offset is the offset to be added
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_offset_q7(
|
||||
const q7_t * pSrc,
|
||||
q7_t offset,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Adds a constant offset to a Q15 vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] offset is the offset to be added
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_offset_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t offset,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Adds a constant offset to a Q31 vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] offset is the offset to be added
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_offset_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t offset,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Negates the elements of a floating-point vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_negate_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Negates the elements of a floating-point vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_negate_f64(
|
||||
const float64_t * pSrc,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Negates the elements of a Q7 vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_negate_q7(
|
||||
const q7_t * pSrc,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Negates the elements of a Q15 vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_negate_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Negates the elements of a Q31 vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_negate_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise AND of two fixed-point vectors.
|
||||
* @param[in] pSrcA points to input vector A
|
||||
* @param[in] pSrcB points to input vector B
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_and_u16(
|
||||
const uint16_t * pSrcA,
|
||||
const uint16_t * pSrcB,
|
||||
uint16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise AND of two fixed-point vectors.
|
||||
* @param[in] pSrcA points to input vector A
|
||||
* @param[in] pSrcB points to input vector B
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_and_u32(
|
||||
const uint32_t * pSrcA,
|
||||
const uint32_t * pSrcB,
|
||||
uint32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise AND of two fixed-point vectors.
|
||||
* @param[in] pSrcA points to input vector A
|
||||
* @param[in] pSrcB points to input vector B
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_and_u8(
|
||||
const uint8_t * pSrcA,
|
||||
const uint8_t * pSrcB,
|
||||
uint8_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise OR of two fixed-point vectors.
|
||||
* @param[in] pSrcA points to input vector A
|
||||
* @param[in] pSrcB points to input vector B
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_or_u16(
|
||||
const uint16_t * pSrcA,
|
||||
const uint16_t * pSrcB,
|
||||
uint16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise OR of two fixed-point vectors.
|
||||
* @param[in] pSrcA points to input vector A
|
||||
* @param[in] pSrcB points to input vector B
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_or_u32(
|
||||
const uint32_t * pSrcA,
|
||||
const uint32_t * pSrcB,
|
||||
uint32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise OR of two fixed-point vectors.
|
||||
* @param[in] pSrcA points to input vector A
|
||||
* @param[in] pSrcB points to input vector B
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_or_u8(
|
||||
const uint8_t * pSrcA,
|
||||
const uint8_t * pSrcB,
|
||||
uint8_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise NOT of a fixed-point vector.
|
||||
* @param[in] pSrc points to input vector
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_not_u16(
|
||||
const uint16_t * pSrc,
|
||||
uint16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise NOT of a fixed-point vector.
|
||||
* @param[in] pSrc points to input vector
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_not_u32(
|
||||
const uint32_t * pSrc,
|
||||
uint32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise NOT of a fixed-point vector.
|
||||
* @param[in] pSrc points to input vector
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_not_u8(
|
||||
const uint8_t * pSrc,
|
||||
uint8_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise XOR of two fixed-point vectors.
|
||||
* @param[in] pSrcA points to input vector A
|
||||
* @param[in] pSrcB points to input vector B
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_xor_u16(
|
||||
const uint16_t * pSrcA,
|
||||
const uint16_t * pSrcB,
|
||||
uint16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise XOR of two fixed-point vectors.
|
||||
* @param[in] pSrcA points to input vector A
|
||||
* @param[in] pSrcB points to input vector B
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_xor_u32(
|
||||
const uint32_t * pSrcA,
|
||||
const uint32_t * pSrcB,
|
||||
uint32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Compute the logical bitwise XOR of two fixed-point vectors.
|
||||
* @param[in] pSrcA points to input vector A
|
||||
* @param[in] pSrcB points to input vector B
|
||||
* @param[out] pDst points to output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_xor_u8(
|
||||
const uint8_t * pSrcA,
|
||||
const uint8_t * pSrcB,
|
||||
uint8_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
@brief Elementwise floating-point clipping
|
||||
@param[in] pSrc points to input values
|
||||
@param[out] pDst points to output clipped values
|
||||
@param[in] low lower bound
|
||||
@param[in] high higher bound
|
||||
@param[in] numSamples number of samples to clip
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_clip_f32(const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
float32_t low,
|
||||
float32_t high,
|
||||
uint32_t numSamples);
|
||||
|
||||
/**
|
||||
@brief Elementwise fixed-point clipping
|
||||
@param[in] pSrc points to input values
|
||||
@param[out] pDst points to output clipped values
|
||||
@param[in] low lower bound
|
||||
@param[in] high higher bound
|
||||
@param[in] numSamples number of samples to clip
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_clip_q31(const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
q31_t low,
|
||||
q31_t high,
|
||||
uint32_t numSamples);
|
||||
|
||||
/**
|
||||
@brief Elementwise fixed-point clipping
|
||||
@param[in] pSrc points to input values
|
||||
@param[out] pDst points to output clipped values
|
||||
@param[in] low lower bound
|
||||
@param[in] high higher bound
|
||||
@param[in] numSamples number of samples to clip
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_clip_q15(const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
q15_t low,
|
||||
q15_t high,
|
||||
uint32_t numSamples);
|
||||
|
||||
/**
|
||||
@brief Elementwise fixed-point clipping
|
||||
@param[in] pSrc points to input values
|
||||
@param[out] pDst points to output clipped values
|
||||
@param[in] low lower bound
|
||||
@param[in] high higher bound
|
||||
@param[in] numSamples number of samples to clip
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_clip_q7(const q7_t * pSrc,
|
||||
q7_t * pDst,
|
||||
q7_t low,
|
||||
q7_t high,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _BASIC_MATH_FUNCTIONS_H_ */
|
||||
168
libraries/cmsis/cm4/core_support/dsp/basic_math_functions_f16.h
Normal file
168
libraries/cmsis/cm4/core_support/dsp/basic_math_functions_f16.h
Normal file
@@ -0,0 +1,168 @@
|
||||
/******************************************************************************
|
||||
* @file basic_math_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _BASIC_MATH_FUNCTIONS_F16_H_
|
||||
#define _BASIC_MATH_FUNCTIONS_F16_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector addition.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_add_f16(
|
||||
const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector subtraction.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_sub_f16(
|
||||
const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Multiplies a floating-point vector by a scalar.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] scale scale factor to be applied
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_scale_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t scale,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector absolute value.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[out] pDst points to the output buffer
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_abs_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Adds a constant offset to a floating-point vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[in] offset is the offset to be added
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_offset_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t offset,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Dot product of floating-point vectors.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[out] result output result returned here
|
||||
*/
|
||||
void arm_dot_prod_f16(
|
||||
const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float16_t * result);
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector multiplication.
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
*/
|
||||
void arm_mult_f16(
|
||||
const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Negates the elements of a floating-point vector.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
*/
|
||||
void arm_negate_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
@brief Elementwise floating-point clipping
|
||||
@param[in] pSrc points to input values
|
||||
@param[out] pDst points to output clipped values
|
||||
@param[in] low lower bound
|
||||
@param[in] high higher bound
|
||||
@param[in] numSamples number of samples to clip
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_clip_f16(const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
float16_t low,
|
||||
float16_t high,
|
||||
uint32_t numSamples);
|
||||
|
||||
#endif /* defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _BASIC_MATH_FUNCTIONS_F16_H_ */
|
||||
89
libraries/cmsis/cm4/core_support/dsp/bayes_functions.h
Normal file
89
libraries/cmsis/cm4/core_support/dsp/bayes_functions.h
Normal file
@@ -0,0 +1,89 @@
|
||||
/******************************************************************************
|
||||
* @file bayes_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _BAYES_FUNCTIONS_H_
|
||||
#define _BAYES_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#include "dsp/statistics_functions.h"
|
||||
|
||||
/**
|
||||
* @defgroup groupBayes Bayesian estimators
|
||||
*
|
||||
* Implement the naive gaussian Bayes estimator.
|
||||
* The training must be done from scikit-learn.
|
||||
*
|
||||
* The parameters can be easily
|
||||
* generated from the scikit-learn object. Some examples are given in
|
||||
* DSP/Testing/PatternGeneration/Bayes.py
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Instance structure for Naive Gaussian Bayesian estimator.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t vectorDimension; /**< Dimension of vector space */
|
||||
uint32_t numberOfClasses; /**< Number of different classes */
|
||||
const float32_t *theta; /**< Mean values for the Gaussians */
|
||||
const float32_t *sigma; /**< Variances for the Gaussians */
|
||||
const float32_t *classPriors; /**< Class prior probabilities */
|
||||
float32_t epsilon; /**< Additive value to variances */
|
||||
} arm_gaussian_naive_bayes_instance_f32;
|
||||
|
||||
/**
|
||||
* @brief Naive Gaussian Bayesian Estimator
|
||||
*
|
||||
* @param[in] S points to a naive bayes instance structure
|
||||
* @param[in] in points to the elements of the input vector.
|
||||
* @param[out] *pOutputProbabilities points to a buffer of length numberOfClasses containing estimated probabilities
|
||||
* @param[out] *pBufferB points to a temporary buffer of length numberOfClasses
|
||||
* @return The predicted class
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S,
|
||||
const float32_t * in,
|
||||
float32_t *pOutputProbabilities,
|
||||
float32_t *pBufferB);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _BAYES_FUNCTIONS_H_ */
|
||||
80
libraries/cmsis/cm4/core_support/dsp/bayes_functions_f16.h
Normal file
80
libraries/cmsis/cm4/core_support/dsp/bayes_functions_f16.h
Normal file
@@ -0,0 +1,80 @@
|
||||
/******************************************************************************
|
||||
* @file bayes_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _BAYES_FUNCTIONS_F16_H_
|
||||
#define _BAYES_FUNCTIONS_F16_H_
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#include "dsp/statistics_functions_f16.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
/**
|
||||
* @brief Instance structure for Naive Gaussian Bayesian estimator.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t vectorDimension; /**< Dimension of vector space */
|
||||
uint32_t numberOfClasses; /**< Number of different classes */
|
||||
const float16_t *theta; /**< Mean values for the Gaussians */
|
||||
const float16_t *sigma; /**< Variances for the Gaussians */
|
||||
const float16_t *classPriors; /**< Class prior probabilities */
|
||||
float16_t epsilon; /**< Additive value to variances */
|
||||
} arm_gaussian_naive_bayes_instance_f16;
|
||||
|
||||
/**
|
||||
* @brief Naive Gaussian Bayesian Estimator
|
||||
*
|
||||
* @param[in] S points to a naive bayes instance structure
|
||||
* @param[in] in points to the elements of the input vector.
|
||||
* @param[out] *pOutputProbabilities points to a buffer of length numberOfClasses containing estimated probabilities
|
||||
* @param[out] *pBufferB points to a temporary buffer of length numberOfClasses
|
||||
* @return The predicted class
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
uint32_t arm_gaussian_naive_bayes_predict_f16(const arm_gaussian_naive_bayes_instance_f16 *S,
|
||||
const float16_t * in,
|
||||
float16_t *pOutputProbabilities,
|
||||
float16_t *pBufferB);
|
||||
|
||||
#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _BAYES_FUNCTIONS_F16_H_ */
|
||||
345
libraries/cmsis/cm4/core_support/dsp/complex_math_functions.h
Normal file
345
libraries/cmsis/cm4/core_support/dsp/complex_math_functions.h
Normal file
@@ -0,0 +1,345 @@
|
||||
/******************************************************************************
|
||||
* @file complex_math_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _COMPLEX_MATH_FUNCTIONS_H_
|
||||
#define _COMPLEX_MATH_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
#include "dsp/fast_math_functions.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup groupCmplxMath Complex Math Functions
|
||||
* This set of functions operates on complex data vectors.
|
||||
* The data in the complex arrays is stored in an interleaved fashion
|
||||
* (real, imag, real, imag, ...).
|
||||
* In the API functions, the number of samples in a complex array refers
|
||||
* to the number of complex values; the array contains twice this number of
|
||||
* real values.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex conjugate.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
*/
|
||||
void arm_cmplx_conj_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
/**
|
||||
* @brief Q31 complex conjugate.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
*/
|
||||
void arm_cmplx_conj_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 complex conjugate.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
*/
|
||||
void arm_cmplx_conj_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex magnitude squared
|
||||
* @param[in] pSrc points to the complex input vector
|
||||
* @param[out] pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
*/
|
||||
void arm_cmplx_mag_squared_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex magnitude squared
|
||||
* @param[in] pSrc points to the complex input vector
|
||||
* @param[out] pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
*/
|
||||
void arm_cmplx_mag_squared_f64(
|
||||
const float64_t * pSrc,
|
||||
float64_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 complex magnitude squared
|
||||
* @param[in] pSrc points to the complex input vector
|
||||
* @param[out] pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
*/
|
||||
void arm_cmplx_mag_squared_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 complex magnitude squared
|
||||
* @param[in] pSrc points to the complex input vector
|
||||
* @param[out] pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
*/
|
||||
void arm_cmplx_mag_squared_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex magnitude
|
||||
* @param[in] pSrc points to the complex input vector
|
||||
* @param[out] pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
*/
|
||||
void arm_cmplx_mag_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex magnitude
|
||||
* @param[in] pSrc points to the complex input vector
|
||||
* @param[out] pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
*/
|
||||
void arm_cmplx_mag_f64(
|
||||
const float64_t * pSrc,
|
||||
float64_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 complex magnitude
|
||||
* @param[in] pSrc points to the complex input vector
|
||||
* @param[out] pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
*/
|
||||
void arm_cmplx_mag_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 complex magnitude
|
||||
* @param[in] pSrc points to the complex input vector
|
||||
* @param[out] pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
*/
|
||||
void arm_cmplx_mag_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
/**
|
||||
* @brief Q15 complex magnitude
|
||||
* @param[in] pSrc points to the complex input vector
|
||||
* @param[out] pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
*/
|
||||
void arm_cmplx_mag_fast_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 complex dot product
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
* @param[out] realResult real part of the result returned here
|
||||
* @param[out] imagResult imaginary part of the result returned here
|
||||
*/
|
||||
void arm_cmplx_dot_prod_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
uint32_t numSamples,
|
||||
q31_t * realResult,
|
||||
q31_t * imagResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 complex dot product
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
* @param[out] realResult real part of the result returned here
|
||||
* @param[out] imagResult imaginary part of the result returned here
|
||||
*/
|
||||
void arm_cmplx_dot_prod_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
uint32_t numSamples,
|
||||
q63_t * realResult,
|
||||
q63_t * imagResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex dot product
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
* @param[out] realResult real part of the result returned here
|
||||
* @param[out] imagResult imaginary part of the result returned here
|
||||
*/
|
||||
void arm_cmplx_dot_prod_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
uint32_t numSamples,
|
||||
float32_t * realResult,
|
||||
float32_t * imagResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 complex-by-real multiplication
|
||||
* @param[in] pSrcCmplx points to the complex input vector
|
||||
* @param[in] pSrcReal points to the real input vector
|
||||
* @param[out] pCmplxDst points to the complex output vector
|
||||
* @param[in] numSamples number of samples in each vector
|
||||
*/
|
||||
void arm_cmplx_mult_real_q15(
|
||||
const q15_t * pSrcCmplx,
|
||||
const q15_t * pSrcReal,
|
||||
q15_t * pCmplxDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 complex-by-real multiplication
|
||||
* @param[in] pSrcCmplx points to the complex input vector
|
||||
* @param[in] pSrcReal points to the real input vector
|
||||
* @param[out] pCmplxDst points to the complex output vector
|
||||
* @param[in] numSamples number of samples in each vector
|
||||
*/
|
||||
void arm_cmplx_mult_real_q31(
|
||||
const q31_t * pSrcCmplx,
|
||||
const q31_t * pSrcReal,
|
||||
q31_t * pCmplxDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex-by-real multiplication
|
||||
* @param[in] pSrcCmplx points to the complex input vector
|
||||
* @param[in] pSrcReal points to the real input vector
|
||||
* @param[out] pCmplxDst points to the complex output vector
|
||||
* @param[in] numSamples number of samples in each vector
|
||||
*/
|
||||
void arm_cmplx_mult_real_f32(
|
||||
const float32_t * pSrcCmplx,
|
||||
const float32_t * pSrcReal,
|
||||
float32_t * pCmplxDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
/**
|
||||
* @brief Q15 complex-by-complex multiplication
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
*/
|
||||
void arm_cmplx_mult_cmplx_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
q15_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 complex-by-complex multiplication
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
*/
|
||||
void arm_cmplx_mult_cmplx_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
q31_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex-by-complex multiplication
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
*/
|
||||
void arm_cmplx_mult_cmplx_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
float32_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex-by-complex multiplication
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
*/
|
||||
void arm_cmplx_mult_cmplx_f64(
|
||||
const float64_t * pSrcA,
|
||||
const float64_t * pSrcB,
|
||||
float64_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _COMPLEX_MATH_FUNCTIONS_H_ */
|
||||
@@ -0,0 +1,123 @@
|
||||
/******************************************************************************
|
||||
* @file complex_math_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _COMPLEX_MATH_FUNCTIONS_F16_H_
|
||||
#define _COMPLEX_MATH_FUNCTIONS_F16_H_
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
#include "dsp/fast_math_functions_f16.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex conjugate.
|
||||
* @param[in] pSrc points to the input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
*/
|
||||
void arm_cmplx_conj_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex magnitude squared
|
||||
* @param[in] pSrc points to the complex input vector
|
||||
* @param[out] pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
*/
|
||||
void arm_cmplx_mag_squared_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex magnitude
|
||||
* @param[in] pSrc points to the complex input vector
|
||||
* @param[out] pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
*/
|
||||
void arm_cmplx_mag_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex dot product
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
* @param[out] realResult real part of the result returned here
|
||||
* @param[out] imagResult imaginary part of the result returned here
|
||||
*/
|
||||
void arm_cmplx_dot_prod_f16(
|
||||
const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
uint32_t numSamples,
|
||||
float16_t * realResult,
|
||||
float16_t * imagResult);
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex-by-real multiplication
|
||||
* @param[in] pSrcCmplx points to the complex input vector
|
||||
* @param[in] pSrcReal points to the real input vector
|
||||
* @param[out] pCmplxDst points to the complex output vector
|
||||
* @param[in] numSamples number of samples in each vector
|
||||
*/
|
||||
void arm_cmplx_mult_real_f16(
|
||||
const float16_t * pSrcCmplx,
|
||||
const float16_t * pSrcReal,
|
||||
float16_t * pCmplxDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex-by-complex multiplication
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[out] pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
*/
|
||||
void arm_cmplx_mult_cmplx_f16(
|
||||
const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
float16_t * pDst,
|
||||
uint32_t numSamples);
|
||||
|
||||
#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _COMPLEX_MATH_FUNCTIONS_F16_H_ */
|
||||
791
libraries/cmsis/cm4/core_support/dsp/controller_functions.h
Normal file
791
libraries/cmsis/cm4/core_support/dsp/controller_functions.h
Normal file
@@ -0,0 +1,791 @@
|
||||
/******************************************************************************
|
||||
* @file controller_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _CONTROLLER_FUNCTIONS_H_
|
||||
#define _CONTROLLER_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Macros required for SINE and COSINE Controller functions
|
||||
*/
|
||||
|
||||
#define CONTROLLER_Q31_SHIFT (32 - 9)
|
||||
/* 1.31(q31) Fixed value of 2/360 */
|
||||
/* -1 to +1 is divided into 360 values so total spacing is (2/360) */
|
||||
#define INPUT_SPACING 0xB60B61
|
||||
|
||||
/**
|
||||
* @defgroup groupController Controller Functions
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @ingroup groupController
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup SinCos
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Floating-point sin_cos function.
|
||||
* @param[in] theta input value in degrees
|
||||
* @param[out] pSinVal points to the processed sine output.
|
||||
* @param[out] pCosVal points to the processed cos output.
|
||||
*/
|
||||
void arm_sin_cos_f32(
|
||||
float32_t theta,
|
||||
float32_t * pSinVal,
|
||||
float32_t * pCosVal);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 sin_cos function.
|
||||
* @param[in] theta scaled input value in degrees
|
||||
* @param[out] pSinVal points to the processed sine output.
|
||||
* @param[out] pCosVal points to the processed cosine output.
|
||||
*/
|
||||
void arm_sin_cos_q31(
|
||||
q31_t theta,
|
||||
q31_t * pSinVal,
|
||||
q31_t * pCosVal);
|
||||
|
||||
/**
|
||||
* @} end of SinCos group
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup groupController
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup PID PID Motor Control
|
||||
*
|
||||
* A Proportional Integral Derivative (PID) controller is a generic feedback control
|
||||
* loop mechanism widely used in industrial control systems.
|
||||
* A PID controller is the most commonly used type of feedback controller.
|
||||
*
|
||||
* This set of functions implements (PID) controllers
|
||||
* for Q15, Q31, and floating-point data types. The functions operate on a single sample
|
||||
* of data and each call to the function returns a single processed value.
|
||||
* <code>S</code> points to an instance of the PID control data structure. <code>in</code>
|
||||
* is the input sample value. The functions return the output value.
|
||||
*
|
||||
* \par Algorithm:
|
||||
* <pre>
|
||||
* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
|
||||
* A0 = Kp + Ki + Kd
|
||||
* A1 = (-Kp ) - (2 * Kd )
|
||||
* A2 = Kd
|
||||
* </pre>
|
||||
*
|
||||
* \par
|
||||
* where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
|
||||
*
|
||||
* \par
|
||||
* \image html PID.gif "Proportional Integral Derivative Controller"
|
||||
*
|
||||
* \par
|
||||
* The PID controller calculates an "error" value as the difference between
|
||||
* the measured output and the reference input.
|
||||
* The controller attempts to minimize the error by adjusting the process control inputs.
|
||||
* The proportional value determines the reaction to the current error,
|
||||
* the integral value determines the reaction based on the sum of recent errors,
|
||||
* and the derivative value determines the reaction based on the rate at which the error has been changing.
|
||||
*
|
||||
* \par Instance Structure
|
||||
* The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
|
||||
* A separate instance structure must be defined for each PID Controller.
|
||||
* There are separate instance structure declarations for each of the 3 supported data types.
|
||||
*
|
||||
* \par Reset Functions
|
||||
* There is also an associated reset function for each data type which clears the state array.
|
||||
*
|
||||
* \par Initialization Functions
|
||||
* There is also an associated initialization function for each data type.
|
||||
* The initialization function performs the following operations:
|
||||
* - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
|
||||
* - Zeros out the values in the state buffer.
|
||||
*
|
||||
* \par
|
||||
* Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
|
||||
*
|
||||
* \par Fixed-Point Behavior
|
||||
* Care must be taken when using the fixed-point versions of the PID Controller functions.
|
||||
* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
|
||||
* Refer to the function specific documentation below for usage guidelines.
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q15 PID Control.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
|
||||
#if !defined (ARM_MATH_DSP)
|
||||
q15_t A1; /**< The derived gain A1 = -Kp - 2Kd */
|
||||
q15_t A2; /**< The derived gain A1 = Kd. */
|
||||
#else
|
||||
q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
|
||||
#endif
|
||||
q15_t state[3]; /**< The state array of length 3. */
|
||||
q15_t Kp; /**< The proportional gain. */
|
||||
q15_t Ki; /**< The integral gain. */
|
||||
q15_t Kd; /**< The derivative gain. */
|
||||
} arm_pid_instance_q15;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q31 PID Control.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
|
||||
q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
|
||||
q31_t A2; /**< The derived gain, A2 = Kd . */
|
||||
q31_t state[3]; /**< The state array of length 3. */
|
||||
q31_t Kp; /**< The proportional gain. */
|
||||
q31_t Ki; /**< The integral gain. */
|
||||
q31_t Kd; /**< The derivative gain. */
|
||||
} arm_pid_instance_q31;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point PID Control.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
|
||||
float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
|
||||
float32_t A2; /**< The derived gain, A2 = Kd . */
|
||||
float32_t state[3]; /**< The state array of length 3. */
|
||||
float32_t Kp; /**< The proportional gain. */
|
||||
float32_t Ki; /**< The integral gain. */
|
||||
float32_t Kd; /**< The derivative gain. */
|
||||
} arm_pid_instance_f32;
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Initialization function for the floating-point PID Control.
|
||||
* @param[in,out] S points to an instance of the PID structure.
|
||||
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
|
||||
*/
|
||||
void arm_pid_init_f32(
|
||||
arm_pid_instance_f32 * S,
|
||||
int32_t resetStateFlag);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Reset function for the floating-point PID Control.
|
||||
* @param[in,out] S is an instance of the floating-point PID Control structure
|
||||
*/
|
||||
void arm_pid_reset_f32(
|
||||
arm_pid_instance_f32 * S);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Initialization function for the Q31 PID Control.
|
||||
* @param[in,out] S points to an instance of the Q15 PID structure.
|
||||
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
|
||||
*/
|
||||
void arm_pid_init_q31(
|
||||
arm_pid_instance_q31 * S,
|
||||
int32_t resetStateFlag);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Reset function for the Q31 PID Control.
|
||||
* @param[in,out] S points to an instance of the Q31 PID Control structure
|
||||
*/
|
||||
|
||||
void arm_pid_reset_q31(
|
||||
arm_pid_instance_q31 * S);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Initialization function for the Q15 PID Control.
|
||||
* @param[in,out] S points to an instance of the Q15 PID structure.
|
||||
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
|
||||
*/
|
||||
void arm_pid_init_q15(
|
||||
arm_pid_instance_q15 * S,
|
||||
int32_t resetStateFlag);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Reset function for the Q15 PID Control.
|
||||
* @param[in,out] S points to an instance of the q15 PID Control structure
|
||||
*/
|
||||
void arm_pid_reset_q15(
|
||||
arm_pid_instance_q15 * S);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @addtogroup PID
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Process function for the floating-point PID Control.
|
||||
* @param[in,out] S is an instance of the floating-point PID Control structure
|
||||
* @param[in] in input sample to process
|
||||
* @return processed output sample.
|
||||
*/
|
||||
__STATIC_FORCEINLINE float32_t arm_pid_f32(
|
||||
arm_pid_instance_f32 * S,
|
||||
float32_t in)
|
||||
{
|
||||
float32_t out;
|
||||
|
||||
/* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2] */
|
||||
out = (S->A0 * in) +
|
||||
(S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
|
||||
|
||||
/* Update state */
|
||||
S->state[1] = S->state[0];
|
||||
S->state[0] = in;
|
||||
S->state[2] = out;
|
||||
|
||||
/* return to application */
|
||||
return (out);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
@brief Process function for the Q31 PID Control.
|
||||
@param[in,out] S points to an instance of the Q31 PID Control structure
|
||||
@param[in] in input sample to process
|
||||
@return processed output sample.
|
||||
|
||||
\par Scaling and Overflow Behavior
|
||||
The function is implemented using an internal 64-bit accumulator.
|
||||
The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
|
||||
Thus, if the accumulator result overflows it wraps around rather than clip.
|
||||
In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
|
||||
After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
|
||||
*/
|
||||
__STATIC_FORCEINLINE q31_t arm_pid_q31(
|
||||
arm_pid_instance_q31 * S,
|
||||
q31_t in)
|
||||
{
|
||||
q63_t acc;
|
||||
q31_t out;
|
||||
|
||||
/* acc = A0 * x[n] */
|
||||
acc = (q63_t) S->A0 * in;
|
||||
|
||||
/* acc += A1 * x[n-1] */
|
||||
acc += (q63_t) S->A1 * S->state[0];
|
||||
|
||||
/* acc += A2 * x[n-2] */
|
||||
acc += (q63_t) S->A2 * S->state[1];
|
||||
|
||||
/* convert output to 1.31 format to add y[n-1] */
|
||||
out = (q31_t) (acc >> 31U);
|
||||
|
||||
/* out += y[n-1] */
|
||||
out += S->state[2];
|
||||
|
||||
/* Update state */
|
||||
S->state[1] = S->state[0];
|
||||
S->state[0] = in;
|
||||
S->state[2] = out;
|
||||
|
||||
/* return to application */
|
||||
return (out);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
@brief Process function for the Q15 PID Control.
|
||||
@param[in,out] S points to an instance of the Q15 PID Control structure
|
||||
@param[in] in input sample to process
|
||||
@return processed output sample.
|
||||
|
||||
\par Scaling and Overflow Behavior
|
||||
The function is implemented using a 64-bit internal accumulator.
|
||||
Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
|
||||
The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
|
||||
There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
|
||||
After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
|
||||
Lastly, the accumulator is saturated to yield a result in 1.15 format.
|
||||
*/
|
||||
__STATIC_FORCEINLINE q15_t arm_pid_q15(
|
||||
arm_pid_instance_q15 * S,
|
||||
q15_t in)
|
||||
{
|
||||
q63_t acc;
|
||||
q15_t out;
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
/* Implementation of PID controller */
|
||||
|
||||
/* acc = A0 * x[n] */
|
||||
acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in);
|
||||
|
||||
/* acc += A1 * x[n-1] + A2 * x[n-2] */
|
||||
acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)read_q15x2 (S->state), (uint64_t)acc);
|
||||
#else
|
||||
/* acc = A0 * x[n] */
|
||||
acc = ((q31_t) S->A0) * in;
|
||||
|
||||
/* acc += A1 * x[n-1] + A2 * x[n-2] */
|
||||
acc += (q31_t) S->A1 * S->state[0];
|
||||
acc += (q31_t) S->A2 * S->state[1];
|
||||
#endif
|
||||
|
||||
/* acc += y[n-1] */
|
||||
acc += (q31_t) S->state[2] << 15;
|
||||
|
||||
/* saturate the output */
|
||||
out = (q15_t) (__SSAT((q31_t)(acc >> 15), 16));
|
||||
|
||||
/* Update state */
|
||||
S->state[1] = S->state[0];
|
||||
S->state[0] = in;
|
||||
S->state[2] = out;
|
||||
|
||||
/* return to application */
|
||||
return (out);
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of PID group
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup groupController
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup park Vector Park Transform
|
||||
*
|
||||
* Forward Park transform converts the input two-coordinate vector to flux and torque components.
|
||||
* The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents
|
||||
* from the stationary to the moving reference frame and control the spatial relationship between
|
||||
* the stator vector current and rotor flux vector.
|
||||
* If we consider the d axis aligned with the rotor flux, the diagram below shows the
|
||||
* current vector and the relationship from the two reference frames:
|
||||
* \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
|
||||
*
|
||||
* The function operates on a single sample of data and each call to the function returns the processed output.
|
||||
* The library provides separate functions for Q31 and floating-point data types.
|
||||
* \par Algorithm
|
||||
* \image html parkFormula.gif
|
||||
* where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,
|
||||
* <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
|
||||
* cosine and sine values of theta (rotor flux position).
|
||||
* \par Fixed-Point Behavior
|
||||
* Care must be taken when using the Q31 version of the Park transform.
|
||||
* In particular, the overflow and saturation behavior of the accumulator used must be considered.
|
||||
* Refer to the function specific documentation below for usage guidelines.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup park
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Floating-point Park transform
|
||||
* @param[in] Ialpha input two-phase vector coordinate alpha
|
||||
* @param[in] Ibeta input two-phase vector coordinate beta
|
||||
* @param[out] pId points to output rotor reference frame d
|
||||
* @param[out] pIq points to output rotor reference frame q
|
||||
* @param[in] sinVal sine value of rotation angle theta
|
||||
* @param[in] cosVal cosine value of rotation angle theta
|
||||
* @return none
|
||||
*
|
||||
* The function implements the forward Park transform.
|
||||
*
|
||||
*/
|
||||
__STATIC_FORCEINLINE void arm_park_f32(
|
||||
float32_t Ialpha,
|
||||
float32_t Ibeta,
|
||||
float32_t * pId,
|
||||
float32_t * pIq,
|
||||
float32_t sinVal,
|
||||
float32_t cosVal)
|
||||
{
|
||||
/* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
|
||||
*pId = Ialpha * cosVal + Ibeta * sinVal;
|
||||
|
||||
/* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
|
||||
*pIq = -Ialpha * sinVal + Ibeta * cosVal;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
@brief Park transform for Q31 version
|
||||
@param[in] Ialpha input two-phase vector coordinate alpha
|
||||
@param[in] Ibeta input two-phase vector coordinate beta
|
||||
@param[out] pId points to output rotor reference frame d
|
||||
@param[out] pIq points to output rotor reference frame q
|
||||
@param[in] sinVal sine value of rotation angle theta
|
||||
@param[in] cosVal cosine value of rotation angle theta
|
||||
@return none
|
||||
|
||||
\par Scaling and Overflow Behavior
|
||||
The function is implemented using an internal 32-bit accumulator.
|
||||
The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
|
||||
There is saturation on the addition and subtraction, hence there is no risk of overflow.
|
||||
*/
|
||||
__STATIC_FORCEINLINE void arm_park_q31(
|
||||
q31_t Ialpha,
|
||||
q31_t Ibeta,
|
||||
q31_t * pId,
|
||||
q31_t * pIq,
|
||||
q31_t sinVal,
|
||||
q31_t cosVal)
|
||||
{
|
||||
q31_t product1, product2; /* Temporary variables used to store intermediate results */
|
||||
q31_t product3, product4; /* Temporary variables used to store intermediate results */
|
||||
|
||||
/* Intermediate product is calculated by (Ialpha * cosVal) */
|
||||
product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
|
||||
|
||||
/* Intermediate product is calculated by (Ibeta * sinVal) */
|
||||
product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
|
||||
|
||||
|
||||
/* Intermediate product is calculated by (Ialpha * sinVal) */
|
||||
product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
|
||||
|
||||
/* Intermediate product is calculated by (Ibeta * cosVal) */
|
||||
product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
|
||||
|
||||
/* Calculate pId by adding the two intermediate products 1 and 2 */
|
||||
*pId = __QADD(product1, product2);
|
||||
|
||||
/* Calculate pIq by subtracting the two intermediate products 3 from 4 */
|
||||
*pIq = __QSUB(product4, product3);
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of park group
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @ingroup groupController
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup inv_park Vector Inverse Park transform
|
||||
* Inverse Park transform converts the input flux and torque components to two-coordinate vector.
|
||||
*
|
||||
* The function operates on a single sample of data and each call to the function returns the processed output.
|
||||
* The library provides separate functions for Q31 and floating-point data types.
|
||||
* \par Algorithm
|
||||
* \image html parkInvFormula.gif
|
||||
* where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,
|
||||
* <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
|
||||
* cosine and sine values of theta (rotor flux position).
|
||||
* \par Fixed-Point Behavior
|
||||
* Care must be taken when using the Q31 version of the Park transform.
|
||||
* In particular, the overflow and saturation behavior of the accumulator used must be considered.
|
||||
* Refer to the function specific documentation below for usage guidelines.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup inv_park
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Floating-point Inverse Park transform
|
||||
* @param[in] Id input coordinate of rotor reference frame d
|
||||
* @param[in] Iq input coordinate of rotor reference frame q
|
||||
* @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
|
||||
* @param[out] pIbeta points to output two-phase orthogonal vector axis beta
|
||||
* @param[in] sinVal sine value of rotation angle theta
|
||||
* @param[in] cosVal cosine value of rotation angle theta
|
||||
* @return none
|
||||
*/
|
||||
__STATIC_FORCEINLINE void arm_inv_park_f32(
|
||||
float32_t Id,
|
||||
float32_t Iq,
|
||||
float32_t * pIalpha,
|
||||
float32_t * pIbeta,
|
||||
float32_t sinVal,
|
||||
float32_t cosVal)
|
||||
{
|
||||
/* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
|
||||
*pIalpha = Id * cosVal - Iq * sinVal;
|
||||
|
||||
/* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
|
||||
*pIbeta = Id * sinVal + Iq * cosVal;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
@brief Inverse Park transform for Q31 version
|
||||
@param[in] Id input coordinate of rotor reference frame d
|
||||
@param[in] Iq input coordinate of rotor reference frame q
|
||||
@param[out] pIalpha points to output two-phase orthogonal vector axis alpha
|
||||
@param[out] pIbeta points to output two-phase orthogonal vector axis beta
|
||||
@param[in] sinVal sine value of rotation angle theta
|
||||
@param[in] cosVal cosine value of rotation angle theta
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function is implemented using an internal 32-bit accumulator.
|
||||
The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
|
||||
There is saturation on the addition, hence there is no risk of overflow.
|
||||
*/
|
||||
__STATIC_FORCEINLINE void arm_inv_park_q31(
|
||||
q31_t Id,
|
||||
q31_t Iq,
|
||||
q31_t * pIalpha,
|
||||
q31_t * pIbeta,
|
||||
q31_t sinVal,
|
||||
q31_t cosVal)
|
||||
{
|
||||
q31_t product1, product2; /* Temporary variables used to store intermediate results */
|
||||
q31_t product3, product4; /* Temporary variables used to store intermediate results */
|
||||
|
||||
/* Intermediate product is calculated by (Id * cosVal) */
|
||||
product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
|
||||
|
||||
/* Intermediate product is calculated by (Iq * sinVal) */
|
||||
product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
|
||||
|
||||
|
||||
/* Intermediate product is calculated by (Id * sinVal) */
|
||||
product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
|
||||
|
||||
/* Intermediate product is calculated by (Iq * cosVal) */
|
||||
product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
|
||||
|
||||
/* Calculate pIalpha by using the two intermediate products 1 and 2 */
|
||||
*pIalpha = __QSUB(product1, product2);
|
||||
|
||||
/* Calculate pIbeta by using the two intermediate products 3 and 4 */
|
||||
*pIbeta = __QADD(product4, product3);
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Inverse park group
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup groupController
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup clarke Vector Clarke Transform
|
||||
* Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
|
||||
* Generally the Clarke transform uses three-phase currents <code>Ia, Ib and Ic</code> to calculate currents
|
||||
* in the two-phase orthogonal stator axis <code>Ialpha</code> and <code>Ibeta</code>.
|
||||
* When <code>Ialpha</code> is superposed with <code>Ia</code> as shown in the figure below
|
||||
* \image html clarke.gif Stator current space vector and its components in (a,b).
|
||||
* and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code>
|
||||
* can be calculated using only <code>Ia</code> and <code>Ib</code>.
|
||||
*
|
||||
* The function operates on a single sample of data and each call to the function returns the processed output.
|
||||
* The library provides separate functions for Q31 and floating-point data types.
|
||||
* \par Algorithm
|
||||
* \image html clarkeFormula.gif
|
||||
* where <code>Ia</code> and <code>Ib</code> are the instantaneous stator phases and
|
||||
* <code>pIalpha</code> and <code>pIbeta</code> are the two coordinates of time invariant vector.
|
||||
* \par Fixed-Point Behavior
|
||||
* Care must be taken when using the Q31 version of the Clarke transform.
|
||||
* In particular, the overflow and saturation behavior of the accumulator used must be considered.
|
||||
* Refer to the function specific documentation below for usage guidelines.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup clarke
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
*
|
||||
* @brief Floating-point Clarke transform
|
||||
* @param[in] Ia input three-phase coordinate <code>a</code>
|
||||
* @param[in] Ib input three-phase coordinate <code>b</code>
|
||||
* @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
|
||||
* @param[out] pIbeta points to output two-phase orthogonal vector axis beta
|
||||
* @return none
|
||||
*/
|
||||
__STATIC_FORCEINLINE void arm_clarke_f32(
|
||||
float32_t Ia,
|
||||
float32_t Ib,
|
||||
float32_t * pIalpha,
|
||||
float32_t * pIbeta)
|
||||
{
|
||||
/* Calculate pIalpha using the equation, pIalpha = Ia */
|
||||
*pIalpha = Ia;
|
||||
|
||||
/* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
|
||||
*pIbeta = (0.57735026919f * Ia + 1.15470053838f * Ib);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
@brief Clarke transform for Q31 version
|
||||
@param[in] Ia input three-phase coordinate <code>a</code>
|
||||
@param[in] Ib input three-phase coordinate <code>b</code>
|
||||
@param[out] pIalpha points to output two-phase orthogonal vector axis alpha
|
||||
@param[out] pIbeta points to output two-phase orthogonal vector axis beta
|
||||
@return none
|
||||
|
||||
\par Scaling and Overflow Behavior
|
||||
The function is implemented using an internal 32-bit accumulator.
|
||||
The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
|
||||
There is saturation on the addition, hence there is no risk of overflow.
|
||||
*/
|
||||
__STATIC_FORCEINLINE void arm_clarke_q31(
|
||||
q31_t Ia,
|
||||
q31_t Ib,
|
||||
q31_t * pIalpha,
|
||||
q31_t * pIbeta)
|
||||
{
|
||||
q31_t product1, product2; /* Temporary variables used to store intermediate results */
|
||||
|
||||
/* Calculating pIalpha from Ia by equation pIalpha = Ia */
|
||||
*pIalpha = Ia;
|
||||
|
||||
/* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
|
||||
product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
|
||||
|
||||
/* Intermediate product is calculated by (2/sqrt(3) * Ib) */
|
||||
product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
|
||||
|
||||
/* pIbeta is calculated by adding the intermediate products */
|
||||
*pIbeta = __QADD(product1, product2);
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of clarke group
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @ingroup groupController
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup inv_clarke Vector Inverse Clarke Transform
|
||||
* Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
|
||||
*
|
||||
* The function operates on a single sample of data and each call to the function returns the processed output.
|
||||
* The library provides separate functions for Q31 and floating-point data types.
|
||||
* \par Algorithm
|
||||
* \image html clarkeInvFormula.gif
|
||||
* where <code>pIa</code> and <code>pIb</code> are the instantaneous stator phases and
|
||||
* <code>Ialpha</code> and <code>Ibeta</code> are the two coordinates of time invariant vector.
|
||||
* \par Fixed-Point Behavior
|
||||
* Care must be taken when using the Q31 version of the Clarke transform.
|
||||
* In particular, the overflow and saturation behavior of the accumulator used must be considered.
|
||||
* Refer to the function specific documentation below for usage guidelines.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup inv_clarke
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Floating-point Inverse Clarke transform
|
||||
* @param[in] Ialpha input two-phase orthogonal vector axis alpha
|
||||
* @param[in] Ibeta input two-phase orthogonal vector axis beta
|
||||
* @param[out] pIa points to output three-phase coordinate <code>a</code>
|
||||
* @param[out] pIb points to output three-phase coordinate <code>b</code>
|
||||
* @return none
|
||||
*/
|
||||
__STATIC_FORCEINLINE void arm_inv_clarke_f32(
|
||||
float32_t Ialpha,
|
||||
float32_t Ibeta,
|
||||
float32_t * pIa,
|
||||
float32_t * pIb)
|
||||
{
|
||||
/* Calculating pIa from Ialpha by equation pIa = Ialpha */
|
||||
*pIa = Ialpha;
|
||||
|
||||
/* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
|
||||
*pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
@brief Inverse Clarke transform for Q31 version
|
||||
@param[in] Ialpha input two-phase orthogonal vector axis alpha
|
||||
@param[in] Ibeta input two-phase orthogonal vector axis beta
|
||||
@param[out] pIa points to output three-phase coordinate <code>a</code>
|
||||
@param[out] pIb points to output three-phase coordinate <code>b</code>
|
||||
@return none
|
||||
|
||||
\par Scaling and Overflow Behavior
|
||||
The function is implemented using an internal 32-bit accumulator.
|
||||
The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
|
||||
There is saturation on the subtraction, hence there is no risk of overflow.
|
||||
*/
|
||||
__STATIC_FORCEINLINE void arm_inv_clarke_q31(
|
||||
q31_t Ialpha,
|
||||
q31_t Ibeta,
|
||||
q31_t * pIa,
|
||||
q31_t * pIb)
|
||||
{
|
||||
q31_t product1, product2; /* Temporary variables used to store intermediate results */
|
||||
|
||||
/* Calculating pIa from Ialpha by equation pIa = Ialpha */
|
||||
*pIa = Ialpha;
|
||||
|
||||
/* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
|
||||
product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
|
||||
|
||||
/* Intermediate product is calculated by (1/sqrt(3) * pIb) */
|
||||
product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
|
||||
|
||||
/* pIb is calculated by subtracting the products */
|
||||
*pIb = __QSUB(product2, product1);
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of inv_clarke group
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _CONTROLLER_FUNCTIONS_H_ */
|
||||
@@ -0,0 +1,41 @@
|
||||
/******************************************************************************
|
||||
* @file controller_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _CONTROLLER_FUNCTIONS_F16_H_
|
||||
#define _CONTROLLER_FUNCTIONS_F16_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _CONTROLLER_FUNCTIONS_F16_H_ */
|
||||
341
libraries/cmsis/cm4/core_support/dsp/distance_functions.h
Normal file
341
libraries/cmsis/cm4/core_support/dsp/distance_functions.h
Normal file
@@ -0,0 +1,341 @@
|
||||
/******************************************************************************
|
||||
* @file distance_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _DISTANCE_FUNCTIONS_H_
|
||||
#define _DISTANCE_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#include "dsp/statistics_functions.h"
|
||||
#include "dsp/basic_math_functions.h"
|
||||
#include "dsp/fast_math_functions.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @defgroup groupDistance Distance functions
|
||||
*
|
||||
* Distance functions for use with clustering algorithms.
|
||||
* There are distance functions for float vectors and boolean vectors.
|
||||
*
|
||||
*/
|
||||
|
||||
/* 6.14 bug */
|
||||
#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) && (__ARMCC_VERSION < 6150001)
|
||||
|
||||
__attribute__((weak)) float __powisf2(float a, int b);
|
||||
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Euclidean distance between two vectors
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Euclidean distance between two vectors
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float64_t arm_euclidean_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Bray-Curtis distance between two vectors
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Canberra distance between two vectors
|
||||
*
|
||||
* This function may divide by zero when samples pA[i] and pB[i] are both zero.
|
||||
* The result of the computation will be correct. So the division per zero may be
|
||||
* ignored.
|
||||
*
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Chebyshev distance between two vectors
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Chebyshev distance between two vectors
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float64_t arm_chebyshev_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Cityblock (Manhattan) distance between two vectors
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Cityblock (Manhattan) distance between two vectors
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float64_t arm_cityblock_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Correlation distance between two vectors
|
||||
*
|
||||
* The input vectors are modified in place !
|
||||
*
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float32_t arm_correlation_distance_f32(float32_t *pA,float32_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Cosine distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float32_t arm_cosine_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Cosine distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float64_t arm_cosine_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Jensen-Shannon distance between two vectors
|
||||
*
|
||||
* This function is assuming that elements of second vector are > 0
|
||||
* and 0 only when the corresponding element of first vector is 0.
|
||||
* Otherwise the result of the computation does not make sense
|
||||
* and for speed reasons, the cases returning NaN or Infinity are not
|
||||
* managed.
|
||||
*
|
||||
* When the function is computing x log (x / y) with x 0 and y 0,
|
||||
* it will compute the right value (0) but a division per zero will occur
|
||||
* and shoudl be ignored in client code.
|
||||
*
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB,uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Minkowski distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] n Norm order (>= 2)
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
|
||||
float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, int32_t order, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Dice distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector of packed booleans
|
||||
* @param[in] pB Second vector of packed booleans
|
||||
* @param[in] order Distance order
|
||||
* @param[in] blockSize Number of samples
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
float32_t arm_dice_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
|
||||
|
||||
/**
|
||||
* @brief Hamming distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector of packed booleans
|
||||
* @param[in] pB Second vector of packed booleans
|
||||
* @param[in] numberOfBools Number of booleans
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float32_t arm_hamming_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
|
||||
|
||||
/**
|
||||
* @brief Jaccard distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector of packed booleans
|
||||
* @param[in] pB Second vector of packed booleans
|
||||
* @param[in] numberOfBools Number of booleans
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float32_t arm_jaccard_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
|
||||
|
||||
/**
|
||||
* @brief Kulsinski distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector of packed booleans
|
||||
* @param[in] pB Second vector of packed booleans
|
||||
* @param[in] numberOfBools Number of booleans
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float32_t arm_kulsinski_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
|
||||
|
||||
/**
|
||||
* @brief Roger Stanimoto distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector of packed booleans
|
||||
* @param[in] pB Second vector of packed booleans
|
||||
* @param[in] numberOfBools Number of booleans
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float32_t arm_rogerstanimoto_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
|
||||
|
||||
/**
|
||||
* @brief Russell-Rao distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector of packed booleans
|
||||
* @param[in] pB Second vector of packed booleans
|
||||
* @param[in] numberOfBools Number of booleans
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float32_t arm_russellrao_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
|
||||
|
||||
/**
|
||||
* @brief Sokal-Michener distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector of packed booleans
|
||||
* @param[in] pB Second vector of packed booleans
|
||||
* @param[in] numberOfBools Number of booleans
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float32_t arm_sokalmichener_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
|
||||
|
||||
/**
|
||||
* @brief Sokal-Sneath distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector of packed booleans
|
||||
* @param[in] pB Second vector of packed booleans
|
||||
* @param[in] numberOfBools Number of booleans
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float32_t arm_sokalsneath_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
|
||||
|
||||
/**
|
||||
* @brief Yule distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector of packed booleans
|
||||
* @param[in] pB Second vector of packed booleans
|
||||
* @param[in] numberOfBools Number of booleans
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float32_t arm_yule_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _DISTANCE_FUNCTIONS_H_ */
|
||||
180
libraries/cmsis/cm4/core_support/dsp/distance_functions_f16.h
Normal file
180
libraries/cmsis/cm4/core_support/dsp/distance_functions_f16.h
Normal file
@@ -0,0 +1,180 @@
|
||||
/******************************************************************************
|
||||
* @file distance_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _DISTANCE_FUNCTIONS_F16_H_
|
||||
#define _DISTANCE_FUNCTIONS_F16_H_
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
/* 6.14 bug */
|
||||
#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) && (__ARMCC_VERSION < 6150001)
|
||||
/* Defined in minkowski_f32 */
|
||||
__attribute__((weak)) float __powisf2(float a, int b);
|
||||
#endif
|
||||
|
||||
#include "dsp/statistics_functions_f16.h"
|
||||
#include "dsp/basic_math_functions_f16.h"
|
||||
|
||||
#include "dsp/fast_math_functions_f16.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
/**
|
||||
* @brief Euclidean distance between two vectors
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float16_t arm_euclidean_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Bray-Curtis distance between two vectors
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float16_t arm_braycurtis_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Canberra distance between two vectors
|
||||
*
|
||||
* This function may divide by zero when samples pA[i] and pB[i] are both zero.
|
||||
* The result of the computation will be correct. So the division per zero may be
|
||||
* ignored.
|
||||
*
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float16_t arm_canberra_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Chebyshev distance between two vectors
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float16_t arm_chebyshev_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Cityblock (Manhattan) distance between two vectors
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float16_t arm_cityblock_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Correlation distance between two vectors
|
||||
*
|
||||
* The input vectors are modified in place !
|
||||
*
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
float16_t arm_correlation_distance_f16(float16_t *pA,float16_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Cosine distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float16_t arm_cosine_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Jensen-Shannon distance between two vectors
|
||||
*
|
||||
* This function is assuming that elements of second vector are > 0
|
||||
* and 0 only when the corresponding element of first vector is 0.
|
||||
* Otherwise the result of the computation does not make sense
|
||||
* and for speed reasons, the cases returning NaN or Infinity are not
|
||||
* managed.
|
||||
*
|
||||
* When the function is computing x log (x / y) with x 0 and y 0,
|
||||
* it will compute the right value (0) but a division per zero will occur
|
||||
* and shoudl be ignored in client code.
|
||||
*
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
float16_t arm_jensenshannon_distance_f16(const float16_t *pA,const float16_t *pB,uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Minkowski distance between two vectors
|
||||
*
|
||||
* @param[in] pA First vector
|
||||
* @param[in] pB Second vector
|
||||
* @param[in] n Norm order (>= 2)
|
||||
* @param[in] blockSize vector length
|
||||
* @return distance
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
|
||||
float16_t arm_minkowski_distance_f16(const float16_t *pA,const float16_t *pB, int32_t order, uint32_t blockSize);
|
||||
|
||||
|
||||
#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _DISTANCE_FUNCTIONS_F16_H_ */
|
||||
389
libraries/cmsis/cm4/core_support/dsp/fast_math_functions.h
Normal file
389
libraries/cmsis/cm4/core_support/dsp/fast_math_functions.h
Normal file
@@ -0,0 +1,389 @@
|
||||
/******************************************************************************
|
||||
* @file fast_math_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _FAST_MATH_FUNCTIONS_H_
|
||||
#define _FAST_MATH_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Macros required for SINE and COSINE Fast math approximations
|
||||
*/
|
||||
|
||||
#define FAST_MATH_TABLE_SIZE 512
|
||||
#define FAST_MATH_Q31_SHIFT (32 - 10)
|
||||
#define FAST_MATH_Q15_SHIFT (16 - 10)
|
||||
|
||||
#ifndef PI
|
||||
#define PI 3.14159265358979f
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @defgroup groupFastMath Fast Math Functions
|
||||
* This set of functions provides a fast approximation to sine, cosine, and square root.
|
||||
* As compared to most of the other functions in the CMSIS math library, the fast math functions
|
||||
* operate on individual values and not arrays.
|
||||
* There are separate functions for Q15, Q31, and floating-point data.
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup groupFastMath
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
@addtogroup sin
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Fast approximation to the trigonometric sine function for floating-point data.
|
||||
* @param[in] x input value in radians.
|
||||
* @return sin(x).
|
||||
*/
|
||||
float32_t arm_sin_f32(
|
||||
float32_t x);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Fast approximation to the trigonometric sine function for Q31 data.
|
||||
* @param[in] x Scaled input value in radians.
|
||||
* @return sin(x).
|
||||
*/
|
||||
q31_t arm_sin_q31(
|
||||
q31_t x);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Fast approximation to the trigonometric sine function for Q15 data.
|
||||
* @param[in] x Scaled input value in radians.
|
||||
* @return sin(x).
|
||||
*/
|
||||
q15_t arm_sin_q15(
|
||||
q15_t x);
|
||||
|
||||
/**
|
||||
@} end of sin group
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup cos
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Fast approximation to the trigonometric cosine function for floating-point data.
|
||||
* @param[in] x input value in radians.
|
||||
* @return cos(x).
|
||||
*/
|
||||
float32_t arm_cos_f32(
|
||||
float32_t x);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Fast approximation to the trigonometric cosine function for Q31 data.
|
||||
* @param[in] x Scaled input value in radians.
|
||||
* @return cos(x).
|
||||
*/
|
||||
q31_t arm_cos_q31(
|
||||
q31_t x);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Fast approximation to the trigonometric cosine function for Q15 data.
|
||||
* @param[in] x Scaled input value in radians.
|
||||
* @return cos(x).
|
||||
*/
|
||||
q15_t arm_cos_q15(
|
||||
q15_t x);
|
||||
|
||||
/**
|
||||
@} end of cos group
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
@brief Floating-point vector of log values.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
void arm_vlog_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
@brief Floating-point vector of log values.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
void arm_vlog_f64(
|
||||
const float64_t * pSrc,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief q31 vector of log values.
|
||||
* @param[in] pSrc points to the input vector in q31
|
||||
* @param[out] pDst points to the output vector in q5.26
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_vlog_q31(const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief q15 vector of log values.
|
||||
* @param[in] pSrc points to the input vector in q15
|
||||
* @param[out] pDst points to the output vector in q4.11
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none
|
||||
*/
|
||||
void arm_vlog_q15(const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
@brief Floating-point vector of exp values.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
void arm_vexp_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
@brief Floating-point vector of exp values.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
void arm_vexp_f64(
|
||||
const float64_t * pSrc,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @defgroup SQRT Square Root
|
||||
*
|
||||
* Computes the square root of a number.
|
||||
* There are separate functions for Q15, Q31, and floating-point data types.
|
||||
* The square root function is computed using the Newton-Raphson algorithm.
|
||||
* This is an iterative algorithm of the form:
|
||||
* <pre>
|
||||
* x1 = x0 - f(x0)/f'(x0)
|
||||
* </pre>
|
||||
* where <code>x1</code> is the current estimate,
|
||||
* <code>x0</code> is the previous estimate, and
|
||||
* <code>f'(x0)</code> is the derivative of <code>f()</code> evaluated at <code>x0</code>.
|
||||
* For the square root function, the algorithm reduces to:
|
||||
* <pre>
|
||||
* x0 = in/2 [initial guess]
|
||||
* x1 = 1/2 * ( x0 + in / x0) [each iteration]
|
||||
* </pre>
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @addtogroup SQRT
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Floating-point square root function.
|
||||
@param[in] in input value
|
||||
@param[out] pOut square root of input value
|
||||
@return execution status
|
||||
- \ref ARM_MATH_SUCCESS : input value is positive
|
||||
- \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
|
||||
*/
|
||||
__STATIC_FORCEINLINE arm_status arm_sqrt_f32(
|
||||
const float32_t in,
|
||||
float32_t * pOut)
|
||||
{
|
||||
if (in >= 0.0f)
|
||||
{
|
||||
#if defined ( __CC_ARM )
|
||||
#if defined __TARGET_FPU_VFP
|
||||
*pOut = __sqrtf(in);
|
||||
#else
|
||||
*pOut = sqrtf(in);
|
||||
#endif
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
#if defined __ARMVFP__
|
||||
__ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in));
|
||||
#else
|
||||
*pOut = sqrtf(in);
|
||||
#endif
|
||||
|
||||
#else
|
||||
*pOut = sqrtf(in);
|
||||
#endif
|
||||
|
||||
return (ARM_MATH_SUCCESS);
|
||||
}
|
||||
else
|
||||
{
|
||||
*pOut = 0.0f;
|
||||
return (ARM_MATH_ARGUMENT_ERROR);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
@brief Q31 square root function.
|
||||
@param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF
|
||||
@param[out] pOut points to square root of input value
|
||||
@return execution status
|
||||
- \ref ARM_MATH_SUCCESS : input value is positive
|
||||
- \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
|
||||
*/
|
||||
arm_status arm_sqrt_q31(
|
||||
q31_t in,
|
||||
q31_t * pOut);
|
||||
|
||||
|
||||
/**
|
||||
@brief Q15 square root function.
|
||||
@param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF
|
||||
@param[out] pOut points to square root of input value
|
||||
@return execution status
|
||||
- \ref ARM_MATH_SUCCESS : input value is positive
|
||||
- \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
|
||||
*/
|
||||
arm_status arm_sqrt_q15(
|
||||
q15_t in,
|
||||
q15_t * pOut);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @} end of SQRT group
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Fixed point division
|
||||
@param[in] numerator Numerator
|
||||
@param[in] denominator Denominator
|
||||
@param[out] quotient Quotient value normalized between -1.0 and 1.0
|
||||
@param[out] shift Shift left value to get the unnormalized quotient
|
||||
@return error status
|
||||
|
||||
When dividing by 0, an error ARM_MATH_NANINF is returned. And the quotient is forced
|
||||
to the saturated negative or positive value.
|
||||
*/
|
||||
|
||||
arm_status arm_divide_q15(q15_t numerator,
|
||||
q15_t denominator,
|
||||
q15_t *quotient,
|
||||
int16_t *shift);
|
||||
|
||||
/**
|
||||
@brief Fixed point division
|
||||
@param[in] numerator Numerator
|
||||
@param[in] denominator Denominator
|
||||
@param[out] quotient Quotient value normalized between -1.0 and 1.0
|
||||
@param[out] shift Shift left value to get the unnormalized quotient
|
||||
@return error status
|
||||
|
||||
When dividing by 0, an error ARM_MATH_NANINF is returned. And the quotient is forced
|
||||
to the saturated negative or positive value.
|
||||
*/
|
||||
|
||||
arm_status arm_divide_q31(q31_t numerator,
|
||||
q31_t denominator,
|
||||
q31_t *quotient,
|
||||
int16_t *shift);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
@brief Arc tangent in radian of y/x using sign of x and y to determine right quadrant.
|
||||
@param[in] y y coordinate
|
||||
@param[in] x x coordinate
|
||||
@param[out] result Result
|
||||
@return error status.
|
||||
*/
|
||||
arm_status arm_atan2_f32(float32_t y,float32_t x,float32_t *result);
|
||||
|
||||
|
||||
/**
|
||||
@brief Arc tangent in radian of y/x using sign of x and y to determine right quadrant.
|
||||
@param[in] y y coordinate
|
||||
@param[in] x x coordinate
|
||||
@param[out] result Result in Q2.29
|
||||
@return error status.
|
||||
*/
|
||||
arm_status arm_atan2_q31(q31_t y,q31_t x,q31_t *result);
|
||||
|
||||
/**
|
||||
@brief Arc tangent in radian of y/x using sign of x and y to determine right quadrant.
|
||||
@param[in] y y coordinate
|
||||
@param[in] x x coordinate
|
||||
@param[out] result Result in Q2.13
|
||||
@return error status.
|
||||
*/
|
||||
arm_status arm_atan2_q15(q15_t y,q15_t x,q15_t *result);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _FAST_MATH_FUNCTIONS_H_ */
|
||||
125
libraries/cmsis/cm4/core_support/dsp/fast_math_functions_f16.h
Normal file
125
libraries/cmsis/cm4/core_support/dsp/fast_math_functions_f16.h
Normal file
@@ -0,0 +1,125 @@
|
||||
/******************************************************************************
|
||||
* @file fast_math_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _FAST_MATH_FUNCTIONS_F16_H_
|
||||
#define _FAST_MATH_FUNCTIONS_F16_H_
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
/* For sqrt_f32 */
|
||||
#include "dsp/fast_math_functions.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
/**
|
||||
* @addtogroup SQRT
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Floating-point square root function.
|
||||
@param[in] in input value
|
||||
@param[out] pOut square root of input value
|
||||
@return execution status
|
||||
- \ref ARM_MATH_SUCCESS : input value is positive
|
||||
- \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
|
||||
*/
|
||||
__STATIC_FORCEINLINE arm_status arm_sqrt_f16(
|
||||
float16_t in,
|
||||
float16_t * pOut)
|
||||
{
|
||||
float32_t r;
|
||||
arm_status status;
|
||||
status=arm_sqrt_f32((float32_t)in,&r);
|
||||
*pOut=(float16_t)r;
|
||||
return(status);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
@} end of SQRT group
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Floating-point vector of log values.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
void arm_vlog_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
@brief Floating-point vector of exp values.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
void arm_vexp_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
@brief Floating-point vector of inverse values.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
void arm_vinverse_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
@brief Arc tangent in radian of y/x using sign of x and y to determine right quadrant.
|
||||
@param[in] y y coordinate
|
||||
@param[in] x x coordinate
|
||||
@param[out] result Result
|
||||
@return error status.
|
||||
*/
|
||||
arm_status arm_atan2_f16(float16_t y,float16_t x,float16_t *result);
|
||||
|
||||
#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _FAST_MATH_FUNCTIONS_F16_H_ */
|
||||
2529
libraries/cmsis/cm4/core_support/dsp/filtering_functions.h
Normal file
2529
libraries/cmsis/cm4/core_support/dsp/filtering_functions.h
Normal file
File diff suppressed because it is too large
Load Diff
237
libraries/cmsis/cm4/core_support/dsp/filtering_functions_f16.h
Normal file
237
libraries/cmsis/cm4/core_support/dsp/filtering_functions_f16.h
Normal file
@@ -0,0 +1,237 @@
|
||||
/******************************************************************************
|
||||
* @file filtering_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _FILTERING_FUNCTIONS_F16_H_
|
||||
#define _FILTERING_FUNCTIONS_F16_H_
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point FIR filter.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numTaps; /**< number of filter coefficients in the filter. */
|
||||
float16_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
|
||||
const float16_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
|
||||
} arm_fir_instance_f16;
|
||||
|
||||
/**
|
||||
* @brief Initialization function for the floating-point FIR filter.
|
||||
* @param[in,out] S points to an instance of the floating-point FIR filter structure.
|
||||
* @param[in] numTaps Number of filter coefficients in the filter.
|
||||
* @param[in] pCoeffs points to the filter coefficients.
|
||||
* @param[in] pState points to the state buffer.
|
||||
* @param[in] blockSize number of samples that are processed at a time.
|
||||
*/
|
||||
void arm_fir_init_f16(
|
||||
arm_fir_instance_f16 * S,
|
||||
uint16_t numTaps,
|
||||
const float16_t * pCoeffs,
|
||||
float16_t * pState,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Processing function for the floating-point FIR filter.
|
||||
* @param[in] S points to an instance of the floating-point FIR structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data.
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_fir_f16(
|
||||
const arm_fir_instance_f16 * S,
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point Biquad cascade filter.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
|
||||
float16_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
|
||||
const float16_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
|
||||
} arm_biquad_casd_df1_inst_f16;
|
||||
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
/**
|
||||
* @brief Instance structure for the modified Biquad coefs required by vectorized code.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
float16_t coeffs[12][8]; /**< Points to the array of modified coefficients. The array is of length 32. There is one per stage */
|
||||
} arm_biquad_mod_coef_f16;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Processing function for the floating-point Biquad cascade filter.
|
||||
* @param[in] S points to an instance of the floating-point Biquad cascade structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data.
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_biquad_cascade_df1_f16(
|
||||
const arm_biquad_casd_df1_inst_f16 * S,
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
void arm_biquad_cascade_df1_mve_init_f16(
|
||||
arm_biquad_casd_df1_inst_f16 * S,
|
||||
uint8_t numStages,
|
||||
const float16_t * pCoeffs,
|
||||
arm_biquad_mod_coef_f16 * pCoeffsMod,
|
||||
float16_t * pState);
|
||||
#endif
|
||||
|
||||
void arm_biquad_cascade_df1_init_f16(
|
||||
arm_biquad_casd_df1_inst_f16 * S,
|
||||
uint8_t numStages,
|
||||
const float16_t * pCoeffs,
|
||||
float16_t * pState);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
|
||||
float16_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */
|
||||
const float16_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
|
||||
} arm_biquad_cascade_df2T_instance_f16;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
|
||||
float16_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */
|
||||
const float16_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
|
||||
} arm_biquad_cascade_stereo_df2T_instance_f16;
|
||||
|
||||
/**
|
||||
* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
|
||||
* @param[in] S points to an instance of the filter data structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_biquad_cascade_df2T_f16(
|
||||
const arm_biquad_cascade_df2T_instance_f16 * S,
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels
|
||||
* @param[in] S points to an instance of the filter data structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_biquad_cascade_stereo_df2T_f16(
|
||||
const arm_biquad_cascade_stereo_df2T_instance_f16 * S,
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
|
||||
* @param[in,out] S points to an instance of the filter data structure.
|
||||
* @param[in] numStages number of 2nd order stages in the filter.
|
||||
* @param[in] pCoeffs points to the filter coefficients.
|
||||
* @param[in] pState points to the state buffer.
|
||||
*/
|
||||
void arm_biquad_cascade_df2T_init_f16(
|
||||
arm_biquad_cascade_df2T_instance_f16 * S,
|
||||
uint8_t numStages,
|
||||
const float16_t * pCoeffs,
|
||||
float16_t * pState);
|
||||
|
||||
/**
|
||||
* @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
|
||||
* @param[in,out] S points to an instance of the filter data structure.
|
||||
* @param[in] numStages number of 2nd order stages in the filter.
|
||||
* @param[in] pCoeffs points to the filter coefficients.
|
||||
* @param[in] pState points to the state buffer.
|
||||
*/
|
||||
void arm_biquad_cascade_stereo_df2T_init_f16(
|
||||
arm_biquad_cascade_stereo_df2T_instance_f16 * S,
|
||||
uint8_t numStages,
|
||||
const float16_t * pCoeffs,
|
||||
float16_t * pState);
|
||||
|
||||
/**
|
||||
* @brief Correlation of floating-point sequences.
|
||||
* @param[in] pSrcA points to the first input sequence.
|
||||
* @param[in] srcALen length of the first input sequence.
|
||||
* @param[in] pSrcB points to the second input sequence.
|
||||
* @param[in] srcBLen length of the second input sequence.
|
||||
* @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
|
||||
*/
|
||||
void arm_correlate_f16(
|
||||
const float16_t * pSrcA,
|
||||
uint32_t srcALen,
|
||||
const float16_t * pSrcB,
|
||||
uint32_t srcBLen,
|
||||
float16_t * pDst);
|
||||
|
||||
|
||||
/**
|
||||
@brief Levinson Durbin
|
||||
@param[in] phi autocovariance vector starting with lag 0 (length is nbCoefs + 1)
|
||||
@param[out] a autoregressive coefficients
|
||||
@param[out] err prediction error (variance)
|
||||
@param[in] nbCoefs number of autoregressive coefficients
|
||||
@return none
|
||||
*/
|
||||
void arm_levinson_durbin_f16(const float16_t *phi,
|
||||
float16_t *a,
|
||||
float16_t *err,
|
||||
int nbCoefs);
|
||||
|
||||
#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _FILTERING_FUNCTIONS_F16_H_ */
|
||||
319
libraries/cmsis/cm4/core_support/dsp/interpolation_functions.h
Normal file
319
libraries/cmsis/cm4/core_support/dsp/interpolation_functions.h
Normal file
@@ -0,0 +1,319 @@
|
||||
/******************************************************************************
|
||||
* @file interpolation_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _INTERPOLATION_FUNCTIONS_H_
|
||||
#define _INTERPOLATION_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @defgroup groupInterpolation Interpolation Functions
|
||||
* These functions perform 1- and 2-dimensional interpolation of data.
|
||||
* Linear interpolation is used for 1-dimensional data and
|
||||
* bilinear interpolation is used for 2-dimensional data.
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point Linear Interpolate function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t nValues; /**< nValues */
|
||||
float32_t x1; /**< x1 */
|
||||
float32_t xSpacing; /**< xSpacing */
|
||||
float32_t *pYData; /**< pointer to the table of Y values */
|
||||
} arm_linear_interp_instance_f32;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point bilinear interpolation function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numRows; /**< number of rows in the data table. */
|
||||
uint16_t numCols; /**< number of columns in the data table. */
|
||||
float32_t *pData; /**< points to the data table. */
|
||||
} arm_bilinear_interp_instance_f32;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q31 bilinear interpolation function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numRows; /**< number of rows in the data table. */
|
||||
uint16_t numCols; /**< number of columns in the data table. */
|
||||
q31_t *pData; /**< points to the data table. */
|
||||
} arm_bilinear_interp_instance_q31;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q15 bilinear interpolation function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numRows; /**< number of rows in the data table. */
|
||||
uint16_t numCols; /**< number of columns in the data table. */
|
||||
q15_t *pData; /**< points to the data table. */
|
||||
} arm_bilinear_interp_instance_q15;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q15 bilinear interpolation function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numRows; /**< number of rows in the data table. */
|
||||
uint16_t numCols; /**< number of columns in the data table. */
|
||||
q7_t *pData; /**< points to the data table. */
|
||||
} arm_bilinear_interp_instance_q7;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Struct for specifying cubic spline type
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ARM_SPLINE_NATURAL = 0, /**< Natural spline */
|
||||
ARM_SPLINE_PARABOLIC_RUNOUT = 1 /**< Parabolic runout spline */
|
||||
} arm_spline_type;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point cubic spline interpolation.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
arm_spline_type type; /**< Type (boundary conditions) */
|
||||
const float32_t * x; /**< x values */
|
||||
const float32_t * y; /**< y values */
|
||||
uint32_t n_x; /**< Number of known data points */
|
||||
float32_t * coeffs; /**< Coefficients buffer (b,c, and d) */
|
||||
} arm_spline_instance_f32;
|
||||
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @ingroup groupInterpolation
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup SplineInterpolate
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Processing function for the floating-point cubic spline interpolation.
|
||||
* @param[in] S points to an instance of the floating-point spline structure.
|
||||
* @param[in] xq points to the x values ot the interpolated data points.
|
||||
* @param[out] pDst points to the block of output data.
|
||||
* @param[in] blockSize number of samples of output data.
|
||||
*/
|
||||
void arm_spline_f32(
|
||||
arm_spline_instance_f32 * S,
|
||||
const float32_t * xq,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Initialization function for the floating-point cubic spline interpolation.
|
||||
* @param[in,out] S points to an instance of the floating-point spline structure.
|
||||
* @param[in] type type of cubic spline interpolation (boundary conditions)
|
||||
* @param[in] x points to the x values of the known data points.
|
||||
* @param[in] y points to the y values of the known data points.
|
||||
* @param[in] n number of known data points.
|
||||
* @param[in] coeffs coefficients array for b, c, and d
|
||||
* @param[in] tempBuffer buffer array for internal computations
|
||||
*/
|
||||
void arm_spline_init_f32(
|
||||
arm_spline_instance_f32 * S,
|
||||
arm_spline_type type,
|
||||
const float32_t * x,
|
||||
const float32_t * y,
|
||||
uint32_t n,
|
||||
float32_t * coeffs,
|
||||
float32_t * tempBuffer);
|
||||
|
||||
|
||||
/**
|
||||
* @} end of SplineInterpolate group
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @addtogroup LinearInterpolate
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Process function for the floating-point Linear Interpolation Function.
|
||||
* @param[in,out] S is an instance of the floating-point Linear Interpolation structure
|
||||
* @param[in] x input sample to process
|
||||
* @return y processed output sample.
|
||||
*
|
||||
*/
|
||||
float32_t arm_linear_interp_f32(
|
||||
arm_linear_interp_instance_f32 * S,
|
||||
float32_t x);
|
||||
|
||||
/**
|
||||
*
|
||||
* @brief Process function for the Q31 Linear Interpolation Function.
|
||||
* @param[in] pYData pointer to Q31 Linear Interpolation table
|
||||
* @param[in] x input sample to process
|
||||
* @param[in] nValues number of table values
|
||||
* @return y processed output sample.
|
||||
*
|
||||
* \par
|
||||
* Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
|
||||
* This function can support maximum of table size 2^12.
|
||||
*
|
||||
*/
|
||||
q31_t arm_linear_interp_q31(
|
||||
const q31_t * pYData,
|
||||
q31_t x,
|
||||
uint32_t nValues);
|
||||
|
||||
/**
|
||||
*
|
||||
* @brief Process function for the Q15 Linear Interpolation Function.
|
||||
* @param[in] pYData pointer to Q15 Linear Interpolation table
|
||||
* @param[in] x input sample to process
|
||||
* @param[in] nValues number of table values
|
||||
* @return y processed output sample.
|
||||
*
|
||||
* \par
|
||||
* Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
|
||||
* This function can support maximum of table size 2^12.
|
||||
*
|
||||
*/
|
||||
q15_t arm_linear_interp_q15(
|
||||
const q15_t * pYData,
|
||||
q31_t x,
|
||||
uint32_t nValues);
|
||||
|
||||
/**
|
||||
*
|
||||
* @brief Process function for the Q7 Linear Interpolation Function.
|
||||
* @param[in] pYData pointer to Q7 Linear Interpolation table
|
||||
* @param[in] x input sample to process
|
||||
* @param[in] nValues number of table values
|
||||
* @return y processed output sample.
|
||||
*
|
||||
* \par
|
||||
* Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
|
||||
* This function can support maximum of table size 2^12.
|
||||
*/
|
||||
q7_t arm_linear_interp_q7(
|
||||
const q7_t * pYData,
|
||||
q31_t x,
|
||||
uint32_t nValues);
|
||||
|
||||
/**
|
||||
* @} end of LinearInterpolate group
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @ingroup groupInterpolation
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @addtogroup BilinearInterpolate
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Floating-point bilinear interpolation.
|
||||
* @param[in,out] S points to an instance of the interpolation structure.
|
||||
* @param[in] X interpolation coordinate.
|
||||
* @param[in] Y interpolation coordinate.
|
||||
* @return out interpolated value.
|
||||
*/
|
||||
float32_t arm_bilinear_interp_f32(
|
||||
const arm_bilinear_interp_instance_f32 * S,
|
||||
float32_t X,
|
||||
float32_t Y);
|
||||
|
||||
/**
|
||||
* @brief Q31 bilinear interpolation.
|
||||
* @param[in,out] S points to an instance of the interpolation structure.
|
||||
* @param[in] X interpolation coordinate in 12.20 format.
|
||||
* @param[in] Y interpolation coordinate in 12.20 format.
|
||||
* @return out interpolated value.
|
||||
*/
|
||||
q31_t arm_bilinear_interp_q31(
|
||||
arm_bilinear_interp_instance_q31 * S,
|
||||
q31_t X,
|
||||
q31_t Y);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 bilinear interpolation.
|
||||
* @param[in,out] S points to an instance of the interpolation structure.
|
||||
* @param[in] X interpolation coordinate in 12.20 format.
|
||||
* @param[in] Y interpolation coordinate in 12.20 format.
|
||||
* @return out interpolated value.
|
||||
*/
|
||||
q15_t arm_bilinear_interp_q15(
|
||||
arm_bilinear_interp_instance_q15 * S,
|
||||
q31_t X,
|
||||
q31_t Y);
|
||||
|
||||
/**
|
||||
* @brief Q7 bilinear interpolation.
|
||||
* @param[in,out] S points to an instance of the interpolation structure.
|
||||
* @param[in] X interpolation coordinate in 12.20 format.
|
||||
* @param[in] Y interpolation coordinate in 12.20 format.
|
||||
* @return out interpolated value.
|
||||
*/
|
||||
q7_t arm_bilinear_interp_q7(
|
||||
arm_bilinear_interp_instance_q7 * S,
|
||||
q31_t X,
|
||||
q31_t Y);
|
||||
/**
|
||||
* @} end of BilinearInterpolate group
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _INTERPOLATION_FUNCTIONS_H_ */
|
||||
@@ -0,0 +1,107 @@
|
||||
/******************************************************************************
|
||||
* @file interpolation_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _INTERPOLATION_FUNCTIONS_F16_H_
|
||||
#define _INTERPOLATION_FUNCTIONS_F16_H_
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t nValues; /**< nValues */
|
||||
float16_t x1; /**< x1 */
|
||||
float16_t xSpacing; /**< xSpacing */
|
||||
float16_t *pYData; /**< pointer to the table of Y values */
|
||||
} arm_linear_interp_instance_f16;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point bilinear interpolation function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numRows;/**< number of rows in the data table. */
|
||||
uint16_t numCols;/**< number of columns in the data table. */
|
||||
float16_t *pData; /**< points to the data table. */
|
||||
} arm_bilinear_interp_instance_f16;
|
||||
|
||||
/**
|
||||
* @addtogroup LinearInterpolate
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Process function for the floating-point Linear Interpolation Function.
|
||||
* @param[in,out] S is an instance of the floating-point Linear Interpolation structure
|
||||
* @param[in] x input sample to process
|
||||
* @return y processed output sample.
|
||||
*
|
||||
*/
|
||||
float16_t arm_linear_interp_f16(
|
||||
arm_linear_interp_instance_f16 * S,
|
||||
float16_t x);
|
||||
|
||||
/**
|
||||
* @} end of LinearInterpolate group
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup BilinearInterpolate
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Floating-point bilinear interpolation.
|
||||
* @param[in,out] S points to an instance of the interpolation structure.
|
||||
* @param[in] X interpolation coordinate.
|
||||
* @param[in] Y interpolation coordinate.
|
||||
* @return out interpolated value.
|
||||
*/
|
||||
float16_t arm_bilinear_interp_f16(
|
||||
const arm_bilinear_interp_instance_f16 * S,
|
||||
float16_t X,
|
||||
float16_t Y);
|
||||
|
||||
|
||||
/**
|
||||
* @} end of BilinearInterpolate group
|
||||
*/
|
||||
#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _INTERPOLATION_FUNCTIONS_F16_H_ */
|
||||
757
libraries/cmsis/cm4/core_support/dsp/matrix_functions.h
Normal file
757
libraries/cmsis/cm4/core_support/dsp/matrix_functions.h
Normal file
@@ -0,0 +1,757 @@
|
||||
/******************************************************************************
|
||||
* @file matrix_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _MATRIX_FUNCTIONS_H_
|
||||
#define _MATRIX_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup groupMatrix Matrix Functions
|
||||
*
|
||||
* This set of functions provides basic matrix math operations.
|
||||
* The functions operate on matrix data structures. For example,
|
||||
* the type
|
||||
* definition for the floating-point matrix structure is shown
|
||||
* below:
|
||||
* <pre>
|
||||
* typedef struct
|
||||
* {
|
||||
* uint16_t numRows; // number of rows of the matrix.
|
||||
* uint16_t numCols; // number of columns of the matrix.
|
||||
* float32_t *pData; // points to the data of the matrix.
|
||||
* } arm_matrix_instance_f32;
|
||||
* </pre>
|
||||
* There are similar definitions for Q15 and Q31 data types.
|
||||
*
|
||||
* The structure specifies the size of the matrix and then points to
|
||||
* an array of data. The array is of size <code>numRows X numCols</code>
|
||||
* and the values are arranged in row order. That is, the
|
||||
* matrix element (i, j) is stored at:
|
||||
* <pre>
|
||||
* pData[i*numCols + j]
|
||||
* </pre>
|
||||
*
|
||||
* \par Init Functions
|
||||
* There is an associated initialization function for each type of matrix
|
||||
* data structure.
|
||||
* The initialization function sets the values of the internal structure fields.
|
||||
* Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15()
|
||||
* for floating-point, Q31 and Q15 types, respectively.
|
||||
*
|
||||
* \par
|
||||
* Use of the initialization function is optional. However, if initialization function is used
|
||||
* then the instance structure cannot be placed into a const data section.
|
||||
* To place the instance structure in a const data
|
||||
* section, manually initialize the data structure. For example:
|
||||
* <pre>
|
||||
* <code>arm_matrix_instance_f32 S = {nRows, nColumns, pData};</code>
|
||||
* <code>arm_matrix_instance_q31 S = {nRows, nColumns, pData};</code>
|
||||
* <code>arm_matrix_instance_q15 S = {nRows, nColumns, pData};</code>
|
||||
* </pre>
|
||||
* where <code>nRows</code> specifies the number of rows, <code>nColumns</code>
|
||||
* specifies the number of columns, and <code>pData</code> points to the
|
||||
* data array.
|
||||
*
|
||||
* \par Size Checking
|
||||
* By default all of the matrix functions perform size checking on the input and
|
||||
* output matrices. For example, the matrix addition function verifies that the
|
||||
* two input matrices and the output matrix all have the same number of rows and
|
||||
* columns. If the size check fails the functions return:
|
||||
* <pre>
|
||||
* ARM_MATH_SIZE_MISMATCH
|
||||
* </pre>
|
||||
* Otherwise the functions return
|
||||
* <pre>
|
||||
* ARM_MATH_SUCCESS
|
||||
* </pre>
|
||||
* There is some overhead associated with this matrix size checking.
|
||||
* The matrix size checking is enabled via the \#define
|
||||
* <pre>
|
||||
* ARM_MATH_MATRIX_CHECK
|
||||
* </pre>
|
||||
* within the library project settings. By default this macro is defined
|
||||
* and size checking is enabled. By changing the project settings and
|
||||
* undefining this macro size checking is eliminated and the functions
|
||||
* run a bit faster. With size checking disabled the functions always
|
||||
* return <code>ARM_MATH_SUCCESS</code>.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point matrix structure.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numRows; /**< number of rows of the matrix. */
|
||||
uint16_t numCols; /**< number of columns of the matrix. */
|
||||
float32_t *pData; /**< points to the data of the matrix. */
|
||||
} arm_matrix_instance_f32;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point matrix structure.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numRows; /**< number of rows of the matrix. */
|
||||
uint16_t numCols; /**< number of columns of the matrix. */
|
||||
float64_t *pData; /**< points to the data of the matrix. */
|
||||
} arm_matrix_instance_f64;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q7 matrix structure.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numRows; /**< number of rows of the matrix. */
|
||||
uint16_t numCols; /**< number of columns of the matrix. */
|
||||
q7_t *pData; /**< points to the data of the matrix. */
|
||||
} arm_matrix_instance_q7;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q15 matrix structure.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numRows; /**< number of rows of the matrix. */
|
||||
uint16_t numCols; /**< number of columns of the matrix. */
|
||||
q15_t *pData; /**< points to the data of the matrix. */
|
||||
} arm_matrix_instance_q15;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q31 matrix structure.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numRows; /**< number of rows of the matrix. */
|
||||
uint16_t numCols; /**< number of columns of the matrix. */
|
||||
q31_t *pData; /**< points to the data of the matrix. */
|
||||
} arm_matrix_instance_q31;
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix addition.
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_add_f32(
|
||||
const arm_matrix_instance_f32 * pSrcA,
|
||||
const arm_matrix_instance_f32 * pSrcB,
|
||||
arm_matrix_instance_f32 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q15 matrix addition.
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_add_q15(
|
||||
const arm_matrix_instance_q15 * pSrcA,
|
||||
const arm_matrix_instance_q15 * pSrcB,
|
||||
arm_matrix_instance_q15 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q31 matrix addition.
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_add_q31(
|
||||
const arm_matrix_instance_q31 * pSrcA,
|
||||
const arm_matrix_instance_q31 * pSrcB,
|
||||
arm_matrix_instance_q31 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point, complex, matrix multiplication.
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_cmplx_mult_f32(
|
||||
const arm_matrix_instance_f32 * pSrcA,
|
||||
const arm_matrix_instance_f32 * pSrcB,
|
||||
arm_matrix_instance_f32 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q15, complex, matrix multiplication.
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_cmplx_mult_q15(
|
||||
const arm_matrix_instance_q15 * pSrcA,
|
||||
const arm_matrix_instance_q15 * pSrcB,
|
||||
arm_matrix_instance_q15 * pDst,
|
||||
q15_t * pScratch);
|
||||
|
||||
/**
|
||||
* @brief Q31, complex, matrix multiplication.
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_cmplx_mult_q31(
|
||||
const arm_matrix_instance_q31 * pSrcA,
|
||||
const arm_matrix_instance_q31 * pSrcB,
|
||||
arm_matrix_instance_q31 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix transpose.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
|
||||
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_trans_f32(
|
||||
const arm_matrix_instance_f32 * pSrc,
|
||||
arm_matrix_instance_f32 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix transpose.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
|
||||
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_trans_f64(
|
||||
const arm_matrix_instance_f64 * pSrc,
|
||||
arm_matrix_instance_f64 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex matrix transpose.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
|
||||
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_cmplx_trans_f32(
|
||||
const arm_matrix_instance_f32 * pSrc,
|
||||
arm_matrix_instance_f32 * pDst);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 matrix transpose.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
|
||||
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_trans_q15(
|
||||
const arm_matrix_instance_q15 * pSrc,
|
||||
arm_matrix_instance_q15 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q15 complex matrix transpose.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
|
||||
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_cmplx_trans_q15(
|
||||
const arm_matrix_instance_q15 * pSrc,
|
||||
arm_matrix_instance_q15 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q7 matrix transpose.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
|
||||
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_trans_q7(
|
||||
const arm_matrix_instance_q7 * pSrc,
|
||||
arm_matrix_instance_q7 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q31 matrix transpose.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
|
||||
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_trans_q31(
|
||||
const arm_matrix_instance_q31 * pSrc,
|
||||
arm_matrix_instance_q31 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q31 complex matrix transpose.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
|
||||
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_cmplx_trans_q31(
|
||||
const arm_matrix_instance_q31 * pSrc,
|
||||
arm_matrix_instance_q31 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix multiplication
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_mult_f32(
|
||||
const arm_matrix_instance_f32 * pSrcA,
|
||||
const arm_matrix_instance_f32 * pSrcB,
|
||||
arm_matrix_instance_f32 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix multiplication
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_mult_f64(
|
||||
const arm_matrix_instance_f64 * pSrcA,
|
||||
const arm_matrix_instance_f64 * pSrcB,
|
||||
arm_matrix_instance_f64 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix and vector multiplication
|
||||
* @param[in] pSrcMat points to the input matrix structure
|
||||
* @param[in] pVec points to vector
|
||||
* @param[out] pDst points to output vector
|
||||
*/
|
||||
void arm_mat_vec_mult_f32(
|
||||
const arm_matrix_instance_f32 *pSrcMat,
|
||||
const float32_t *pVec,
|
||||
float32_t *pDst);
|
||||
|
||||
/**
|
||||
* @brief Q7 matrix multiplication
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @param[in] pState points to the array for storing intermediate results
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_mult_q7(
|
||||
const arm_matrix_instance_q7 * pSrcA,
|
||||
const arm_matrix_instance_q7 * pSrcB,
|
||||
arm_matrix_instance_q7 * pDst,
|
||||
q7_t * pState);
|
||||
|
||||
/**
|
||||
* @brief Q7 matrix and vector multiplication
|
||||
* @param[in] pSrcMat points to the input matrix structure
|
||||
* @param[in] pVec points to vector
|
||||
* @param[out] pDst points to output vector
|
||||
*/
|
||||
void arm_mat_vec_mult_q7(
|
||||
const arm_matrix_instance_q7 *pSrcMat,
|
||||
const q7_t *pVec,
|
||||
q7_t *pDst);
|
||||
|
||||
/**
|
||||
* @brief Q15 matrix multiplication
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @param[in] pState points to the array for storing intermediate results
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_mult_q15(
|
||||
const arm_matrix_instance_q15 * pSrcA,
|
||||
const arm_matrix_instance_q15 * pSrcB,
|
||||
arm_matrix_instance_q15 * pDst,
|
||||
q15_t * pState);
|
||||
|
||||
/**
|
||||
* @brief Q15 matrix and vector multiplication
|
||||
* @param[in] pSrcMat points to the input matrix structure
|
||||
* @param[in] pVec points to vector
|
||||
* @param[out] pDst points to output vector
|
||||
*/
|
||||
void arm_mat_vec_mult_q15(
|
||||
const arm_matrix_instance_q15 *pSrcMat,
|
||||
const q15_t *pVec,
|
||||
q15_t *pDst);
|
||||
|
||||
/**
|
||||
* @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @param[in] pState points to the array for storing intermediate results
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_mult_fast_q15(
|
||||
const arm_matrix_instance_q15 * pSrcA,
|
||||
const arm_matrix_instance_q15 * pSrcB,
|
||||
arm_matrix_instance_q15 * pDst,
|
||||
q15_t * pState);
|
||||
|
||||
/**
|
||||
* @brief Q31 matrix multiplication
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_mult_q31(
|
||||
const arm_matrix_instance_q31 * pSrcA,
|
||||
const arm_matrix_instance_q31 * pSrcB,
|
||||
arm_matrix_instance_q31 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q31 matrix multiplication
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @param[in] pState points to the array for storing intermediate results
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_mult_opt_q31(
|
||||
const arm_matrix_instance_q31 * pSrcA,
|
||||
const arm_matrix_instance_q31 * pSrcB,
|
||||
arm_matrix_instance_q31 * pDst,
|
||||
q31_t *pState);
|
||||
|
||||
/**
|
||||
* @brief Q31 matrix and vector multiplication
|
||||
* @param[in] pSrcMat points to the input matrix structure
|
||||
* @param[in] pVec points to vector
|
||||
* @param[out] pDst points to output vector
|
||||
*/
|
||||
void arm_mat_vec_mult_q31(
|
||||
const arm_matrix_instance_q31 *pSrcMat,
|
||||
const q31_t *pVec,
|
||||
q31_t *pDst);
|
||||
|
||||
/**
|
||||
* @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_mult_fast_q31(
|
||||
const arm_matrix_instance_q31 * pSrcA,
|
||||
const arm_matrix_instance_q31 * pSrcB,
|
||||
arm_matrix_instance_q31 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix subtraction
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_sub_f32(
|
||||
const arm_matrix_instance_f32 * pSrcA,
|
||||
const arm_matrix_instance_f32 * pSrcB,
|
||||
arm_matrix_instance_f32 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix subtraction
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_sub_f64(
|
||||
const arm_matrix_instance_f64 * pSrcA,
|
||||
const arm_matrix_instance_f64 * pSrcB,
|
||||
arm_matrix_instance_f64 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q15 matrix subtraction
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_sub_q15(
|
||||
const arm_matrix_instance_q15 * pSrcA,
|
||||
const arm_matrix_instance_q15 * pSrcB,
|
||||
arm_matrix_instance_q15 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q31 matrix subtraction
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_sub_q31(
|
||||
const arm_matrix_instance_q31 * pSrcA,
|
||||
const arm_matrix_instance_q31 * pSrcB,
|
||||
arm_matrix_instance_q31 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix scaling.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[in] scale scale factor
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_scale_f32(
|
||||
const arm_matrix_instance_f32 * pSrc,
|
||||
float32_t scale,
|
||||
arm_matrix_instance_f32 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q15 matrix scaling.
|
||||
* @param[in] pSrc points to input matrix
|
||||
* @param[in] scaleFract fractional portion of the scale factor
|
||||
* @param[in] shift number of bits to shift the result by
|
||||
* @param[out] pDst points to output matrix
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_scale_q15(
|
||||
const arm_matrix_instance_q15 * pSrc,
|
||||
q15_t scaleFract,
|
||||
int32_t shift,
|
||||
arm_matrix_instance_q15 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q31 matrix scaling.
|
||||
* @param[in] pSrc points to input matrix
|
||||
* @param[in] scaleFract fractional portion of the scale factor
|
||||
* @param[in] shift number of bits to shift the result by
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_scale_q31(
|
||||
const arm_matrix_instance_q31 * pSrc,
|
||||
q31_t scaleFract,
|
||||
int32_t shift,
|
||||
arm_matrix_instance_q31 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Q31 matrix initialization.
|
||||
* @param[in,out] S points to an instance of the floating-point matrix structure.
|
||||
* @param[in] nRows number of rows in the matrix.
|
||||
* @param[in] nColumns number of columns in the matrix.
|
||||
* @param[in] pData points to the matrix data array.
|
||||
*/
|
||||
void arm_mat_init_q31(
|
||||
arm_matrix_instance_q31 * S,
|
||||
uint16_t nRows,
|
||||
uint16_t nColumns,
|
||||
q31_t * pData);
|
||||
|
||||
/**
|
||||
* @brief Q15 matrix initialization.
|
||||
* @param[in,out] S points to an instance of the floating-point matrix structure.
|
||||
* @param[in] nRows number of rows in the matrix.
|
||||
* @param[in] nColumns number of columns in the matrix.
|
||||
* @param[in] pData points to the matrix data array.
|
||||
*/
|
||||
void arm_mat_init_q15(
|
||||
arm_matrix_instance_q15 * S,
|
||||
uint16_t nRows,
|
||||
uint16_t nColumns,
|
||||
q15_t * pData);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix initialization.
|
||||
* @param[in,out] S points to an instance of the floating-point matrix structure.
|
||||
* @param[in] nRows number of rows in the matrix.
|
||||
* @param[in] nColumns number of columns in the matrix.
|
||||
* @param[in] pData points to the matrix data array.
|
||||
*/
|
||||
void arm_mat_init_f32(
|
||||
arm_matrix_instance_f32 * S,
|
||||
uint16_t nRows,
|
||||
uint16_t nColumns,
|
||||
float32_t * pData);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix inverse.
|
||||
* @param[in] src points to the instance of the input floating-point matrix structure.
|
||||
* @param[out] dst points to the instance of the output floating-point matrix structure.
|
||||
* @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
|
||||
* If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
|
||||
*/
|
||||
arm_status arm_mat_inverse_f32(
|
||||
const arm_matrix_instance_f32 * src,
|
||||
arm_matrix_instance_f32 * dst);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix inverse.
|
||||
* @param[in] src points to the instance of the input floating-point matrix structure.
|
||||
* @param[out] dst points to the instance of the output floating-point matrix structure.
|
||||
* @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
|
||||
* If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
|
||||
*/
|
||||
arm_status arm_mat_inverse_f64(
|
||||
const arm_matrix_instance_f64 * src,
|
||||
arm_matrix_instance_f64 * dst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point Cholesky decomposition of Symmetric Positive Definite Matrix.
|
||||
* @param[in] src points to the instance of the input floating-point matrix structure.
|
||||
* @param[out] dst points to the instance of the output floating-point matrix structure.
|
||||
* @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
|
||||
* If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE.
|
||||
* If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition.
|
||||
* The decomposition is returning a lower triangular matrix.
|
||||
*/
|
||||
arm_status arm_mat_cholesky_f64(
|
||||
const arm_matrix_instance_f64 * src,
|
||||
arm_matrix_instance_f64 * dst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point Cholesky decomposition of Symmetric Positive Definite Matrix.
|
||||
* @param[in] src points to the instance of the input floating-point matrix structure.
|
||||
* @param[out] dst points to the instance of the output floating-point matrix structure.
|
||||
* @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
|
||||
* If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE.
|
||||
* If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition.
|
||||
* The decomposition is returning a lower triangular matrix.
|
||||
*/
|
||||
arm_status arm_mat_cholesky_f32(
|
||||
const arm_matrix_instance_f32 * src,
|
||||
arm_matrix_instance_f32 * dst);
|
||||
|
||||
/**
|
||||
* @brief Solve UT . X = A where UT is an upper triangular matrix
|
||||
* @param[in] ut The upper triangular matrix
|
||||
* @param[in] a The matrix a
|
||||
* @param[out] dst The solution X of UT . X = A
|
||||
* @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
|
||||
*/
|
||||
arm_status arm_mat_solve_upper_triangular_f32(
|
||||
const arm_matrix_instance_f32 * ut,
|
||||
const arm_matrix_instance_f32 * a,
|
||||
arm_matrix_instance_f32 * dst);
|
||||
|
||||
/**
|
||||
* @brief Solve LT . X = A where LT is a lower triangular matrix
|
||||
* @param[in] lt The lower triangular matrix
|
||||
* @param[in] a The matrix a
|
||||
* @param[out] dst The solution X of LT . X = A
|
||||
* @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
|
||||
*/
|
||||
arm_status arm_mat_solve_lower_triangular_f32(
|
||||
const arm_matrix_instance_f32 * lt,
|
||||
const arm_matrix_instance_f32 * a,
|
||||
arm_matrix_instance_f32 * dst);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Solve UT . X = A where UT is an upper triangular matrix
|
||||
* @param[in] ut The upper triangular matrix
|
||||
* @param[in] a The matrix a
|
||||
* @param[out] dst The solution X of UT . X = A
|
||||
* @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
|
||||
*/
|
||||
arm_status arm_mat_solve_upper_triangular_f64(
|
||||
const arm_matrix_instance_f64 * ut,
|
||||
const arm_matrix_instance_f64 * a,
|
||||
arm_matrix_instance_f64 * dst);
|
||||
|
||||
/**
|
||||
* @brief Solve LT . X = A where LT is a lower triangular matrix
|
||||
* @param[in] lt The lower triangular matrix
|
||||
* @param[in] a The matrix a
|
||||
* @param[out] dst The solution X of LT . X = A
|
||||
* @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
|
||||
*/
|
||||
arm_status arm_mat_solve_lower_triangular_f64(
|
||||
const arm_matrix_instance_f64 * lt,
|
||||
const arm_matrix_instance_f64 * a,
|
||||
arm_matrix_instance_f64 * dst);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point LDL decomposition of Symmetric Positive Semi-Definite Matrix.
|
||||
* @param[in] src points to the instance of the input floating-point matrix structure.
|
||||
* @param[out] l points to the instance of the output floating-point triangular matrix structure.
|
||||
* @param[out] d points to the instance of the output floating-point diagonal matrix structure.
|
||||
* @param[out] p points to the instance of the output floating-point permutation vector.
|
||||
* @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
|
||||
* If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE.
|
||||
* The decomposition is returning a lower triangular matrix.
|
||||
*/
|
||||
arm_status arm_mat_ldlt_f32(
|
||||
const arm_matrix_instance_f32 * src,
|
||||
arm_matrix_instance_f32 * l,
|
||||
arm_matrix_instance_f32 * d,
|
||||
uint16_t * pp);
|
||||
|
||||
/**
|
||||
* @brief Floating-point LDL decomposition of Symmetric Positive Semi-Definite Matrix.
|
||||
* @param[in] src points to the instance of the input floating-point matrix structure.
|
||||
* @param[out] l points to the instance of the output floating-point triangular matrix structure.
|
||||
* @param[out] d points to the instance of the output floating-point diagonal matrix structure.
|
||||
* @param[out] p points to the instance of the output floating-point permutation vector.
|
||||
* @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
|
||||
* If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE.
|
||||
* The decomposition is returning a lower triangular matrix.
|
||||
*/
|
||||
arm_status arm_mat_ldlt_f64(
|
||||
const arm_matrix_instance_f64 * src,
|
||||
arm_matrix_instance_f64 * l,
|
||||
arm_matrix_instance_f64 * d,
|
||||
uint16_t * pp);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _MATRIX_FUNCTIONS_H_ */
|
||||
221
libraries/cmsis/cm4/core_support/dsp/matrix_functions_f16.h
Normal file
221
libraries/cmsis/cm4/core_support/dsp/matrix_functions_f16.h
Normal file
@@ -0,0 +1,221 @@
|
||||
/******************************************************************************
|
||||
* @file matrix_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _MATRIX_FUNCTIONS_F16_H_
|
||||
#define _MATRIX_FUNCTIONS_F16_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point matrix structure.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t numRows; /**< number of rows of the matrix. */
|
||||
uint16_t numCols; /**< number of columns of the matrix. */
|
||||
float16_t *pData; /**< points to the data of the matrix. */
|
||||
} arm_matrix_instance_f16;
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix addition.
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_add_f16(
|
||||
const arm_matrix_instance_f16 * pSrcA,
|
||||
const arm_matrix_instance_f16 * pSrcB,
|
||||
arm_matrix_instance_f16 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point, complex, matrix multiplication.
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_cmplx_mult_f16(
|
||||
const arm_matrix_instance_f16 * pSrcA,
|
||||
const arm_matrix_instance_f16 * pSrcB,
|
||||
arm_matrix_instance_f16 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix transpose.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
|
||||
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_trans_f16(
|
||||
const arm_matrix_instance_f16 * pSrc,
|
||||
arm_matrix_instance_f16 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex matrix transpose.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
|
||||
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_cmplx_trans_f16(
|
||||
const arm_matrix_instance_f16 * pSrc,
|
||||
arm_matrix_instance_f16 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix multiplication
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_mult_f16(
|
||||
const arm_matrix_instance_f16 * pSrcA,
|
||||
const arm_matrix_instance_f16 * pSrcB,
|
||||
arm_matrix_instance_f16 * pDst);
|
||||
/**
|
||||
* @brief Floating-point matrix and vector multiplication
|
||||
* @param[in] pSrcMat points to the input matrix structure
|
||||
* @param[in] pVec points to vector
|
||||
* @param[out] pDst points to output vector
|
||||
*/
|
||||
void arm_mat_vec_mult_f16(
|
||||
const arm_matrix_instance_f16 *pSrcMat,
|
||||
const float16_t *pVec,
|
||||
float16_t *pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix subtraction
|
||||
* @param[in] pSrcA points to the first input matrix structure
|
||||
* @param[in] pSrcB points to the second input matrix structure
|
||||
* @param[out] pDst points to output matrix structure
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_sub_f16(
|
||||
const arm_matrix_instance_f16 * pSrcA,
|
||||
const arm_matrix_instance_f16 * pSrcB,
|
||||
arm_matrix_instance_f16 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix scaling.
|
||||
* @param[in] pSrc points to the input matrix
|
||||
* @param[in] scale scale factor
|
||||
* @param[out] pDst points to the output matrix
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*/
|
||||
arm_status arm_mat_scale_f16(
|
||||
const arm_matrix_instance_f16 * pSrc,
|
||||
float16_t scale,
|
||||
arm_matrix_instance_f16 * pDst);
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix initialization.
|
||||
* @param[in,out] S points to an instance of the floating-point matrix structure.
|
||||
* @param[in] nRows number of rows in the matrix.
|
||||
* @param[in] nColumns number of columns in the matrix.
|
||||
* @param[in] pData points to the matrix data array.
|
||||
*/
|
||||
void arm_mat_init_f16(
|
||||
arm_matrix_instance_f16 * S,
|
||||
uint16_t nRows,
|
||||
uint16_t nColumns,
|
||||
float16_t * pData);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point matrix inverse.
|
||||
* @param[in] src points to the instance of the input floating-point matrix structure.
|
||||
* @param[out] dst points to the instance of the output floating-point matrix structure.
|
||||
* @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
|
||||
* If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
|
||||
*/
|
||||
arm_status arm_mat_inverse_f16(
|
||||
const arm_matrix_instance_f16 * src,
|
||||
arm_matrix_instance_f16 * dst);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point Cholesky decomposition of Symmetric Positive Definite Matrix.
|
||||
* @param[in] src points to the instance of the input floating-point matrix structure.
|
||||
* @param[out] dst points to the instance of the output floating-point matrix structure.
|
||||
* @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
|
||||
* If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE.
|
||||
* If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition.
|
||||
* The decomposition is returning a lower triangular matrix.
|
||||
*/
|
||||
arm_status arm_mat_cholesky_f16(
|
||||
const arm_matrix_instance_f16 * src,
|
||||
arm_matrix_instance_f16 * dst);
|
||||
|
||||
/**
|
||||
* @brief Solve UT . X = A where UT is an upper triangular matrix
|
||||
* @param[in] ut The upper triangular matrix
|
||||
* @param[in] a The matrix a
|
||||
* @param[out] dst The solution X of UT . X = A
|
||||
* @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
|
||||
*/
|
||||
arm_status arm_mat_solve_upper_triangular_f16(
|
||||
const arm_matrix_instance_f16 * ut,
|
||||
const arm_matrix_instance_f16 * a,
|
||||
arm_matrix_instance_f16 * dst);
|
||||
|
||||
/**
|
||||
* @brief Solve LT . X = A where LT is a lower triangular matrix
|
||||
* @param[in] lt The lower triangular matrix
|
||||
* @param[in] a The matrix a
|
||||
* @param[out] dst The solution X of LT . X = A
|
||||
* @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
|
||||
*/
|
||||
arm_status arm_mat_solve_lower_triangular_f16(
|
||||
const arm_matrix_instance_f16 * lt,
|
||||
const arm_matrix_instance_f16 * a,
|
||||
arm_matrix_instance_f16 * dst);
|
||||
|
||||
|
||||
|
||||
#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _MATRIX_FUNCTIONS_F16_H_ */
|
||||
576
libraries/cmsis/cm4/core_support/dsp/none.h
Normal file
576
libraries/cmsis/cm4/core_support/dsp/none.h
Normal file
@@ -0,0 +1,576 @@
|
||||
/******************************************************************************
|
||||
* @file none.h
|
||||
* @brief Intrinsincs when no DSP extension available
|
||||
* @version V1.9.0
|
||||
* @date 20. July 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
|
||||
Definitions in this file are allowing to reuse some versions of the
|
||||
CMSIS-DSP to build on a core (M0 for instance) or a host where
|
||||
DSP extension are not available.
|
||||
|
||||
Ideally a pure C version should have been used instead.
|
||||
But those are not always available or use a restricted set
|
||||
of intrinsics.
|
||||
|
||||
*/
|
||||
|
||||
#ifndef _NONE_H_
|
||||
#define _NONE_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*
|
||||
|
||||
Normally those kind of definitions are in a compiler file
|
||||
in Core or Core_A.
|
||||
|
||||
But for MSVC compiler it is a bit special. The goal is very specific
|
||||
to CMSIS-DSP and only to allow the use of this library from other
|
||||
systems like Python or Matlab.
|
||||
|
||||
MSVC is not going to be used to cross-compile to ARM. So, having a MSVC
|
||||
compiler file in Core or Core_A would not make sense.
|
||||
|
||||
*/
|
||||
#if defined ( _MSC_VER ) || defined(__GNUC_PYTHON__) || defined(__APPLE_CC__)
|
||||
__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data)
|
||||
{
|
||||
if (data == 0U) { return 32U; }
|
||||
|
||||
uint32_t count = 0U;
|
||||
uint32_t mask = 0x80000000U;
|
||||
|
||||
while ((data & mask) == 0U)
|
||||
{
|
||||
count += 1U;
|
||||
mask = mask >> 1U;
|
||||
}
|
||||
return count;
|
||||
}
|
||||
|
||||
__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if ((sat >= 1U) && (sat <= 32U))
|
||||
{
|
||||
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
|
||||
const int32_t min = -1 - max ;
|
||||
if (val > max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < min)
|
||||
{
|
||||
return min;
|
||||
}
|
||||
}
|
||||
return val;
|
||||
}
|
||||
|
||||
__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if (sat <= 31U)
|
||||
{
|
||||
const uint32_t max = ((1U << sat) - 1U);
|
||||
if (val > (int32_t)max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < 0)
|
||||
{
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
return (uint32_t)val;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Rotate Right in unsigned value (32 bit)
|
||||
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
|
||||
\param [in] op1 Value to rotate
|
||||
\param [in] op2 Number of Bits to rotate
|
||||
\return Rotated value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
|
||||
{
|
||||
op2 %= 32U;
|
||||
if (op2 == 0U)
|
||||
{
|
||||
return op1;
|
||||
}
|
||||
return (op1 >> op2) | (op1 << (32U - op2));
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Clips Q63 to Q31 values.
|
||||
*/
|
||||
__STATIC_FORCEINLINE q31_t clip_q63_to_q31(
|
||||
q63_t x)
|
||||
{
|
||||
return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
|
||||
((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clips Q63 to Q15 values.
|
||||
*/
|
||||
__STATIC_FORCEINLINE q15_t clip_q63_to_q15(
|
||||
q63_t x)
|
||||
{
|
||||
return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
|
||||
((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clips Q31 to Q7 values.
|
||||
*/
|
||||
__STATIC_FORCEINLINE q7_t clip_q31_to_q7(
|
||||
q31_t x)
|
||||
{
|
||||
return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
|
||||
((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clips Q31 to Q15 values.
|
||||
*/
|
||||
__STATIC_FORCEINLINE q15_t clip_q31_to_q15(
|
||||
q31_t x)
|
||||
{
|
||||
return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
|
||||
((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
|
||||
*/
|
||||
__STATIC_FORCEINLINE q63_t mult32x64(
|
||||
q63_t x,
|
||||
q31_t y)
|
||||
{
|
||||
return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
|
||||
(((q63_t) (x >> 32) * y) ) );
|
||||
}
|
||||
|
||||
/* SMMLAR */
|
||||
#define multAcc_32x32_keep32_R(a, x, y) \
|
||||
a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)
|
||||
|
||||
/* SMMLSR */
|
||||
#define multSub_32x32_keep32_R(a, x, y) \
|
||||
a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
|
||||
|
||||
/* SMMULR */
|
||||
#define mult_32x32_keep32_R(a, x, y) \
|
||||
a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)
|
||||
|
||||
/* SMMLA */
|
||||
#define multAcc_32x32_keep32(a, x, y) \
|
||||
a += (q31_t) (((q63_t) x * y) >> 32)
|
||||
|
||||
/* SMMLS */
|
||||
#define multSub_32x32_keep32(a, x, y) \
|
||||
a -= (q31_t) (((q63_t) x * y) >> 32)
|
||||
|
||||
/* SMMUL */
|
||||
#define mult_32x32_keep32(a, x, y) \
|
||||
a = (q31_t) (((q63_t) x * y ) >> 32)
|
||||
|
||||
#ifndef ARM_MATH_DSP
|
||||
/**
|
||||
* @brief definition to pack two 16 bit values.
|
||||
*/
|
||||
#define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \
|
||||
(((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) )
|
||||
#define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \
|
||||
(((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief definition to pack four 8 bit values.
|
||||
*/
|
||||
#ifndef ARM_MATH_BIG_ENDIAN
|
||||
#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \
|
||||
(((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \
|
||||
(((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
|
||||
(((int32_t)(v3) << 24) & (int32_t)0xFF000000) )
|
||||
#else
|
||||
#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \
|
||||
(((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \
|
||||
(((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
|
||||
(((int32_t)(v0) << 24) & (int32_t)0xFF000000) )
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined intrinsic functions
|
||||
*/
|
||||
#if !defined (ARM_MATH_DSP)
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined QADD8
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __QADD8(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
q31_t r, s, t, u;
|
||||
|
||||
r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
|
||||
s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
|
||||
t = __SSAT(((((q31_t)x << 8) >> 24) + (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF;
|
||||
u = __SSAT(((((q31_t)x ) >> 24) + (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF;
|
||||
|
||||
return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r )));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined QSUB8
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __QSUB8(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
q31_t r, s, t, u;
|
||||
|
||||
r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
|
||||
s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
|
||||
t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF;
|
||||
u = __SSAT(((((q31_t)x ) >> 24) - (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF;
|
||||
|
||||
return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r )));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined QADD16
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __QADD16(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
/* q31_t r, s; without initialisation 'arm_offset_q15 test' fails but 'intrinsic' tests pass! for armCC */
|
||||
q31_t r = 0, s = 0;
|
||||
|
||||
r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
|
||||
s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
|
||||
|
||||
return ((uint32_t)((s << 16) | (r )));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SHADD16
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SHADD16(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
q31_t r, s;
|
||||
|
||||
r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
|
||||
s = (((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
|
||||
|
||||
return ((uint32_t)((s << 16) | (r )));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined QSUB16
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __QSUB16(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
q31_t r, s;
|
||||
|
||||
r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
|
||||
s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
|
||||
|
||||
return ((uint32_t)((s << 16) | (r )));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SHSUB16
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SHSUB16(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
q31_t r, s;
|
||||
|
||||
r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
|
||||
s = (((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
|
||||
|
||||
return ((uint32_t)((s << 16) | (r )));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined QASX
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __QASX(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
q31_t r, s;
|
||||
|
||||
r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
|
||||
s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
|
||||
|
||||
return ((uint32_t)((s << 16) | (r )));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SHASX
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SHASX(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
q31_t r, s;
|
||||
|
||||
r = (((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
|
||||
s = (((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
|
||||
|
||||
return ((uint32_t)((s << 16) | (r )));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined QSAX
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __QSAX(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
q31_t r, s;
|
||||
|
||||
r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
|
||||
s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
|
||||
|
||||
return ((uint32_t)((s << 16) | (r )));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SHSAX
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SHSAX(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
q31_t r, s;
|
||||
|
||||
r = (((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
|
||||
s = (((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
|
||||
|
||||
return ((uint32_t)((s << 16) | (r )));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SMUSDX
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SMUSDX(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) -
|
||||
((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) ));
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief C custom defined SMUADX
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SMUADX(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
|
||||
((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) ));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined QADD
|
||||
*/
|
||||
__STATIC_FORCEINLINE int32_t __QADD(
|
||||
int32_t x,
|
||||
int32_t y)
|
||||
{
|
||||
return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y)));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined QSUB
|
||||
*/
|
||||
__STATIC_FORCEINLINE int32_t __QSUB(
|
||||
int32_t x,
|
||||
int32_t y)
|
||||
{
|
||||
return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y)));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SMLAD
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SMLAD(
|
||||
uint32_t x,
|
||||
uint32_t y,
|
||||
uint32_t sum)
|
||||
{
|
||||
return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
|
||||
((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) +
|
||||
( ((q31_t)sum ) ) ));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SMLADX
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SMLADX(
|
||||
uint32_t x,
|
||||
uint32_t y,
|
||||
uint32_t sum)
|
||||
{
|
||||
return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
|
||||
((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
|
||||
( ((q31_t)sum ) ) ));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SMLSDX
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SMLSDX(
|
||||
uint32_t x,
|
||||
uint32_t y,
|
||||
uint32_t sum)
|
||||
{
|
||||
return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) -
|
||||
((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
|
||||
( ((q31_t)sum ) ) ));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SMLALD
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint64_t __SMLALD(
|
||||
uint32_t x,
|
||||
uint32_t y,
|
||||
uint64_t sum)
|
||||
{
|
||||
/* return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */
|
||||
return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
|
||||
((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) +
|
||||
( ((q63_t)sum ) ) ));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SMLALDX
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint64_t __SMLALDX(
|
||||
uint32_t x,
|
||||
uint32_t y,
|
||||
uint64_t sum)
|
||||
{
|
||||
/* return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */
|
||||
return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
|
||||
((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
|
||||
( ((q63_t)sum ) ) ));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SMUAD
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SMUAD(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
|
||||
((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) ));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SMUSD
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SMUSD(
|
||||
uint32_t x,
|
||||
uint32_t y)
|
||||
{
|
||||
return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) -
|
||||
((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) ));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @brief C custom defined SXTB16
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __SXTB16(
|
||||
uint32_t x)
|
||||
{
|
||||
return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |
|
||||
((((q31_t)x << 8) >> 8) & (q31_t)0xFFFF0000) ));
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief C custom defined SMMLA
|
||||
*/
|
||||
__STATIC_FORCEINLINE int32_t __SMMLA(
|
||||
int32_t x,
|
||||
int32_t y,
|
||||
int32_t sum)
|
||||
{
|
||||
return (sum + (int32_t) (((int64_t) x * y) >> 32));
|
||||
}
|
||||
|
||||
#endif /* !defined (ARM_MATH_DSP) */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _TRANSFORM_FUNCTIONS_H_ */
|
||||
159
libraries/cmsis/cm4/core_support/dsp/quaternion_math_functions.h
Normal file
159
libraries/cmsis/cm4/core_support/dsp/quaternion_math_functions.h
Normal file
@@ -0,0 +1,159 @@
|
||||
/******************************************************************************
|
||||
* @file quaternion_math_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _QUATERNION_MATH_FUNCTIONS_H_
|
||||
#define _QUATERNION_MATH_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup groupQuaternionMath Quaternion Math Functions
|
||||
* Functions to operates on quaternions and convert between a
|
||||
* rotation and quaternion representation.
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
@brief Floating-point quaternion Norm.
|
||||
@param[in] pInputQuaternions points to the input vector of quaternions
|
||||
@param[out] pNorms points to the output vector of norms
|
||||
@param[in] nbQuaternions number of quaternions in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
|
||||
|
||||
void arm_quaternion_norm_f32(const float32_t *pInputQuaternions,
|
||||
float32_t *pNorms,
|
||||
uint32_t nbQuaternions);
|
||||
|
||||
|
||||
/**
|
||||
@brief Floating-point quaternion inverse.
|
||||
@param[in] pInputQuaternions points to the input vector of quaternions
|
||||
@param[out] pInverseQuaternions points to the output vector of inverse quaternions
|
||||
@param[in] nbQuaternions number of quaternions in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_quaternion_inverse_f32(const float32_t *pInputQuaternions,
|
||||
float32_t *pInverseQuaternions,
|
||||
uint32_t nbQuaternions);
|
||||
|
||||
/**
|
||||
@brief Floating-point quaternion conjugates.
|
||||
@param[in] pInputQuaternions points to the input vector of quaternions
|
||||
@param[out] pConjugateQuaternions points to the output vector of conjugate quaternions
|
||||
@param[in] nbQuaternions number of quaternions in each vector
|
||||
@return none
|
||||
*/
|
||||
void arm_quaternion_conjugate_f32(const float32_t *inputQuaternions,
|
||||
float32_t *pConjugateQuaternions,
|
||||
uint32_t nbQuaternions);
|
||||
|
||||
/**
|
||||
@brief Floating-point normalization of quaternions.
|
||||
@param[in] pInputQuaternions points to the input vector of quaternions
|
||||
@param[out] pNormalizedQuaternions points to the output vector of normalized quaternions
|
||||
@param[in] nbQuaternions number of quaternions in each vector
|
||||
@return none
|
||||
*/
|
||||
void arm_quaternion_normalize_f32(const float32_t *inputQuaternions,
|
||||
float32_t *pNormalizedQuaternions,
|
||||
uint32_t nbQuaternions);
|
||||
|
||||
|
||||
/**
|
||||
@brief Floating-point product of two quaternions.
|
||||
@param[in] qa First quaternion
|
||||
@param[in] qb Second quaternion
|
||||
@param[out] r Product of two quaternions
|
||||
@return none
|
||||
*/
|
||||
void arm_quaternion_product_single_f32(const float32_t *qa,
|
||||
const float32_t *qb,
|
||||
float32_t *r);
|
||||
|
||||
/**
|
||||
@brief Floating-point elementwise product two quaternions.
|
||||
@param[in] qa First array of quaternions
|
||||
@param[in] qb Second array of quaternions
|
||||
@param[out] r Elementwise product of quaternions
|
||||
@param[in] nbQuaternions Number of quaternions in the array
|
||||
@return none
|
||||
*/
|
||||
void arm_quaternion_product_f32(const float32_t *qa,
|
||||
const float32_t *qb,
|
||||
float32_t *r,
|
||||
uint32_t nbQuaternions);
|
||||
|
||||
/**
|
||||
* @brief Conversion of quaternion to equivalent rotation matrix.
|
||||
* @param[in] pInputQuaternions points to an array of normalized quaternions
|
||||
* @param[out] pOutputRotations points to an array of 3x3 rotations (in row order)
|
||||
* @param[in] nbQuaternions in the array
|
||||
* @return none.
|
||||
*
|
||||
* <b>Format of rotation matrix</b>
|
||||
* \par
|
||||
* The quaternion a + ib + jc + kd is converted into rotation matrix:
|
||||
* a^2 + b^2 - c^2 - d^2 2bc - 2ad 2bd + 2ac
|
||||
* 2bc + 2ad a^2 - b^2 + c^2 - d^2 2cd - 2ab
|
||||
* 2bd - 2ac 2cd + 2ab a^2 - b^2 - c^2 + d^2
|
||||
*
|
||||
* Rotation matrix is saved in row order : R00 R01 R02 R10 R11 R12 R20 R21 R22
|
||||
*/
|
||||
void arm_quaternion2rotation_f32(const float32_t *pInputQuaternions,
|
||||
float32_t *pOutputRotations,
|
||||
uint32_t nbQuaternions);
|
||||
|
||||
/**
|
||||
* @brief Conversion of a rotation matrix to equivalent quaternion.
|
||||
* @param[in] pInputRotations points to an array 3x3 rotation matrix (in row order)
|
||||
* @param[out] pOutputQuaternions points to an array of quaternions
|
||||
* @param[in] nbQuaternions in the array
|
||||
* @return none.
|
||||
*/
|
||||
void arm_rotation2quaternion_f32(const float32_t *pInputRotations,
|
||||
float32_t *pOutputQuaternions,
|
||||
uint32_t nbQuaternions);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _QUATERNION_MATH_FUNCTIONS_H_ */
|
||||
977
libraries/cmsis/cm4/core_support/dsp/statistics_functions.h
Normal file
977
libraries/cmsis/cm4/core_support/dsp/statistics_functions.h
Normal file
@@ -0,0 +1,977 @@
|
||||
/******************************************************************************
|
||||
* @file statistics_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _STATISTICS_FUNCTIONS_H_
|
||||
#define _STATISTICS_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
#include "dsp/fast_math_functions.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @defgroup groupStats Statistics Functions
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Computation of the LogSumExp
|
||||
*
|
||||
* In probabilistic computations, the dynamic of the probability values can be very
|
||||
* wide because they come from gaussian functions.
|
||||
* To avoid underflow and overflow issues, the values are represented by their log.
|
||||
* In this representation, multiplying the original exp values is easy : their logs are added.
|
||||
* But adding the original exp values is requiring some special handling and it is the
|
||||
* goal of the LogSumExp function.
|
||||
*
|
||||
* If the values are x1...xn, the function is computing:
|
||||
*
|
||||
* ln(exp(x1) + ... + exp(xn)) and the computation is done in such a way that
|
||||
* rounding issues are minimised.
|
||||
*
|
||||
* The max xm of the values is extracted and the function is computing:
|
||||
* xm + ln(exp(x1 - xm) + ... + exp(xn - xm))
|
||||
*
|
||||
* @param[in] *in Pointer to an array of input values.
|
||||
* @param[in] blockSize Number of samples in the input array.
|
||||
* @return LogSumExp
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Dot product with log arithmetic
|
||||
*
|
||||
* Vectors are containing the log of the samples
|
||||
*
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[in] pTmpBuffer temporary buffer of length blockSize
|
||||
* @return The log of the dot product .
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
float32_t arm_logsumexp_dot_prod_f32(const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float32_t *pTmpBuffer);
|
||||
|
||||
/**
|
||||
* @brief Entropy
|
||||
*
|
||||
* @param[in] pSrcA Array of input values.
|
||||
* @param[in] blockSize Number of samples in the input array.
|
||||
* @return Entropy -Sum(p ln p)
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Entropy
|
||||
*
|
||||
* @param[in] pSrcA Array of input values.
|
||||
* @param[in] blockSize Number of samples in the input array.
|
||||
* @return Entropy -Sum(p ln p)
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
float64_t arm_entropy_f64(const float64_t * pSrcA, uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Kullback-Leibler
|
||||
*
|
||||
* @param[in] pSrcA Pointer to an array of input values for probability distribution A.
|
||||
* @param[in] pSrcB Pointer to an array of input values for probability distribution B.
|
||||
* @param[in] blockSize Number of samples in the input array.
|
||||
* @return Kullback-Leibler Divergence D(A || B)
|
||||
*
|
||||
*/
|
||||
float32_t arm_kullback_leibler_f32(const float32_t * pSrcA
|
||||
,const float32_t * pSrcB
|
||||
,uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Kullback-Leibler
|
||||
*
|
||||
* @param[in] pSrcA Pointer to an array of input values for probability distribution A.
|
||||
* @param[in] pSrcB Pointer to an array of input values for probability distribution B.
|
||||
* @param[in] blockSize Number of samples in the input array.
|
||||
* @return Kullback-Leibler Divergence D(A || B)
|
||||
*
|
||||
*/
|
||||
float64_t arm_kullback_leibler_f64(const float64_t * pSrcA,
|
||||
const float64_t * pSrcB,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sum of the squares of the elements of a Q31 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_power_q31(
|
||||
const q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q63_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sum of the squares of the elements of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_power_f32(
|
||||
const float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sum of the squares of the elements of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_power_f64(
|
||||
const float64_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sum of the squares of the elements of a Q15 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_power_q15(
|
||||
const q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q63_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sum of the squares of the elements of a Q7 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_power_q7(
|
||||
const q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Mean value of a Q7 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_mean_q7(
|
||||
const q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Mean value of a Q15 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_mean_q15(
|
||||
const q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Mean value of a Q31 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_mean_q31(
|
||||
const q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Mean value of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_mean_f32(
|
||||
const float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Mean value of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_mean_f64(
|
||||
const float64_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Variance of the elements of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_var_f32(
|
||||
const float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Variance of the elements of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_var_f64(
|
||||
const float64_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Variance of the elements of a Q31 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_var_q31(
|
||||
const q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Variance of the elements of a Q15 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_var_q15(
|
||||
const q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Root Mean Square of the elements of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_rms_f32(
|
||||
const float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Root Mean Square of the elements of a Q31 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_rms_q31(
|
||||
const q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Root Mean Square of the elements of a Q15 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_rms_q15(
|
||||
const q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Standard deviation of the elements of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_std_f32(
|
||||
const float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Standard deviation of the elements of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_std_f64(
|
||||
const float64_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Standard deviation of the elements of a Q31 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_std_q31(
|
||||
const q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Standard deviation of the elements of a Q15 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_std_q15(
|
||||
const q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Minimum value of a Q7 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] result is output pointer
|
||||
* @param[in] index is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_min_q7(
|
||||
const q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t * result,
|
||||
uint32_t * index);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a Q7 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] result is output pointer
|
||||
* @param[in] index is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_absmin_q7(
|
||||
const q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t * result,
|
||||
uint32_t * index);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a Q7 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] result is output pointer
|
||||
*/
|
||||
void arm_absmin_no_idx_q7(
|
||||
const q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t * result);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Minimum value of a Q15 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
* @param[in] pIndex is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_min_q15(
|
||||
const q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a Q15 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
* @param[in] pIndex is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_absmin_q15(
|
||||
const q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a Q15 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
*/
|
||||
void arm_absmin_no_idx_q15(
|
||||
const q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Minimum value of a Q31 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
* @param[out] pIndex is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_min_q31(
|
||||
const q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a Q31 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
* @param[out] pIndex is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_absmin_q31(
|
||||
const q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a Q31 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
*/
|
||||
void arm_absmin_no_idx_q31(
|
||||
const q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Minimum value of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
* @param[out] pIndex is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_min_f32(
|
||||
const float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
* @param[out] pIndex is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_absmin_f32(
|
||||
const float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
*/
|
||||
void arm_absmin_no_idx_f32(
|
||||
const float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Minimum value of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
* @param[out] pIndex is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_min_f64(
|
||||
const float64_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
* @param[out] pIndex is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_absmin_f64(
|
||||
const float64_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
*/
|
||||
void arm_absmin_no_idx_f64(
|
||||
const float64_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Maximum value of a Q7 vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_max_q7(
|
||||
const q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of absolute values of a Q7 vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_absmax_q7(
|
||||
const q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of absolute values of a Q7 vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
*/
|
||||
void arm_absmax_no_idx_q7(
|
||||
const q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Maximum value of a Q15 vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_max_q15(
|
||||
const q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of absolute values of a Q15 vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_absmax_q15(
|
||||
const q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of absolute values of a Q15 vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
*/
|
||||
void arm_absmax_no_idx_q15(
|
||||
const q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of a Q31 vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_max_q31(
|
||||
const q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of absolute values of a Q31 vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_absmax_q31(
|
||||
const q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of absolute values of a Q31 vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
*/
|
||||
void arm_absmax_no_idx_q31(
|
||||
const q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of a floating-point vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_max_f32(
|
||||
const float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of absolute values of a floating-point vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_absmax_f32(
|
||||
const float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of absolute values of a floating-point vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
*/
|
||||
void arm_absmax_no_idx_f32(
|
||||
const float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of a floating-point vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_max_f64(
|
||||
const float64_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of absolute values of a floating-point vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_absmax_f64(
|
||||
const float64_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of absolute values of a floating-point vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
*/
|
||||
void arm_absmax_no_idx_f64(
|
||||
const float64_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t * pResult);
|
||||
|
||||
/**
|
||||
@brief Maximum value of a floating-point vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult maximum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_max_no_idx_f32(
|
||||
const float32_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Minimum value of a floating-point vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult minimum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_min_no_idx_f32(
|
||||
const float32_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Maximum value of a floating-point vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult maximum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_max_no_idx_f64(
|
||||
const float64_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Maximum value of a q31 vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult maximum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_max_no_idx_q31(
|
||||
const q31_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Maximum value of a q15 vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult maximum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_max_no_idx_q15(
|
||||
const q15_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Maximum value of a q7 vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult maximum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_max_no_idx_q7(
|
||||
const q7_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Minimum value of a floating-point vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult minimum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_min_no_idx_f64(
|
||||
const float64_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
float64_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Minimum value of a q31 vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult minimum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_min_no_idx_q31(
|
||||
const q31_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Minimum value of a q15 vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult minimum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_min_no_idx_q15(
|
||||
const q15_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Minimum value of a q7 vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult minimum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_min_no_idx_q7(
|
||||
const q7_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Mean square error between two Q7 vectors.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult mean square error
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_mse_q7(
|
||||
const q7_t * pSrcA,
|
||||
const q7_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q7_t * pResult);
|
||||
|
||||
/**
|
||||
@brief Mean square error between two Q15 vectors.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult mean square error
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_mse_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult);
|
||||
|
||||
/**
|
||||
@brief Mean square error between two Q31 vectors.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult mean square error
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_mse_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult);
|
||||
|
||||
/**
|
||||
@brief Mean square error between two single precision float vectors.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult mean square error
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_mse_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult);
|
||||
|
||||
/**
|
||||
@brief Mean square error between two double precision float vectors.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult mean square error
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_mse_f64(
|
||||
const float64_t * pSrcA,
|
||||
const float64_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float64_t * pResult);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _STATISTICS_FUNCTIONS_H_ */
|
||||
266
libraries/cmsis/cm4/core_support/dsp/statistics_functions_f16.h
Normal file
266
libraries/cmsis/cm4/core_support/dsp/statistics_functions_f16.h
Normal file
@@ -0,0 +1,266 @@
|
||||
/******************************************************************************
|
||||
* @file statistics_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _STATISTICS_FUNCTIONS_F16_H_
|
||||
#define _STATISTICS_FUNCTIONS_F16_H_
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#include "dsp/basic_math_functions_f16.h"
|
||||
#include "dsp/fast_math_functions_f16.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
/**
|
||||
* @brief Sum of the squares of the elements of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_power_f16(
|
||||
const float16_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult);
|
||||
|
||||
/**
|
||||
* @brief Mean value of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_mean_f16(
|
||||
const float16_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult);
|
||||
|
||||
/**
|
||||
* @brief Variance of the elements of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_var_f16(
|
||||
const float16_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult);
|
||||
|
||||
/**
|
||||
* @brief Root Mean Square of the elements of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_rms_f16(
|
||||
const float16_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult);
|
||||
|
||||
/**
|
||||
* @brief Standard deviation of the elements of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output value.
|
||||
*/
|
||||
void arm_std_f16(
|
||||
const float16_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
* @param[out] pIndex is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_min_f16(
|
||||
const float16_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
* @param[out] pIndex is the array index of the minimum value in the input buffer.
|
||||
*/
|
||||
void arm_absmin_f16(
|
||||
const float16_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of a floating-point vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_max_f16(
|
||||
const float16_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of absolute values of a floating-point vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
* @param[out] pIndex index of maximum value returned here
|
||||
*/
|
||||
void arm_absmax_f16(
|
||||
const float16_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult,
|
||||
uint32_t * pIndex);
|
||||
|
||||
/**
|
||||
* @brief Minimum value of absolute values of a floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
* @param[out] pResult is output pointer
|
||||
*/
|
||||
void arm_absmin_no_idx_f16(
|
||||
const float16_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult);
|
||||
|
||||
/**
|
||||
* @brief Maximum value of a floating-point vector.
|
||||
* @param[in] pSrc points to the input buffer
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] pResult maximum value returned here
|
||||
*/
|
||||
void arm_absmax_no_idx_f16(
|
||||
const float16_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Entropy
|
||||
*
|
||||
* @param[in] pSrcA Array of input values.
|
||||
* @param[in] blockSize Number of samples in the input array.
|
||||
* @return Entropy -Sum(p ln p)
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
float16_t arm_entropy_f16(const float16_t * pSrcA,uint32_t blockSize);
|
||||
|
||||
float16_t arm_logsumexp_f16(const float16_t *in, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Dot product with log arithmetic
|
||||
*
|
||||
* Vectors are containing the log of the samples
|
||||
*
|
||||
* @param[in] pSrcA points to the first input vector
|
||||
* @param[in] pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[in] pTmpBuffer temporary buffer of length blockSize
|
||||
* @return The log of the dot product .
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
float16_t arm_logsumexp_dot_prod_f16(const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float16_t *pTmpBuffer);
|
||||
|
||||
/**
|
||||
* @brief Kullback-Leibler
|
||||
*
|
||||
* @param[in] pSrcA Pointer to an array of input values for probability distribution A.
|
||||
* @param[in] pSrcB Pointer to an array of input values for probability distribution B.
|
||||
* @param[in] blockSize Number of samples in the input array.
|
||||
* @return Kullback-Leibler Divergence D(A || B)
|
||||
*
|
||||
*/
|
||||
float16_t arm_kullback_leibler_f16(const float16_t * pSrcA
|
||||
,const float16_t * pSrcB
|
||||
,uint32_t blockSize);
|
||||
|
||||
/**
|
||||
@brief Maximum value of a floating-point vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult maximum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_max_no_idx_f16(
|
||||
const float16_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Minimum value of a floating-point vector.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult minimum value returned here
|
||||
@return none
|
||||
*/
|
||||
void arm_min_no_idx_f16(
|
||||
const float16_t *pSrc,
|
||||
uint32_t blockSize,
|
||||
float16_t *pResult);
|
||||
|
||||
/**
|
||||
@brief Mean square error between two half precision float vectors.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[in] blockSize number of samples in input vector
|
||||
@param[out] pResult mean square error
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_mse_f16(
|
||||
const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float16_t * pResult);
|
||||
|
||||
#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _STATISTICS_FUNCTIONS_F16_H_ */
|
||||
453
libraries/cmsis/cm4/core_support/dsp/support_functions.h
Normal file
453
libraries/cmsis/cm4/core_support/dsp/support_functions.h
Normal file
@@ -0,0 +1,453 @@
|
||||
/******************************************************************************
|
||||
* @file support_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _SUPPORT_FUNCTIONS_H_
|
||||
#define _SUPPORT_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup groupSupport Support Functions
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the floating-point vector to Q31 vector.
|
||||
* @param[in] pSrc points to the floating-point input vector
|
||||
* @param[out] pDst points to the Q31 output vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
*/
|
||||
void arm_float_to_q31(
|
||||
const float32_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the floating-point vector to Q15 vector.
|
||||
* @param[in] pSrc points to the floating-point input vector
|
||||
* @param[out] pDst points to the Q15 output vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
*/
|
||||
void arm_float_to_q15(
|
||||
const float32_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the floating-point vector to Q7 vector.
|
||||
* @param[in] pSrc points to the floating-point input vector
|
||||
* @param[out] pDst points to the Q7 output vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
*/
|
||||
void arm_float_to_q7(
|
||||
const float32_t * pSrc,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q31 vector to floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[out] pDst is output pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
*/
|
||||
void arm_q31_to_float(
|
||||
const q31_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q31 vector to Q15 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[out] pDst is output pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
*/
|
||||
void arm_q31_to_q15(
|
||||
const q31_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q31 vector to Q7 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[out] pDst is output pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
*/
|
||||
void arm_q31_to_q7(
|
||||
const q31_t * pSrc,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q15 vector to floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[out] pDst is output pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
*/
|
||||
void arm_q15_to_float(
|
||||
const q15_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q15 vector to Q31 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[out] pDst is output pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
*/
|
||||
void arm_q15_to_q31(
|
||||
const q15_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q15 vector to Q7 vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[out] pDst is output pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
*/
|
||||
void arm_q15_to_q7(
|
||||
const q15_t * pSrc,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q7 vector to floating-point vector.
|
||||
* @param[in] pSrc is input pointer
|
||||
* @param[out] pDst is output pointer
|
||||
* @param[in] blockSize is the number of samples to process
|
||||
*/
|
||||
void arm_q7_to_float(
|
||||
const q7_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q7 vector to Q31 vector.
|
||||
* @param[in] pSrc input pointer
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_q7_to_q31(
|
||||
const q7_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q7 vector to Q15 vector.
|
||||
* @param[in] pSrc input pointer
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_q7_to_q15(
|
||||
const q7_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Struct for specifying sorting algorithm
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ARM_SORT_BITONIC = 0,
|
||||
/**< Bitonic sort */
|
||||
ARM_SORT_BUBBLE = 1,
|
||||
/**< Bubble sort */
|
||||
ARM_SORT_HEAP = 2,
|
||||
/**< Heap sort */
|
||||
ARM_SORT_INSERTION = 3,
|
||||
/**< Insertion sort */
|
||||
ARM_SORT_QUICK = 4,
|
||||
/**< Quick sort */
|
||||
ARM_SORT_SELECTION = 5
|
||||
/**< Selection sort */
|
||||
} arm_sort_alg;
|
||||
|
||||
/**
|
||||
* @brief Struct for specifying sorting algorithm
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ARM_SORT_DESCENDING = 0,
|
||||
/**< Descending order (9 to 0) */
|
||||
ARM_SORT_ASCENDING = 1
|
||||
/**< Ascending order (0 to 9) */
|
||||
} arm_sort_dir;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the sorting algorithms.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
arm_sort_alg alg; /**< Sorting algorithm selected */
|
||||
arm_sort_dir dir; /**< Sorting order (direction) */
|
||||
} arm_sort_instance_f32;
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data.
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in,out] S points to an instance of the sorting structure.
|
||||
* @param[in] alg Selected algorithm.
|
||||
* @param[in] dir Sorting order.
|
||||
*/
|
||||
void arm_sort_init_f32(
|
||||
arm_sort_instance_f32 * S,
|
||||
arm_sort_alg alg,
|
||||
arm_sort_dir dir);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the sorting algorithms.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
arm_sort_dir dir; /**< Sorting order (direction) */
|
||||
float32_t * buffer; /**< Working buffer */
|
||||
} arm_merge_sort_instance_f32;
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in,out] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_merge_sort_f32(
|
||||
const arm_merge_sort_instance_f32 * S,
|
||||
float32_t *pSrc,
|
||||
float32_t *pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in,out] S points to an instance of the sorting structure.
|
||||
* @param[in] dir Sorting order.
|
||||
* @param[in] buffer Working buffer.
|
||||
*/
|
||||
void arm_merge_sort_init_f32(
|
||||
arm_merge_sort_instance_f32 * S,
|
||||
arm_sort_dir dir,
|
||||
float32_t * buffer);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Copies the elements of a floating-point vector.
|
||||
* @param[in] pSrc input pointer
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_copy_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Copies the elements of a floating-point vector.
|
||||
* @param[in] pSrc input pointer
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_copy_f64(
|
||||
const float64_t * pSrc,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Copies the elements of a Q7 vector.
|
||||
* @param[in] pSrc input pointer
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_copy_q7(
|
||||
const q7_t * pSrc,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Copies the elements of a Q15 vector.
|
||||
* @param[in] pSrc input pointer
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_copy_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Copies the elements of a Q31 vector.
|
||||
* @param[in] pSrc input pointer
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_copy_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Fills a constant value into a floating-point vector.
|
||||
* @param[in] value input value to be filled
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_fill_f32(
|
||||
float32_t value,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Fills a constant value into a floating-point vector.
|
||||
* @param[in] value input value to be filled
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_fill_f64(
|
||||
float64_t value,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Fills a constant value into a Q7 vector.
|
||||
* @param[in] value input value to be filled
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_fill_q7(
|
||||
q7_t value,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Fills a constant value into a Q15 vector.
|
||||
* @param[in] value input value to be filled
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_fill_q15(
|
||||
q15_t value,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Fills a constant value into a Q31 vector.
|
||||
* @param[in] value input value to be filled
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_fill_q31(
|
||||
q31_t value,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Weighted sum
|
||||
*
|
||||
*
|
||||
* @param[in] *in Array of input values.
|
||||
* @param[in] *weigths Weights
|
||||
* @param[in] blockSize Number of samples in the input array.
|
||||
* @return Weighted sum
|
||||
*
|
||||
*/
|
||||
float32_t arm_weighted_sum_f32(const float32_t *in
|
||||
, const float32_t *weigths
|
||||
, uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Barycenter
|
||||
*
|
||||
*
|
||||
* @param[in] in List of vectors
|
||||
* @param[in] weights Weights of the vectors
|
||||
* @param[out] out Barycenter
|
||||
* @param[in] nbVectors Number of vectors
|
||||
* @param[in] vecDim Dimension of space (vector dimension)
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void arm_barycenter_f32(const float32_t *in
|
||||
, const float32_t *weights
|
||||
, float32_t *out
|
||||
, uint32_t nbVectors
|
||||
, uint32_t vecDim);
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _SUPPORT_FUNCTIONS_H_ */
|
||||
187
libraries/cmsis/cm4/core_support/dsp/support_functions_f16.h
Normal file
187
libraries/cmsis/cm4/core_support/dsp/support_functions_f16.h
Normal file
@@ -0,0 +1,187 @@
|
||||
/******************************************************************************
|
||||
* @file support_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _SUPPORT_FUNCTIONS_F16_H_
|
||||
#define _SUPPORT_FUNCTIONS_F16_H_
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
/**
|
||||
* @brief Copies the elements of a floating-point vector.
|
||||
* @param[in] pSrc input pointer
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_copy_f16(const float16_t * pSrc, float16_t * pDst, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Fills a constant value into a floating-point vector.
|
||||
* @param[in] value input value to be filled
|
||||
* @param[out] pDst output pointer
|
||||
* @param[in] blockSize number of samples to process
|
||||
*/
|
||||
void arm_fill_f16(float16_t value, float16_t * pDst, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the floating-point vector to Q31 vector.
|
||||
* @param[in] pSrc points to the f16 input vector
|
||||
* @param[out] pDst points to the q15 output vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
*/
|
||||
void arm_f16_to_q15(const float16_t * pSrc, q15_t * pDst, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the floating-point vector to Q31 vector.
|
||||
* @param[in] pSrc points to the q15 input vector
|
||||
* @param[out] pDst points to the f16 output vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
*/
|
||||
void arm_q15_to_f16(const q15_t * pSrc, float16_t * pDst, uint32_t blockSize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the floating-point vector to Q31 vector.
|
||||
* @param[in] pSrc points to the f32 input vector
|
||||
* @param[out] pDst points to the f16 output vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
*/
|
||||
void arm_float_to_f16(const float32_t * pSrc, float16_t * pDst, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the floating-point vector to Q31 vector.
|
||||
* @param[in] pSrc points to the f16 input vector
|
||||
* @param[out] pDst points to the f32 output vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
*/
|
||||
void arm_f16_to_float(const float16_t * pSrc, float32_t * pDst, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Weighted sum
|
||||
*
|
||||
*
|
||||
* @param[in] *in Array of input values.
|
||||
* @param[in] *weigths Weights
|
||||
* @param[in] blockSize Number of samples in the input array.
|
||||
* @return Weighted sum
|
||||
*
|
||||
*/
|
||||
float16_t arm_weighted_sum_f16(const float16_t *in
|
||||
, const float16_t *weigths
|
||||
, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Barycenter
|
||||
*
|
||||
*
|
||||
* @param[in] in List of vectors
|
||||
* @param[in] weights Weights of the vectors
|
||||
* @param[out] out Barycenter
|
||||
* @param[in] nbVectors Number of vectors
|
||||
* @param[in] vecDim Dimension of space (vector dimension)
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void arm_barycenter_f16(const float16_t *in
|
||||
, const float16_t *weights
|
||||
, float16_t *out
|
||||
, uint32_t nbVectors
|
||||
, uint32_t vecDim);
|
||||
|
||||
|
||||
/**
|
||||
@ingroup groupSupport
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup typecast Typecasting
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup typecast
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Interpret a f16 as an s16 value
|
||||
* @param[in] x input value.
|
||||
* @return return value.
|
||||
*
|
||||
* @par Description
|
||||
* It is a typecast. No conversion of the float to int is done.
|
||||
* The memcpy will be optimized out by the compiler.
|
||||
* memcpy is used to prevent type punning issues.
|
||||
* With gcc, -fno-builtins MUST not be used or the
|
||||
* memcpy will not be optimized out.
|
||||
*/
|
||||
__STATIC_INLINE int16_t arm_typecast_s16_f16(float16_t x)
|
||||
{
|
||||
int16_t res;
|
||||
res=*(int16_t*)memcpy((char*)&res,(char*)&x,sizeof(float16_t));
|
||||
return(res);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Interpret an s16 as an f16 value
|
||||
* @param[in] x input value.
|
||||
* @return return value.
|
||||
*
|
||||
* @par Description
|
||||
* It is a typecast. No conversion of the int to float is done.
|
||||
* The memcpy will be optimized out by the compiler.
|
||||
* memcpy is used to prevent type punning issues.
|
||||
* With gcc, -fno-builtins MUST not be used or the
|
||||
* memcpy will not be optimized out.
|
||||
*/
|
||||
__STATIC_INLINE float16_t arm_typecast_f16_s16(int16_t x)
|
||||
{
|
||||
float16_t res;
|
||||
res=*(float16_t*)memcpy((char*)&res,(char*)&x,sizeof(int16_t));
|
||||
return(res);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
@} end of typecast group
|
||||
*/
|
||||
|
||||
|
||||
#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _SUPPORT_FUNCTIONS_F16_H_ */
|
||||
46
libraries/cmsis/cm4/core_support/dsp/svm_defines.h
Normal file
46
libraries/cmsis/cm4/core_support/dsp/svm_defines.h
Normal file
@@ -0,0 +1,46 @@
|
||||
/******************************************************************************
|
||||
* @file svm_defines.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _SVM_DEFINES_H_
|
||||
#define _SVM_DEFINES_H_
|
||||
|
||||
/**
|
||||
* @brief Struct for specifying SVM Kernel
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ARM_ML_KERNEL_LINEAR = 0,
|
||||
/**< Linear kernel */
|
||||
ARM_ML_KERNEL_POLYNOMIAL = 1,
|
||||
/**< Polynomial kernel */
|
||||
ARM_ML_KERNEL_RBF = 2,
|
||||
/**< Radial Basis Function kernel */
|
||||
ARM_ML_KERNEL_SIGMOID = 3
|
||||
/**< Sigmoid kernel */
|
||||
} arm_ml_kernel_type;
|
||||
|
||||
#endif
|
||||
299
libraries/cmsis/cm4/core_support/dsp/svm_functions.h
Normal file
299
libraries/cmsis/cm4/core_support/dsp/svm_functions.h
Normal file
@@ -0,0 +1,299 @@
|
||||
/******************************************************************************
|
||||
* @file svm_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _SVM_FUNCTIONS_H_
|
||||
#define _SVM_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
#include "dsp/svm_defines.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#define STEP(x) (x) <= 0 ? 0 : 1
|
||||
|
||||
/**
|
||||
* @defgroup groupSVM SVM Functions
|
||||
* This set of functions is implementing SVM classification on 2 classes.
|
||||
* The training must be done from scikit-learn. The parameters can be easily
|
||||
* generated from the scikit-learn object. Some examples are given in
|
||||
* DSP/Testing/PatternGeneration/SVM.py
|
||||
*
|
||||
* If more than 2 classes are needed, the functions in this folder
|
||||
* will have to be used, as building blocks, to do multi-class classification.
|
||||
*
|
||||
* No multi-class classification is provided in this SVM folder.
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Integer exponentiation
|
||||
* @param[in] x value
|
||||
* @param[in] nb integer exponent >= 1
|
||||
* @return x^nb
|
||||
*
|
||||
*/
|
||||
__STATIC_INLINE float32_t arm_exponent_f32(float32_t x, int32_t nb)
|
||||
{
|
||||
float32_t r = x;
|
||||
nb --;
|
||||
while(nb > 0)
|
||||
{
|
||||
r = r * x;
|
||||
nb--;
|
||||
}
|
||||
return(r);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for linear SVM prediction function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t nbOfSupportVectors; /**< Number of support vectors */
|
||||
uint32_t vectorDimension; /**< Dimension of vector space */
|
||||
float32_t intercept; /**< Intercept */
|
||||
const float32_t *dualCoefficients; /**< Dual coefficients */
|
||||
const float32_t *supportVectors; /**< Support vectors */
|
||||
const int32_t *classes; /**< The two SVM classes */
|
||||
} arm_svm_linear_instance_f32;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for polynomial SVM prediction function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t nbOfSupportVectors; /**< Number of support vectors */
|
||||
uint32_t vectorDimension; /**< Dimension of vector space */
|
||||
float32_t intercept; /**< Intercept */
|
||||
const float32_t *dualCoefficients; /**< Dual coefficients */
|
||||
const float32_t *supportVectors; /**< Support vectors */
|
||||
const int32_t *classes; /**< The two SVM classes */
|
||||
int32_t degree; /**< Polynomial degree */
|
||||
float32_t coef0; /**< Polynomial constant */
|
||||
float32_t gamma; /**< Gamma factor */
|
||||
} arm_svm_polynomial_instance_f32;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for rbf SVM prediction function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t nbOfSupportVectors; /**< Number of support vectors */
|
||||
uint32_t vectorDimension; /**< Dimension of vector space */
|
||||
float32_t intercept; /**< Intercept */
|
||||
const float32_t *dualCoefficients; /**< Dual coefficients */
|
||||
const float32_t *supportVectors; /**< Support vectors */
|
||||
const int32_t *classes; /**< The two SVM classes */
|
||||
float32_t gamma; /**< Gamma factor */
|
||||
} arm_svm_rbf_instance_f32;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for sigmoid SVM prediction function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t nbOfSupportVectors; /**< Number of support vectors */
|
||||
uint32_t vectorDimension; /**< Dimension of vector space */
|
||||
float32_t intercept; /**< Intercept */
|
||||
const float32_t *dualCoefficients; /**< Dual coefficients */
|
||||
const float32_t *supportVectors; /**< Support vectors */
|
||||
const int32_t *classes; /**< The two SVM classes */
|
||||
float32_t coef0; /**< Independent constant */
|
||||
float32_t gamma; /**< Gamma factor */
|
||||
} arm_svm_sigmoid_instance_f32;
|
||||
|
||||
/**
|
||||
* @brief SVM linear instance init function
|
||||
* @param[in] S Parameters for SVM functions
|
||||
* @param[in] nbOfSupportVectors Number of support vectors
|
||||
* @param[in] vectorDimension Dimension of vector space
|
||||
* @param[in] intercept Intercept
|
||||
* @param[in] dualCoefficients Array of dual coefficients
|
||||
* @param[in] supportVectors Array of support vectors
|
||||
* @param[in] classes Array of 2 classes ID
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S,
|
||||
uint32_t nbOfSupportVectors,
|
||||
uint32_t vectorDimension,
|
||||
float32_t intercept,
|
||||
const float32_t *dualCoefficients,
|
||||
const float32_t *supportVectors,
|
||||
const int32_t *classes);
|
||||
|
||||
/**
|
||||
* @brief SVM linear prediction
|
||||
* @param[in] S Pointer to an instance of the linear SVM structure.
|
||||
* @param[in] in Pointer to input vector
|
||||
* @param[out] pResult Decision value
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_svm_linear_predict_f32(const arm_svm_linear_instance_f32 *S,
|
||||
const float32_t * in,
|
||||
int32_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief SVM polynomial instance init function
|
||||
* @param[in] S points to an instance of the polynomial SVM structure.
|
||||
* @param[in] nbOfSupportVectors Number of support vectors
|
||||
* @param[in] vectorDimension Dimension of vector space
|
||||
* @param[in] intercept Intercept
|
||||
* @param[in] dualCoefficients Array of dual coefficients
|
||||
* @param[in] supportVectors Array of support vectors
|
||||
* @param[in] classes Array of 2 classes ID
|
||||
* @param[in] degree Polynomial degree
|
||||
* @param[in] coef0 coeff0 (scikit-learn terminology)
|
||||
* @param[in] gamma gamma (scikit-learn terminology)
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S,
|
||||
uint32_t nbOfSupportVectors,
|
||||
uint32_t vectorDimension,
|
||||
float32_t intercept,
|
||||
const float32_t *dualCoefficients,
|
||||
const float32_t *supportVectors,
|
||||
const int32_t *classes,
|
||||
int32_t degree,
|
||||
float32_t coef0,
|
||||
float32_t gamma
|
||||
);
|
||||
|
||||
/**
|
||||
* @brief SVM polynomial prediction
|
||||
* @param[in] S Pointer to an instance of the polynomial SVM structure.
|
||||
* @param[in] in Pointer to input vector
|
||||
* @param[out] pResult Decision value
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
void arm_svm_polynomial_predict_f32(const arm_svm_polynomial_instance_f32 *S,
|
||||
const float32_t * in,
|
||||
int32_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief SVM radial basis function instance init function
|
||||
* @param[in] S points to an instance of the polynomial SVM structure.
|
||||
* @param[in] nbOfSupportVectors Number of support vectors
|
||||
* @param[in] vectorDimension Dimension of vector space
|
||||
* @param[in] intercept Intercept
|
||||
* @param[in] dualCoefficients Array of dual coefficients
|
||||
* @param[in] supportVectors Array of support vectors
|
||||
* @param[in] classes Array of 2 classes ID
|
||||
* @param[in] gamma gamma (scikit-learn terminology)
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S,
|
||||
uint32_t nbOfSupportVectors,
|
||||
uint32_t vectorDimension,
|
||||
float32_t intercept,
|
||||
const float32_t *dualCoefficients,
|
||||
const float32_t *supportVectors,
|
||||
const int32_t *classes,
|
||||
float32_t gamma
|
||||
);
|
||||
|
||||
/**
|
||||
* @brief SVM rbf prediction
|
||||
* @param[in] S Pointer to an instance of the rbf SVM structure.
|
||||
* @param[in] in Pointer to input vector
|
||||
* @param[out] pResult decision value
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
void arm_svm_rbf_predict_f32(const arm_svm_rbf_instance_f32 *S,
|
||||
const float32_t * in,
|
||||
int32_t * pResult);
|
||||
|
||||
/**
|
||||
* @brief SVM sigmoid instance init function
|
||||
* @param[in] S points to an instance of the rbf SVM structure.
|
||||
* @param[in] nbOfSupportVectors Number of support vectors
|
||||
* @param[in] vectorDimension Dimension of vector space
|
||||
* @param[in] intercept Intercept
|
||||
* @param[in] dualCoefficients Array of dual coefficients
|
||||
* @param[in] supportVectors Array of support vectors
|
||||
* @param[in] classes Array of 2 classes ID
|
||||
* @param[in] coef0 coeff0 (scikit-learn terminology)
|
||||
* @param[in] gamma gamma (scikit-learn terminology)
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S,
|
||||
uint32_t nbOfSupportVectors,
|
||||
uint32_t vectorDimension,
|
||||
float32_t intercept,
|
||||
const float32_t *dualCoefficients,
|
||||
const float32_t *supportVectors,
|
||||
const int32_t *classes,
|
||||
float32_t coef0,
|
||||
float32_t gamma
|
||||
);
|
||||
|
||||
/**
|
||||
* @brief SVM sigmoid prediction
|
||||
* @param[in] S Pointer to an instance of the rbf SVM structure.
|
||||
* @param[in] in Pointer to input vector
|
||||
* @param[out] pResult Decision value
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
void arm_svm_sigmoid_predict_f32(const arm_svm_sigmoid_instance_f32 *S,
|
||||
const float32_t * in,
|
||||
int32_t * pResult);
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _SVM_FUNCTIONS_H_ */
|
||||
281
libraries/cmsis/cm4/core_support/dsp/svm_functions_f16.h
Normal file
281
libraries/cmsis/cm4/core_support/dsp/svm_functions_f16.h
Normal file
@@ -0,0 +1,281 @@
|
||||
/******************************************************************************
|
||||
* @file svm_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _SVM_FUNCTIONS_F16_H_
|
||||
#define _SVM_FUNCTIONS_F16_H_
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
#include "dsp/svm_defines.h"
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
#define STEP(x) (x) <= 0 ? 0 : 1
|
||||
|
||||
/**
|
||||
* @defgroup groupSVM SVM Functions
|
||||
* This set of functions is implementing SVM classification on 2 classes.
|
||||
* The training must be done from scikit-learn. The parameters can be easily
|
||||
* generated from the scikit-learn object. Some examples are given in
|
||||
* DSP/Testing/PatternGeneration/SVM.py
|
||||
*
|
||||
* If more than 2 classes are needed, the functions in this folder
|
||||
* will have to be used, as building blocks, to do multi-class classification.
|
||||
*
|
||||
* No multi-class classification is provided in this SVM folder.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for linear SVM prediction function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t nbOfSupportVectors; /**< Number of support vectors */
|
||||
uint32_t vectorDimension; /**< Dimension of vector space */
|
||||
float16_t intercept; /**< Intercept */
|
||||
const float16_t *dualCoefficients; /**< Dual coefficients */
|
||||
const float16_t *supportVectors; /**< Support vectors */
|
||||
const int32_t *classes; /**< The two SVM classes */
|
||||
} arm_svm_linear_instance_f16;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for polynomial SVM prediction function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t nbOfSupportVectors; /**< Number of support vectors */
|
||||
uint32_t vectorDimension; /**< Dimension of vector space */
|
||||
float16_t intercept; /**< Intercept */
|
||||
const float16_t *dualCoefficients; /**< Dual coefficients */
|
||||
const float16_t *supportVectors; /**< Support vectors */
|
||||
const int32_t *classes; /**< The two SVM classes */
|
||||
int32_t degree; /**< Polynomial degree */
|
||||
float16_t coef0; /**< Polynomial constant */
|
||||
float16_t gamma; /**< Gamma factor */
|
||||
} arm_svm_polynomial_instance_f16;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for rbf SVM prediction function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t nbOfSupportVectors; /**< Number of support vectors */
|
||||
uint32_t vectorDimension; /**< Dimension of vector space */
|
||||
float16_t intercept; /**< Intercept */
|
||||
const float16_t *dualCoefficients; /**< Dual coefficients */
|
||||
const float16_t *supportVectors; /**< Support vectors */
|
||||
const int32_t *classes; /**< The two SVM classes */
|
||||
float16_t gamma; /**< Gamma factor */
|
||||
} arm_svm_rbf_instance_f16;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for sigmoid SVM prediction function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t nbOfSupportVectors; /**< Number of support vectors */
|
||||
uint32_t vectorDimension; /**< Dimension of vector space */
|
||||
float16_t intercept; /**< Intercept */
|
||||
const float16_t *dualCoefficients; /**< Dual coefficients */
|
||||
const float16_t *supportVectors; /**< Support vectors */
|
||||
const int32_t *classes; /**< The two SVM classes */
|
||||
float16_t coef0; /**< Independent constant */
|
||||
float16_t gamma; /**< Gamma factor */
|
||||
} arm_svm_sigmoid_instance_f16;
|
||||
|
||||
/**
|
||||
* @brief SVM linear instance init function
|
||||
* @param[in] S Parameters for SVM functions
|
||||
* @param[in] nbOfSupportVectors Number of support vectors
|
||||
* @param[in] vectorDimension Dimension of vector space
|
||||
* @param[in] intercept Intercept
|
||||
* @param[in] dualCoefficients Array of dual coefficients
|
||||
* @param[in] supportVectors Array of support vectors
|
||||
* @param[in] classes Array of 2 classes ID
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_svm_linear_init_f16(arm_svm_linear_instance_f16 *S,
|
||||
uint32_t nbOfSupportVectors,
|
||||
uint32_t vectorDimension,
|
||||
float16_t intercept,
|
||||
const float16_t *dualCoefficients,
|
||||
const float16_t *supportVectors,
|
||||
const int32_t *classes);
|
||||
|
||||
/**
|
||||
* @brief SVM linear prediction
|
||||
* @param[in] S Pointer to an instance of the linear SVM structure.
|
||||
* @param[in] in Pointer to input vector
|
||||
* @param[out] pResult Decision value
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_svm_linear_predict_f16(const arm_svm_linear_instance_f16 *S,
|
||||
const float16_t * in,
|
||||
int32_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief SVM polynomial instance init function
|
||||
* @param[in] S points to an instance of the polynomial SVM structure.
|
||||
* @param[in] nbOfSupportVectors Number of support vectors
|
||||
* @param[in] vectorDimension Dimension of vector space
|
||||
* @param[in] intercept Intercept
|
||||
* @param[in] dualCoefficients Array of dual coefficients
|
||||
* @param[in] supportVectors Array of support vectors
|
||||
* @param[in] classes Array of 2 classes ID
|
||||
* @param[in] degree Polynomial degree
|
||||
* @param[in] coef0 coeff0 (scikit-learn terminology)
|
||||
* @param[in] gamma gamma (scikit-learn terminology)
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_svm_polynomial_init_f16(arm_svm_polynomial_instance_f16 *S,
|
||||
uint32_t nbOfSupportVectors,
|
||||
uint32_t vectorDimension,
|
||||
float16_t intercept,
|
||||
const float16_t *dualCoefficients,
|
||||
const float16_t *supportVectors,
|
||||
const int32_t *classes,
|
||||
int32_t degree,
|
||||
float16_t coef0,
|
||||
float16_t gamma
|
||||
);
|
||||
|
||||
/**
|
||||
* @brief SVM polynomial prediction
|
||||
* @param[in] S Pointer to an instance of the polynomial SVM structure.
|
||||
* @param[in] in Pointer to input vector
|
||||
* @param[out] pResult Decision value
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
void arm_svm_polynomial_predict_f16(const arm_svm_polynomial_instance_f16 *S,
|
||||
const float16_t * in,
|
||||
int32_t * pResult);
|
||||
|
||||
|
||||
/**
|
||||
* @brief SVM radial basis function instance init function
|
||||
* @param[in] S points to an instance of the polynomial SVM structure.
|
||||
* @param[in] nbOfSupportVectors Number of support vectors
|
||||
* @param[in] vectorDimension Dimension of vector space
|
||||
* @param[in] intercept Intercept
|
||||
* @param[in] dualCoefficients Array of dual coefficients
|
||||
* @param[in] supportVectors Array of support vectors
|
||||
* @param[in] classes Array of 2 classes ID
|
||||
* @param[in] gamma gamma (scikit-learn terminology)
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_svm_rbf_init_f16(arm_svm_rbf_instance_f16 *S,
|
||||
uint32_t nbOfSupportVectors,
|
||||
uint32_t vectorDimension,
|
||||
float16_t intercept,
|
||||
const float16_t *dualCoefficients,
|
||||
const float16_t *supportVectors,
|
||||
const int32_t *classes,
|
||||
float16_t gamma
|
||||
);
|
||||
|
||||
/**
|
||||
* @brief SVM rbf prediction
|
||||
* @param[in] S Pointer to an instance of the rbf SVM structure.
|
||||
* @param[in] in Pointer to input vector
|
||||
* @param[out] pResult decision value
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
void arm_svm_rbf_predict_f16(const arm_svm_rbf_instance_f16 *S,
|
||||
const float16_t * in,
|
||||
int32_t * pResult);
|
||||
|
||||
/**
|
||||
* @brief SVM sigmoid instance init function
|
||||
* @param[in] S points to an instance of the rbf SVM structure.
|
||||
* @param[in] nbOfSupportVectors Number of support vectors
|
||||
* @param[in] vectorDimension Dimension of vector space
|
||||
* @param[in] intercept Intercept
|
||||
* @param[in] dualCoefficients Array of dual coefficients
|
||||
* @param[in] supportVectors Array of support vectors
|
||||
* @param[in] classes Array of 2 classes ID
|
||||
* @param[in] coef0 coeff0 (scikit-learn terminology)
|
||||
* @param[in] gamma gamma (scikit-learn terminology)
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_svm_sigmoid_init_f16(arm_svm_sigmoid_instance_f16 *S,
|
||||
uint32_t nbOfSupportVectors,
|
||||
uint32_t vectorDimension,
|
||||
float16_t intercept,
|
||||
const float16_t *dualCoefficients,
|
||||
const float16_t *supportVectors,
|
||||
const int32_t *classes,
|
||||
float16_t coef0,
|
||||
float16_t gamma
|
||||
);
|
||||
|
||||
/**
|
||||
* @brief SVM sigmoid prediction
|
||||
* @param[in] S Pointer to an instance of the rbf SVM structure.
|
||||
* @param[in] in Pointer to input vector
|
||||
* @param[out] pResult Decision value
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
void arm_svm_sigmoid_predict_f16(const arm_svm_sigmoid_instance_f16 *S,
|
||||
const float16_t * in,
|
||||
int32_t * pResult);
|
||||
|
||||
|
||||
|
||||
#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _SVM_FUNCTIONS_F16_H_ */
|
||||
735
libraries/cmsis/cm4/core_support/dsp/transform_functions.h
Normal file
735
libraries/cmsis/cm4/core_support/dsp/transform_functions.h
Normal file
@@ -0,0 +1,735 @@
|
||||
/******************************************************************************
|
||||
* @file transform_functions.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _TRANSFORM_FUNCTIONS_H_
|
||||
#define _TRANSFORM_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
#include "dsp/complex_math_functions.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @defgroup groupTransforms Transform Functions
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q15 CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
|
||||
uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
|
||||
const q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
|
||||
uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
|
||||
} arm_cfft_radix2_instance_q15;
|
||||
|
||||
/* Deprecated */
|
||||
arm_status arm_cfft_radix2_init_q15(
|
||||
arm_cfft_radix2_instance_q15 * S,
|
||||
uint16_t fftLen,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/* Deprecated */
|
||||
void arm_cfft_radix2_q15(
|
||||
const arm_cfft_radix2_instance_q15 * S,
|
||||
q15_t * pSrc);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q15 CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
|
||||
uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
|
||||
const q15_t *pTwiddle; /**< points to the twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
|
||||
uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
|
||||
} arm_cfft_radix4_instance_q15;
|
||||
|
||||
/* Deprecated */
|
||||
arm_status arm_cfft_radix4_init_q15(
|
||||
arm_cfft_radix4_instance_q15 * S,
|
||||
uint16_t fftLen,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/* Deprecated */
|
||||
void arm_cfft_radix4_q15(
|
||||
const arm_cfft_radix4_instance_q15 * S,
|
||||
q15_t * pSrc);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
|
||||
uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
|
||||
const q31_t *pTwiddle; /**< points to the Twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
|
||||
uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
|
||||
} arm_cfft_radix2_instance_q31;
|
||||
|
||||
/* Deprecated */
|
||||
arm_status arm_cfft_radix2_init_q31(
|
||||
arm_cfft_radix2_instance_q31 * S,
|
||||
uint16_t fftLen,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/* Deprecated */
|
||||
void arm_cfft_radix2_q31(
|
||||
const arm_cfft_radix2_instance_q31 * S,
|
||||
q31_t * pSrc);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q31 CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
|
||||
uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
|
||||
const q31_t *pTwiddle; /**< points to the twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
|
||||
uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
|
||||
} arm_cfft_radix4_instance_q31;
|
||||
|
||||
/* Deprecated */
|
||||
void arm_cfft_radix4_q31(
|
||||
const arm_cfft_radix4_instance_q31 * S,
|
||||
q31_t * pSrc);
|
||||
|
||||
/* Deprecated */
|
||||
arm_status arm_cfft_radix4_init_q31(
|
||||
arm_cfft_radix4_instance_q31 * S,
|
||||
uint16_t fftLen,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
|
||||
uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
|
||||
const float32_t *pTwiddle; /**< points to the Twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
|
||||
uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
|
||||
float32_t onebyfftLen; /**< value of 1/fftLen. */
|
||||
} arm_cfft_radix2_instance_f32;
|
||||
|
||||
|
||||
/* Deprecated */
|
||||
arm_status arm_cfft_radix2_init_f32(
|
||||
arm_cfft_radix2_instance_f32 * S,
|
||||
uint16_t fftLen,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/* Deprecated */
|
||||
void arm_cfft_radix2_f32(
|
||||
const arm_cfft_radix2_instance_f32 * S,
|
||||
float32_t * pSrc);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
|
||||
uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
|
||||
const float32_t *pTwiddle; /**< points to the Twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
|
||||
uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
|
||||
float32_t onebyfftLen; /**< value of 1/fftLen. */
|
||||
} arm_cfft_radix4_instance_f32;
|
||||
|
||||
|
||||
|
||||
/* Deprecated */
|
||||
arm_status arm_cfft_radix4_init_f32(
|
||||
arm_cfft_radix4_instance_f32 * S,
|
||||
uint16_t fftLen,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/* Deprecated */
|
||||
void arm_cfft_radix4_f32(
|
||||
const arm_cfft_radix4_instance_f32 * S,
|
||||
float32_t * pSrc);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the fixed-point CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
const q15_t *pTwiddle; /**< points to the Twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t bitRevLength; /**< bit reversal table length. */
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle pointer (offset 1) */ \
|
||||
const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle pointer (offset 2) */ \
|
||||
const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle pointer (offset 3) */ \
|
||||
const q15_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ \
|
||||
const q15_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ \
|
||||
const q15_t *rearranged_twiddle_stride3;
|
||||
#endif
|
||||
} arm_cfft_instance_q15;
|
||||
|
||||
arm_status arm_cfft_init_q15(
|
||||
arm_cfft_instance_q15 * S,
|
||||
uint16_t fftLen);
|
||||
|
||||
void arm_cfft_q15(
|
||||
const arm_cfft_instance_q15 * S,
|
||||
q15_t * p1,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the fixed-point CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
const q31_t *pTwiddle; /**< points to the Twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t bitRevLength; /**< bit reversal table length. */
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle pointer (offset 1) */ \
|
||||
const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle pointer (offset 2) */ \
|
||||
const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle pointer (offset 3) */ \
|
||||
const q31_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ \
|
||||
const q31_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ \
|
||||
const q31_t *rearranged_twiddle_stride3;
|
||||
#endif
|
||||
} arm_cfft_instance_q31;
|
||||
|
||||
arm_status arm_cfft_init_q31(
|
||||
arm_cfft_instance_q31 * S,
|
||||
uint16_t fftLen);
|
||||
|
||||
void arm_cfft_q31(
|
||||
const arm_cfft_instance_q31 * S,
|
||||
q31_t * p1,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
const float32_t *pTwiddle; /**< points to the Twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t bitRevLength; /**< bit reversal table length. */
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle pointer (offset 1) */ \
|
||||
const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle pointer (offset 2) */ \
|
||||
const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle pointer (offset 3) */ \
|
||||
const float32_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ \
|
||||
const float32_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ \
|
||||
const float32_t *rearranged_twiddle_stride3;
|
||||
#endif
|
||||
} arm_cfft_instance_f32;
|
||||
|
||||
|
||||
|
||||
arm_status arm_cfft_init_f32(
|
||||
arm_cfft_instance_f32 * S,
|
||||
uint16_t fftLen);
|
||||
|
||||
void arm_cfft_f32(
|
||||
const arm_cfft_instance_f32 * S,
|
||||
float32_t * p1,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Double Precision Floating-point CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
const float64_t *pTwiddle; /**< points to the Twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t bitRevLength; /**< bit reversal table length. */
|
||||
} arm_cfft_instance_f64;
|
||||
|
||||
arm_status arm_cfft_init_f64(
|
||||
arm_cfft_instance_f64 * S,
|
||||
uint16_t fftLen);
|
||||
|
||||
void arm_cfft_f64(
|
||||
const arm_cfft_instance_f64 * S,
|
||||
float64_t * p1,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q15 RFFT/RIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t fftLenReal; /**< length of the real FFT. */
|
||||
uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
|
||||
uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
|
||||
uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
|
||||
const q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
|
||||
const q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
arm_cfft_instance_q15 cfftInst;
|
||||
#else
|
||||
const arm_cfft_instance_q15 *pCfft; /**< points to the complex FFT instance. */
|
||||
#endif
|
||||
} arm_rfft_instance_q15;
|
||||
|
||||
arm_status arm_rfft_init_q15(
|
||||
arm_rfft_instance_q15 * S,
|
||||
uint32_t fftLenReal,
|
||||
uint32_t ifftFlagR,
|
||||
uint32_t bitReverseFlag);
|
||||
|
||||
void arm_rfft_q15(
|
||||
const arm_rfft_instance_q15 * S,
|
||||
q15_t * pSrc,
|
||||
q15_t * pDst);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q31 RFFT/RIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t fftLenReal; /**< length of the real FFT. */
|
||||
uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
|
||||
uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
|
||||
uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
|
||||
const q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
|
||||
const q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
arm_cfft_instance_q31 cfftInst;
|
||||
#else
|
||||
const arm_cfft_instance_q31 *pCfft; /**< points to the complex FFT instance. */
|
||||
#endif
|
||||
} arm_rfft_instance_q31;
|
||||
|
||||
arm_status arm_rfft_init_q31(
|
||||
arm_rfft_instance_q31 * S,
|
||||
uint32_t fftLenReal,
|
||||
uint32_t ifftFlagR,
|
||||
uint32_t bitReverseFlag);
|
||||
|
||||
void arm_rfft_q31(
|
||||
const arm_rfft_instance_q31 * S,
|
||||
q31_t * pSrc,
|
||||
q31_t * pDst);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point RFFT/RIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t fftLenReal; /**< length of the real FFT. */
|
||||
uint16_t fftLenBy2; /**< length of the complex FFT. */
|
||||
uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
|
||||
uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
|
||||
uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
|
||||
const float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
|
||||
const float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
|
||||
arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
|
||||
} arm_rfft_instance_f32;
|
||||
|
||||
arm_status arm_rfft_init_f32(
|
||||
arm_rfft_instance_f32 * S,
|
||||
arm_cfft_radix4_instance_f32 * S_CFFT,
|
||||
uint32_t fftLenReal,
|
||||
uint32_t ifftFlagR,
|
||||
uint32_t bitReverseFlag);
|
||||
|
||||
void arm_rfft_f32(
|
||||
const arm_rfft_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Double Precision Floating-point RFFT/RIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
arm_cfft_instance_f64 Sint; /**< Internal CFFT structure. */
|
||||
uint16_t fftLenRFFT; /**< length of the real sequence */
|
||||
const float64_t * pTwiddleRFFT; /**< Twiddle factors real stage */
|
||||
} arm_rfft_fast_instance_f64 ;
|
||||
|
||||
arm_status arm_rfft_fast_init_f64 (
|
||||
arm_rfft_fast_instance_f64 * S,
|
||||
uint16_t fftLen);
|
||||
|
||||
|
||||
void arm_rfft_fast_f64(
|
||||
arm_rfft_fast_instance_f64 * S,
|
||||
float64_t * p, float64_t * pOut,
|
||||
uint8_t ifftFlag);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point RFFT/RIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */
|
||||
uint16_t fftLenRFFT; /**< length of the real sequence */
|
||||
const float32_t * pTwiddleRFFT; /**< Twiddle factors real stage */
|
||||
} arm_rfft_fast_instance_f32 ;
|
||||
|
||||
arm_status arm_rfft_fast_init_f32 (
|
||||
arm_rfft_fast_instance_f32 * S,
|
||||
uint16_t fftLen);
|
||||
|
||||
|
||||
void arm_rfft_fast_f32(
|
||||
const arm_rfft_fast_instance_f32 * S,
|
||||
float32_t * p, float32_t * pOut,
|
||||
uint8_t ifftFlag);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point DCT4/IDCT4 function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t N; /**< length of the DCT4. */
|
||||
uint16_t Nby2; /**< half of the length of the DCT4. */
|
||||
float32_t normalize; /**< normalizing factor. */
|
||||
const float32_t *pTwiddle; /**< points to the twiddle factor table. */
|
||||
const float32_t *pCosFactor; /**< points to the cosFactor table. */
|
||||
arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */
|
||||
arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
|
||||
} arm_dct4_instance_f32;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Initialization function for the floating-point DCT4/IDCT4.
|
||||
* @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure.
|
||||
* @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure.
|
||||
* @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure.
|
||||
* @param[in] N length of the DCT4.
|
||||
* @param[in] Nby2 half of the length of the DCT4.
|
||||
* @param[in] normalize normalizing factor.
|
||||
* @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
|
||||
*/
|
||||
arm_status arm_dct4_init_f32(
|
||||
arm_dct4_instance_f32 * S,
|
||||
arm_rfft_instance_f32 * S_RFFT,
|
||||
arm_cfft_radix4_instance_f32 * S_CFFT,
|
||||
uint16_t N,
|
||||
uint16_t Nby2,
|
||||
float32_t normalize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Processing function for the floating-point DCT4/IDCT4.
|
||||
* @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure.
|
||||
* @param[in] pState points to state buffer.
|
||||
* @param[in,out] pInlineBuffer points to the in-place input and output buffer.
|
||||
*/
|
||||
void arm_dct4_f32(
|
||||
const arm_dct4_instance_f32 * S,
|
||||
float32_t * pState,
|
||||
float32_t * pInlineBuffer);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q31 DCT4/IDCT4 function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t N; /**< length of the DCT4. */
|
||||
uint16_t Nby2; /**< half of the length of the DCT4. */
|
||||
q31_t normalize; /**< normalizing factor. */
|
||||
const q31_t *pTwiddle; /**< points to the twiddle factor table. */
|
||||
const q31_t *pCosFactor; /**< points to the cosFactor table. */
|
||||
arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */
|
||||
arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
|
||||
} arm_dct4_instance_q31;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Initialization function for the Q31 DCT4/IDCT4.
|
||||
* @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure.
|
||||
* @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure
|
||||
* @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure
|
||||
* @param[in] N length of the DCT4.
|
||||
* @param[in] Nby2 half of the length of the DCT4.
|
||||
* @param[in] normalize normalizing factor.
|
||||
* @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
|
||||
*/
|
||||
arm_status arm_dct4_init_q31(
|
||||
arm_dct4_instance_q31 * S,
|
||||
arm_rfft_instance_q31 * S_RFFT,
|
||||
arm_cfft_radix4_instance_q31 * S_CFFT,
|
||||
uint16_t N,
|
||||
uint16_t Nby2,
|
||||
q31_t normalize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Processing function for the Q31 DCT4/IDCT4.
|
||||
* @param[in] S points to an instance of the Q31 DCT4 structure.
|
||||
* @param[in] pState points to state buffer.
|
||||
* @param[in,out] pInlineBuffer points to the in-place input and output buffer.
|
||||
*/
|
||||
void arm_dct4_q31(
|
||||
const arm_dct4_instance_q31 * S,
|
||||
q31_t * pState,
|
||||
q31_t * pInlineBuffer);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Q15 DCT4/IDCT4 function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t N; /**< length of the DCT4. */
|
||||
uint16_t Nby2; /**< half of the length of the DCT4. */
|
||||
q15_t normalize; /**< normalizing factor. */
|
||||
const q15_t *pTwiddle; /**< points to the twiddle factor table. */
|
||||
const q15_t *pCosFactor; /**< points to the cosFactor table. */
|
||||
arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */
|
||||
arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
|
||||
} arm_dct4_instance_q15;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Initialization function for the Q15 DCT4/IDCT4.
|
||||
* @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure.
|
||||
* @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure.
|
||||
* @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure.
|
||||
* @param[in] N length of the DCT4.
|
||||
* @param[in] Nby2 half of the length of the DCT4.
|
||||
* @param[in] normalize normalizing factor.
|
||||
* @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
|
||||
*/
|
||||
arm_status arm_dct4_init_q15(
|
||||
arm_dct4_instance_q15 * S,
|
||||
arm_rfft_instance_q15 * S_RFFT,
|
||||
arm_cfft_radix4_instance_q15 * S_CFFT,
|
||||
uint16_t N,
|
||||
uint16_t Nby2,
|
||||
q15_t normalize);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Processing function for the Q15 DCT4/IDCT4.
|
||||
* @param[in] S points to an instance of the Q15 DCT4 structure.
|
||||
* @param[in] pState points to state buffer.
|
||||
* @param[in,out] pInlineBuffer points to the in-place input and output buffer.
|
||||
*/
|
||||
void arm_dct4_q15(
|
||||
const arm_dct4_instance_q15 * S,
|
||||
q15_t * pState,
|
||||
q15_t * pInlineBuffer);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Floating-point MFCC function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
const float32_t *dctCoefs; /**< Internal DCT coefficients */
|
||||
const float32_t *filterCoefs; /**< Internal Mel filter coefficients */
|
||||
const float32_t *windowCoefs; /**< Windowing coefficients */
|
||||
const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */
|
||||
const uint32_t *filterLengths; /**< Internal Mel filter lengths */
|
||||
uint32_t fftLen; /**< FFT length */
|
||||
uint32_t nbMelFilters; /**< Number of Mel filters */
|
||||
uint32_t nbDctOutputs; /**< Number of DCT outputs */
|
||||
#if defined(ARM_MFCC_CFFT_BASED)
|
||||
/* Implementation of the MFCC is using a CFFT */
|
||||
arm_cfft_instance_f32 cfft; /**< Internal CFFT instance */
|
||||
#else
|
||||
/* Implementation of the MFCC is using a RFFT (default) */
|
||||
arm_rfft_fast_instance_f32 rfft;
|
||||
#endif
|
||||
} arm_mfcc_instance_f32 ;
|
||||
|
||||
arm_status arm_mfcc_init_f32(
|
||||
arm_mfcc_instance_f32 * S,
|
||||
uint32_t fftLen,
|
||||
uint32_t nbMelFilters,
|
||||
uint32_t nbDctOutputs,
|
||||
const float32_t *dctCoefs,
|
||||
const uint32_t *filterPos,
|
||||
const uint32_t *filterLengths,
|
||||
const float32_t *filterCoefs,
|
||||
const float32_t *windowCoefs
|
||||
);
|
||||
|
||||
|
||||
/**
|
||||
@brief MFCC F32
|
||||
@param[in] S points to the mfcc instance structure
|
||||
@param[in] pSrc points to the input samples
|
||||
@param[out] pDst points to the output MFCC values
|
||||
@param[inout] pTmp points to a temporary buffer of complex
|
||||
@return none
|
||||
*/
|
||||
void arm_mfcc_f32(
|
||||
const arm_mfcc_instance_f32 * S,
|
||||
float32_t *pSrc,
|
||||
float32_t *pDst,
|
||||
float32_t *pTmp
|
||||
);
|
||||
|
||||
typedef struct
|
||||
{
|
||||
const q31_t *dctCoefs; /**< Internal DCT coefficients */
|
||||
const q31_t *filterCoefs; /**< Internal Mel filter coefficients */
|
||||
const q31_t *windowCoefs; /**< Windowing coefficients */
|
||||
const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */
|
||||
const uint32_t *filterLengths; /**< Internal Mel filter lengths */
|
||||
uint32_t fftLen; /**< FFT length */
|
||||
uint32_t nbMelFilters; /**< Number of Mel filters */
|
||||
uint32_t nbDctOutputs; /**< Number of DCT outputs */
|
||||
#if defined(ARM_MFCC_CFFT_BASED)
|
||||
/* Implementation of the MFCC is using a CFFT */
|
||||
arm_cfft_instance_q31 cfft; /**< Internal CFFT instance */
|
||||
#else
|
||||
/* Implementation of the MFCC is using a RFFT (default) */
|
||||
arm_rfft_instance_q31 rfft;
|
||||
#endif
|
||||
} arm_mfcc_instance_q31 ;
|
||||
|
||||
arm_status arm_mfcc_init_q31(
|
||||
arm_mfcc_instance_q31 * S,
|
||||
uint32_t fftLen,
|
||||
uint32_t nbMelFilters,
|
||||
uint32_t nbDctOutputs,
|
||||
const q31_t *dctCoefs,
|
||||
const uint32_t *filterPos,
|
||||
const uint32_t *filterLengths,
|
||||
const q31_t *filterCoefs,
|
||||
const q31_t *windowCoefs
|
||||
);
|
||||
|
||||
|
||||
/**
|
||||
@brief MFCC Q31
|
||||
@param[in] S points to the mfcc instance structure
|
||||
@param[in] pSrc points to the input samples
|
||||
@param[out] pDst points to the output MFCC values
|
||||
@param[inout] pTmp points to a temporary buffer of complex
|
||||
@return none
|
||||
*/
|
||||
arm_status arm_mfcc_q31(
|
||||
const arm_mfcc_instance_q31 * S,
|
||||
q31_t *pSrc,
|
||||
q31_t *pDst,
|
||||
q31_t *pTmp
|
||||
);
|
||||
|
||||
typedef struct
|
||||
{
|
||||
const q15_t *dctCoefs; /**< Internal DCT coefficients */
|
||||
const q15_t *filterCoefs; /**< Internal Mel filter coefficients */
|
||||
const q15_t *windowCoefs; /**< Windowing coefficients */
|
||||
const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */
|
||||
const uint32_t *filterLengths; /**< Internal Mel filter lengths */
|
||||
uint32_t fftLen; /**< FFT length */
|
||||
uint32_t nbMelFilters; /**< Number of Mel filters */
|
||||
uint32_t nbDctOutputs; /**< Number of DCT outputs */
|
||||
#if defined(ARM_MFCC_CFFT_BASED)
|
||||
/* Implementation of the MFCC is using a CFFT */
|
||||
arm_cfft_instance_q15 cfft; /**< Internal CFFT instance */
|
||||
#else
|
||||
/* Implementation of the MFCC is using a RFFT (default) */
|
||||
arm_rfft_instance_q15 rfft;
|
||||
#endif
|
||||
} arm_mfcc_instance_q15 ;
|
||||
|
||||
arm_status arm_mfcc_init_q15(
|
||||
arm_mfcc_instance_q15 * S,
|
||||
uint32_t fftLen,
|
||||
uint32_t nbMelFilters,
|
||||
uint32_t nbDctOutputs,
|
||||
const q15_t *dctCoefs,
|
||||
const uint32_t *filterPos,
|
||||
const uint32_t *filterLengths,
|
||||
const q15_t *filterCoefs,
|
||||
const q15_t *windowCoefs
|
||||
);
|
||||
|
||||
|
||||
/**
|
||||
@brief MFCC Q15
|
||||
@param[in] S points to the mfcc instance structure
|
||||
@param[in] pSrc points to the input samples
|
||||
@param[out] pDst points to the output MFCC values in q8.7 format
|
||||
@param[inout] pTmp points to a temporary buffer of complex
|
||||
@return error status
|
||||
*/
|
||||
arm_status arm_mfcc_q15(
|
||||
const arm_mfcc_instance_q15 * S,
|
||||
q15_t *pSrc,
|
||||
q15_t *pDst,
|
||||
q31_t *pTmp
|
||||
);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _TRANSFORM_FUNCTIONS_H_ */
|
||||
208
libraries/cmsis/cm4/core_support/dsp/transform_functions_f16.h
Normal file
208
libraries/cmsis/cm4/core_support/dsp/transform_functions_f16.h
Normal file
@@ -0,0 +1,208 @@
|
||||
/******************************************************************************
|
||||
* @file transform_functions_f16.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.10.0
|
||||
* @date 08 July 2021
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _TRANSFORM_FUNCTIONS_F16_H_
|
||||
#define _TRANSFORM_FUNCTIONS_F16_H_
|
||||
|
||||
#include "arm_math_types_f16.h"
|
||||
#include "arm_math_memory.h"
|
||||
|
||||
#include "dsp/none.h"
|
||||
#include "dsp/utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
|
||||
uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
|
||||
const float16_t *pTwiddle; /**< points to the Twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
|
||||
uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
|
||||
float16_t onebyfftLen; /**< value of 1/fftLen. */
|
||||
} arm_cfft_radix2_instance_f16;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
|
||||
uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
|
||||
const float16_t *pTwiddle; /**< points to the Twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
|
||||
uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
|
||||
float16_t onebyfftLen; /**< value of 1/fftLen. */
|
||||
} arm_cfft_radix4_instance_f16;
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point CFFT/CIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t fftLen; /**< length of the FFT. */
|
||||
const float16_t *pTwiddle; /**< points to the Twiddle factor table. */
|
||||
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
|
||||
uint16_t bitRevLength; /**< bit reversal table length. */
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle pointer (offset 1) */ \
|
||||
const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle pointer (offset 2) */ \
|
||||
const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle pointer (offset 3) */ \
|
||||
const float16_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ \
|
||||
const float16_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ \
|
||||
const float16_t *rearranged_twiddle_stride3;
|
||||
#endif
|
||||
} arm_cfft_instance_f16;
|
||||
|
||||
|
||||
arm_status arm_cfft_init_f16(
|
||||
arm_cfft_instance_f16 * S,
|
||||
uint16_t fftLen);
|
||||
|
||||
void arm_cfft_f16(
|
||||
const arm_cfft_instance_f16 * S,
|
||||
float16_t * p1,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the floating-point RFFT/RIFFT function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
arm_cfft_instance_f16 Sint; /**< Internal CFFT structure. */
|
||||
uint16_t fftLenRFFT; /**< length of the real sequence */
|
||||
const float16_t * pTwiddleRFFT; /**< Twiddle factors real stage */
|
||||
} arm_rfft_fast_instance_f16 ;
|
||||
|
||||
arm_status arm_rfft_fast_init_f16 (
|
||||
arm_rfft_fast_instance_f16 * S,
|
||||
uint16_t fftLen);
|
||||
|
||||
|
||||
void arm_rfft_fast_f16(
|
||||
const arm_rfft_fast_instance_f16 * S,
|
||||
float16_t * p, float16_t * pOut,
|
||||
uint8_t ifftFlag);
|
||||
|
||||
/* Deprecated */
|
||||
arm_status arm_cfft_radix4_init_f16(
|
||||
arm_cfft_radix4_instance_f16 * S,
|
||||
uint16_t fftLen,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/* Deprecated */
|
||||
void arm_cfft_radix4_f16(
|
||||
const arm_cfft_radix4_instance_f16 * S,
|
||||
float16_t * pSrc);
|
||||
|
||||
|
||||
/* Deprecated */
|
||||
arm_status arm_cfft_radix2_init_f16(
|
||||
arm_cfft_radix2_instance_f16 * S,
|
||||
uint16_t fftLen,
|
||||
uint8_t ifftFlag,
|
||||
uint8_t bitReverseFlag);
|
||||
|
||||
/* Deprecated */
|
||||
void arm_cfft_radix2_f16(
|
||||
const arm_cfft_radix2_instance_f16 * S,
|
||||
float16_t * pSrc);
|
||||
|
||||
/**
|
||||
* @brief Instance structure for the Floating-point MFCC function.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
const float16_t *dctCoefs; /**< Internal DCT coefficients */
|
||||
const float16_t *filterCoefs; /**< Internal Mel filter coefficients */
|
||||
const float16_t *windowCoefs; /**< Windowing coefficients */
|
||||
const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */
|
||||
const uint32_t *filterLengths; /**< Internal Mel filter lengths */
|
||||
uint32_t fftLen; /**< FFT length */
|
||||
uint32_t nbMelFilters; /**< Number of Mel filters */
|
||||
uint32_t nbDctOutputs; /**< Number of DCT outputs */
|
||||
#if defined(ARM_MFCC_CFFT_BASED)
|
||||
/* Implementation of the MFCC is using a CFFT */
|
||||
arm_cfft_instance_f16 cfft; /**< Internal CFFT instance */
|
||||
#else
|
||||
/* Implementation of the MFCC is using a RFFT (default) */
|
||||
arm_rfft_fast_instance_f16 rfft;
|
||||
#endif
|
||||
} arm_mfcc_instance_f16 ;
|
||||
|
||||
arm_status arm_mfcc_init_f16(
|
||||
arm_mfcc_instance_f16 * S,
|
||||
uint32_t fftLen,
|
||||
uint32_t nbMelFilters,
|
||||
uint32_t nbDctOutputs,
|
||||
const float16_t *dctCoefs,
|
||||
const uint32_t *filterPos,
|
||||
const uint32_t *filterLengths,
|
||||
const float16_t *filterCoefs,
|
||||
const float16_t *windowCoefs
|
||||
);
|
||||
|
||||
|
||||
/**
|
||||
@brief MFCC F16
|
||||
@param[in] S points to the mfcc instance structure
|
||||
@param[in] pSrc points to the input samples
|
||||
@param[out] pDst points to the output MFCC values
|
||||
@param[inout] pTmp points to a temporary buffer of complex
|
||||
@return none
|
||||
*/
|
||||
void arm_mfcc_f16(
|
||||
const arm_mfcc_instance_f16 * S,
|
||||
float16_t *pSrc,
|
||||
float16_t *pDst,
|
||||
float16_t *pTmp
|
||||
);
|
||||
|
||||
|
||||
#endif /* defined(ARM_FLOAT16_SUPPORTED)*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ifndef _TRANSFORM_FUNCTIONS_F16_H_ */
|
||||
240
libraries/cmsis/cm4/core_support/dsp/utils.h
Normal file
240
libraries/cmsis/cm4/core_support/dsp/utils.h
Normal file
@@ -0,0 +1,240 @@
|
||||
/******************************************************************************
|
||||
* @file arm_math_utils.h
|
||||
* @brief Public header file for CMSIS DSP Library
|
||||
* @version V1.9.0
|
||||
* @date 20. July 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_MATH_UTILS_H_
|
||||
|
||||
#define _ARM_MATH_UTILS_H_
|
||||
|
||||
#include "arm_math_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Macros required for reciprocal calculation in Normalized LMS
|
||||
*/
|
||||
|
||||
#define INDEX_MASK 0x0000003F
|
||||
|
||||
|
||||
#define SQ(x) ((x) * (x))
|
||||
|
||||
#define ROUND_UP(N, S) ((((N) + (S) - 1) / (S)) * (S))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t arm_recip_q31(
|
||||
q31_t in,
|
||||
q31_t * dst,
|
||||
const q31_t * pRecipTable)
|
||||
{
|
||||
q31_t out;
|
||||
uint32_t tempVal;
|
||||
uint32_t index, i;
|
||||
uint32_t signBits;
|
||||
|
||||
if (in > 0)
|
||||
{
|
||||
signBits = ((uint32_t) (__CLZ( in) - 1));
|
||||
}
|
||||
else
|
||||
{
|
||||
signBits = ((uint32_t) (__CLZ(-in) - 1));
|
||||
}
|
||||
|
||||
/* Convert input sample to 1.31 format */
|
||||
in = (in << signBits);
|
||||
|
||||
/* calculation of index for initial approximated Val */
|
||||
index = (uint32_t)(in >> 24);
|
||||
index = (index & INDEX_MASK);
|
||||
|
||||
/* 1.31 with exp 1 */
|
||||
out = pRecipTable[index];
|
||||
|
||||
/* calculation of reciprocal value */
|
||||
/* running approximation for two iterations */
|
||||
for (i = 0U; i < 2U; i++)
|
||||
{
|
||||
tempVal = (uint32_t) (((q63_t) in * out) >> 31);
|
||||
tempVal = 0x7FFFFFFFu - tempVal;
|
||||
/* 1.31 with exp 1 */
|
||||
/* out = (q31_t) (((q63_t) out * tempVal) >> 30); */
|
||||
out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30);
|
||||
}
|
||||
|
||||
/* write output */
|
||||
*dst = out;
|
||||
|
||||
/* return num of signbits of out = 1/in value */
|
||||
return (signBits + 1U);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t arm_recip_q15(
|
||||
q15_t in,
|
||||
q15_t * dst,
|
||||
const q15_t * pRecipTable)
|
||||
{
|
||||
q15_t out = 0;
|
||||
uint32_t tempVal = 0;
|
||||
uint32_t index = 0, i = 0;
|
||||
uint32_t signBits = 0;
|
||||
|
||||
if (in > 0)
|
||||
{
|
||||
signBits = ((uint32_t)(__CLZ( in) - 17));
|
||||
}
|
||||
else
|
||||
{
|
||||
signBits = ((uint32_t)(__CLZ(-in) - 17));
|
||||
}
|
||||
|
||||
/* Convert input sample to 1.15 format */
|
||||
in = (in << signBits);
|
||||
|
||||
/* calculation of index for initial approximated Val */
|
||||
index = (uint32_t)(in >> 8);
|
||||
index = (index & INDEX_MASK);
|
||||
|
||||
/* 1.15 with exp 1 */
|
||||
out = pRecipTable[index];
|
||||
|
||||
/* calculation of reciprocal value */
|
||||
/* running approximation for two iterations */
|
||||
for (i = 0U; i < 2U; i++)
|
||||
{
|
||||
tempVal = (uint32_t) (((q31_t) in * out) >> 15);
|
||||
tempVal = 0x7FFFu - tempVal;
|
||||
/* 1.15 with exp 1 */
|
||||
out = (q15_t) (((q31_t) out * tempVal) >> 14);
|
||||
/* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */
|
||||
}
|
||||
|
||||
/* write output */
|
||||
*dst = out;
|
||||
|
||||
/* return num of signbits of out = 1/in value */
|
||||
return (signBits + 1);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief 64-bit to 32-bit unsigned normalization
|
||||
* @param[in] in is input unsigned long long value
|
||||
* @param[out] normalized is the 32-bit normalized value
|
||||
* @param[out] norm is norm scale
|
||||
*/
|
||||
__STATIC_INLINE void arm_norm_64_to_32u(uint64_t in, int32_t * normalized, int32_t *norm)
|
||||
{
|
||||
int32_t n1;
|
||||
int32_t hi = (int32_t) (in >> 32);
|
||||
int32_t lo = (int32_t) ((in << 32) >> 32);
|
||||
|
||||
n1 = __CLZ(hi) - 32;
|
||||
if (!n1)
|
||||
{
|
||||
/*
|
||||
* input fits in 32-bit
|
||||
*/
|
||||
n1 = __CLZ(lo);
|
||||
if (!n1)
|
||||
{
|
||||
/*
|
||||
* MSB set, need to scale down by 1
|
||||
*/
|
||||
*norm = -1;
|
||||
*normalized = (((uint32_t) lo) >> 1);
|
||||
} else
|
||||
{
|
||||
if (n1 == 32)
|
||||
{
|
||||
/*
|
||||
* input is zero
|
||||
*/
|
||||
*norm = 0;
|
||||
*normalized = 0;
|
||||
} else
|
||||
{
|
||||
/*
|
||||
* 32-bit normalization
|
||||
*/
|
||||
*norm = n1 - 1;
|
||||
*normalized = lo << *norm;
|
||||
}
|
||||
}
|
||||
} else
|
||||
{
|
||||
/*
|
||||
* input fits in 64-bit
|
||||
*/
|
||||
n1 = 1 - n1;
|
||||
*norm = -n1;
|
||||
/*
|
||||
* 64 bit normalization
|
||||
*/
|
||||
*normalized = (((uint32_t) lo) >> n1) | (hi << (32 - n1));
|
||||
}
|
||||
}
|
||||
|
||||
__STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
|
||||
{
|
||||
q31_t result;
|
||||
uint64_t absNum;
|
||||
int32_t normalized;
|
||||
int32_t norm;
|
||||
|
||||
/*
|
||||
* if sum fits in 32bits
|
||||
* avoid costly 64-bit division
|
||||
*/
|
||||
absNum = num > 0 ? num : -num;
|
||||
arm_norm_64_to_32u(absNum, &normalized, &norm);
|
||||
if (norm > 0)
|
||||
/*
|
||||
* 32-bit division
|
||||
*/
|
||||
result = (q31_t) num / den;
|
||||
else
|
||||
/*
|
||||
* 64-bit division
|
||||
*/
|
||||
result = (q31_t) (num / den);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*ifndef _ARM_MATH_UTILS_H_ */
|
||||
@@ -1,275 +1,275 @@
|
||||
/******************************************************************************
|
||||
* @file mpu_armv7.h
|
||||
* @brief CMSIS MPU API for Armv7-M MPU
|
||||
* @version V5.1.1
|
||||
* @date 10. February 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV7_H
|
||||
#define ARM_MPU_ARMV7_H
|
||||
|
||||
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
|
||||
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
|
||||
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
|
||||
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
|
||||
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
|
||||
|
||||
#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
|
||||
#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
|
||||
#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
|
||||
#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
|
||||
#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
|
||||
#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
|
||||
|
||||
/** MPU Region Base Address Register Value
|
||||
*
|
||||
* \param Region The region to be configured, number 0 to 15.
|
||||
* \param BaseAddress The base address for the region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(Region, BaseAddress) \
|
||||
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
|
||||
((Region) & MPU_RBAR_REGION_Msk) | \
|
||||
(MPU_RBAR_VALID_Msk))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attributes
|
||||
*
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
|
||||
((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
|
||||
(((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
|
||||
(((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
|
||||
(((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
|
||||
((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
|
||||
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
|
||||
(((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
|
||||
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
|
||||
(((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
|
||||
(((MPU_RASR_ENABLE_Msk))))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
|
||||
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for strongly ordered memory.
|
||||
* - TEX: 000b
|
||||
* - Shareable
|
||||
* - Non-cacheable
|
||||
* - Non-bufferable
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for device memory.
|
||||
* - TEX: 000b (if shareable) or 010b (if non-shareable)
|
||||
* - Shareable or non-shareable
|
||||
* - Non-cacheable
|
||||
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
|
||||
*
|
||||
* \param IsShareable Configures the device memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for normal memory.
|
||||
* - TEX: 1BBb (reflecting outer cacheability rules)
|
||||
* - Shareable or non-shareable
|
||||
* - Cacheable or non-cacheable (reflecting inner cacheability rules)
|
||||
* - Bufferable or non-bufferable (reflecting inner cacheability rules)
|
||||
*
|
||||
* \param OuterCp Configures the outer cache policy.
|
||||
* \param InnerCp Configures the inner cache policy.
|
||||
* \param IsShareable Configures the memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute non-cacheable policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_NOCACHE 0U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, write and read allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_WRA 1U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-through, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WT_NWA 2U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_NWA 3U
|
||||
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; //!< The region base address register value (RBAR)
|
||||
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
__DMB();
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RASR = 0U;
|
||||
}
|
||||
|
||||
/** Configure an MPU region.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Memcopy with strictly ordered memory access, e.g. for register targets.
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
while (cnt > MPU_TYPE_RALIASES) {
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
|
||||
table += MPU_TYPE_RALIASES;
|
||||
cnt -= MPU_TYPE_RALIASES;
|
||||
}
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
|
||||
#endif
|
||||
/******************************************************************************
|
||||
* @file mpu_armv7.h
|
||||
* @brief CMSIS MPU API for Armv7-M MPU
|
||||
* @version V5.1.2
|
||||
* @date 25. May 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV7_H
|
||||
#define ARM_MPU_ARMV7_H
|
||||
|
||||
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
|
||||
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
|
||||
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
|
||||
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
|
||||
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
|
||||
|
||||
#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
|
||||
#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
|
||||
#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
|
||||
#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
|
||||
#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
|
||||
#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
|
||||
|
||||
/** MPU Region Base Address Register Value
|
||||
*
|
||||
* \param Region The region to be configured, number 0 to 15.
|
||||
* \param BaseAddress The base address for the region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(Region, BaseAddress) \
|
||||
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
|
||||
((Region) & MPU_RBAR_REGION_Msk) | \
|
||||
(MPU_RBAR_VALID_Msk))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attributes
|
||||
*
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
|
||||
((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
|
||||
(((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
|
||||
(((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
|
||||
(((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
|
||||
((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
|
||||
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
|
||||
(((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
|
||||
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
|
||||
(((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
|
||||
(((MPU_RASR_ENABLE_Msk))))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
|
||||
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for strongly ordered memory.
|
||||
* - TEX: 000b
|
||||
* - Shareable
|
||||
* - Non-cacheable
|
||||
* - Non-bufferable
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for device memory.
|
||||
* - TEX: 000b (if shareable) or 010b (if non-shareable)
|
||||
* - Shareable or non-shareable
|
||||
* - Non-cacheable
|
||||
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
|
||||
*
|
||||
* \param IsShareable Configures the device memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for normal memory.
|
||||
* - TEX: 1BBb (reflecting outer cacheability rules)
|
||||
* - Shareable or non-shareable
|
||||
* - Cacheable or non-cacheable (reflecting inner cacheability rules)
|
||||
* - Bufferable or non-bufferable (reflecting inner cacheability rules)
|
||||
*
|
||||
* \param OuterCp Configures the outer cache policy.
|
||||
* \param InnerCp Configures the inner cache policy.
|
||||
* \param IsShareable Configures the memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute non-cacheable policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_NOCACHE 0U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, write and read allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_WRA 1U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-through, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WT_NWA 2U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_NWA 3U
|
||||
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; //!< The region base address register value (RBAR)
|
||||
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
__DMB();
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RASR = 0U;
|
||||
}
|
||||
|
||||
/** Configure an MPU region.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rasr Value for RASR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rasr Value for RASR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_Load().
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
while (cnt > MPU_TYPE_RALIASES) {
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
|
||||
table += MPU_TYPE_RALIASES;
|
||||
cnt -= MPU_TYPE_RALIASES;
|
||||
}
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,352 +1,352 @@
|
||||
/******************************************************************************
|
||||
* @file mpu_armv8.h
|
||||
* @brief CMSIS MPU API for Armv8-M and Armv8.1-M MPU
|
||||
* @version V5.1.2
|
||||
* @date 10. February 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV8_H
|
||||
#define ARM_MPU_ARMV8_H
|
||||
|
||||
/** \brief Attribute for device memory (outer only) */
|
||||
#define ARM_MPU_ATTR_DEVICE ( 0U )
|
||||
|
||||
/** \brief Attribute for non-cacheable, normal memory */
|
||||
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
|
||||
|
||||
/** \brief Attribute for normal memory (outer and inner)
|
||||
* \param NT Non-Transient: Set to 1 for non-transient data.
|
||||
* \param WB Write-Back: Set to 1 to use write-back update policy.
|
||||
* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
|
||||
* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
|
||||
*/
|
||||
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
|
||||
((((NT) & 1U) << 3U) | (((WB) & 1U) << 2U) | (((RA) & 1U) << 1U) | ((WA) & 1U))
|
||||
|
||||
/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
|
||||
|
||||
/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
|
||||
|
||||
/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
|
||||
|
||||
/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_GRE (3U)
|
||||
|
||||
/** \brief Memory Attribute
|
||||
* \param O Outer memory attributes
|
||||
* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
|
||||
*/
|
||||
#define ARM_MPU_ATTR(O, I) ((((O) & 0xFU) << 4U) | ((((O) & 0xFU) != 0U) ? ((I) & 0xFU) : (((I) & 0x3U) << 2U)))
|
||||
|
||||
/** \brief Normal memory non-shareable */
|
||||
#define ARM_MPU_SH_NON (0U)
|
||||
|
||||
/** \brief Normal memory outer shareable */
|
||||
#define ARM_MPU_SH_OUTER (2U)
|
||||
|
||||
/** \brief Normal memory inner shareable */
|
||||
#define ARM_MPU_SH_INNER (3U)
|
||||
|
||||
/** \brief Memory access permissions
|
||||
* \param RO Read-Only: Set to 1 for read-only memory.
|
||||
* \param NP Non-Privileged: Set to 1 for non-privileged memory.
|
||||
*/
|
||||
#define ARM_MPU_AP_(RO, NP) ((((RO) & 1U) << 1U) | ((NP) & 1U))
|
||||
|
||||
/** \brief Region Base Address Register value
|
||||
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
|
||||
* \param SH Defines the Shareability domain for this memory region.
|
||||
* \param RO Read-Only: Set to 1 for a read-only memory region.
|
||||
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
|
||||
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
|
||||
(((BASE) & MPU_RBAR_BASE_Msk) | \
|
||||
(((SH) << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
|
||||
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
|
||||
(((XN) << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
|
||||
|
||||
/** \brief Region Limit Address Register value
|
||||
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
|
||||
* \param IDX The attribute index to be associated with this memory region.
|
||||
*/
|
||||
#define ARM_MPU_RLAR(LIMIT, IDX) \
|
||||
(((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
|
||||
(((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
|
||||
(MPU_RLAR_EN_Msk))
|
||||
|
||||
#if defined(MPU_RLAR_PXN_Pos)
|
||||
|
||||
/** \brief Region Limit Address Register with PXN value
|
||||
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
|
||||
* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
|
||||
* \param IDX The attribute index to be associated with this memory region.
|
||||
*/
|
||||
#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
|
||||
(((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
|
||||
(((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
|
||||
(((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
|
||||
(MPU_RLAR_EN_Msk))
|
||||
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; /*!< Region Base Address Register value */
|
||||
uint32_t RLAR; /*!< Region Limit Address Register value */
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
__DMB();
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Enable the Non-secure MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
|
||||
{
|
||||
__DMB();
|
||||
MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the Non-secure MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable_NS(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Set the memory attribute encoding to the given MPU.
|
||||
* \param mpu Pointer to the MPU to be configured.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
|
||||
{
|
||||
const uint8_t reg = idx / 4U;
|
||||
const uint32_t pos = ((idx % 4U) * 8U);
|
||||
const uint32_t mask = 0xFFU << pos;
|
||||
|
||||
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
|
||||
return; // invalid index
|
||||
}
|
||||
|
||||
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
|
||||
}
|
||||
|
||||
/** Set the memory attribute encoding.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
|
||||
{
|
||||
ARM_MPU_SetMemAttrEx(MPU, idx, attr);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Set the memory attribute encoding to the Non-secure MPU.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
|
||||
{
|
||||
ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Clear and disable the given MPU region of the given MPU.
|
||||
* \param mpu Pointer to MPU to be used.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
|
||||
{
|
||||
mpu->RNR = rnr;
|
||||
mpu->RLAR = 0U;
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
ARM_MPU_ClrRegionEx(MPU, rnr);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Clear and disable the given Non-secure MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
|
||||
{
|
||||
ARM_MPU_ClrRegionEx(MPU_NS, rnr);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Configure the given MPU region of the given MPU.
|
||||
* \param mpu Pointer to MPU to be used.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
mpu->RNR = rnr;
|
||||
mpu->RBAR = rbar;
|
||||
mpu->RLAR = rlar;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Configure the given Non-secure MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Memcopy with strictly ordered memory access, e.g. for register targets.
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table to the given MPU.
|
||||
* \param mpu Pointer to the MPU registers to be used.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
if (cnt == 1U) {
|
||||
mpu->RNR = rnr;
|
||||
ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
|
||||
} else {
|
||||
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
|
||||
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
|
||||
|
||||
mpu->RNR = rnrBase;
|
||||
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
|
||||
uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
|
||||
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
|
||||
table += c;
|
||||
cnt -= c;
|
||||
rnrOffset = 0U;
|
||||
rnrBase += MPU_TYPE_RALIASES;
|
||||
mpu->RNR = rnrBase;
|
||||
}
|
||||
|
||||
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
ARM_MPU_LoadEx(MPU, rnr, table, cnt);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Load the given number of MPU regions from a table to the Non-secure MPU.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/******************************************************************************
|
||||
* @file mpu_armv8.h
|
||||
* @brief CMSIS MPU API for Armv8-M and Armv8.1-M MPU
|
||||
* @version V5.1.3
|
||||
* @date 03. February 2021
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2021 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV8_H
|
||||
#define ARM_MPU_ARMV8_H
|
||||
|
||||
/** \brief Attribute for device memory (outer only) */
|
||||
#define ARM_MPU_ATTR_DEVICE ( 0U )
|
||||
|
||||
/** \brief Attribute for non-cacheable, normal memory */
|
||||
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
|
||||
|
||||
/** \brief Attribute for normal memory (outer and inner)
|
||||
* \param NT Non-Transient: Set to 1 for non-transient data.
|
||||
* \param WB Write-Back: Set to 1 to use write-back update policy.
|
||||
* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
|
||||
* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
|
||||
*/
|
||||
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
|
||||
((((NT) & 1U) << 3U) | (((WB) & 1U) << 2U) | (((RA) & 1U) << 1U) | ((WA) & 1U))
|
||||
|
||||
/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
|
||||
|
||||
/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
|
||||
|
||||
/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
|
||||
|
||||
/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_GRE (3U)
|
||||
|
||||
/** \brief Memory Attribute
|
||||
* \param O Outer memory attributes
|
||||
* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
|
||||
*/
|
||||
#define ARM_MPU_ATTR(O, I) ((((O) & 0xFU) << 4U) | ((((O) & 0xFU) != 0U) ? ((I) & 0xFU) : (((I) & 0x3U) << 2U)))
|
||||
|
||||
/** \brief Normal memory non-shareable */
|
||||
#define ARM_MPU_SH_NON (0U)
|
||||
|
||||
/** \brief Normal memory outer shareable */
|
||||
#define ARM_MPU_SH_OUTER (2U)
|
||||
|
||||
/** \brief Normal memory inner shareable */
|
||||
#define ARM_MPU_SH_INNER (3U)
|
||||
|
||||
/** \brief Memory access permissions
|
||||
* \param RO Read-Only: Set to 1 for read-only memory.
|
||||
* \param NP Non-Privileged: Set to 1 for non-privileged memory.
|
||||
*/
|
||||
#define ARM_MPU_AP_(RO, NP) ((((RO) & 1U) << 1U) | ((NP) & 1U))
|
||||
|
||||
/** \brief Region Base Address Register value
|
||||
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
|
||||
* \param SH Defines the Shareability domain for this memory region.
|
||||
* \param RO Read-Only: Set to 1 for a read-only memory region.
|
||||
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
|
||||
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
|
||||
(((BASE) & MPU_RBAR_BASE_Msk) | \
|
||||
(((SH) << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
|
||||
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
|
||||
(((XN) << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
|
||||
|
||||
/** \brief Region Limit Address Register value
|
||||
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
|
||||
* \param IDX The attribute index to be associated with this memory region.
|
||||
*/
|
||||
#define ARM_MPU_RLAR(LIMIT, IDX) \
|
||||
(((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
|
||||
(((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
|
||||
(MPU_RLAR_EN_Msk))
|
||||
|
||||
#if defined(MPU_RLAR_PXN_Pos)
|
||||
|
||||
/** \brief Region Limit Address Register with PXN value
|
||||
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
|
||||
* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
|
||||
* \param IDX The attribute index to be associated with this memory region.
|
||||
*/
|
||||
#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
|
||||
(((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
|
||||
(((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
|
||||
(((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
|
||||
(MPU_RLAR_EN_Msk))
|
||||
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; /*!< Region Base Address Register value */
|
||||
uint32_t RLAR; /*!< Region Limit Address Register value */
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
__DMB();
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Enable the Non-secure MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
|
||||
{
|
||||
__DMB();
|
||||
MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the Non-secure MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable_NS(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Set the memory attribute encoding to the given MPU.
|
||||
* \param mpu Pointer to the MPU to be configured.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
|
||||
{
|
||||
const uint8_t reg = idx / 4U;
|
||||
const uint32_t pos = ((idx % 4U) * 8U);
|
||||
const uint32_t mask = 0xFFU << pos;
|
||||
|
||||
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
|
||||
return; // invalid index
|
||||
}
|
||||
|
||||
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
|
||||
}
|
||||
|
||||
/** Set the memory attribute encoding.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
|
||||
{
|
||||
ARM_MPU_SetMemAttrEx(MPU, idx, attr);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Set the memory attribute encoding to the Non-secure MPU.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
|
||||
{
|
||||
ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Clear and disable the given MPU region of the given MPU.
|
||||
* \param mpu Pointer to MPU to be used.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
|
||||
{
|
||||
mpu->RNR = rnr;
|
||||
mpu->RLAR = 0U;
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
ARM_MPU_ClrRegionEx(MPU, rnr);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Clear and disable the given Non-secure MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
|
||||
{
|
||||
ARM_MPU_ClrRegionEx(MPU_NS, rnr);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Configure the given MPU region of the given MPU.
|
||||
* \param mpu Pointer to MPU to be used.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
mpu->RNR = rnr;
|
||||
mpu->RBAR = rbar;
|
||||
mpu->RLAR = rlar;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Configure the given Non-secure MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_LoadEx()
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table to the given MPU.
|
||||
* \param mpu Pointer to the MPU registers to be used.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
if (cnt == 1U) {
|
||||
mpu->RNR = rnr;
|
||||
ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
|
||||
} else {
|
||||
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
|
||||
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
|
||||
|
||||
mpu->RNR = rnrBase;
|
||||
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
|
||||
uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
|
||||
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
|
||||
table += c;
|
||||
cnt -= c;
|
||||
rnrOffset = 0U;
|
||||
rnrBase += MPU_TYPE_RALIASES;
|
||||
mpu->RNR = rnrBase;
|
||||
}
|
||||
|
||||
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
ARM_MPU_LoadEx(MPU, rnr, table, cnt);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Load the given number of MPU regions from a table to the Non-secure MPU.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -1,337 +1,337 @@
|
||||
/******************************************************************************
|
||||
* @file pmu_armv8.h
|
||||
* @brief CMSIS PMU API for Armv8.1-M PMU
|
||||
* @version V1.0.0
|
||||
* @date 24. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_PMU_ARMV8_H
|
||||
#define ARM_PMU_ARMV8_H
|
||||
|
||||
/**
|
||||
* \brief PMU Events
|
||||
* \note See the Armv8.1-M Architecture Reference Manual for full details on these PMU events.
|
||||
* */
|
||||
|
||||
#define ARM_PMU_SW_INCR 0x0000 /*!< Software update to the PMU_SWINC register, architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_L1I_CACHE_REFILL 0x0001 /*!< L1 I-Cache refill */
|
||||
#define ARM_PMU_L1D_CACHE_REFILL 0x0003 /*!< L1 D-Cache refill */
|
||||
#define ARM_PMU_L1D_CACHE 0x0004 /*!< L1 D-Cache access */
|
||||
#define ARM_PMU_LD_RETIRED 0x0006 /*!< Memory-reading instruction architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_ST_RETIRED 0x0007 /*!< Memory-writing instruction architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_INST_RETIRED 0x0008 /*!< Instruction architecturally executed */
|
||||
#define ARM_PMU_EXC_TAKEN 0x0009 /*!< Exception entry */
|
||||
#define ARM_PMU_EXC_RETURN 0x000A /*!< Exception return instruction architecturally executed and the condition code check pass */
|
||||
#define ARM_PMU_PC_WRITE_RETIRED 0x000C /*!< Software change to the Program Counter (PC). Instruction is architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_BR_IMMED_RETIRED 0x000D /*!< Immediate branch architecturally executed */
|
||||
#define ARM_PMU_BR_RETURN_RETIRED 0x000E /*!< Function return instruction architecturally executed and the condition code check pass */
|
||||
#define ARM_PMU_UNALIGNED_LDST_RETIRED 0x000F /*!< Unaligned memory memory-reading or memory-writing instruction architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_BR_MIS_PRED 0x0010 /*!< Mispredicted or not predicted branch speculatively executed */
|
||||
#define ARM_PMU_CPU_CYCLES 0x0011 /*!< Cycle */
|
||||
#define ARM_PMU_BR_PRED 0x0012 /*!< Predictable branch speculatively executed */
|
||||
#define ARM_PMU_MEM_ACCESS 0x0013 /*!< Data memory access */
|
||||
#define ARM_PMU_L1I_CACHE 0x0014 /*!< Level 1 instruction cache access */
|
||||
#define ARM_PMU_L1D_CACHE_WB 0x0015 /*!< Level 1 data cache write-back */
|
||||
#define ARM_PMU_L2D_CACHE 0x0016 /*!< Level 2 data cache access */
|
||||
#define ARM_PMU_L2D_CACHE_REFILL 0x0017 /*!< Level 2 data cache refill */
|
||||
#define ARM_PMU_L2D_CACHE_WB 0x0018 /*!< Level 2 data cache write-back */
|
||||
#define ARM_PMU_BUS_ACCESS 0x0019 /*!< Bus access */
|
||||
#define ARM_PMU_MEMORY_ERROR 0x001A /*!< Local memory error */
|
||||
#define ARM_PMU_INST_SPEC 0x001B /*!< Instruction speculatively executed */
|
||||
#define ARM_PMU_BUS_CYCLES 0x001D /*!< Bus cycles */
|
||||
#define ARM_PMU_CHAIN 0x001E /*!< For an odd numbered counter, increment when an overflow occurs on the preceding even-numbered counter on the same PE */
|
||||
#define ARM_PMU_L1D_CACHE_ALLOCATE 0x001F /*!< Level 1 data cache allocation without refill */
|
||||
#define ARM_PMU_L2D_CACHE_ALLOCATE 0x0020 /*!< Level 2 data cache allocation without refill */
|
||||
#define ARM_PMU_BR_RETIRED 0x0021 /*!< Branch instruction architecturally executed */
|
||||
#define ARM_PMU_BR_MIS_PRED_RETIRED 0x0022 /*!< Mispredicted branch instruction architecturally executed */
|
||||
#define ARM_PMU_STALL_FRONTEND 0x0023 /*!< No operation issued because of the frontend */
|
||||
#define ARM_PMU_STALL_BACKEND 0x0024 /*!< No operation issued because of the backend */
|
||||
#define ARM_PMU_L2I_CACHE 0x0027 /*!< Level 2 instruction cache access */
|
||||
#define ARM_PMU_L2I_CACHE_REFILL 0x0028 /*!< Level 2 instruction cache refill */
|
||||
#define ARM_PMU_L3D_CACHE_ALLOCATE 0x0029 /*!< Level 3 data cache allocation without refill */
|
||||
#define ARM_PMU_L3D_CACHE_REFILL 0x002A /*!< Level 3 data cache refill */
|
||||
#define ARM_PMU_L3D_CACHE 0x002B /*!< Level 3 data cache access */
|
||||
#define ARM_PMU_L3D_CACHE_WB 0x002C /*!< Level 3 data cache write-back */
|
||||
#define ARM_PMU_LL_CACHE_RD 0x0036 /*!< Last level data cache read */
|
||||
#define ARM_PMU_LL_CACHE_MISS_RD 0x0037 /*!< Last level data cache read miss */
|
||||
#define ARM_PMU_L1D_CACHE_MISS_RD 0x0039 /*!< Level 1 data cache read miss */
|
||||
#define ARM_PMU_OP_COMPLETE 0x003A /*!< Operation retired */
|
||||
#define ARM_PMU_OP_SPEC 0x003B /*!< Operation speculatively executed */
|
||||
#define ARM_PMU_STALL 0x003C /*!< Stall cycle for instruction or operation not sent for execution */
|
||||
#define ARM_PMU_STALL_OP_BACKEND 0x003D /*!< Stall cycle for instruction or operation not sent for execution due to pipeline backend */
|
||||
#define ARM_PMU_STALL_OP_FRONTEND 0x003E /*!< Stall cycle for instruction or operation not sent for execution due to pipeline frontend */
|
||||
#define ARM_PMU_STALL_OP 0x003F /*!< Instruction or operation slots not occupied each cycle */
|
||||
#define ARM_PMU_L1D_CACHE_RD 0x0040 /*!< Level 1 data cache read */
|
||||
#define ARM_PMU_LE_RETIRED 0x0100 /*!< Loop end instruction executed */
|
||||
#define ARM_PMU_LE_SPEC 0x0101 /*!< Loop end instruction speculatively executed */
|
||||
#define ARM_PMU_BF_RETIRED 0x0104 /*!< Branch future instruction architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_BF_SPEC 0x0105 /*!< Branch future instruction speculatively executed and condition code check pass */
|
||||
#define ARM_PMU_LE_CANCEL 0x0108 /*!< Loop end instruction not taken */
|
||||
#define ARM_PMU_BF_CANCEL 0x0109 /*!< Branch future instruction not taken */
|
||||
#define ARM_PMU_SE_CALL_S 0x0114 /*!< Call to secure function, resulting in Security state change */
|
||||
#define ARM_PMU_SE_CALL_NS 0x0115 /*!< Call to non-secure function, resulting in Security state change */
|
||||
#define ARM_PMU_DWT_CMPMATCH0 0x0118 /*!< DWT comparator 0 match */
|
||||
#define ARM_PMU_DWT_CMPMATCH1 0x0119 /*!< DWT comparator 1 match */
|
||||
#define ARM_PMU_DWT_CMPMATCH2 0x011A /*!< DWT comparator 2 match */
|
||||
#define ARM_PMU_DWT_CMPMATCH3 0x011B /*!< DWT comparator 3 match */
|
||||
#define ARM_PMU_MVE_INST_RETIRED 0x0200 /*!< MVE instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_INST_SPEC 0x0201 /*!< MVE instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_FP_RETIRED 0x0204 /*!< MVE floating-point instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_FP_SPEC 0x0205 /*!< MVE floating-point instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_FP_HP_RETIRED 0x0208 /*!< MVE half-precision floating-point instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_FP_HP_SPEC 0x0209 /*!< MVE half-precision floating-point instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_FP_SP_RETIRED 0x020C /*!< MVE single-precision floating-point instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_FP_SP_SPEC 0x020D /*!< MVE single-precision floating-point instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_FP_MAC_RETIRED 0x0214 /*!< MVE floating-point multiply or multiply-accumulate instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_FP_MAC_SPEC 0x0215 /*!< MVE floating-point multiply or multiply-accumulate instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_INT_RETIRED 0x0224 /*!< MVE integer instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_INT_SPEC 0x0225 /*!< MVE integer instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_INT_MAC_RETIRED 0x0228 /*!< MVE multiply or multiply-accumulate instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_INT_MAC_SPEC 0x0229 /*!< MVE multiply or multiply-accumulate instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_RETIRED 0x0238 /*!< MVE load or store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_SPEC 0x0239 /*!< MVE load or store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LD_RETIRED 0x023C /*!< MVE load instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LD_SPEC 0x023D /*!< MVE load instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_ST_RETIRED 0x0240 /*!< MVE store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_ST_SPEC 0x0241 /*!< MVE store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_CONTIG_RETIRED 0x0244 /*!< MVE contiguous load or store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_CONTIG_SPEC 0x0245 /*!< MVE contiguous load or store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LD_CONTIG_RETIRED 0x0248 /*!< MVE contiguous load instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LD_CONTIG_SPEC 0x0249 /*!< MVE contiguous load instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_ST_CONTIG_RETIRED 0x024C /*!< MVE contiguous store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_ST_CONTIG_SPEC 0x024D /*!< MVE contiguous store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_NONCONTIG_RETIRED 0x0250 /*!< MVE non-contiguous load or store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_NONCONTIG_SPEC 0x0251 /*!< MVE non-contiguous load or store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LD_NONCONTIG_RETIRED 0x0254 /*!< MVE non-contiguous load instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LD_NONCONTIG_SPEC 0x0255 /*!< MVE non-contiguous load instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_ST_NONCONTIG_RETIRED 0x0258 /*!< MVE non-contiguous store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_ST_NONCONTIG_SPEC 0x0259 /*!< MVE non-contiguous store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_MULTI_RETIRED 0x025C /*!< MVE memory instruction targeting multiple registers architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_MULTI_SPEC 0x025D /*!< MVE memory instruction targeting multiple registers speculatively executed */
|
||||
#define ARM_PMU_MVE_LD_MULTI_RETIRED 0x0260 /*!< MVE memory load instruction targeting multiple registers architecturally executed */
|
||||
#define ARM_PMU_MVE_LD_MULTI_SPEC 0x0261 /*!< MVE memory load instruction targeting multiple registers speculatively executed */
|
||||
#define ARM_PMU_MVE_ST_MULTI_RETIRED 0x0261 /*!< MVE memory store instruction targeting multiple registers architecturally executed */
|
||||
#define ARM_PMU_MVE_ST_MULTI_SPEC 0x0265 /*!< MVE memory store instruction targeting multiple registers speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_UNALIGNED_RETIRED 0x028C /*!< MVE unaligned memory load or store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_UNALIGNED_SPEC 0x028D /*!< MVE unaligned memory load or store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LD_UNALIGNED_RETIRED 0x0290 /*!< MVE unaligned load instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LD_UNALIGNED_SPEC 0x0291 /*!< MVE unaligned load instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_ST_UNALIGNED_RETIRED 0x0294 /*!< MVE unaligned store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_ST_UNALIGNED_SPEC 0x0295 /*!< MVE unaligned store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_RETIRED 0x0298 /*!< MVE unaligned noncontiguous load or store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_SPEC 0x0299 /*!< MVE unaligned noncontiguous load or store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_RETIRED 0x02A0 /*!< MVE vector reduction instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_SPEC 0x02A1 /*!< MVE vector reduction instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_FP_RETIRED 0x02A4 /*!< MVE floating-point vector reduction instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_FP_SPEC 0x02A5 /*!< MVE floating-point vector reduction instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_INT_RETIRED 0x02A8 /*!< MVE integer vector reduction instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_INT_SPEC 0x02A9 /*!< MVE integer vector reduction instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_PRED 0x02B8 /*!< Cycles where one or more predicated beats architecturally executed */
|
||||
#define ARM_PMU_MVE_STALL 0x02CC /*!< Stall cycles caused by an MVE instruction */
|
||||
#define ARM_PMU_MVE_STALL_RESOURCE 0x02CD /*!< Stall cycles caused by an MVE instruction because of resource conflicts */
|
||||
#define ARM_PMU_MVE_STALL_RESOURCE_MEM 0x02CE /*!< Stall cycles caused by an MVE instruction because of memory resource conflicts */
|
||||
#define ARM_PMU_MVE_STALL_RESOURCE_FP 0x02CF /*!< Stall cycles caused by an MVE instruction because of floating-point resource conflicts */
|
||||
#define ARM_PMU_MVE_STALL_RESOURCE_INT 0x02D0 /*!< Stall cycles caused by an MVE instruction because of integer resource conflicts */
|
||||
#define ARM_PMU_MVE_STALL_BREAK 0x02D3 /*!< Stall cycles caused by an MVE chain break */
|
||||
#define ARM_PMU_MVE_STALL_DEPENDENCY 0x02D4 /*!< Stall cycles caused by MVE register dependency */
|
||||
#define ARM_PMU_ITCM_ACCESS 0x4007 /*!< Instruction TCM access */
|
||||
#define ARM_PMU_DTCM_ACCESS 0x4008 /*!< Data TCM access */
|
||||
#define ARM_PMU_TRCEXTOUT0 0x4010 /*!< ETM external output 0 */
|
||||
#define ARM_PMU_TRCEXTOUT1 0x4011 /*!< ETM external output 1 */
|
||||
#define ARM_PMU_TRCEXTOUT2 0x4012 /*!< ETM external output 2 */
|
||||
#define ARM_PMU_TRCEXTOUT3 0x4013 /*!< ETM external output 3 */
|
||||
#define ARM_PMU_CTI_TRIGOUT4 0x4018 /*!< Cross-trigger Interface output trigger 4 */
|
||||
#define ARM_PMU_CTI_TRIGOUT5 0x4019 /*!< Cross-trigger Interface output trigger 5 */
|
||||
#define ARM_PMU_CTI_TRIGOUT6 0x401A /*!< Cross-trigger Interface output trigger 6 */
|
||||
#define ARM_PMU_CTI_TRIGOUT7 0x401B /*!< Cross-trigger Interface output trigger 7 */
|
||||
|
||||
/** \brief PMU Functions */
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_Enable(void);
|
||||
__STATIC_INLINE void ARM_PMU_Disable(void);
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type);
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void);
|
||||
__STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void);
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask);
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask);
|
||||
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void);
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num);
|
||||
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void);
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask);
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask);
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask);
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask);
|
||||
|
||||
/**
|
||||
\brief Enable the PMU
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Enable(void)
|
||||
{
|
||||
PMU->CTRL |= PMU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Disable the PMU
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Disable(void)
|
||||
{
|
||||
PMU->CTRL &= ~PMU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Set event to count for PMU eventer counter
|
||||
\param [in] num Event counter (0-30) to configure
|
||||
\param [in] type Event to count
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type)
|
||||
{
|
||||
PMU->EVTYPER[num] = type;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Reset cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void)
|
||||
{
|
||||
PMU->CTRL |= PMU_CTRL_CYCCNT_RESET_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Reset all event counters
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void)
|
||||
{
|
||||
PMU->CTRL |= PMU_CTRL_EVENTCNT_RESET_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Enable counters
|
||||
\param [in] mask Counters to enable
|
||||
\note Enables one or more of the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask)
|
||||
{
|
||||
PMU->CNTENSET = mask;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Disable counters
|
||||
\param [in] mask Counters to enable
|
||||
\note Disables one or more of the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask)
|
||||
{
|
||||
PMU->CNTENCLR = mask;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Read cycle counter
|
||||
\return Cycle count
|
||||
*/
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void)
|
||||
{
|
||||
return PMU->CCNTR;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Read event counter
|
||||
\param [in] num Event counter (0-30) to read
|
||||
\return Event count
|
||||
*/
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num)
|
||||
{
|
||||
return PMU->EVCNTR[num];
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Read counter overflow status
|
||||
\return Counter overflow status bits for the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void)
|
||||
{
|
||||
return PMU->OVSSET;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Clear counter overflow status
|
||||
\param [in] mask Counter overflow status bits to clear
|
||||
\note Clears overflow status bits for one or more of the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask)
|
||||
{
|
||||
PMU->OVSCLR = mask;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Enable counter overflow interrupt request
|
||||
\param [in] mask Counter overflow interrupt request bits to set
|
||||
\note Sets overflow interrupt request bits for one or more of the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask)
|
||||
{
|
||||
PMU->INTENSET = mask;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Disable counter overflow interrupt request
|
||||
\param [in] mask Counter overflow interrupt request bits to clear
|
||||
\note Clears overflow interrupt request bits for one or more of the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask)
|
||||
{
|
||||
PMU->INTENCLR = mask;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Software increment event counter
|
||||
\param [in] mask Counters to increment
|
||||
\note Software increment bits for one or more event counters (0-30)
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask)
|
||||
{
|
||||
PMU->SWINC = mask;
|
||||
}
|
||||
|
||||
#endif
|
||||
/******************************************************************************
|
||||
* @file pmu_armv8.h
|
||||
* @brief CMSIS PMU API for Armv8.1-M PMU
|
||||
* @version V1.0.1
|
||||
* @date 15. April 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_PMU_ARMV8_H
|
||||
#define ARM_PMU_ARMV8_H
|
||||
|
||||
/**
|
||||
* \brief PMU Events
|
||||
* \note See the Armv8.1-M Architecture Reference Manual for full details on these PMU events.
|
||||
* */
|
||||
|
||||
#define ARM_PMU_SW_INCR 0x0000 /*!< Software update to the PMU_SWINC register, architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_L1I_CACHE_REFILL 0x0001 /*!< L1 I-Cache refill */
|
||||
#define ARM_PMU_L1D_CACHE_REFILL 0x0003 /*!< L1 D-Cache refill */
|
||||
#define ARM_PMU_L1D_CACHE 0x0004 /*!< L1 D-Cache access */
|
||||
#define ARM_PMU_LD_RETIRED 0x0006 /*!< Memory-reading instruction architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_ST_RETIRED 0x0007 /*!< Memory-writing instruction architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_INST_RETIRED 0x0008 /*!< Instruction architecturally executed */
|
||||
#define ARM_PMU_EXC_TAKEN 0x0009 /*!< Exception entry */
|
||||
#define ARM_PMU_EXC_RETURN 0x000A /*!< Exception return instruction architecturally executed and the condition code check pass */
|
||||
#define ARM_PMU_PC_WRITE_RETIRED 0x000C /*!< Software change to the Program Counter (PC). Instruction is architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_BR_IMMED_RETIRED 0x000D /*!< Immediate branch architecturally executed */
|
||||
#define ARM_PMU_BR_RETURN_RETIRED 0x000E /*!< Function return instruction architecturally executed and the condition code check pass */
|
||||
#define ARM_PMU_UNALIGNED_LDST_RETIRED 0x000F /*!< Unaligned memory memory-reading or memory-writing instruction architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_BR_MIS_PRED 0x0010 /*!< Mispredicted or not predicted branch speculatively executed */
|
||||
#define ARM_PMU_CPU_CYCLES 0x0011 /*!< Cycle */
|
||||
#define ARM_PMU_BR_PRED 0x0012 /*!< Predictable branch speculatively executed */
|
||||
#define ARM_PMU_MEM_ACCESS 0x0013 /*!< Data memory access */
|
||||
#define ARM_PMU_L1I_CACHE 0x0014 /*!< Level 1 instruction cache access */
|
||||
#define ARM_PMU_L1D_CACHE_WB 0x0015 /*!< Level 1 data cache write-back */
|
||||
#define ARM_PMU_L2D_CACHE 0x0016 /*!< Level 2 data cache access */
|
||||
#define ARM_PMU_L2D_CACHE_REFILL 0x0017 /*!< Level 2 data cache refill */
|
||||
#define ARM_PMU_L2D_CACHE_WB 0x0018 /*!< Level 2 data cache write-back */
|
||||
#define ARM_PMU_BUS_ACCESS 0x0019 /*!< Bus access */
|
||||
#define ARM_PMU_MEMORY_ERROR 0x001A /*!< Local memory error */
|
||||
#define ARM_PMU_INST_SPEC 0x001B /*!< Instruction speculatively executed */
|
||||
#define ARM_PMU_BUS_CYCLES 0x001D /*!< Bus cycles */
|
||||
#define ARM_PMU_CHAIN 0x001E /*!< For an odd numbered counter, increment when an overflow occurs on the preceding even-numbered counter on the same PE */
|
||||
#define ARM_PMU_L1D_CACHE_ALLOCATE 0x001F /*!< Level 1 data cache allocation without refill */
|
||||
#define ARM_PMU_L2D_CACHE_ALLOCATE 0x0020 /*!< Level 2 data cache allocation without refill */
|
||||
#define ARM_PMU_BR_RETIRED 0x0021 /*!< Branch instruction architecturally executed */
|
||||
#define ARM_PMU_BR_MIS_PRED_RETIRED 0x0022 /*!< Mispredicted branch instruction architecturally executed */
|
||||
#define ARM_PMU_STALL_FRONTEND 0x0023 /*!< No operation issued because of the frontend */
|
||||
#define ARM_PMU_STALL_BACKEND 0x0024 /*!< No operation issued because of the backend */
|
||||
#define ARM_PMU_L2I_CACHE 0x0027 /*!< Level 2 instruction cache access */
|
||||
#define ARM_PMU_L2I_CACHE_REFILL 0x0028 /*!< Level 2 instruction cache refill */
|
||||
#define ARM_PMU_L3D_CACHE_ALLOCATE 0x0029 /*!< Level 3 data cache allocation without refill */
|
||||
#define ARM_PMU_L3D_CACHE_REFILL 0x002A /*!< Level 3 data cache refill */
|
||||
#define ARM_PMU_L3D_CACHE 0x002B /*!< Level 3 data cache access */
|
||||
#define ARM_PMU_L3D_CACHE_WB 0x002C /*!< Level 3 data cache write-back */
|
||||
#define ARM_PMU_LL_CACHE_RD 0x0036 /*!< Last level data cache read */
|
||||
#define ARM_PMU_LL_CACHE_MISS_RD 0x0037 /*!< Last level data cache read miss */
|
||||
#define ARM_PMU_L1D_CACHE_MISS_RD 0x0039 /*!< Level 1 data cache read miss */
|
||||
#define ARM_PMU_OP_COMPLETE 0x003A /*!< Operation retired */
|
||||
#define ARM_PMU_OP_SPEC 0x003B /*!< Operation speculatively executed */
|
||||
#define ARM_PMU_STALL 0x003C /*!< Stall cycle for instruction or operation not sent for execution */
|
||||
#define ARM_PMU_STALL_OP_BACKEND 0x003D /*!< Stall cycle for instruction or operation not sent for execution due to pipeline backend */
|
||||
#define ARM_PMU_STALL_OP_FRONTEND 0x003E /*!< Stall cycle for instruction or operation not sent for execution due to pipeline frontend */
|
||||
#define ARM_PMU_STALL_OP 0x003F /*!< Instruction or operation slots not occupied each cycle */
|
||||
#define ARM_PMU_L1D_CACHE_RD 0x0040 /*!< Level 1 data cache read */
|
||||
#define ARM_PMU_LE_RETIRED 0x0100 /*!< Loop end instruction executed */
|
||||
#define ARM_PMU_LE_SPEC 0x0101 /*!< Loop end instruction speculatively executed */
|
||||
#define ARM_PMU_BF_RETIRED 0x0104 /*!< Branch future instruction architecturally executed and condition code check pass */
|
||||
#define ARM_PMU_BF_SPEC 0x0105 /*!< Branch future instruction speculatively executed and condition code check pass */
|
||||
#define ARM_PMU_LE_CANCEL 0x0108 /*!< Loop end instruction not taken */
|
||||
#define ARM_PMU_BF_CANCEL 0x0109 /*!< Branch future instruction not taken */
|
||||
#define ARM_PMU_SE_CALL_S 0x0114 /*!< Call to secure function, resulting in Security state change */
|
||||
#define ARM_PMU_SE_CALL_NS 0x0115 /*!< Call to non-secure function, resulting in Security state change */
|
||||
#define ARM_PMU_DWT_CMPMATCH0 0x0118 /*!< DWT comparator 0 match */
|
||||
#define ARM_PMU_DWT_CMPMATCH1 0x0119 /*!< DWT comparator 1 match */
|
||||
#define ARM_PMU_DWT_CMPMATCH2 0x011A /*!< DWT comparator 2 match */
|
||||
#define ARM_PMU_DWT_CMPMATCH3 0x011B /*!< DWT comparator 3 match */
|
||||
#define ARM_PMU_MVE_INST_RETIRED 0x0200 /*!< MVE instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_INST_SPEC 0x0201 /*!< MVE instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_FP_RETIRED 0x0204 /*!< MVE floating-point instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_FP_SPEC 0x0205 /*!< MVE floating-point instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_FP_HP_RETIRED 0x0208 /*!< MVE half-precision floating-point instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_FP_HP_SPEC 0x0209 /*!< MVE half-precision floating-point instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_FP_SP_RETIRED 0x020C /*!< MVE single-precision floating-point instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_FP_SP_SPEC 0x020D /*!< MVE single-precision floating-point instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_FP_MAC_RETIRED 0x0214 /*!< MVE floating-point multiply or multiply-accumulate instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_FP_MAC_SPEC 0x0215 /*!< MVE floating-point multiply or multiply-accumulate instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_INT_RETIRED 0x0224 /*!< MVE integer instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_INT_SPEC 0x0225 /*!< MVE integer instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_INT_MAC_RETIRED 0x0228 /*!< MVE multiply or multiply-accumulate instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_INT_MAC_SPEC 0x0229 /*!< MVE multiply or multiply-accumulate instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_RETIRED 0x0238 /*!< MVE load or store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_SPEC 0x0239 /*!< MVE load or store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LD_RETIRED 0x023C /*!< MVE load instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LD_SPEC 0x023D /*!< MVE load instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_ST_RETIRED 0x0240 /*!< MVE store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_ST_SPEC 0x0241 /*!< MVE store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_CONTIG_RETIRED 0x0244 /*!< MVE contiguous load or store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_CONTIG_SPEC 0x0245 /*!< MVE contiguous load or store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LD_CONTIG_RETIRED 0x0248 /*!< MVE contiguous load instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LD_CONTIG_SPEC 0x0249 /*!< MVE contiguous load instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_ST_CONTIG_RETIRED 0x024C /*!< MVE contiguous store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_ST_CONTIG_SPEC 0x024D /*!< MVE contiguous store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_NONCONTIG_RETIRED 0x0250 /*!< MVE non-contiguous load or store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_NONCONTIG_SPEC 0x0251 /*!< MVE non-contiguous load or store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LD_NONCONTIG_RETIRED 0x0254 /*!< MVE non-contiguous load instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LD_NONCONTIG_SPEC 0x0255 /*!< MVE non-contiguous load instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_ST_NONCONTIG_RETIRED 0x0258 /*!< MVE non-contiguous store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_ST_NONCONTIG_SPEC 0x0259 /*!< MVE non-contiguous store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_MULTI_RETIRED 0x025C /*!< MVE memory instruction targeting multiple registers architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_MULTI_SPEC 0x025D /*!< MVE memory instruction targeting multiple registers speculatively executed */
|
||||
#define ARM_PMU_MVE_LD_MULTI_RETIRED 0x0260 /*!< MVE memory load instruction targeting multiple registers architecturally executed */
|
||||
#define ARM_PMU_MVE_LD_MULTI_SPEC 0x0261 /*!< MVE memory load instruction targeting multiple registers speculatively executed */
|
||||
#define ARM_PMU_MVE_ST_MULTI_RETIRED 0x0261 /*!< MVE memory store instruction targeting multiple registers architecturally executed */
|
||||
#define ARM_PMU_MVE_ST_MULTI_SPEC 0x0265 /*!< MVE memory store instruction targeting multiple registers speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_UNALIGNED_RETIRED 0x028C /*!< MVE unaligned memory load or store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_UNALIGNED_SPEC 0x028D /*!< MVE unaligned memory load or store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LD_UNALIGNED_RETIRED 0x0290 /*!< MVE unaligned load instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LD_UNALIGNED_SPEC 0x0291 /*!< MVE unaligned load instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_ST_UNALIGNED_RETIRED 0x0294 /*!< MVE unaligned store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_ST_UNALIGNED_SPEC 0x0295 /*!< MVE unaligned store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_RETIRED 0x0298 /*!< MVE unaligned noncontiguous load or store instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_SPEC 0x0299 /*!< MVE unaligned noncontiguous load or store instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_RETIRED 0x02A0 /*!< MVE vector reduction instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_SPEC 0x02A1 /*!< MVE vector reduction instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_FP_RETIRED 0x02A4 /*!< MVE floating-point vector reduction instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_FP_SPEC 0x02A5 /*!< MVE floating-point vector reduction instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_INT_RETIRED 0x02A8 /*!< MVE integer vector reduction instruction architecturally executed */
|
||||
#define ARM_PMU_MVE_VREDUCE_INT_SPEC 0x02A9 /*!< MVE integer vector reduction instruction speculatively executed */
|
||||
#define ARM_PMU_MVE_PRED 0x02B8 /*!< Cycles where one or more predicated beats architecturally executed */
|
||||
#define ARM_PMU_MVE_STALL 0x02CC /*!< Stall cycles caused by an MVE instruction */
|
||||
#define ARM_PMU_MVE_STALL_RESOURCE 0x02CD /*!< Stall cycles caused by an MVE instruction because of resource conflicts */
|
||||
#define ARM_PMU_MVE_STALL_RESOURCE_MEM 0x02CE /*!< Stall cycles caused by an MVE instruction because of memory resource conflicts */
|
||||
#define ARM_PMU_MVE_STALL_RESOURCE_FP 0x02CF /*!< Stall cycles caused by an MVE instruction because of floating-point resource conflicts */
|
||||
#define ARM_PMU_MVE_STALL_RESOURCE_INT 0x02D0 /*!< Stall cycles caused by an MVE instruction because of integer resource conflicts */
|
||||
#define ARM_PMU_MVE_STALL_BREAK 0x02D3 /*!< Stall cycles caused by an MVE chain break */
|
||||
#define ARM_PMU_MVE_STALL_DEPENDENCY 0x02D4 /*!< Stall cycles caused by MVE register dependency */
|
||||
#define ARM_PMU_ITCM_ACCESS 0x4007 /*!< Instruction TCM access */
|
||||
#define ARM_PMU_DTCM_ACCESS 0x4008 /*!< Data TCM access */
|
||||
#define ARM_PMU_TRCEXTOUT0 0x4010 /*!< ETM external output 0 */
|
||||
#define ARM_PMU_TRCEXTOUT1 0x4011 /*!< ETM external output 1 */
|
||||
#define ARM_PMU_TRCEXTOUT2 0x4012 /*!< ETM external output 2 */
|
||||
#define ARM_PMU_TRCEXTOUT3 0x4013 /*!< ETM external output 3 */
|
||||
#define ARM_PMU_CTI_TRIGOUT4 0x4018 /*!< Cross-trigger Interface output trigger 4 */
|
||||
#define ARM_PMU_CTI_TRIGOUT5 0x4019 /*!< Cross-trigger Interface output trigger 5 */
|
||||
#define ARM_PMU_CTI_TRIGOUT6 0x401A /*!< Cross-trigger Interface output trigger 6 */
|
||||
#define ARM_PMU_CTI_TRIGOUT7 0x401B /*!< Cross-trigger Interface output trigger 7 */
|
||||
|
||||
/** \brief PMU Functions */
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_Enable(void);
|
||||
__STATIC_INLINE void ARM_PMU_Disable(void);
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type);
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void);
|
||||
__STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void);
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask);
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask);
|
||||
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void);
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num);
|
||||
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void);
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask);
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask);
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask);
|
||||
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask);
|
||||
|
||||
/**
|
||||
\brief Enable the PMU
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Enable(void)
|
||||
{
|
||||
PMU->CTRL |= PMU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Disable the PMU
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Disable(void)
|
||||
{
|
||||
PMU->CTRL &= ~PMU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Set event to count for PMU eventer counter
|
||||
\param [in] num Event counter (0-30) to configure
|
||||
\param [in] type Event to count
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type)
|
||||
{
|
||||
PMU->EVTYPER[num] = type;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Reset cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void)
|
||||
{
|
||||
PMU->CTRL |= PMU_CTRL_CYCCNT_RESET_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Reset all event counters
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void)
|
||||
{
|
||||
PMU->CTRL |= PMU_CTRL_EVENTCNT_RESET_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Enable counters
|
||||
\param [in] mask Counters to enable
|
||||
\note Enables one or more of the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask)
|
||||
{
|
||||
PMU->CNTENSET = mask;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Disable counters
|
||||
\param [in] mask Counters to enable
|
||||
\note Disables one or more of the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask)
|
||||
{
|
||||
PMU->CNTENCLR = mask;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Read cycle counter
|
||||
\return Cycle count
|
||||
*/
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void)
|
||||
{
|
||||
return PMU->CCNTR;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Read event counter
|
||||
\param [in] num Event counter (0-30) to read
|
||||
\return Event count
|
||||
*/
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num)
|
||||
{
|
||||
return PMU_EVCNTR_CNT_Msk & PMU->EVCNTR[num];
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Read counter overflow status
|
||||
\return Counter overflow status bits for the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void)
|
||||
{
|
||||
return PMU->OVSSET;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Clear counter overflow status
|
||||
\param [in] mask Counter overflow status bits to clear
|
||||
\note Clears overflow status bits for one or more of the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask)
|
||||
{
|
||||
PMU->OVSCLR = mask;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Enable counter overflow interrupt request
|
||||
\param [in] mask Counter overflow interrupt request bits to set
|
||||
\note Sets overflow interrupt request bits for one or more of the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask)
|
||||
{
|
||||
PMU->INTENSET = mask;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Disable counter overflow interrupt request
|
||||
\param [in] mask Counter overflow interrupt request bits to clear
|
||||
\note Clears overflow interrupt request bits for one or more of the following:
|
||||
- event counters (0-30)
|
||||
- cycle counter
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask)
|
||||
{
|
||||
PMU->INTENCLR = mask;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Software increment event counter
|
||||
\param [in] mask Counters to increment
|
||||
\note Software increment bits for one or more event counters (0-30)
|
||||
*/
|
||||
__STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask)
|
||||
{
|
||||
PMU->SWINC = mask;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -128,7 +128,7 @@ extern "C" {
|
||||
*/
|
||||
#define __AT32F415_LIBRARY_VERSION_MAJOR (0x02) /*!< [31:24] major version */
|
||||
#define __AT32F415_LIBRARY_VERSION_MIDDLE (0x01) /*!< [23:16] middle version */
|
||||
#define __AT32F415_LIBRARY_VERSION_MINOR (0x00) /*!< [15:8] minor version */
|
||||
#define __AT32F415_LIBRARY_VERSION_MINOR (0x07) /*!< [15:8] minor version */
|
||||
#define __AT32F415_LIBRARY_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __AT32F415_LIBRARY_VERSION ((__AT32F415_LIBRARY_VERSION_MAJOR << 24) | \
|
||||
(__AT32F415_LIBRARY_VERSION_MIDDLE << 16) | \
|
||||
@@ -226,7 +226,7 @@ typedef enum IRQn
|
||||
OTGFS1_IRQn = 67, /*!< otgfs1 global interrupt */
|
||||
CMP1_IRQn = 70, /*!< comparator1 global interrupt */
|
||||
CMP2_IRQn = 71, /*!< comparator2 global interrupt */
|
||||
DMA2_Channel6_7_IRQn = 75, /*!< dma2 channel 6 and channel 7 global interrupt */
|
||||
DMA2_Channel6_7_IRQn = 75 /*!< dma2 channel 6 and channel 7 global interrupt */
|
||||
|
||||
} IRQn_Type;
|
||||
|
||||
|
||||
@@ -32,22 +32,22 @@ extern "C" {
|
||||
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the value of high speed exernal crystal (hext)
|
||||
* @brief in the following line adjust the value of high speed external crystal (hext)
|
||||
* used in your application
|
||||
* tip: to avoid modifying this file each time you need to use different hext, you
|
||||
* can define the hext value in your toolchain compiler preprocessor.
|
||||
*/
|
||||
#if !defined HEXT_VALUE
|
||||
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */
|
||||
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed external crystal in hz */
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the high speed exernal crystal (hext) startup
|
||||
* @brief in the following line adjust the high speed external crystal (hext) startup
|
||||
* timeout value
|
||||
*/
|
||||
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
|
||||
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
|
||||
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed exernal clock in hz */
|
||||
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */
|
||||
|
||||
/* module define -------------------------------------------------------------*/
|
||||
#define CRM_MODULE_ENABLED
|
||||
|
||||
@@ -132,8 +132,8 @@ g_pfnVectors:
|
||||
/* External Interrupts */
|
||||
.word WWDT_IRQHandler /* Window Watchdog Timer */
|
||||
.word PVM_IRQHandler /* PVM through EXINT Line detect */
|
||||
.word TAMPER_IRQHandler /* Tamper */
|
||||
.word ERTC_IRQHandler /* ERTC */
|
||||
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXINT line */
|
||||
.word ERTC_WKUP_IRQHandler /* ERTC Wakeup through the EXINT line */
|
||||
.word FLASH_IRQHandler /* Flash */
|
||||
.word CRM_IRQHandler /* CRM */
|
||||
.word EXINT0_IRQHandler /* EXINT Line 0 */
|
||||
@@ -247,11 +247,11 @@ g_pfnVectors:
|
||||
.weak PVM_IRQHandler
|
||||
.thumb_set PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMPER_IRQHandler
|
||||
.thumb_set TAMPER_IRQHandler,Default_Handler
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak ERTC_IRQHandler
|
||||
.thumb_set ERTC_IRQHandler,Default_Handler
|
||||
.weak ERTC_WKUP_IRQHandler
|
||||
.thumb_set ERTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
@@ -44,8 +44,8 @@ __vector_table
|
||||
; External Interrupts
|
||||
DCD WWDT_IRQHandler ; Window Watchdog Timer
|
||||
DCD PVM_IRQHandler ; PVM through EXINT Line detect
|
||||
DCD TAMPER_IRQHandler ; Tamper
|
||||
DCD ERTC_IRQHandler ; ERTC
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXINT line
|
||||
DCD ERTC_WKUP_IRQHandler ; ERTC Wakeup through the EXINT line
|
||||
DCD FLASH_IRQHandler ; Flash
|
||||
DCD CRM_IRQHandler ; CRM
|
||||
DCD EXINT0_IRQHandler ; EXINT Line 0
|
||||
@@ -188,15 +188,15 @@ WWDT_IRQHandler
|
||||
PVM_IRQHandler
|
||||
B PVM_IRQHandler
|
||||
|
||||
PUBWEAK TAMPER_IRQHandler
|
||||
PUBWEAK TAMP_STAMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TAMPER_IRQHandler
|
||||
B TAMPER_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
B TAMP_STAMP_IRQHandler
|
||||
|
||||
PUBWEAK ERTC_IRQHandler
|
||||
PUBWEAK ERTC_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
ERTC_IRQHandler
|
||||
B ERTC_IRQHandler
|
||||
ERTC_WKUP_IRQHandler
|
||||
B ERTC_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
|
||||
@@ -141,14 +141,14 @@ void system_core_clock_update(void)
|
||||
pll_mult_h = CRM->cfg_bit.pllmult_h;
|
||||
/* process high bits */
|
||||
if((pll_mult_h != 0U) || (pll_mult == 15U)){
|
||||
pll_mult += ((16U * pll_mult_h) + 1U);
|
||||
pll_mult += ((16U * pll_mult_h) + 1U);
|
||||
}
|
||||
else
|
||||
{
|
||||
pll_mult += 2U;
|
||||
pll_mult += 2U;
|
||||
}
|
||||
|
||||
if (pll_clock_source == 0x00)
|
||||
if(pll_clock_source == 0x00)
|
||||
{
|
||||
/* hick divided by 2 selected as pll clock entry */
|
||||
system_core_clock = (HICK_VALUE >> 1) * pll_mult;
|
||||
@@ -156,7 +156,7 @@ void system_core_clock_update(void)
|
||||
else
|
||||
{
|
||||
/* hext selected as pll clock entry */
|
||||
if (CRM->cfg_bit.pllhextdiv != RESET)
|
||||
if(CRM->cfg_bit.pllhextdiv != RESET)
|
||||
{
|
||||
/* hext clock divided by 2 */
|
||||
system_core_clock = (HEXT_VALUE / 2) * pll_mult;
|
||||
@@ -173,7 +173,7 @@ void system_core_clock_update(void)
|
||||
pll_ns = CRM->pll_bit.pllns;
|
||||
pll_fr = CRM->pll_bit.pllfr;
|
||||
|
||||
if (pll_clock_source == 0x00)
|
||||
if(pll_clock_source == 0x00)
|
||||
{
|
||||
/* hick divided by 2 selected as pll clock entry */
|
||||
pllrcsfreq = (HICK_VALUE >> 1);
|
||||
@@ -181,7 +181,7 @@ void system_core_clock_update(void)
|
||||
else
|
||||
{
|
||||
/* hext selected as pll clock entry */
|
||||
if (CRM->cfg_bit.pllhextdiv != RESET)
|
||||
if(CRM->cfg_bit.pllhextdiv != RESET)
|
||||
{
|
||||
/* hext clock divided by 2 */
|
||||
pllrcsfreq = (HEXT_VALUE / 2);
|
||||
|
||||
@@ -44,6 +44,10 @@ extern "C" {
|
||||
#define HEXT_STABLE_DELAY (5000u)
|
||||
#define PLL_STABLE_DELAY (500u)
|
||||
#define SystemCoreClock system_core_clock
|
||||
#define DUMMY_NOP() {__NOP();__NOP();__NOP();__NOP();__NOP(); \
|
||||
__NOP();__NOP();__NOP();__NOP();__NOP(); \
|
||||
__NOP();__NOP();__NOP();__NOP();__NOP(); \
|
||||
__NOP();__NOP();__NOP();__NOP();__NOP();}
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
||||
@@ -1,414 +1,414 @@
|
||||
/*
|
||||
* Copyright (c) 2016, 2019 ARM Limited.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to
|
||||
* deal in the Software without restriction, including without limitation the
|
||||
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
#ifndef __ARM_COMPUTE_NEMATH_H__
|
||||
#define __ARM_COMPUTE_NEMATH_H__
|
||||
|
||||
|
||||
#if defined(ARM_MATH_NEON)
|
||||
/** Calculate floor of a vector.
|
||||
*
|
||||
* @param[in] val Input vector value in F32 format.
|
||||
*
|
||||
* @return The calculated floor vector.
|
||||
*/
|
||||
static inline float32x4_t vfloorq_f32(float32x4_t val);
|
||||
|
||||
/** Calculate inverse square root.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated inverse square root.
|
||||
*/
|
||||
static inline float32x2_t vinvsqrt_f32(float32x2_t x);
|
||||
|
||||
/** Calculate inverse square root.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated inverse square root.
|
||||
*/
|
||||
static inline float32x4_t vinvsqrtq_f32(float32x4_t x);
|
||||
|
||||
/** Calculate reciprocal.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated reciprocal.
|
||||
*/
|
||||
static inline float32x2_t vinv_f32(float32x2_t x);
|
||||
|
||||
/** Calculate reciprocal.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated reciprocal.
|
||||
*/
|
||||
static inline float32x4_t vinvq_f32(float32x4_t x);
|
||||
|
||||
/** Perform a 7th degree polynomial approximation using Estrin's method.
|
||||
*
|
||||
* @param[in] x Input vector value in F32 format.
|
||||
* @param[in] coeffs Polynomial coefficients table. (array of flattened float32x4_t vectors)
|
||||
*
|
||||
* @return The calculated approximation.
|
||||
*/
|
||||
static inline float32x4_t vtaylor_polyq_f32(float32x4_t x, const float32_t *coeffs);
|
||||
|
||||
/** Calculate exponential
|
||||
*
|
||||
* @param[in] x Input vector value in F32 format.
|
||||
*
|
||||
* @return The calculated exponent.
|
||||
*/
|
||||
static inline float32x4_t vexpq_f32(float32x4_t x);
|
||||
|
||||
/** Calculate logarithm
|
||||
*
|
||||
* @param[in] x Input vector value in F32 format.
|
||||
*
|
||||
* @return The calculated logarithm.
|
||||
*/
|
||||
static inline float32x4_t vlogq_f32(float32x4_t x);
|
||||
|
||||
/** Calculate hyperbolic tangent.
|
||||
*
|
||||
* tanh(x) = (e^2x - 1)/(e^2x + 1)
|
||||
*
|
||||
* @note We clamp x to [-5,5] to avoid overflowing issues.
|
||||
*
|
||||
* @param[in] val Input vector value in F32 format.
|
||||
*
|
||||
* @return The calculated Hyperbolic Tangent.
|
||||
*/
|
||||
static inline float32x4_t vtanhq_f32(float32x4_t val);
|
||||
|
||||
/** Calculate n power of a number.
|
||||
*
|
||||
* pow(x,n) = e^(n*log(x))
|
||||
*
|
||||
* @param[in] val Input vector value in F32 format.
|
||||
* @param[in] n Powers to raise the input to.
|
||||
*
|
||||
* @return The calculated power.
|
||||
*/
|
||||
static inline float32x4_t vpowq_f32(float32x4_t val, float32x4_t n);
|
||||
|
||||
#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
|
||||
/** Calculate hyperbolic tangent.
|
||||
*
|
||||
* tanh(x) = (e^2x - 1)/(e^2x + 1)
|
||||
*
|
||||
* @note We clamp x to [-5,5] to avoid overflowing issues.
|
||||
*
|
||||
* @param[in] val Input vector value in F32 format.
|
||||
*
|
||||
* @return The calculated Hyperbolic Tangent.
|
||||
*/
|
||||
static inline float16x8_t vtanhq_f16(float16x8_t val);
|
||||
|
||||
/** Calculate reciprocal.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated reciprocal.
|
||||
*/
|
||||
static inline float16x4_t vinv_f16(float16x4_t x);
|
||||
|
||||
/** Calculate reciprocal.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated reciprocal.
|
||||
*/
|
||||
static inline float16x8_t vinvq_f16(float16x8_t x);
|
||||
|
||||
/** Calculate inverse square root.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated inverse square root.
|
||||
*/
|
||||
static inline float16x4_t vinvsqrt_f16(float16x4_t x);
|
||||
|
||||
/** Calculate inverse square root.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated inverse square root.
|
||||
*/
|
||||
static inline float16x8_t vinvsqrtq_f16(float16x8_t x);
|
||||
|
||||
/** Calculate exponential
|
||||
*
|
||||
* @param[in] x Input vector value in F16 format.
|
||||
*
|
||||
* @return The calculated exponent.
|
||||
*/
|
||||
static inline float16x8_t vexpq_f16(float16x8_t x);
|
||||
|
||||
/** Calculate n power of a number.
|
||||
*
|
||||
* pow(x,n) = e^(n*log(x))
|
||||
*
|
||||
* @param[in] val Input vector value in F16 format.
|
||||
* @param[in] n Powers to raise the input to.
|
||||
*
|
||||
* @return The calculated power.
|
||||
*/
|
||||
static inline float16x8_t vpowq_f16(float16x8_t val, float16x8_t n);
|
||||
#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */
|
||||
|
||||
/** Exponent polynomial coefficients */
|
||||
extern const float32_t exp_tab[4*8];
|
||||
|
||||
|
||||
/** Logarithm polynomial coefficients */
|
||||
extern const float32_t log_tab[4*8];
|
||||
|
||||
#ifndef DOXYGEN_SKIP_THIS
|
||||
inline float32x4_t vfloorq_f32(float32x4_t val)
|
||||
{
|
||||
static const float32_t CONST_1[4] = {1.f,1.f,1.f,1.f};
|
||||
|
||||
const int32x4_t z = vcvtq_s32_f32(val);
|
||||
const float32x4_t r = vcvtq_f32_s32(z);
|
||||
|
||||
return vbslq_f32(vcgtq_f32(r, val), vsubq_f32(r, vld1q_f32(CONST_1)), r);
|
||||
}
|
||||
|
||||
inline float32x2_t vinvsqrt_f32(float32x2_t x)
|
||||
{
|
||||
float32x2_t sqrt_reciprocal = vrsqrte_f32(x);
|
||||
sqrt_reciprocal = vmul_f32(vrsqrts_f32(vmul_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
sqrt_reciprocal = vmul_f32(vrsqrts_f32(vmul_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
|
||||
return sqrt_reciprocal;
|
||||
}
|
||||
|
||||
inline float32x4_t vinvsqrtq_f32(float32x4_t x)
|
||||
{
|
||||
float32x4_t sqrt_reciprocal = vrsqrteq_f32(x);
|
||||
sqrt_reciprocal = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
sqrt_reciprocal = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
|
||||
return sqrt_reciprocal;
|
||||
}
|
||||
|
||||
inline float32x2_t vinv_f32(float32x2_t x)
|
||||
{
|
||||
float32x2_t recip = vrecpe_f32(x);
|
||||
recip = vmul_f32(vrecps_f32(x, recip), recip);
|
||||
recip = vmul_f32(vrecps_f32(x, recip), recip);
|
||||
return recip;
|
||||
}
|
||||
|
||||
inline float32x4_t vinvq_f32(float32x4_t x)
|
||||
{
|
||||
float32x4_t recip = vrecpeq_f32(x);
|
||||
recip = vmulq_f32(vrecpsq_f32(x, recip), recip);
|
||||
recip = vmulq_f32(vrecpsq_f32(x, recip), recip);
|
||||
return recip;
|
||||
}
|
||||
|
||||
inline float32x4_t vtaylor_polyq_f32(float32x4_t x, const float32_t *coeffs)
|
||||
{
|
||||
float32x4_t A = vmlaq_f32(vld1q_f32(&coeffs[4*0]), vld1q_f32(&coeffs[4*4]), x);
|
||||
float32x4_t B = vmlaq_f32(vld1q_f32(&coeffs[4*2]), vld1q_f32(&coeffs[4*6]), x);
|
||||
float32x4_t C = vmlaq_f32(vld1q_f32(&coeffs[4*1]), vld1q_f32(&coeffs[4*5]), x);
|
||||
float32x4_t D = vmlaq_f32(vld1q_f32(&coeffs[4*3]), vld1q_f32(&coeffs[4*7]), x);
|
||||
float32x4_t x2 = vmulq_f32(x, x);
|
||||
float32x4_t x4 = vmulq_f32(x2, x2);
|
||||
float32x4_t res = vmlaq_f32(vmlaq_f32(A, B, x2), vmlaq_f32(C, D, x2), x4);
|
||||
return res;
|
||||
}
|
||||
|
||||
inline float32x4_t vexpq_f32(float32x4_t x)
|
||||
{
|
||||
static const float32_t CONST_LN2[4] = {0.6931471805f,0.6931471805f,0.6931471805f,0.6931471805f}; // ln(2)
|
||||
static const float32_t CONST_INV_LN2[4] = {1.4426950408f,1.4426950408f,1.4426950408f,1.4426950408f}; // 1/ln(2)
|
||||
static const float32_t CONST_0[4] = {0.f,0.f,0.f,0.f};
|
||||
static const int32_t CONST_NEGATIVE_126[4] = {-126,-126,-126,-126};
|
||||
|
||||
// Perform range reduction [-log(2),log(2)]
|
||||
int32x4_t m = vcvtq_s32_f32(vmulq_f32(x, vld1q_f32(CONST_INV_LN2)));
|
||||
float32x4_t val = vmlsq_f32(x, vcvtq_f32_s32(m), vld1q_f32(CONST_LN2));
|
||||
|
||||
// Polynomial Approximation
|
||||
float32x4_t poly = vtaylor_polyq_f32(val, exp_tab);
|
||||
|
||||
// Reconstruct
|
||||
poly = vreinterpretq_f32_s32(vqaddq_s32(vreinterpretq_s32_f32(poly), vqshlq_n_s32(m, 23)));
|
||||
poly = vbslq_f32(vcltq_s32(m, vld1q_s32(CONST_NEGATIVE_126)), vld1q_f32(CONST_0), poly);
|
||||
|
||||
return poly;
|
||||
}
|
||||
|
||||
inline float32x4_t vlogq_f32(float32x4_t x)
|
||||
{
|
||||
static const int32_t CONST_127[4] = {127,127,127,127}; // 127
|
||||
static const float32_t CONST_LN2[4] = {0.6931471805f,0.6931471805f,0.6931471805f,0.6931471805f}; // ln(2)
|
||||
|
||||
// Extract exponent
|
||||
int32x4_t m = vsubq_s32(vreinterpretq_s32_u32(vshrq_n_u32(vreinterpretq_u32_f32(x), 23)), vld1q_s32(CONST_127));
|
||||
float32x4_t val = vreinterpretq_f32_s32(vsubq_s32(vreinterpretq_s32_f32(x), vshlq_n_s32(m, 23)));
|
||||
|
||||
// Polynomial Approximation
|
||||
float32x4_t poly = vtaylor_polyq_f32(val, log_tab);
|
||||
|
||||
// Reconstruct
|
||||
poly = vmlaq_f32(poly, vcvtq_f32_s32(m), vld1q_f32(CONST_LN2));
|
||||
|
||||
return poly;
|
||||
}
|
||||
|
||||
inline float32x4_t vtanhq_f32(float32x4_t val)
|
||||
{
|
||||
static const float32_t CONST_1[4] = {1.f,1.f,1.f,1.f};
|
||||
static const float32_t CONST_2[4] = {2.f,2.f,2.f,2.f};
|
||||
static const float32_t CONST_MIN_TANH[4] = {-10.f,-10.f,-10.f,-10.f};
|
||||
static const float32_t CONST_MAX_TANH[4] = {10.f,10.f,10.f,10.f};
|
||||
|
||||
float32x4_t x = vminq_f32(vmaxq_f32(val, vld1q_f32(CONST_MIN_TANH)), vld1q_f32(CONST_MAX_TANH));
|
||||
float32x4_t exp2x = vexpq_f32(vmulq_f32(vld1q_f32(CONST_2), x));
|
||||
float32x4_t num = vsubq_f32(exp2x, vld1q_f32(CONST_1));
|
||||
float32x4_t den = vaddq_f32(exp2x, vld1q_f32(CONST_1));
|
||||
float32x4_t tanh = vmulq_f32(num, vinvq_f32(den));
|
||||
return tanh;
|
||||
}
|
||||
|
||||
inline float32x4_t vpowq_f32(float32x4_t val, float32x4_t n)
|
||||
{
|
||||
return vexpq_f32(vmulq_f32(n, vlogq_f32(val)));
|
||||
}
|
||||
#endif /* DOXYGEN_SKIP_THIS */
|
||||
|
||||
#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
|
||||
/** Exponent polynomial coefficients */
|
||||
/** Logarithm polynomial coefficients */
|
||||
#ifndef DOXYGEN_SKIP_THIS
|
||||
inline float16x8_t vfloorq_f16(float16x8_t val)
|
||||
{
|
||||
static const float16_t CONST_1[8] = {1.f,1.f,1.f,1.f,1.f,1.f,1.f,1.f};
|
||||
|
||||
const int16x8_t z = vcvtq_s16_f16(val);
|
||||
const float16x8_t r = vcvtq_f16_s16(z);
|
||||
|
||||
return vbslq_f16(vcgtq_f16(r, val), vsubq_f16(r, vld1q_f16(CONST_1)), r);
|
||||
}
|
||||
inline float16x4_t vinvsqrt_f16(float16x4_t x)
|
||||
{
|
||||
float16x4_t sqrt_reciprocal = vrsqrte_f16(x);
|
||||
sqrt_reciprocal = vmul_f16(vrsqrts_f16(vmul_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
sqrt_reciprocal = vmul_f16(vrsqrts_f16(vmul_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
return sqrt_reciprocal;
|
||||
}
|
||||
|
||||
inline float16x8_t vinvsqrtq_f16(float16x8_t x)
|
||||
{
|
||||
float16x8_t sqrt_reciprocal = vrsqrteq_f16(x);
|
||||
sqrt_reciprocal = vmulq_f16(vrsqrtsq_f16(vmulq_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
sqrt_reciprocal = vmulq_f16(vrsqrtsq_f16(vmulq_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
return sqrt_reciprocal;
|
||||
}
|
||||
|
||||
inline float16x4_t vinv_f16(float16x4_t x)
|
||||
{
|
||||
float16x4_t recip = vrecpe_f16(x);
|
||||
recip = vmul_f16(vrecps_f16(x, recip), recip);
|
||||
recip = vmul_f16(vrecps_f16(x, recip), recip);
|
||||
return recip;
|
||||
}
|
||||
|
||||
inline float16x8_t vinvq_f16(float16x8_t x)
|
||||
{
|
||||
float16x8_t recip = vrecpeq_f16(x);
|
||||
recip = vmulq_f16(vrecpsq_f16(x, recip), recip);
|
||||
recip = vmulq_f16(vrecpsq_f16(x, recip), recip);
|
||||
return recip;
|
||||
}
|
||||
|
||||
inline float16x8_t vtanhq_f16(float16x8_t val)
|
||||
{
|
||||
const float16_t CONST_1[8] = {1.f,1.f,1.f,1.f,1.f,1.f,1.f,1.f};
|
||||
const float16_t CONST_2[8] = {2.f,2.f,2.f,2.f,2.f,2.f,2.f,2.f};
|
||||
const float16_t CONST_MIN_TANH[8] = {-10.f,-10.f,-10.f,-10.f,-10.f,-10.f,-10.f,-10.f};
|
||||
const float16_t CONST_MAX_TANH[8] = {10.f,10.f,10.f,10.f,10.f,10.f,10.f,10.f};
|
||||
|
||||
const float16x8_t x = vminq_f16(vmaxq_f16(val, vld1q_f16(CONST_MIN_TANH)), vld1q_f16(CONST_MAX_TANH));
|
||||
const float16x8_t exp2x = vexpq_f16(vmulq_f16(vld1q_f16(CONST_2), x));
|
||||
const float16x8_t num = vsubq_f16(exp2x, vld1q_f16(CONST_1));
|
||||
const float16x8_t den = vaddq_f16(exp2x, vld1q_f16(CONST_1));
|
||||
const float16x8_t tanh = vmulq_f16(num, vinvq_f16(den));
|
||||
return tanh;
|
||||
}
|
||||
|
||||
inline float16x8_t vtaylor_polyq_f16(float16x8_t x, const float16_t *coeffs)
|
||||
{
|
||||
const float16x8_t A = vaddq_f16(&coeffs[8*0], vmulq_f16(&coeffs[8*4], x));
|
||||
const float16x8_t B = vaddq_f16(&coeffs[8*2], vmulq_f16(&coeffs[8*6], x));
|
||||
const float16x8_t C = vaddq_f16(&coeffs[8*1], vmulq_f16(&coeffs[8*5], x));
|
||||
const float16x8_t D = vaddq_f16(&coeffs[8*3], vmulq_f16(&coeffs[8*7], x));
|
||||
const float16x8_t x2 = vmulq_f16(x, x);
|
||||
const float16x8_t x4 = vmulq_f16(x2, x2);
|
||||
const float16x8_t res = vaddq_f16(vaddq_f16(A, vmulq_f16(B, x2)), vmulq_f16(vaddq_f16(C, vmulq_f16(D, x2)), x4));
|
||||
return res;
|
||||
}
|
||||
|
||||
inline float16x8_t vexpq_f16(float16x8_t x)
|
||||
{
|
||||
// TODO (COMPMID-1535) : Revisit FP16 approximations
|
||||
const float32x4_t x_high = vcvt_f32_f16(vget_high_f16(x));
|
||||
const float32x4_t x_low = vcvt_f32_f16(vget_low_f16(x));
|
||||
|
||||
const float16x8_t res = vcvt_high_f16_f32(vcvt_f16_f32(vexpq_f32(x_low)), vexpq_f32(x_high));
|
||||
return res;
|
||||
}
|
||||
|
||||
inline float16x8_t vlogq_f16(float16x8_t x)
|
||||
{
|
||||
// TODO (COMPMID-1535) : Revisit FP16 approximations
|
||||
const float32x4_t x_high = vcvt_f32_f16(vget_high_f16(x));
|
||||
const float32x4_t x_low = vcvt_f32_f16(vget_low_f16(x));
|
||||
|
||||
const float16x8_t res = vcvt_high_f16_f32(vcvt_f16_f32(vlogq_f32(x_low)), vlogq_f32(x_high));
|
||||
return res;
|
||||
}
|
||||
|
||||
inline float16x8_t vpowq_f16(float16x8_t val, float16x8_t n)
|
||||
{
|
||||
// TODO (giaiod01) - COMPMID-1535
|
||||
float32x4_t n0_f32 = vcvt_f32_f16(vget_low_f16(n));
|
||||
float32x4_t n1_f32 = vcvt_f32_f16(vget_high_f16(n));
|
||||
float32x4_t val0_f32 = vcvt_f32_f16(vget_low_f16(val));
|
||||
float32x4_t val1_f32 = vcvt_f32_f16(vget_high_f16(val));
|
||||
|
||||
float32x4_t res0_f32 = vexpq_f32(vmulq_f32(n0_f32, vlogq_f32(val0_f32)));
|
||||
float32x4_t res1_f32 = vexpq_f32(vmulq_f32(n1_f32, vlogq_f32(val1_f32)));
|
||||
|
||||
return vcombine_f16(vcvt_f16_f32(res0_f32), vcvt_f16_f32(res1_f32));
|
||||
}
|
||||
#endif /* DOXYGEN_SKIP_THIS */
|
||||
#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */
|
||||
#endif
|
||||
#endif /* __ARM_COMPUTE_NEMATH_H__ */
|
||||
/*
|
||||
* Copyright (c) 2016, 2019 ARM Limited.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to
|
||||
* deal in the Software without restriction, including without limitation the
|
||||
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
#ifndef __ARM_COMPUTE_NEMATH_H__
|
||||
#define __ARM_COMPUTE_NEMATH_H__
|
||||
|
||||
|
||||
#if defined(ARM_MATH_NEON)
|
||||
/** Calculate floor of a vector.
|
||||
*
|
||||
* @param[in] val Input vector value in F32 format.
|
||||
*
|
||||
* @return The calculated floor vector.
|
||||
*/
|
||||
static inline float32x4_t vfloorq_f32(float32x4_t val);
|
||||
|
||||
/** Calculate inverse square root.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated inverse square root.
|
||||
*/
|
||||
static inline float32x2_t vinvsqrt_f32(float32x2_t x);
|
||||
|
||||
/** Calculate inverse square root.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated inverse square root.
|
||||
*/
|
||||
static inline float32x4_t vinvsqrtq_f32(float32x4_t x);
|
||||
|
||||
/** Calculate reciprocal.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated reciprocal.
|
||||
*/
|
||||
static inline float32x2_t vinv_f32(float32x2_t x);
|
||||
|
||||
/** Calculate reciprocal.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated reciprocal.
|
||||
*/
|
||||
static inline float32x4_t vinvq_f32(float32x4_t x);
|
||||
|
||||
/** Perform a 7th degree polynomial approximation using Estrin's method.
|
||||
*
|
||||
* @param[in] x Input vector value in F32 format.
|
||||
* @param[in] coeffs Polynomial coefficients table. (array of flattened float32x4_t vectors)
|
||||
*
|
||||
* @return The calculated approximation.
|
||||
*/
|
||||
static inline float32x4_t vtaylor_polyq_f32(float32x4_t x, const float32_t *coeffs);
|
||||
|
||||
/** Calculate exponential
|
||||
*
|
||||
* @param[in] x Input vector value in F32 format.
|
||||
*
|
||||
* @return The calculated exponent.
|
||||
*/
|
||||
static inline float32x4_t vexpq_f32(float32x4_t x);
|
||||
|
||||
/** Calculate logarithm
|
||||
*
|
||||
* @param[in] x Input vector value in F32 format.
|
||||
*
|
||||
* @return The calculated logarithm.
|
||||
*/
|
||||
static inline float32x4_t vlogq_f32(float32x4_t x);
|
||||
|
||||
/** Calculate hyperbolic tangent.
|
||||
*
|
||||
* tanh(x) = (e^2x - 1)/(e^2x + 1)
|
||||
*
|
||||
* @note We clamp x to [-5,5] to avoid overflowing issues.
|
||||
*
|
||||
* @param[in] val Input vector value in F32 format.
|
||||
*
|
||||
* @return The calculated Hyperbolic Tangent.
|
||||
*/
|
||||
static inline float32x4_t vtanhq_f32(float32x4_t val);
|
||||
|
||||
/** Calculate n power of a number.
|
||||
*
|
||||
* pow(x,n) = e^(n*log(x))
|
||||
*
|
||||
* @param[in] val Input vector value in F32 format.
|
||||
* @param[in] n Powers to raise the input to.
|
||||
*
|
||||
* @return The calculated power.
|
||||
*/
|
||||
static inline float32x4_t vpowq_f32(float32x4_t val, float32x4_t n);
|
||||
|
||||
#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
|
||||
/** Calculate hyperbolic tangent.
|
||||
*
|
||||
* tanh(x) = (e^2x - 1)/(e^2x + 1)
|
||||
*
|
||||
* @note We clamp x to [-5,5] to avoid overflowing issues.
|
||||
*
|
||||
* @param[in] val Input vector value in F32 format.
|
||||
*
|
||||
* @return The calculated Hyperbolic Tangent.
|
||||
*/
|
||||
static inline float16x8_t vtanhq_f16(float16x8_t val);
|
||||
|
||||
/** Calculate reciprocal.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated reciprocal.
|
||||
*/
|
||||
static inline float16x4_t vinv_f16(float16x4_t x);
|
||||
|
||||
/** Calculate reciprocal.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated reciprocal.
|
||||
*/
|
||||
static inline float16x8_t vinvq_f16(float16x8_t x);
|
||||
|
||||
/** Calculate inverse square root.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated inverse square root.
|
||||
*/
|
||||
static inline float16x4_t vinvsqrt_f16(float16x4_t x);
|
||||
|
||||
/** Calculate inverse square root.
|
||||
*
|
||||
* @param[in] x Input value.
|
||||
*
|
||||
* @return The calculated inverse square root.
|
||||
*/
|
||||
static inline float16x8_t vinvsqrtq_f16(float16x8_t x);
|
||||
|
||||
/** Calculate exponential
|
||||
*
|
||||
* @param[in] x Input vector value in F16 format.
|
||||
*
|
||||
* @return The calculated exponent.
|
||||
*/
|
||||
static inline float16x8_t vexpq_f16(float16x8_t x);
|
||||
|
||||
/** Calculate n power of a number.
|
||||
*
|
||||
* pow(x,n) = e^(n*log(x))
|
||||
*
|
||||
* @param[in] val Input vector value in F16 format.
|
||||
* @param[in] n Powers to raise the input to.
|
||||
*
|
||||
* @return The calculated power.
|
||||
*/
|
||||
static inline float16x8_t vpowq_f16(float16x8_t val, float16x8_t n);
|
||||
#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */
|
||||
|
||||
/** Exponent polynomial coefficients */
|
||||
extern const float32_t exp_tab[4*8];
|
||||
|
||||
|
||||
/** Logarithm polynomial coefficients */
|
||||
extern const float32_t log_tab[4*8];
|
||||
|
||||
#ifndef DOXYGEN_SKIP_THIS
|
||||
inline float32x4_t vfloorq_f32(float32x4_t val)
|
||||
{
|
||||
static const float32_t CONST_1[4] = {1.f,1.f,1.f,1.f};
|
||||
|
||||
const int32x4_t z = vcvtq_s32_f32(val);
|
||||
const float32x4_t r = vcvtq_f32_s32(z);
|
||||
|
||||
return vbslq_f32(vcgtq_f32(r, val), vsubq_f32(r, vld1q_f32(CONST_1)), r);
|
||||
}
|
||||
|
||||
inline float32x2_t vinvsqrt_f32(float32x2_t x)
|
||||
{
|
||||
float32x2_t sqrt_reciprocal = vrsqrte_f32(x);
|
||||
sqrt_reciprocal = vmul_f32(vrsqrts_f32(vmul_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
sqrt_reciprocal = vmul_f32(vrsqrts_f32(vmul_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
|
||||
return sqrt_reciprocal;
|
||||
}
|
||||
|
||||
inline float32x4_t vinvsqrtq_f32(float32x4_t x)
|
||||
{
|
||||
float32x4_t sqrt_reciprocal = vrsqrteq_f32(x);
|
||||
sqrt_reciprocal = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
sqrt_reciprocal = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
|
||||
return sqrt_reciprocal;
|
||||
}
|
||||
|
||||
inline float32x2_t vinv_f32(float32x2_t x)
|
||||
{
|
||||
float32x2_t recip = vrecpe_f32(x);
|
||||
recip = vmul_f32(vrecps_f32(x, recip), recip);
|
||||
recip = vmul_f32(vrecps_f32(x, recip), recip);
|
||||
return recip;
|
||||
}
|
||||
|
||||
inline float32x4_t vinvq_f32(float32x4_t x)
|
||||
{
|
||||
float32x4_t recip = vrecpeq_f32(x);
|
||||
recip = vmulq_f32(vrecpsq_f32(x, recip), recip);
|
||||
recip = vmulq_f32(vrecpsq_f32(x, recip), recip);
|
||||
return recip;
|
||||
}
|
||||
|
||||
inline float32x4_t vtaylor_polyq_f32(float32x4_t x, const float32_t *coeffs)
|
||||
{
|
||||
float32x4_t A = vmlaq_f32(vld1q_f32(&coeffs[4*0]), vld1q_f32(&coeffs[4*4]), x);
|
||||
float32x4_t B = vmlaq_f32(vld1q_f32(&coeffs[4*2]), vld1q_f32(&coeffs[4*6]), x);
|
||||
float32x4_t C = vmlaq_f32(vld1q_f32(&coeffs[4*1]), vld1q_f32(&coeffs[4*5]), x);
|
||||
float32x4_t D = vmlaq_f32(vld1q_f32(&coeffs[4*3]), vld1q_f32(&coeffs[4*7]), x);
|
||||
float32x4_t x2 = vmulq_f32(x, x);
|
||||
float32x4_t x4 = vmulq_f32(x2, x2);
|
||||
float32x4_t res = vmlaq_f32(vmlaq_f32(A, B, x2), vmlaq_f32(C, D, x2), x4);
|
||||
return res;
|
||||
}
|
||||
|
||||
inline float32x4_t vexpq_f32(float32x4_t x)
|
||||
{
|
||||
static const float32_t CONST_LN2[4] = {0.6931471805f,0.6931471805f,0.6931471805f,0.6931471805f}; // ln(2)
|
||||
static const float32_t CONST_INV_LN2[4] = {1.4426950408f,1.4426950408f,1.4426950408f,1.4426950408f}; // 1/ln(2)
|
||||
static const float32_t CONST_0[4] = {0.f,0.f,0.f,0.f};
|
||||
static const int32_t CONST_NEGATIVE_126[4] = {-126,-126,-126,-126};
|
||||
|
||||
// Perform range reduction [-log(2),log(2)]
|
||||
int32x4_t m = vcvtq_s32_f32(vmulq_f32(x, vld1q_f32(CONST_INV_LN2)));
|
||||
float32x4_t val = vmlsq_f32(x, vcvtq_f32_s32(m), vld1q_f32(CONST_LN2));
|
||||
|
||||
// Polynomial Approximation
|
||||
float32x4_t poly = vtaylor_polyq_f32(val, exp_tab);
|
||||
|
||||
// Reconstruct
|
||||
poly = vreinterpretq_f32_s32(vqaddq_s32(vreinterpretq_s32_f32(poly), vqshlq_n_s32(m, 23)));
|
||||
poly = vbslq_f32(vcltq_s32(m, vld1q_s32(CONST_NEGATIVE_126)), vld1q_f32(CONST_0), poly);
|
||||
|
||||
return poly;
|
||||
}
|
||||
|
||||
inline float32x4_t vlogq_f32(float32x4_t x)
|
||||
{
|
||||
static const int32_t CONST_127[4] = {127,127,127,127}; // 127
|
||||
static const float32_t CONST_LN2[4] = {0.6931471805f,0.6931471805f,0.6931471805f,0.6931471805f}; // ln(2)
|
||||
|
||||
// Extract exponent
|
||||
int32x4_t m = vsubq_s32(vreinterpretq_s32_u32(vshrq_n_u32(vreinterpretq_u32_f32(x), 23)), vld1q_s32(CONST_127));
|
||||
float32x4_t val = vreinterpretq_f32_s32(vsubq_s32(vreinterpretq_s32_f32(x), vshlq_n_s32(m, 23)));
|
||||
|
||||
// Polynomial Approximation
|
||||
float32x4_t poly = vtaylor_polyq_f32(val, log_tab);
|
||||
|
||||
// Reconstruct
|
||||
poly = vmlaq_f32(poly, vcvtq_f32_s32(m), vld1q_f32(CONST_LN2));
|
||||
|
||||
return poly;
|
||||
}
|
||||
|
||||
inline float32x4_t vtanhq_f32(float32x4_t val)
|
||||
{
|
||||
static const float32_t CONST_1[4] = {1.f,1.f,1.f,1.f};
|
||||
static const float32_t CONST_2[4] = {2.f,2.f,2.f,2.f};
|
||||
static const float32_t CONST_MIN_TANH[4] = {-10.f,-10.f,-10.f,-10.f};
|
||||
static const float32_t CONST_MAX_TANH[4] = {10.f,10.f,10.f,10.f};
|
||||
|
||||
float32x4_t x = vminq_f32(vmaxq_f32(val, vld1q_f32(CONST_MIN_TANH)), vld1q_f32(CONST_MAX_TANH));
|
||||
float32x4_t exp2x = vexpq_f32(vmulq_f32(vld1q_f32(CONST_2), x));
|
||||
float32x4_t num = vsubq_f32(exp2x, vld1q_f32(CONST_1));
|
||||
float32x4_t den = vaddq_f32(exp2x, vld1q_f32(CONST_1));
|
||||
float32x4_t tanh = vmulq_f32(num, vinvq_f32(den));
|
||||
return tanh;
|
||||
}
|
||||
|
||||
inline float32x4_t vpowq_f32(float32x4_t val, float32x4_t n)
|
||||
{
|
||||
return vexpq_f32(vmulq_f32(n, vlogq_f32(val)));
|
||||
}
|
||||
#endif /* DOXYGEN_SKIP_THIS */
|
||||
|
||||
#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
|
||||
/** Exponent polynomial coefficients */
|
||||
/** Logarithm polynomial coefficients */
|
||||
#ifndef DOXYGEN_SKIP_THIS
|
||||
inline float16x8_t vfloorq_f16(float16x8_t val)
|
||||
{
|
||||
static const float16_t CONST_1[8] = {1.f,1.f,1.f,1.f,1.f,1.f,1.f,1.f};
|
||||
|
||||
const int16x8_t z = vcvtq_s16_f16(val);
|
||||
const float16x8_t r = vcvtq_f16_s16(z);
|
||||
|
||||
return vbslq_f16(vcgtq_f16(r, val), vsubq_f16(r, vld1q_f16(CONST_1)), r);
|
||||
}
|
||||
inline float16x4_t vinvsqrt_f16(float16x4_t x)
|
||||
{
|
||||
float16x4_t sqrt_reciprocal = vrsqrte_f16(x);
|
||||
sqrt_reciprocal = vmul_f16(vrsqrts_f16(vmul_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
sqrt_reciprocal = vmul_f16(vrsqrts_f16(vmul_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
return sqrt_reciprocal;
|
||||
}
|
||||
|
||||
inline float16x8_t vinvsqrtq_f16(float16x8_t x)
|
||||
{
|
||||
float16x8_t sqrt_reciprocal = vrsqrteq_f16(x);
|
||||
sqrt_reciprocal = vmulq_f16(vrsqrtsq_f16(vmulq_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
sqrt_reciprocal = vmulq_f16(vrsqrtsq_f16(vmulq_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
|
||||
return sqrt_reciprocal;
|
||||
}
|
||||
|
||||
inline float16x4_t vinv_f16(float16x4_t x)
|
||||
{
|
||||
float16x4_t recip = vrecpe_f16(x);
|
||||
recip = vmul_f16(vrecps_f16(x, recip), recip);
|
||||
recip = vmul_f16(vrecps_f16(x, recip), recip);
|
||||
return recip;
|
||||
}
|
||||
|
||||
inline float16x8_t vinvq_f16(float16x8_t x)
|
||||
{
|
||||
float16x8_t recip = vrecpeq_f16(x);
|
||||
recip = vmulq_f16(vrecpsq_f16(x, recip), recip);
|
||||
recip = vmulq_f16(vrecpsq_f16(x, recip), recip);
|
||||
return recip;
|
||||
}
|
||||
|
||||
inline float16x8_t vtanhq_f16(float16x8_t val)
|
||||
{
|
||||
const float16_t CONST_1[8] = {1.f,1.f,1.f,1.f,1.f,1.f,1.f,1.f};
|
||||
const float16_t CONST_2[8] = {2.f,2.f,2.f,2.f,2.f,2.f,2.f,2.f};
|
||||
const float16_t CONST_MIN_TANH[8] = {-10.f,-10.f,-10.f,-10.f,-10.f,-10.f,-10.f,-10.f};
|
||||
const float16_t CONST_MAX_TANH[8] = {10.f,10.f,10.f,10.f,10.f,10.f,10.f,10.f};
|
||||
|
||||
const float16x8_t x = vminq_f16(vmaxq_f16(val, vld1q_f16(CONST_MIN_TANH)), vld1q_f16(CONST_MAX_TANH));
|
||||
const float16x8_t exp2x = vexpq_f16(vmulq_f16(vld1q_f16(CONST_2), x));
|
||||
const float16x8_t num = vsubq_f16(exp2x, vld1q_f16(CONST_1));
|
||||
const float16x8_t den = vaddq_f16(exp2x, vld1q_f16(CONST_1));
|
||||
const float16x8_t tanh = vmulq_f16(num, vinvq_f16(den));
|
||||
return tanh;
|
||||
}
|
||||
|
||||
inline float16x8_t vtaylor_polyq_f16(float16x8_t x, const float16_t *coeffs)
|
||||
{
|
||||
const float16x8_t A = vaddq_f16(vld1q_f16(&coeffs[8*0]), vmulq_f16(vld1q_f16(&coeffs[8*4]), x));
|
||||
const float16x8_t B = vaddq_f16(vld1q_f16(&coeffs[8*2]), vmulq_f16(vld1q_f16(&coeffs[8*6]), x));
|
||||
const float16x8_t C = vaddq_f16(vld1q_f16(&coeffs[8*1]), vmulq_f16(vld1q_f16(&coeffs[8*5]), x));
|
||||
const float16x8_t D = vaddq_f16(vld1q_f16(&coeffs[8*3]), vmulq_f16(vld1q_f16(&coeffs[8*7]), x));
|
||||
const float16x8_t x2 = vmulq_f16(x, x);
|
||||
const float16x8_t x4 = vmulq_f16(x2, x2);
|
||||
const float16x8_t res = vaddq_f16(vaddq_f16(A, vmulq_f16(B, x2)), vmulq_f16(vaddq_f16(C, vmulq_f16(D, x2)), x4));
|
||||
return res;
|
||||
}
|
||||
|
||||
inline float16x8_t vexpq_f16(float16x8_t x)
|
||||
{
|
||||
// TODO (COMPMID-1535) : Revisit FP16 approximations
|
||||
const float32x4_t x_high = vcvt_f32_f16(vget_high_f16(x));
|
||||
const float32x4_t x_low = vcvt_f32_f16(vget_low_f16(x));
|
||||
|
||||
const float16x8_t res = vcvt_high_f16_f32(vcvt_f16_f32(vexpq_f32(x_low)), vexpq_f32(x_high));
|
||||
return res;
|
||||
}
|
||||
|
||||
inline float16x8_t vlogq_f16(float16x8_t x)
|
||||
{
|
||||
// TODO (COMPMID-1535) : Revisit FP16 approximations
|
||||
const float32x4_t x_high = vcvt_f32_f16(vget_high_f16(x));
|
||||
const float32x4_t x_low = vcvt_f32_f16(vget_low_f16(x));
|
||||
|
||||
const float16x8_t res = vcvt_high_f16_f32(vcvt_f16_f32(vlogq_f32(x_low)), vlogq_f32(x_high));
|
||||
return res;
|
||||
}
|
||||
|
||||
inline float16x8_t vpowq_f16(float16x8_t val, float16x8_t n)
|
||||
{
|
||||
// TODO (giaiod01) - COMPMID-1535
|
||||
float32x4_t n0_f32 = vcvt_f32_f16(vget_low_f16(n));
|
||||
float32x4_t n1_f32 = vcvt_f32_f16(vget_high_f16(n));
|
||||
float32x4_t val0_f32 = vcvt_f32_f16(vget_low_f16(val));
|
||||
float32x4_t val1_f32 = vcvt_f32_f16(vget_high_f16(val));
|
||||
|
||||
float32x4_t res0_f32 = vexpq_f32(vmulq_f32(n0_f32, vlogq_f32(val0_f32)));
|
||||
float32x4_t res1_f32 = vexpq_f32(vmulq_f32(n1_f32, vlogq_f32(val1_f32)));
|
||||
|
||||
return vcombine_f16(vcvt_f16_f32(res0_f32), vcvt_f16_f32(res1_f32));
|
||||
}
|
||||
#endif /* DOXYGEN_SKIP_THIS */
|
||||
#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */
|
||||
#endif
|
||||
#endif /* __ARM_COMPUTE_NEMATH_H__ */
|
||||
|
||||
@@ -1,21 +1,21 @@
|
||||
MIT License
|
||||
|
||||
Copyright (c) 2017-2019 ARM Software
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in all
|
||||
copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
SOFTWARE.
|
||||
MIT License
|
||||
|
||||
Copyright (c) 2017-2019 ARM Software
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in all
|
||||
copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
SOFTWARE.
|
||||
|
||||
@@ -1,19 +1,19 @@
|
||||
README
|
||||
======
|
||||
|
||||
This folder is containing two files imported, and slightly modified, from the ComputeLibrary:
|
||||
|
||||
NEMath.h and arm_cl_tables.c
|
||||
|
||||
In the original compute library, there are instead two other files:
|
||||
|
||||
NEMath.h and NEMath.inl
|
||||
|
||||
NEMath.inl is included from NEMath.h whereas in this CMSIS DSP implementation, there is no NEMath.inl and its content is copied into NEMath.h
|
||||
|
||||
The tables contained in NEMath.inl have been moved to arm_cl_tables.c and finally the files are in C for the CMSIS DSP library and in C++ in the original Compute Library.
|
||||
|
||||
Otherwise, the features and implementations are the same : a few optimized Neon functions.
|
||||
|
||||
The license covering those files is different : It is a MIT license.
|
||||
Other parts of the CMSIS-DSP are covered with an Apache-2.0 license.
|
||||
README
|
||||
======
|
||||
|
||||
This folder is containing two files imported, and slightly modified, from the ComputeLibrary:
|
||||
|
||||
NEMath.h and arm_cl_tables.c
|
||||
|
||||
In the original compute library, there are instead two other files:
|
||||
|
||||
NEMath.h and NEMath.inl
|
||||
|
||||
NEMath.inl is included from NEMath.h whereas in this CMSIS DSP implementation, there is no NEMath.inl and its content is copied into NEMath.h
|
||||
|
||||
The tables contained in NEMath.inl have been moved to arm_cl_tables.c and finally the files are in C for the CMSIS DSP library and in C++ in the original Compute Library.
|
||||
|
||||
Otherwise, the features and implementations are the same : a few optimized Neon functions.
|
||||
|
||||
The license covering those files is different : It is a MIT license.
|
||||
Other parts of the CMSIS-DSP are covered with an Apache-2.0 license.
|
||||
|
||||
@@ -1,55 +1,55 @@
|
||||
/*
|
||||
* Copyright (c) 2016, 2019 ARM Limited.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to
|
||||
* deal in the Software without restriction, including without limitation the
|
||||
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
#include "arm_math.h"
|
||||
#include "NEMath.h"
|
||||
|
||||
#if defined(ARM_MATH_NEON)
|
||||
|
||||
/** Exponent polynomial coefficients */
|
||||
const float32_t exp_tab[4*8] =
|
||||
{
|
||||
1.f,1.f,1.f,1.f,
|
||||
0.0416598916054f,0.0416598916054f,0.0416598916054f,0.0416598916054f,
|
||||
0.500000596046f,0.500000596046f,0.500000596046f,0.500000596046f,
|
||||
0.0014122662833f,0.0014122662833f,0.0014122662833f,0.0014122662833f,
|
||||
1.00000011921f,1.00000011921f,1.00000011921f,1.00000011921f,
|
||||
0.00833693705499f,0.00833693705499f,0.00833693705499f,0.00833693705499f,
|
||||
0.166665703058f,0.166665703058f,0.166665703058f,0.166665703058f,
|
||||
0.000195780929062f,0.000195780929062f,0.000195780929062f,0.000195780929062f
|
||||
};
|
||||
|
||||
/** Logarithm polynomial coefficients */
|
||||
const float32_t log_tab[4*8] =
|
||||
{
|
||||
-2.29561495781f,-2.29561495781f,-2.29561495781f,-2.29561495781f,
|
||||
-2.47071170807f,-2.47071170807f,-2.47071170807f,-2.47071170807f,
|
||||
-5.68692588806f,-5.68692588806f,-5.68692588806f,-5.68692588806f,
|
||||
-0.165253549814f,-0.165253549814f,-0.165253549814f,-0.165253549814f,
|
||||
5.17591238022f,5.17591238022f,5.17591238022f,5.17591238022f,
|
||||
0.844007015228f,0.844007015228f,0.844007015228f,0.844007015228f,
|
||||
4.58445882797f,4.58445882797f,4.58445882797f,4.58445882797f,
|
||||
0.0141278216615f,0.0141278216615f,0.0141278216615f,0.0141278216615f
|
||||
};
|
||||
|
||||
#endif
|
||||
/*
|
||||
* Copyright (c) 2016, 2019 ARM Limited.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to
|
||||
* deal in the Software without restriction, including without limitation the
|
||||
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
#include "arm_math.h"
|
||||
#include "NEMath.h"
|
||||
|
||||
#if defined(ARM_MATH_NEON)
|
||||
|
||||
/** Exponent polynomial coefficients */
|
||||
const float32_t exp_tab[4*8] =
|
||||
{
|
||||
1.f,1.f,1.f,1.f,
|
||||
0.0416598916054f,0.0416598916054f,0.0416598916054f,0.0416598916054f,
|
||||
0.500000596046f,0.500000596046f,0.500000596046f,0.500000596046f,
|
||||
0.0014122662833f,0.0014122662833f,0.0014122662833f,0.0014122662833f,
|
||||
1.00000011921f,1.00000011921f,1.00000011921f,1.00000011921f,
|
||||
0.00833693705499f,0.00833693705499f,0.00833693705499f,0.00833693705499f,
|
||||
0.166665703058f,0.166665703058f,0.166665703058f,0.166665703058f,
|
||||
0.000195780929062f,0.000195780929062f,0.000195780929062f,0.000195780929062f
|
||||
};
|
||||
|
||||
/** Logarithm polynomial coefficients */
|
||||
const float32_t log_tab[4*8] =
|
||||
{
|
||||
-2.29561495781f,-2.29561495781f,-2.29561495781f,-2.29561495781f,
|
||||
-2.47071170807f,-2.47071170807f,-2.47071170807f,-2.47071170807f,
|
||||
-5.68692588806f,-5.68692588806f,-5.68692588806f,-5.68692588806f,
|
||||
-0.165253549814f,-0.165253549814f,-0.165253549814f,-0.165253549814f,
|
||||
5.17591238022f,5.17591238022f,5.17591238022f,5.17591238022f,
|
||||
0.844007015228f,0.844007015228f,0.844007015228f,0.844007015228f,
|
||||
4.58445882797f,4.58445882797f,4.58445882797f,4.58445882797f,
|
||||
0.0141278216615f,0.0141278216615f,0.0141278216615f,0.0141278216615f
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,200 +1,200 @@
|
||||
/******************************************************************************
|
||||
* @file arm_sorting.h
|
||||
* @brief Private header file for CMSIS DSP Library
|
||||
* @version V1.7.0
|
||||
* @date 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_SORTING_H_
|
||||
#define _ARM_SORTING_H_
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data.
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_bubble_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data.
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_heap_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data.
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_insertion_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t *pSrc,
|
||||
float32_t* pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_quick_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_selection_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_bitonic_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
#if defined(ARM_MATH_NEON)
|
||||
|
||||
#define vtrn256_128q(a, b) \
|
||||
do { \
|
||||
float32x4_t vtrn128_temp = a.val[1]; \
|
||||
a.val[1] = b.val[0]; \
|
||||
b.val[0] = vtrn128_temp ; \
|
||||
} while (0)
|
||||
|
||||
#define vtrn128_64q(a, b) \
|
||||
do { \
|
||||
float32x2_t ab, cd, ef, gh; \
|
||||
ab = vget_low_f32(a); \
|
||||
ef = vget_low_f32(b); \
|
||||
cd = vget_high_f32(a); \
|
||||
gh = vget_high_f32(b); \
|
||||
a = vcombine_f32(ab, ef); \
|
||||
b = vcombine_f32(cd, gh); \
|
||||
} while (0)
|
||||
|
||||
#define vtrn256_64q(a, b) \
|
||||
do { \
|
||||
float32x2_t a_0, a_1, a_2, a_3; \
|
||||
float32x2_t b_0, b_1, b_2, b_3; \
|
||||
a_0 = vget_low_f32(a.val[0]); \
|
||||
a_1 = vget_high_f32(a.val[0]); \
|
||||
a_2 = vget_low_f32(a.val[1]); \
|
||||
a_3 = vget_high_f32(a.val[1]); \
|
||||
b_0 = vget_low_f32(b.val[0]); \
|
||||
b_1 = vget_high_f32(b.val[0]); \
|
||||
b_2 = vget_low_f32(b.val[1]); \
|
||||
b_3 = vget_high_f32(b.val[1]); \
|
||||
a.val[0] = vcombine_f32(a_0, b_0); \
|
||||
a.val[1] = vcombine_f32(a_2, b_2); \
|
||||
b.val[0] = vcombine_f32(a_1, b_1); \
|
||||
b.val[1] = vcombine_f32(a_3, b_3); \
|
||||
} while (0)
|
||||
|
||||
#define vtrn128_32q(a, b) \
|
||||
do { \
|
||||
float32x4x2_t vtrn32_tmp = vtrnq_f32((a), (b)); \
|
||||
(a) = vtrn32_tmp.val[0]; \
|
||||
(b) = vtrn32_tmp.val[1]; \
|
||||
} while (0)
|
||||
|
||||
#define vtrn256_32q(a, b) \
|
||||
do { \
|
||||
float32x4x2_t vtrn32_tmp_1 = vtrnq_f32((a.val[0]), (b.val[0])); \
|
||||
float32x4x2_t vtrn32_tmp_2 = vtrnq_f32((a.val[1]), (b.val[1])); \
|
||||
a.val[0] = vtrn32_tmp_1.val[0]; \
|
||||
a.val[1] = vtrn32_tmp_2.val[0]; \
|
||||
b.val[0] = vtrn32_tmp_1.val[1]; \
|
||||
b.val[1] = vtrn32_tmp_2.val[1]; \
|
||||
} while (0)
|
||||
|
||||
#define vminmaxq(a, b) \
|
||||
do { \
|
||||
float32x4_t minmax_tmp = (a); \
|
||||
(a) = vminq_f32((a), (b)); \
|
||||
(b) = vmaxq_f32(minmax_tmp, (b)); \
|
||||
} while (0)
|
||||
|
||||
#define vminmax256q(a, b) \
|
||||
do { \
|
||||
float32x4x2_t minmax256_tmp = (a); \
|
||||
a.val[0] = vminq_f32(a.val[0], b.val[0]); \
|
||||
a.val[1] = vminq_f32(a.val[1], b.val[1]); \
|
||||
b.val[0] = vmaxq_f32(minmax256_tmp.val[0], b.val[0]); \
|
||||
b.val[1] = vmaxq_f32(minmax256_tmp.val[1], b.val[1]); \
|
||||
} while (0)
|
||||
|
||||
#define vrev128q_f32(a) \
|
||||
vcombine_f32(vrev64_f32(vget_high_f32(a)), vrev64_f32(vget_low_f32(a)))
|
||||
|
||||
#define vrev256q_f32(a) \
|
||||
do { \
|
||||
float32x4_t rev_tmp = vcombine_f32(vrev64_f32(vget_high_f32(a.val[0])), vrev64_f32(vget_low_f32(a.val[0]))); \
|
||||
a.val[0] = vcombine_f32(vrev64_f32(vget_high_f32(a.val[1])), vrev64_f32(vget_low_f32(a.val[1]))); \
|
||||
a.val[1] = rev_tmp; \
|
||||
} while (0)
|
||||
|
||||
#define vldrev128q_f32(a, p) \
|
||||
do { \
|
||||
a = vld1q_f32(p); \
|
||||
a = vrev128q_f32(a); \
|
||||
} while (0)
|
||||
|
||||
#endif /* ARM_MATH_NEON */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _ARM_SORTING_H */
|
||||
/******************************************************************************
|
||||
* @file arm_sorting.h
|
||||
* @brief Private header file for CMSIS DSP Library
|
||||
* @version V1.7.0
|
||||
* @date 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_SORTING_H_
|
||||
#define _ARM_SORTING_H_
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data.
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_bubble_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data.
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_heap_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data.
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_insertion_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t *pSrc,
|
||||
float32_t* pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_quick_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_selection_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @param[in] S points to an instance of the sorting structure.
|
||||
* @param[in] pSrc points to the block of input data.
|
||||
* @param[out] pDst points to the block of output data
|
||||
* @param[in] blockSize number of samples to process.
|
||||
*/
|
||||
void arm_bitonic_sort_f32(
|
||||
const arm_sort_instance_f32 * S,
|
||||
float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize);
|
||||
|
||||
#if defined(ARM_MATH_NEON)
|
||||
|
||||
#define vtrn256_128q(a, b) \
|
||||
do { \
|
||||
float32x4_t vtrn128_temp = a.val[1]; \
|
||||
a.val[1] = b.val[0]; \
|
||||
b.val[0] = vtrn128_temp ; \
|
||||
} while (0)
|
||||
|
||||
#define vtrn128_64q(a, b) \
|
||||
do { \
|
||||
float32x2_t ab, cd, ef, gh; \
|
||||
ab = vget_low_f32(a); \
|
||||
ef = vget_low_f32(b); \
|
||||
cd = vget_high_f32(a); \
|
||||
gh = vget_high_f32(b); \
|
||||
a = vcombine_f32(ab, ef); \
|
||||
b = vcombine_f32(cd, gh); \
|
||||
} while (0)
|
||||
|
||||
#define vtrn256_64q(a, b) \
|
||||
do { \
|
||||
float32x2_t a_0, a_1, a_2, a_3; \
|
||||
float32x2_t b_0, b_1, b_2, b_3; \
|
||||
a_0 = vget_low_f32(a.val[0]); \
|
||||
a_1 = vget_high_f32(a.val[0]); \
|
||||
a_2 = vget_low_f32(a.val[1]); \
|
||||
a_3 = vget_high_f32(a.val[1]); \
|
||||
b_0 = vget_low_f32(b.val[0]); \
|
||||
b_1 = vget_high_f32(b.val[0]); \
|
||||
b_2 = vget_low_f32(b.val[1]); \
|
||||
b_3 = vget_high_f32(b.val[1]); \
|
||||
a.val[0] = vcombine_f32(a_0, b_0); \
|
||||
a.val[1] = vcombine_f32(a_2, b_2); \
|
||||
b.val[0] = vcombine_f32(a_1, b_1); \
|
||||
b.val[1] = vcombine_f32(a_3, b_3); \
|
||||
} while (0)
|
||||
|
||||
#define vtrn128_32q(a, b) \
|
||||
do { \
|
||||
float32x4x2_t vtrn32_tmp = vtrnq_f32((a), (b)); \
|
||||
(a) = vtrn32_tmp.val[0]; \
|
||||
(b) = vtrn32_tmp.val[1]; \
|
||||
} while (0)
|
||||
|
||||
#define vtrn256_32q(a, b) \
|
||||
do { \
|
||||
float32x4x2_t vtrn32_tmp_1 = vtrnq_f32((a.val[0]), (b.val[0])); \
|
||||
float32x4x2_t vtrn32_tmp_2 = vtrnq_f32((a.val[1]), (b.val[1])); \
|
||||
a.val[0] = vtrn32_tmp_1.val[0]; \
|
||||
a.val[1] = vtrn32_tmp_2.val[0]; \
|
||||
b.val[0] = vtrn32_tmp_1.val[1]; \
|
||||
b.val[1] = vtrn32_tmp_2.val[1]; \
|
||||
} while (0)
|
||||
|
||||
#define vminmaxq(a, b) \
|
||||
do { \
|
||||
float32x4_t minmax_tmp = (a); \
|
||||
(a) = vminq_f32((a), (b)); \
|
||||
(b) = vmaxq_f32(minmax_tmp, (b)); \
|
||||
} while (0)
|
||||
|
||||
#define vminmax256q(a, b) \
|
||||
do { \
|
||||
float32x4x2_t minmax256_tmp = (a); \
|
||||
a.val[0] = vminq_f32(a.val[0], b.val[0]); \
|
||||
a.val[1] = vminq_f32(a.val[1], b.val[1]); \
|
||||
b.val[0] = vmaxq_f32(minmax256_tmp.val[0], b.val[0]); \
|
||||
b.val[1] = vmaxq_f32(minmax256_tmp.val[1], b.val[1]); \
|
||||
} while (0)
|
||||
|
||||
#define vrev128q_f32(a) \
|
||||
vcombine_f32(vrev64_f32(vget_high_f32(a)), vrev64_f32(vget_low_f32(a)))
|
||||
|
||||
#define vrev256q_f32(a) \
|
||||
do { \
|
||||
float32x4_t rev_tmp = vcombine_f32(vrev64_f32(vget_high_f32(a.val[0])), vrev64_f32(vget_low_f32(a.val[0]))); \
|
||||
a.val[0] = vcombine_f32(vrev64_f32(vget_high_f32(a.val[1])), vrev64_f32(vget_low_f32(a.val[1]))); \
|
||||
a.val[1] = rev_tmp; \
|
||||
} while (0)
|
||||
|
||||
#define vldrev128q_f32(a, p) \
|
||||
do { \
|
||||
a = vld1q_f32(p); \
|
||||
a = vrev128q_f32(a); \
|
||||
} while (0)
|
||||
|
||||
#endif /* ARM_MATH_NEON */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _ARM_SORTING_H */
|
||||
|
||||
@@ -1,58 +1,325 @@
|
||||
/******************************************************************************
|
||||
* @file arm_vec_fft.h
|
||||
* @brief Private header file for CMSIS DSP Library
|
||||
* @version V1.7.0
|
||||
* @date 07. January 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_VEC_FFT_H_
|
||||
#define _ARM_VEC_FFT_H_
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#define MVE_CMPLX_ADD_A_ixB(A, B) vcaddq_rot90(A,B)
|
||||
#define MVE_CMPLX_SUB_A_ixB(A,B) vcaddq_rot270(A,B)
|
||||
#define MVE_CMPLX_MULT_FLT_AxB(A,B) vcmlaq_rot90(vcmulq(A, B), A, B)
|
||||
#define MVE_CMPLX_MULT_FLT_Conj_AxB(A,B) vcmlaq_rot270(vcmulq(A, B), A, B)
|
||||
|
||||
#define MVE_CMPLX_MULT_FX_AxB(A,B) vqdmladhxq(vqdmlsdhq((__typeof(A))vuninitializedq_s32(), A, B), A, B);
|
||||
#define MVE_CMPLX_MULT_FX_AxConjB(A,B) vqdmladhq(vqdmlsdhxq((__typeof(A))vuninitializedq_s32(), A, B), A, B);
|
||||
|
||||
#define MVE_CMPLX_ADD_FX_A_ixB(A, B) vhcaddq_rot90(A,B)
|
||||
#define MVE_CMPLX_SUB_FX_A_ixB(A,B) vhcaddq_rot270(A,B)
|
||||
|
||||
|
||||
#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* _ARM_VEC_FFT_H_ */
|
||||
/******************************************************************************
|
||||
* @file arm_vec_fft.h
|
||||
* @brief Private header file for CMSIS DSP Library
|
||||
* @version V1.7.0
|
||||
* @date 07. January 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_VEC_FFT_H_
|
||||
#define _ARM_VEC_FFT_H_
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#define MVE_CMPLX_ADD_A_ixB(A, B) vcaddq_rot90(A,B)
|
||||
#define MVE_CMPLX_SUB_A_ixB(A,B) vcaddq_rot270(A,B)
|
||||
#define MVE_CMPLX_MULT_FLT_AxB(A,B) vcmlaq_rot90(vcmulq(A, B), A, B)
|
||||
#define MVE_CMPLX_MULT_FLT_Conj_AxB(A,B) vcmlaq_rot270(vcmulq(A, B), A, B)
|
||||
|
||||
#define MVE_CMPLX_MULT_FX_AxB(A,B,TyA) vqdmladhxq(vqdmlsdhq((TyA)vuninitializedq_s32(), A, B), A, B)
|
||||
#define MVE_CMPLX_MULT_FX_AxConjB(A,B,TyA) vqdmladhq(vqdmlsdhxq((TyA)vuninitializedq_s32(), A, B), A, B)
|
||||
|
||||
#define MVE_CMPLX_ADD_FX_A_ixB(A, B) vhcaddq_rot90(A,B)
|
||||
#define MVE_CMPLX_SUB_FX_A_ixB(A,B) vhcaddq_rot270(A,B)
|
||||
|
||||
|
||||
/**
|
||||
@brief In-place 32 bit reversal function for helium
|
||||
@param[in,out] pSrc points to in-place buffer of unknown 32-bit data type
|
||||
@param[in] bitRevLen bit reversal table length
|
||||
@param[in] pBitRevTab points to bit reversal table
|
||||
@return none
|
||||
*/
|
||||
|
||||
__STATIC_INLINE void arm_bitreversal_32_inpl_mve(
|
||||
uint32_t *pSrc,
|
||||
const uint16_t bitRevLen,
|
||||
const uint16_t *pBitRevTab)
|
||||
|
||||
{
|
||||
uint64_t *src = (uint64_t *) pSrc;
|
||||
int32_t blkCnt; /* loop counters */
|
||||
uint32x4_t bitRevTabOff;
|
||||
uint32x4_t one = vdupq_n_u32(1);
|
||||
uint64x2_t inLow, inHigh;
|
||||
uint64x2_t bitRevOff1Low, bitRevOff0Low;
|
||||
uint64x2_t bitRevOff1High, bitRevOff0High;
|
||||
|
||||
/* load scheduling to increase gather load idx update / gather load distance */
|
||||
bitRevTabOff = vldrhq_u32(pBitRevTab);
|
||||
pBitRevTab += 4;
|
||||
|
||||
bitRevOff0Low = vmullbq_int_u32(bitRevTabOff, one);
|
||||
bitRevOff0High = vmulltq_int_u32(bitRevTabOff, one);
|
||||
|
||||
|
||||
blkCnt = bitRevLen / 8;
|
||||
while (blkCnt > 0) {
|
||||
bitRevTabOff = vldrhq_u32(pBitRevTab);
|
||||
pBitRevTab += 4;
|
||||
|
||||
/* 64-bit index expansion */
|
||||
bitRevOff1Low = vmullbq_int_u32(bitRevTabOff, one);
|
||||
bitRevOff1High = vmulltq_int_u32(bitRevTabOff, one);
|
||||
|
||||
inLow = vldrdq_gather_offset_u64(src, bitRevOff0Low);
|
||||
inHigh = vldrdq_gather_offset_u64(src, bitRevOff0High);
|
||||
|
||||
vstrdq_scatter_offset_u64(src, bitRevOff0Low, inHigh);
|
||||
vstrdq_scatter_offset_u64(src, bitRevOff0High, inLow);
|
||||
|
||||
|
||||
/* unrolled */
|
||||
bitRevTabOff = vldrhq_u32(pBitRevTab);
|
||||
pBitRevTab += 4;
|
||||
|
||||
bitRevOff0Low = vmullbq_int_u32(bitRevTabOff, one);
|
||||
bitRevOff0High = vmulltq_int_u32(bitRevTabOff, one);
|
||||
|
||||
inLow = vldrdq_gather_offset_u64(src, bitRevOff1Low);
|
||||
inHigh = vldrdq_gather_offset_u64(src, bitRevOff1High);
|
||||
|
||||
vstrdq_scatter_offset_u64(src, bitRevOff1Low, inHigh);
|
||||
vstrdq_scatter_offset_u64(src, bitRevOff1High, inLow);
|
||||
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
if (bitRevLen & 7) {
|
||||
/* FFT size = 16 */
|
||||
inLow = vldrdq_gather_offset_u64(src, bitRevOff0Low);
|
||||
inHigh = vldrdq_gather_offset_u64(src, bitRevOff0High);
|
||||
|
||||
vstrdq_scatter_offset_u64(src, bitRevOff0Low, inHigh);
|
||||
vstrdq_scatter_offset_u64(src, bitRevOff0High, inLow);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
@brief In-place 16 bit reversal function for helium
|
||||
@param[in,out] pSrc points to in-place buffer of unknown 16-bit data type
|
||||
@param[in] bitRevLen bit reversal table length
|
||||
@param[in] pBitRevTab points to bit reversal table
|
||||
@return none
|
||||
*/
|
||||
|
||||
__STATIC_INLINE void arm_bitreversal_16_inpl_mve(
|
||||
uint16_t *pSrc,
|
||||
const uint16_t bitRevLen,
|
||||
const uint16_t *pBitRevTab)
|
||||
|
||||
{
|
||||
uint32_t *src = (uint32_t *) pSrc;
|
||||
int32_t blkCnt; /* loop counters */
|
||||
uint32x4_t bitRevTabOff;
|
||||
uint16x8_t one = vdupq_n_u16(1);
|
||||
uint32x4_t bitRevOff1Low, bitRevOff0Low;
|
||||
uint32x4_t bitRevOff1High, bitRevOff0High;
|
||||
uint32x4_t inLow, inHigh;
|
||||
|
||||
/* load scheduling to increase gather load idx update / gather load distance */
|
||||
bitRevTabOff = vldrhq_u16(pBitRevTab);
|
||||
pBitRevTab += 8;
|
||||
|
||||
bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
|
||||
bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
|
||||
bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3);
|
||||
bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3);
|
||||
|
||||
blkCnt = (bitRevLen / 16);
|
||||
while (blkCnt > 0) {
|
||||
bitRevTabOff = vldrhq_u16(pBitRevTab);
|
||||
pBitRevTab += 8;
|
||||
|
||||
bitRevOff1Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
|
||||
bitRevOff1High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
|
||||
bitRevOff1Low = vshrq_n_u16((uint16x8_t)bitRevOff1Low, 3);
|
||||
bitRevOff1High = vshrq_n_u16((uint16x8_t)bitRevOff1High, 3);
|
||||
|
||||
inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff0Low);
|
||||
inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff0High);
|
||||
|
||||
vstrwq_scatter_shifted_offset_u32(src, bitRevOff0Low, inHigh);
|
||||
vstrwq_scatter_shifted_offset_u32(src, bitRevOff0High, inLow);
|
||||
|
||||
/* loop unrolling */
|
||||
bitRevTabOff = vldrhq_u16(pBitRevTab);
|
||||
pBitRevTab += 8;
|
||||
|
||||
bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
|
||||
bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
|
||||
bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3);
|
||||
bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3);
|
||||
|
||||
inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff1Low);
|
||||
inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff1High);
|
||||
|
||||
vstrwq_scatter_shifted_offset_u32(src, bitRevOff1Low, inHigh);
|
||||
vstrwq_scatter_shifted_offset_u32(src, bitRevOff1High, inLow);
|
||||
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* tail handling */
|
||||
blkCnt = bitRevLen & 0xf;
|
||||
if (blkCnt == 8) {
|
||||
inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff0Low);
|
||||
inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff0High);
|
||||
|
||||
vstrwq_scatter_shifted_offset_u32(src, bitRevOff0Low, inHigh);
|
||||
vstrwq_scatter_shifted_offset_u32(src, bitRevOff0High, inLow);
|
||||
} else if (blkCnt == 12) {
|
||||
/* FFT 16 special case */
|
||||
mve_pred16_t p = vctp16q(4);
|
||||
|
||||
bitRevTabOff = vldrhq_z_u16(pBitRevTab, p);
|
||||
|
||||
inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff0Low);
|
||||
inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff0High);
|
||||
|
||||
vstrwq_scatter_shifted_offset_u32(src, bitRevOff0Low, inHigh);
|
||||
vstrwq_scatter_shifted_offset_u32(src, bitRevOff0High, inLow);
|
||||
|
||||
bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
|
||||
bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
|
||||
bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3);
|
||||
bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3);
|
||||
|
||||
inLow = vldrwq_gather_shifted_offset_z_u32(src, bitRevOff0Low, p);
|
||||
inHigh = vldrwq_gather_shifted_offset_z_u32(src, bitRevOff0High, p);
|
||||
|
||||
vstrwq_scatter_shifted_offset_p_u32(src, bitRevOff0Low, inHigh, p);
|
||||
vstrwq_scatter_shifted_offset_p_u32(src, bitRevOff0High, inLow, p);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
@brief Out-of-place 32 bit reversal function for helium
|
||||
@param[out] pDst points to destination buffer of unknown 32-bit data type
|
||||
@param[in] pSrc points to input buffer of unknown 32-bit data type
|
||||
@param[in] fftLen FFT length
|
||||
@return none
|
||||
*/
|
||||
__STATIC_INLINE void arm_bitreversal_32_outpl_mve(void *pDst, void *pSrc, uint32_t fftLen)
|
||||
{
|
||||
uint32x4_t idxOffs0, idxOffs1, bitRevOffs0, bitRevOffs1;
|
||||
uint32_t bitRevPos, blkCnt;
|
||||
uint32_t *pDst32 = (uint32_t *) pDst;
|
||||
|
||||
/* fwd indexes */
|
||||
idxOffs0 = vdupq_n_u32(0);
|
||||
idxOffs1 = vdupq_n_u32(0);
|
||||
idxOffs0[0] = 0; idxOffs0[2] = 4;
|
||||
idxOffs1[0] = 8; idxOffs1[2] = 12;
|
||||
|
||||
bitRevPos = (31 - __CLZ(fftLen)) + 5;
|
||||
blkCnt = fftLen >> 2;
|
||||
|
||||
/* issued earlier to increase gather load idx update / gather load distance */
|
||||
/* bit-reverse fwd indexes */
|
||||
bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos);
|
||||
bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos);
|
||||
while (blkCnt > 0) {
|
||||
uint64x2_t vecIn;
|
||||
|
||||
vecIn = vldrdq_gather_offset_u64(pSrc, (uint64x2_t) bitRevOffs0);
|
||||
idxOffs0 = idxOffs0 + 16;
|
||||
vst1q(pDst32, (uint32x4_t) vecIn);
|
||||
pDst32 += 4;
|
||||
bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos);
|
||||
|
||||
vecIn = vldrdq_gather_offset_u64(pSrc, (uint64x2_t) bitRevOffs1);
|
||||
idxOffs1 = idxOffs1 + 16;
|
||||
vst1q(pDst32, (uint32x4_t) vecIn);
|
||||
pDst32 += 4;
|
||||
bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos);
|
||||
|
||||
blkCnt--;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
@brief Out-of-place 16 bit reversal function for helium
|
||||
@param[out] pDst points to destination buffer of unknown 16-bit data type
|
||||
@param[in] pSrc points to input buffer of unknown 16-bit data type
|
||||
@param[in] fftLen FFT length
|
||||
@return none
|
||||
*/
|
||||
|
||||
__STATIC_INLINE void arm_bitreversal_16_outpl_mve(void *pDst, void *pSrc, uint32_t fftLen)
|
||||
{
|
||||
uint32x4_t idxOffs0, idxOffs1, bitRevOffs0, bitRevOffs1;
|
||||
uint32_t bitRevPos, blkCnt;
|
||||
uint16_t *pDst16 = (uint16_t *) pDst;
|
||||
uint32_t incrIdx = 0;
|
||||
|
||||
/* fwd indexes */
|
||||
idxOffs0 = vidupq_wb_u32(&incrIdx, 4); // {0, 4, 8, 12}
|
||||
idxOffs1 = vidupq_wb_u32(&incrIdx, 4); // {16, 20, 24, 28}
|
||||
|
||||
bitRevPos = (31 - __CLZ(fftLen)) + 4;
|
||||
blkCnt = fftLen >> 3;
|
||||
|
||||
/* issued earlier to increase gather load idx update / gather load distance */
|
||||
/* bit-reverse fwd indexes */
|
||||
bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos);
|
||||
bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos);
|
||||
while (blkCnt > 0) {
|
||||
uint32x4_t vecIn;
|
||||
|
||||
vecIn = vldrwq_gather_offset_s32(pSrc, bitRevOffs0);
|
||||
idxOffs0 = idxOffs0 + 32;
|
||||
vst1q(pDst16, (uint16x8_t) vecIn);
|
||||
pDst16 += 8;
|
||||
bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos);
|
||||
|
||||
vecIn = vldrwq_gather_offset_s32(pSrc, bitRevOffs1);
|
||||
idxOffs1 = idxOffs1 + 32;
|
||||
vst1q(pDst16, (uint16x8_t) vecIn);
|
||||
pDst16 += 8;
|
||||
bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos);
|
||||
|
||||
blkCnt--;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* _ARM_VEC_FFT_H_ */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,75 +1,87 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: BasicMathFunctions.c
|
||||
* Description: Combination of all basic math function source files.
|
||||
*
|
||||
* $Date: 16. March 2020
|
||||
* $Revision: V1.1.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_abs_f32.c"
|
||||
#include "arm_abs_q15.c"
|
||||
#include "arm_abs_q31.c"
|
||||
#include "arm_abs_q7.c"
|
||||
#include "arm_add_f32.c"
|
||||
#include "arm_add_q15.c"
|
||||
#include "arm_add_q31.c"
|
||||
#include "arm_add_q7.c"
|
||||
#include "arm_and_u16.c"
|
||||
#include "arm_and_u32.c"
|
||||
#include "arm_and_u8.c"
|
||||
#include "arm_dot_prod_f32.c"
|
||||
#include "arm_dot_prod_q15.c"
|
||||
#include "arm_dot_prod_q31.c"
|
||||
#include "arm_dot_prod_q7.c"
|
||||
#include "arm_mult_f32.c"
|
||||
#include "arm_mult_q15.c"
|
||||
#include "arm_mult_q31.c"
|
||||
#include "arm_mult_q7.c"
|
||||
#include "arm_negate_f32.c"
|
||||
#include "arm_negate_q15.c"
|
||||
#include "arm_negate_q31.c"
|
||||
#include "arm_negate_q7.c"
|
||||
#include "arm_not_u16.c"
|
||||
#include "arm_not_u32.c"
|
||||
#include "arm_not_u8.c"
|
||||
#include "arm_offset_f32.c"
|
||||
#include "arm_offset_q15.c"
|
||||
#include "arm_offset_q31.c"
|
||||
#include "arm_offset_q7.c"
|
||||
#include "arm_or_u16.c"
|
||||
#include "arm_or_u32.c"
|
||||
#include "arm_or_u8.c"
|
||||
#include "arm_scale_f32.c"
|
||||
#include "arm_scale_q15.c"
|
||||
#include "arm_scale_q31.c"
|
||||
#include "arm_scale_q7.c"
|
||||
#include "arm_shift_q15.c"
|
||||
#include "arm_shift_q31.c"
|
||||
#include "arm_shift_q7.c"
|
||||
#include "arm_sub_f32.c"
|
||||
#include "arm_sub_q15.c"
|
||||
#include "arm_sub_q31.c"
|
||||
#include "arm_sub_q7.c"
|
||||
#include "arm_xor_u16.c"
|
||||
#include "arm_xor_u32.c"
|
||||
#include "arm_xor_u8.c"
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: BasicMathFunctions.c
|
||||
* Description: Combination of all basic math function source files.
|
||||
*
|
||||
* $Date: 16. March 2020
|
||||
* $Revision: V1.1.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_abs_f32.c"
|
||||
#include "arm_abs_f64.c"
|
||||
#include "arm_abs_q15.c"
|
||||
#include "arm_abs_q31.c"
|
||||
#include "arm_abs_q7.c"
|
||||
#include "arm_add_f32.c"
|
||||
#include "arm_add_f64.c"
|
||||
#include "arm_add_q15.c"
|
||||
#include "arm_add_q31.c"
|
||||
#include "arm_add_q7.c"
|
||||
#include "arm_and_u16.c"
|
||||
#include "arm_and_u32.c"
|
||||
#include "arm_and_u8.c"
|
||||
#include "arm_dot_prod_f32.c"
|
||||
#include "arm_dot_prod_f64.c"
|
||||
#include "arm_dot_prod_q15.c"
|
||||
#include "arm_dot_prod_q31.c"
|
||||
#include "arm_dot_prod_q7.c"
|
||||
#include "arm_mult_f32.c"
|
||||
#include "arm_mult_f64.c"
|
||||
#include "arm_mult_q15.c"
|
||||
#include "arm_mult_q31.c"
|
||||
#include "arm_mult_q7.c"
|
||||
#include "arm_negate_f32.c"
|
||||
#include "arm_negate_f64.c"
|
||||
#include "arm_negate_q15.c"
|
||||
#include "arm_negate_q31.c"
|
||||
#include "arm_negate_q7.c"
|
||||
#include "arm_not_u16.c"
|
||||
#include "arm_not_u32.c"
|
||||
#include "arm_not_u8.c"
|
||||
#include "arm_offset_f32.c"
|
||||
#include "arm_offset_f64.c"
|
||||
#include "arm_offset_q15.c"
|
||||
#include "arm_offset_q31.c"
|
||||
#include "arm_offset_q7.c"
|
||||
#include "arm_or_u16.c"
|
||||
#include "arm_or_u32.c"
|
||||
#include "arm_or_u8.c"
|
||||
#include "arm_scale_f32.c"
|
||||
#include "arm_scale_f64.c"
|
||||
#include "arm_scale_q15.c"
|
||||
#include "arm_scale_q31.c"
|
||||
#include "arm_scale_q7.c"
|
||||
#include "arm_shift_q15.c"
|
||||
#include "arm_shift_q31.c"
|
||||
#include "arm_shift_q7.c"
|
||||
#include "arm_sub_f32.c"
|
||||
#include "arm_sub_f64.c"
|
||||
#include "arm_sub_q15.c"
|
||||
#include "arm_sub_q31.c"
|
||||
#include "arm_sub_q7.c"
|
||||
#include "arm_xor_u16.c"
|
||||
#include "arm_xor_u32.c"
|
||||
#include "arm_xor_u8.c"
|
||||
#include "arm_clip_f32.c"
|
||||
#include "arm_clip_q31.c"
|
||||
#include "arm_clip_q15.c"
|
||||
#include "arm_clip_q7.c"
|
||||
|
||||
@@ -0,0 +1,37 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: BasicMathFunctionsF16.c
|
||||
* Description: Combination of all basic math function f16 source files.
|
||||
*
|
||||
* $Date: 20. April 2020
|
||||
* $Revision: V1.1.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_abs_f16.c"
|
||||
#include "arm_add_f16.c"
|
||||
#include "arm_dot_prod_f16.c"
|
||||
#include "arm_mult_f16.c"
|
||||
#include "arm_negate_f16.c"
|
||||
#include "arm_offset_f16.c"
|
||||
#include "arm_scale_f16.c"
|
||||
#include "arm_sub_f16.c"
|
||||
#include "arm_clip_f16.c"
|
||||
@@ -1,19 +1,41 @@
|
||||
cmake_minimum_required (VERSION 3.6)
|
||||
|
||||
project(CMSISDSPBasicMath)
|
||||
|
||||
include(configLib)
|
||||
include(configDsp)
|
||||
|
||||
file(GLOB SRC "./*_*.c")
|
||||
|
||||
add_library(CMSISDSPBasicMath STATIC ${SRC})
|
||||
|
||||
configLib(CMSISDSPBasicMath ${ROOT})
|
||||
configDsp(CMSISDSPBasicMath ${ROOT})
|
||||
|
||||
### Includes
|
||||
target_include_directories(CMSISDSPBasicMath PUBLIC "${DSP}/Include")
|
||||
|
||||
|
||||
|
||||
cmake_minimum_required (VERSION 3.14)
|
||||
|
||||
project(CMSISDSPBasicMath)
|
||||
|
||||
include(configLib)
|
||||
include(configDsp)
|
||||
|
||||
file(GLOB SRCF64 "./*_f64.c")
|
||||
file(GLOB SRCF32 "./*_f32.c")
|
||||
file(GLOB SRCF16 "./*_f16.c")
|
||||
file(GLOB SRCQ31 "./*_q31.c")
|
||||
file(GLOB SRCQ15 "./*_q15.c")
|
||||
file(GLOB SRCQ7 "./*_q7.c")
|
||||
|
||||
file(GLOB SRCU32 "./*_u32.c")
|
||||
file(GLOB SRCU16 "./*_u16.c")
|
||||
file(GLOB SRCU8 "./*_u8.c")
|
||||
|
||||
add_library(CMSISDSPBasicMath STATIC ${SRCF64})
|
||||
target_sources(CMSISDSPBasicMath PRIVATE ${SRCF32})
|
||||
|
||||
if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16))
|
||||
target_sources(CMSISDSPBasicMath PRIVATE ${SRCF16})
|
||||
endif()
|
||||
|
||||
target_sources(CMSISDSPBasicMath PRIVATE ${SRCQ31})
|
||||
target_sources(CMSISDSPBasicMath PRIVATE ${SRCQ15})
|
||||
target_sources(CMSISDSPBasicMath PRIVATE ${SRCQ7})
|
||||
|
||||
target_sources(CMSISDSPBasicMath PRIVATE ${SRCU32})
|
||||
target_sources(CMSISDSPBasicMath PRIVATE ${SRCU16})
|
||||
target_sources(CMSISDSPBasicMath PRIVATE ${SRCU8})
|
||||
|
||||
configLib(CMSISDSPBasicMath ${ROOT})
|
||||
configDsp(CMSISDSPBasicMath ${ROOT})
|
||||
|
||||
### Includes
|
||||
target_include_directories(CMSISDSPBasicMath PUBLIC "${DSP}/Include")
|
||||
|
||||
|
||||
|
||||
|
||||
198
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_abs_f16.c
Normal file
198
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_abs_f16.c
Normal file
@@ -0,0 +1,198 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_f16.c
|
||||
* Description: Floating-point vector absolute value
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions_f16.h"
|
||||
#include <math.h>
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup BasicAbs Vector Absolute Value
|
||||
|
||||
Computes the absolute value of a vector on an element-by-element basis.
|
||||
|
||||
<pre>
|
||||
pDst[n] = abs(pSrc[n]), 0 <= n < blockSize.
|
||||
</pre>
|
||||
|
||||
The functions support in-place computation allowing the source and
|
||||
destination pointers to reference the same memory buffer.
|
||||
There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAbs
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Floating-point vector absolute value.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_abs_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
f16x8_t vec1;
|
||||
f16x8_t res;
|
||||
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 3U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute values and then store the results in the destination buffer. */
|
||||
vec1 = vld1q(pSrc);
|
||||
res = vabsq(vec1);
|
||||
vst1q(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrc += 8;
|
||||
pDst += 8;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x7;
|
||||
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vec1 = vld1q(pSrc);
|
||||
vstrhq_p(pDst, vabsq(vec1), p0);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#else
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
void arm_abs_f16(
|
||||
const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined(ARM_MATH_NEON_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
f16x8_t vec1;
|
||||
f16x8_t res;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute values and then store the results in the destination buffer. */
|
||||
vec1 = vld1q_f16(pSrc);
|
||||
res = vabsq_f16(vec1);
|
||||
vst1q_f16(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrc += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
#else
|
||||
#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute and store result in destination buffer. */
|
||||
*pDst++ = (_Float16)fabsf((float32_t)*pSrc++);
|
||||
|
||||
*pDst++ = (_Float16)fabsf((float32_t)*pSrc++);
|
||||
|
||||
*pDst++ = (_Float16)fabsf((float32_t)*pSrc++);
|
||||
|
||||
*pDst++ = (_Float16)fabsf((float32_t)*pSrc++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
#endif /* #if defined(ARM_MATH_NEON) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute and store result in destination buffer. */
|
||||
*pDst++ = (_Float16)fabsf((float32_t)*pSrc++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_FLOAT16_SUPPORTED */
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
/**
|
||||
@} end of BasicAbs group
|
||||
*/
|
||||
@@ -1,196 +1,196 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_f32.c
|
||||
* Description: Floating-point vector absolute value
|
||||
*
|
||||
* $Date: 18. March 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
#include <math.h>
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup BasicAbs Vector Absolute Value
|
||||
|
||||
Computes the absolute value of a vector on an element-by-element basis.
|
||||
|
||||
<pre>
|
||||
pDst[n] = abs(pSrc[n]), 0 <= n < blockSize.
|
||||
</pre>
|
||||
|
||||
The functions support in-place computation allowing the source and
|
||||
destination pointers to reference the same memory buffer.
|
||||
There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAbs
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Floating-point vector absolute value.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_abs_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
f32x4_t vec1;
|
||||
f32x4_t res;
|
||||
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute values and then store the results in the destination buffer. */
|
||||
vec1 = vld1q(pSrc);
|
||||
res = vabsq(vec1);
|
||||
vst1q(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrc += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vec1 = vld1q(pSrc);
|
||||
vstrwq_p(pDst, vabsq(vec1), p0);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_abs_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
f32x4_t vec1;
|
||||
f32x4_t res;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute values and then store the results in the destination buffer. */
|
||||
vec1 = vld1q_f32(pSrc);
|
||||
res = vabsq_f32(vec1);
|
||||
vst1q_f32(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrc += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
#else
|
||||
#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute and store result in destination buffer. */
|
||||
*pDst++ = fabsf(*pSrc++);
|
||||
|
||||
*pDst++ = fabsf(*pSrc++);
|
||||
|
||||
*pDst++ = fabsf(*pSrc++);
|
||||
|
||||
*pDst++ = fabsf(*pSrc++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
#endif /* #if defined(ARM_MATH_NEON) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute and store result in destination buffer. */
|
||||
*pDst++ = fabsf(*pSrc++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
/**
|
||||
@} end of BasicAbs group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_f32.c
|
||||
* Description: Floating-point vector absolute value
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
#include <math.h>
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup BasicAbs Vector Absolute Value
|
||||
|
||||
Computes the absolute value of a vector on an element-by-element basis.
|
||||
|
||||
<pre>
|
||||
pDst[n] = abs(pSrc[n]), 0 <= n < blockSize.
|
||||
</pre>
|
||||
|
||||
The functions support in-place computation allowing the source and
|
||||
destination pointers to reference the same memory buffer.
|
||||
There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAbs
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Floating-point vector absolute value.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_abs_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
f32x4_t vec1;
|
||||
f32x4_t res;
|
||||
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute values and then store the results in the destination buffer. */
|
||||
vec1 = vld1q(pSrc);
|
||||
res = vabsq(vec1);
|
||||
vst1q(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrc += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vec1 = vld1q(pSrc);
|
||||
vstrwq_p(pDst, vabsq(vec1), p0);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_abs_f32(
|
||||
const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
f32x4_t vec1;
|
||||
f32x4_t res;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute values and then store the results in the destination buffer. */
|
||||
vec1 = vld1q_f32(pSrc);
|
||||
res = vabsq_f32(vec1);
|
||||
vst1q_f32(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrc += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
#else
|
||||
#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute and store result in destination buffer. */
|
||||
*pDst++ = fabsf(*pSrc++);
|
||||
|
||||
*pDst++ = fabsf(*pSrc++);
|
||||
|
||||
*pDst++ = fabsf(*pSrc++);
|
||||
|
||||
*pDst++ = fabsf(*pSrc++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
#endif /* #if defined(ARM_MATH_NEON) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute and store result in destination buffer. */
|
||||
*pDst++ = fabsf(*pSrc++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
/**
|
||||
@} end of BasicAbs group
|
||||
*/
|
||||
|
||||
74
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_abs_f64.c
Normal file
74
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_abs_f64.c
Normal file
@@ -0,0 +1,74 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_f64.c
|
||||
* Description: Floating-point vector absolute value
|
||||
*
|
||||
* $Date: 13 September 2021
|
||||
* $Revision: V1.10.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
#include <math.h>
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAbs
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Floating-point vector absolute value.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_abs_f64(
|
||||
const float64_t * pSrc,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute and store result in destination buffer. */
|
||||
*pDst++ = fabs(*pSrc++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
@} end of BasicAbs group
|
||||
*/
|
||||
@@ -1,178 +1,178 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_q15.c
|
||||
* Description: Q15 vector absolute value
|
||||
*
|
||||
* $Date: 18. March 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAbs
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q15 vector absolute value.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_abs_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q15x8_t vecSrc;
|
||||
|
||||
/* Compute 8 outputs at a time */
|
||||
blkCnt = blockSize >> 3;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = |A|
|
||||
* Calculate absolute and then store the results in the destination buffer.
|
||||
*/
|
||||
vecSrc = vld1q(pSrc);
|
||||
vst1q(pDst, vqabsq(vecSrc));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrc += 8;
|
||||
pDst += 8;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 7;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vecSrc = vld1q(pSrc);
|
||||
vstrhq_p(pDst, vqabsq(vecSrc), p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_abs_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
q15_t in; /* Temporary input variable */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BasicAbs group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_q15.c
|
||||
* Description: Q15 vector absolute value
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAbs
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q15 vector absolute value.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_abs_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q15x8_t vecSrc;
|
||||
|
||||
/* Compute 8 outputs at a time */
|
||||
blkCnt = blockSize >> 3;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = |A|
|
||||
* Calculate absolute and then store the results in the destination buffer.
|
||||
*/
|
||||
vecSrc = vld1q(pSrc);
|
||||
vst1q(pDst, vqabsq(vecSrc));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrc += 8;
|
||||
pDst += 8;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 7;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vecSrc = vld1q(pSrc);
|
||||
vstrhq_p(pDst, vqabsq(vecSrc), p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_abs_q15(
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
q15_t in; /* Temporary input variable */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BasicAbs group
|
||||
*/
|
||||
|
||||
@@ -1,208 +1,208 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_q31.c
|
||||
* Description: Q31 vector absolute value
|
||||
*
|
||||
* $Date: 18. March 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAbs
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q31 vector absolute value.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_abs_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counters */
|
||||
q31x4_t vecSrc;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = |A|
|
||||
* Calculate absolute and then store the results in the destination buffer.
|
||||
*/
|
||||
vecSrc = vld1q(pSrc);
|
||||
vst1q(pDst, vqabsq(vecSrc));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* Advance vector source and destination pointers
|
||||
*/
|
||||
pSrc += 4;
|
||||
pDst += 4;
|
||||
}
|
||||
/*
|
||||
* Tail
|
||||
*/
|
||||
blkCnt = blockSize & 3;
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vecSrc = vld1q(pSrc);
|
||||
vstrwq_p(pDst, vqabsq(vecSrc), p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_abs_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
q31_t in; /* Temporary variable */
|
||||
|
||||
#if defined(ARM_MATH_NEON)
|
||||
int32x4_t vec1;
|
||||
int32x4_t res;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
/* Calculate absolute and then store the results in the destination buffer. */
|
||||
|
||||
vec1 = vld1q_s32(pSrc);
|
||||
res = vqabsq_s32(vec1);
|
||||
vst1q_s32(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrc += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the blockSize loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
#else
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
#endif /* #if defined (ARM_MATH_NEON) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* #if defined (ARM_MATH_MVEI) */
|
||||
/**
|
||||
@} end of BasicAbs group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_q31.c
|
||||
* Description: Q31 vector absolute value
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAbs
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q31 vector absolute value.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_abs_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counters */
|
||||
q31x4_t vecSrc;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = |A|
|
||||
* Calculate absolute and then store the results in the destination buffer.
|
||||
*/
|
||||
vecSrc = vld1q(pSrc);
|
||||
vst1q(pDst, vqabsq(vecSrc));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* Advance vector source and destination pointers
|
||||
*/
|
||||
pSrc += 4;
|
||||
pDst += 4;
|
||||
}
|
||||
/*
|
||||
* Tail
|
||||
*/
|
||||
blkCnt = blockSize & 3;
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vecSrc = vld1q(pSrc);
|
||||
vstrwq_p(pDst, vqabsq(vecSrc), p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_abs_q31(
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
q31_t in; /* Temporary variable */
|
||||
|
||||
#if defined(ARM_MATH_NEON)
|
||||
int32x4_t vec1;
|
||||
int32x4_t res;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
/* Calculate absolute and then store the results in the destination buffer. */
|
||||
|
||||
vec1 = vld1q_s32(pSrc);
|
||||
res = vqabsq_s32(vec1);
|
||||
vst1q_s32(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrc += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the blockSize loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
#else
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
#endif /* #if defined (ARM_MATH_NEON) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* #if defined (ARM_MATH_MVEI) */
|
||||
/**
|
||||
@} end of BasicAbs group
|
||||
*/
|
||||
|
||||
@@ -1,180 +1,180 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_q7.c
|
||||
* Description: Q7 vector absolute value
|
||||
*
|
||||
* $Date: 18. March 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAbs
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q7 vector absolute value.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Conditions for optimum performance
|
||||
Input and output buffers should be aligned by 32-bit
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_abs_q7(
|
||||
const q7_t * pSrc,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q7x16_t vecSrc;
|
||||
|
||||
/* Compute 16 outputs at a time */
|
||||
blkCnt = blockSize >> 4;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = |A|
|
||||
* Calculate absolute and then store the results in the destination buffer.
|
||||
*/
|
||||
vecSrc = vld1q(pSrc);
|
||||
vst1q(pDst, vqabsq(vecSrc));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrc += 16;
|
||||
pDst += 16;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 0xF;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp8q(blkCnt);
|
||||
vecSrc = vld1q(pSrc);
|
||||
vstrbq_p(pDst, vqabsq(vecSrc), p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_abs_q7(
|
||||
const q7_t * pSrc,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
q7_t in; /* Temporary input variable */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q7_t) __QSUB8(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BasicAbs group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_q7.c
|
||||
* Description: Q7 vector absolute value
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAbs
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q7 vector absolute value.
|
||||
@param[in] pSrc points to the input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Conditions for optimum performance
|
||||
Input and output buffers should be aligned by 32-bit
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_abs_q7(
|
||||
const q7_t * pSrc,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q7x16_t vecSrc;
|
||||
|
||||
/* Compute 16 outputs at a time */
|
||||
blkCnt = blockSize >> 4;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = |A|
|
||||
* Calculate absolute and then store the results in the destination buffer.
|
||||
*/
|
||||
vecSrc = vld1q(pSrc);
|
||||
vst1q(pDst, vqabsq(vecSrc));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrc += 16;
|
||||
pDst += 16;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 0xF;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp8q(blkCnt);
|
||||
vecSrc = vld1q(pSrc);
|
||||
vstrbq_p(pDst, vqabsq(vecSrc), p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_abs_q7(
|
||||
const q7_t * pSrc,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
q7_t in; /* Temporary input variable */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
|
||||
#endif
|
||||
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = |A| */
|
||||
|
||||
/* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
|
||||
in = *pSrc++;
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (in > 0) ? in : (q7_t) __QSUB8(0, in);
|
||||
#else
|
||||
*pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BasicAbs group
|
||||
*/
|
||||
|
||||
169
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_add_f16.c
Normal file
169
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_add_f16.c
Normal file
@@ -0,0 +1,169 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_f16.c
|
||||
* Description: Floating-point vector addition
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions_f16.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup BasicAdd Vector Addition
|
||||
|
||||
Element-by-element addition of two vectors.
|
||||
|
||||
<pre>
|
||||
pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
|
||||
</pre>
|
||||
|
||||
There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAdd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Floating-point vector addition.
|
||||
@param[in] pSrcA points to first input vector
|
||||
@param[in] pSrcB points to second input vector
|
||||
@param[out] pDst points to output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_add_f16(
|
||||
const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
f16x8_t vec1;
|
||||
f16x8_t vec2;
|
||||
f16x8_t res;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 3U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and then store the results in the destination buffer. */
|
||||
vec1 = vld1q(pSrcA);
|
||||
vec2 = vld1q(pSrcB);
|
||||
res = vaddq(vec1, vec2);
|
||||
vst1q(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrcA += 8;
|
||||
pSrcB += 8;
|
||||
pDst += 8;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x7;
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vec1 = vld1q(pSrcA);
|
||||
vec2 = vld1q(pSrcB);
|
||||
vstrhq_p(pDst, vaddq(vec1,vec2), p0);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#else
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
void arm_add_f16(
|
||||
const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
float16_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
|
||||
*pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
|
||||
*pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
|
||||
*pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_FLOAT16_SUPPORTED) */
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
|
||||
/**
|
||||
@} end of BasicAdd group
|
||||
*/
|
||||
@@ -1,199 +1,199 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_f32.c
|
||||
* Description: Floating-point vector addition
|
||||
*
|
||||
* $Date: 18. March 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup BasicAdd Vector Addition
|
||||
|
||||
Element-by-element addition of two vectors.
|
||||
|
||||
<pre>
|
||||
pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
|
||||
</pre>
|
||||
|
||||
There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAdd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Floating-point vector addition.
|
||||
@param[in] pSrcA points to first input vector
|
||||
@param[in] pSrcB points to second input vector
|
||||
@param[out] pDst points to output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_add_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
f32x4_t vec1;
|
||||
f32x4_t vec2;
|
||||
f32x4_t res;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and then store the results in the destination buffer. */
|
||||
vec1 = vld1q(pSrcA);
|
||||
vec2 = vld1q(pSrcB);
|
||||
res = vaddq(vec1, vec2);
|
||||
vst1q(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vec1 = vld1q(pSrcA);
|
||||
vec2 = vld1q(pSrcB);
|
||||
vstrwq_p(pDst, vaddq(vec1,vec2), p0);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_add_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
f32x4_t vec1;
|
||||
f32x4_t vec2;
|
||||
f32x4_t res;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and then store the results in the destination buffer. */
|
||||
vec1 = vld1q_f32(pSrcA);
|
||||
vec2 = vld1q_f32(pSrcB);
|
||||
res = vaddq_f32(vec1, vec2);
|
||||
vst1q_f32(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
#else
|
||||
#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = (*pSrcA++) + (*pSrcB++);
|
||||
*pDst++ = (*pSrcA++) + (*pSrcB++);
|
||||
*pDst++ = (*pSrcA++) + (*pSrcB++);
|
||||
*pDst++ = (*pSrcA++) + (*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
#endif /* #if defined(ARM_MATH_NEON) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = (*pSrcA++) + (*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
|
||||
/**
|
||||
@} end of BasicAdd group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_f32.c
|
||||
* Description: Floating-point vector addition
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup BasicAdd Vector Addition
|
||||
|
||||
Element-by-element addition of two vectors.
|
||||
|
||||
<pre>
|
||||
pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
|
||||
</pre>
|
||||
|
||||
There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAdd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Floating-point vector addition.
|
||||
@param[in] pSrcA points to first input vector
|
||||
@param[in] pSrcB points to second input vector
|
||||
@param[out] pDst points to output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_add_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
f32x4_t vec1;
|
||||
f32x4_t vec2;
|
||||
f32x4_t res;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and then store the results in the destination buffer. */
|
||||
vec1 = vld1q(pSrcA);
|
||||
vec2 = vld1q(pSrcB);
|
||||
res = vaddq(vec1, vec2);
|
||||
vst1q(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vec1 = vld1q(pSrcA);
|
||||
vec2 = vld1q(pSrcB);
|
||||
vstrwq_p(pDst, vaddq(vec1,vec2), p0);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_add_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
float32_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
f32x4_t vec1;
|
||||
f32x4_t vec2;
|
||||
f32x4_t res;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and then store the results in the destination buffer. */
|
||||
vec1 = vld1q_f32(pSrcA);
|
||||
vec2 = vld1q_f32(pSrcB);
|
||||
res = vaddq_f32(vec1, vec2);
|
||||
vst1q_f32(pDst, res);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
#else
|
||||
#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = (*pSrcA++) + (*pSrcB++);
|
||||
*pDst++ = (*pSrcA++) + (*pSrcB++);
|
||||
*pDst++ = (*pSrcA++) + (*pSrcB++);
|
||||
*pDst++ = (*pSrcA++) + (*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
#endif /* #if defined(ARM_MATH_NEON) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = (*pSrcA++) + (*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
|
||||
/**
|
||||
@} end of BasicAdd group
|
||||
*/
|
||||
|
||||
75
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_add_f64.c
Normal file
75
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_add_f64.c
Normal file
@@ -0,0 +1,75 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_f64.c
|
||||
* Description: Floating-point vector addition
|
||||
*
|
||||
* $Date: 13 September 2021
|
||||
* $Revision: V1.10.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAdd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Floating-point vector addition.
|
||||
@param[in] pSrcA points to first input vector
|
||||
@param[in] pSrcB points to second input vector
|
||||
@param[out] pDst points to output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_add_f64(
|
||||
const float64_t * pSrcA,
|
||||
const float64_t * pSrcB,
|
||||
float64_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = (*pSrcA++) + (*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
@} end of BasicAdd group
|
||||
*/
|
||||
@@ -1,176 +1,176 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_q15.c
|
||||
* Description: Q15 vector addition
|
||||
*
|
||||
* $Date: 18. March 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAdd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q15 vector addition.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_add_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q15x8_t vecA;
|
||||
q15x8_t vecB;
|
||||
|
||||
/* Compute 8 outputs at a time */
|
||||
blkCnt = blockSize >> 3;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A + B
|
||||
* Add and then store the results in the destination buffer.
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vst1q(pDst, vqaddq(vecA, vecB));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrcA += 8;
|
||||
pSrcB += 8;
|
||||
pDst += 8;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 7;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vstrhq_p(pDst, vqaddq(vecA, vecB), p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_add_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
q31_t inA1, inA2;
|
||||
q31_t inB1, inB2;
|
||||
#endif
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
/* read 2 times 2 samples at a time from sourceA */
|
||||
inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
|
||||
inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
|
||||
/* read 2 times 2 samples at a time from sourceB */
|
||||
inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
|
||||
inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
|
||||
|
||||
/* Add and store 2 times 2 samples at a time */
|
||||
write_q15x2_ia (&pDst, __QADD16(inA1, inB1));
|
||||
write_q15x2_ia (&pDst, __QADD16(inA2, inB2));
|
||||
#else
|
||||
*pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
|
||||
*pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
|
||||
*pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
|
||||
*pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
|
||||
#else
|
||||
*pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
/**
|
||||
@} end of BasicAdd group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_q15.c
|
||||
* Description: Q15 vector addition
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAdd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q15 vector addition.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_add_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q15x8_t vecA;
|
||||
q15x8_t vecB;
|
||||
|
||||
/* Compute 8 outputs at a time */
|
||||
blkCnt = blockSize >> 3;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A + B
|
||||
* Add and then store the results in the destination buffer.
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vst1q(pDst, vqaddq(vecA, vecB));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrcA += 8;
|
||||
pSrcB += 8;
|
||||
pDst += 8;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 7;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vstrhq_p(pDst, vqaddq(vecA, vecB), p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_add_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
q31_t inA1, inA2;
|
||||
q31_t inB1, inB2;
|
||||
#endif
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
/* read 2 times 2 samples at a time from sourceA */
|
||||
inA1 = read_q15x2_ia (&pSrcA);
|
||||
inA2 = read_q15x2_ia (&pSrcA);
|
||||
/* read 2 times 2 samples at a time from sourceB */
|
||||
inB1 = read_q15x2_ia (&pSrcB);
|
||||
inB2 = read_q15x2_ia (&pSrcB);
|
||||
|
||||
/* Add and store 2 times 2 samples at a time */
|
||||
write_q15x2_ia (&pDst, __QADD16(inA1, inB1));
|
||||
write_q15x2_ia (&pDst, __QADD16(inA2, inB2));
|
||||
#else
|
||||
*pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
|
||||
*pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
|
||||
*pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
|
||||
*pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
#if defined (ARM_MATH_DSP)
|
||||
*pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
|
||||
#else
|
||||
*pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
/**
|
||||
@} end of BasicAdd group
|
||||
*/
|
||||
|
||||
@@ -1,159 +1,159 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_q31.c
|
||||
* Description: Q31 vector addition
|
||||
*
|
||||
* $Date: 18. March 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAdd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q31 vector addition.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_add_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt;
|
||||
q31x4_t vecA;
|
||||
q31x4_t vecB;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A + B
|
||||
* Add and then store the results in the destination buffer.
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vst1q(pDst, vqaddq(vecA, vecB));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
pDst += 4;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 3;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vstrwq_p(pDst, vqaddq(vecA, vecB), p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_add_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
|
||||
|
||||
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
|
||||
|
||||
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
|
||||
|
||||
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
/**
|
||||
@} end of BasicAdd group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_q31.c
|
||||
* Description: Q31 vector addition
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAdd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q31 vector addition.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_add_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt;
|
||||
q31x4_t vecA;
|
||||
q31x4_t vecB;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A + B
|
||||
* Add and then store the results in the destination buffer.
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vst1q(pDst, vqaddq(vecA, vecB));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
pDst += 4;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 3;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vstrwq_p(pDst, vqaddq(vecA, vecB), p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_add_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
|
||||
|
||||
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
|
||||
|
||||
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
|
||||
|
||||
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
/**
|
||||
@} end of BasicAdd group
|
||||
*/
|
||||
|
||||
@@ -1,158 +1,159 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_q7.c
|
||||
* Description: Q7 vector addition
|
||||
*
|
||||
* $Date: 18. March 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAdd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q7 vector addition.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_add_q7(
|
||||
const q7_t * pSrcA,
|
||||
const q7_t * pSrcB,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q7x16_t vecA;
|
||||
q7x16_t vecB;
|
||||
|
||||
/* Compute 16 outputs at a time */
|
||||
blkCnt = blockSize >> 4;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A + B
|
||||
* Add and then store the results in the destination buffer.
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vst1q(pDst, vqaddq(vecA, vecB));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrcA += 16;
|
||||
pSrcB += 16;
|
||||
pDst += 16;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 0xF;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp8q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vstrbq_p(pDst, vqaddq(vecA, vecB), p0);
|
||||
}
|
||||
}
|
||||
#else
|
||||
void arm_add_q7(
|
||||
const q7_t * pSrcA,
|
||||
const q7_t * pSrcB,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
/* Add and store result in destination buffer (4 samples at a time). */
|
||||
write_q7x4_ia (&pDst, __QADD8 (read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)));
|
||||
#else
|
||||
*pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
|
||||
*pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
|
||||
*pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
|
||||
*pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ + *pSrcB++, 8);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
/**
|
||||
@} end of BasicAdd group
|
||||
*/
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_q7.c
|
||||
* Description: Q7 vector addition
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicAdd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Q7 vector addition.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[out] pDst points to the output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function uses saturating arithmetic.
|
||||
Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_add_q7(
|
||||
const q7_t * pSrcA,
|
||||
const q7_t * pSrcB,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q7x16_t vecA;
|
||||
q7x16_t vecB;
|
||||
|
||||
/* Compute 16 outputs at a time */
|
||||
blkCnt = blockSize >> 4;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A + B
|
||||
* Add and then store the results in the destination buffer.
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vst1q(pDst, vqaddq(vecA, vecB));
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrcA += 16;
|
||||
pSrcB += 16;
|
||||
pDst += 16;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 0xF;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp8q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vstrbq_p(pDst, vqaddq(vecA, vecB), p0);
|
||||
}
|
||||
}
|
||||
#else
|
||||
void arm_add_q7(
|
||||
const q7_t * pSrcA,
|
||||
const q7_t * pSrcB,
|
||||
q7_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
/* Add and store result in destination buffer (4 samples at a time). */
|
||||
write_q7x4_ia (&pDst, __QADD8 (read_q7x4_ia (&pSrcA), read_q7x4_ia (&pSrcB)));
|
||||
#else
|
||||
*pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
|
||||
*pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
|
||||
*pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
|
||||
*pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A + B */
|
||||
|
||||
/* Add and store result in destination buffer. */
|
||||
*pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ + *pSrcB++, 8);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
/**
|
||||
@} end of BasicAdd group
|
||||
*/
|
||||
|
||||
@@ -1,137 +1,137 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_and_u16.c
|
||||
* Description: uint16_t bitwise AND
|
||||
*
|
||||
* $Date: 14 November 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup And Vector bitwise AND
|
||||
|
||||
Compute the logical bitwise AND.
|
||||
|
||||
There are separate functions for uint32_t, uint16_t, and uint7_t data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup And
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Compute the logical bitwise AND of two fixed-point vectors.
|
||||
@param[in] pSrcA points to input vector A
|
||||
@param[in] pSrcB points to input vector B
|
||||
@param[out] pDst points to output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_and_u16(
|
||||
const uint16_t * pSrcA,
|
||||
const uint16_t * pSrcB,
|
||||
uint16_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
q15x8_t vecSrcA, vecSrcB;
|
||||
|
||||
/* Compute 8 outputs at a time */
|
||||
blkCnt = blockSize >> 3;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
|
||||
vst1q(pDst, vandq_u16(vecSrcA, vecSrcB) );
|
||||
|
||||
pSrcA += 8;
|
||||
pSrcB += 8;
|
||||
pDst += 8;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 7;
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
vstrhq_p(pDst, vandq_u16(vecSrcA, vecSrcB), p0);
|
||||
}
|
||||
#else
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
uint16x8_t vecA, vecB;
|
||||
|
||||
/* Compute 8 outputs at a time */
|
||||
blkCnt = blockSize >> 3U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecA = vld1q_u16(pSrcA);
|
||||
vecB = vld1q_u16(pSrcB);
|
||||
|
||||
vst1q_u16(pDst, vandq_u16(vecA, vecB) );
|
||||
|
||||
pSrcA += 8;
|
||||
pSrcB += 8;
|
||||
pDst += 8;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 7;
|
||||
#else
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
#endif
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
*pDst++ = (*pSrcA++)&(*pSrcB++);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
#endif /* if defined(ARM_MATH_MVEI) */
|
||||
}
|
||||
|
||||
/**
|
||||
@} end of And group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_and_u16.c
|
||||
* Description: uint16_t bitwise AND
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup And Vector bitwise AND
|
||||
|
||||
Compute the logical bitwise AND.
|
||||
|
||||
There are separate functions for uint32_t, uint16_t, and uint7_t data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup And
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Compute the logical bitwise AND of two fixed-point vectors.
|
||||
@param[in] pSrcA points to input vector A
|
||||
@param[in] pSrcB points to input vector B
|
||||
@param[out] pDst points to output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_and_u16(
|
||||
const uint16_t * pSrcA,
|
||||
const uint16_t * pSrcB,
|
||||
uint16_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
uint16x8_t vecSrcA, vecSrcB;
|
||||
|
||||
/* Compute 8 outputs at a time */
|
||||
blkCnt = blockSize >> 3;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
|
||||
vst1q(pDst, vandq_u16(vecSrcA, vecSrcB) );
|
||||
|
||||
pSrcA += 8;
|
||||
pSrcB += 8;
|
||||
pDst += 8;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 7;
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
vstrhq_p(pDst, vandq_u16(vecSrcA, vecSrcB), p0);
|
||||
}
|
||||
#else
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
uint16x8_t vecA, vecB;
|
||||
|
||||
/* Compute 8 outputs at a time */
|
||||
blkCnt = blockSize >> 3U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecA = vld1q_u16(pSrcA);
|
||||
vecB = vld1q_u16(pSrcB);
|
||||
|
||||
vst1q_u16(pDst, vandq_u16(vecA, vecB) );
|
||||
|
||||
pSrcA += 8;
|
||||
pSrcB += 8;
|
||||
pDst += 8;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 7;
|
||||
#else
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
#endif
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
*pDst++ = (*pSrcA++)&(*pSrcB++);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
#endif /* if defined(ARM_MATH_MVEI) */
|
||||
}
|
||||
|
||||
/**
|
||||
@} end of And group
|
||||
*/
|
||||
|
||||
@@ -1,129 +1,129 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_and_u32.c
|
||||
* Description: uint32_t bitwise AND
|
||||
*
|
||||
* $Date: 14 November 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup And
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Compute the logical bitwise AND of two fixed-point vectors.
|
||||
@param[in] pSrcA points to input vector A
|
||||
@param[in] pSrcB points to input vector B
|
||||
@param[out] pDst points to output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_and_u32(
|
||||
const uint32_t * pSrcA,
|
||||
const uint32_t * pSrcB,
|
||||
uint32_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
q31x4_t vecSrcA, vecSrcB;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
|
||||
vst1q(pDst, vandq_u32(vecSrcA, vecSrcB) );
|
||||
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 3;
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
vstrwq_p(pDst, vandq_u32(vecSrcA, vecSrcB), p0);
|
||||
}
|
||||
#else
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
uint32x4_t vecA, vecB;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecA = vld1q_u32(pSrcA);
|
||||
vecB = vld1q_u32(pSrcB);
|
||||
|
||||
vst1q_u32(pDst, vandq_u32(vecA, vecB) );
|
||||
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 3;
|
||||
#else
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
#endif
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
*pDst++ = (*pSrcA++)&(*pSrcB++);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
#endif /* if defined(ARM_MATH_MVEI) */
|
||||
}
|
||||
|
||||
/**
|
||||
@} end of And group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_and_u32.c
|
||||
* Description: uint32_t bitwise AND
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup And
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Compute the logical bitwise AND of two fixed-point vectors.
|
||||
@param[in] pSrcA points to input vector A
|
||||
@param[in] pSrcB points to input vector B
|
||||
@param[out] pDst points to output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_and_u32(
|
||||
const uint32_t * pSrcA,
|
||||
const uint32_t * pSrcB,
|
||||
uint32_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
uint32x4_t vecSrcA, vecSrcB;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
|
||||
vst1q(pDst, vandq_u32(vecSrcA, vecSrcB) );
|
||||
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 3;
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
vstrwq_p(pDst, vandq_u32(vecSrcA, vecSrcB), p0);
|
||||
}
|
||||
#else
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
uint32x4_t vecA, vecB;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecA = vld1q_u32(pSrcA);
|
||||
vecB = vld1q_u32(pSrcB);
|
||||
|
||||
vst1q_u32(pDst, vandq_u32(vecA, vecB) );
|
||||
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
pDst += 4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 3;
|
||||
#else
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
#endif
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
*pDst++ = (*pSrcA++)&(*pSrcB++);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
#endif /* if defined(ARM_MATH_MVEI) */
|
||||
}
|
||||
|
||||
/**
|
||||
@} end of And group
|
||||
*/
|
||||
|
||||
@@ -1,130 +1,130 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_and_u8.c
|
||||
* Description: uint8_t bitwise AND
|
||||
*
|
||||
* $Date: 14 November 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
@addtogroup And
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Compute the logical bitwise AND of two fixed-point vectors.
|
||||
@param[in] pSrcA points to input vector A
|
||||
@param[in] pSrcB points to input vector B
|
||||
@param[out] pDst points to output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_and_u8(
|
||||
const uint8_t * pSrcA,
|
||||
const uint8_t * pSrcB,
|
||||
uint8_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
q7x16_t vecSrcA, vecSrcB;
|
||||
|
||||
/* Compute 16 outputs at a time */
|
||||
blkCnt = blockSize >> 4;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
|
||||
vst1q(pDst, vandq_u8(vecSrcA, vecSrcB) );
|
||||
|
||||
pSrcA += 16;
|
||||
pSrcB += 16;
|
||||
pDst += 16;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0xF;
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp8q(blkCnt);
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
vstrbq_p(pDst, vandq_u8(vecSrcA, vecSrcB), p0);
|
||||
}
|
||||
#else
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
uint8x16_t vecA, vecB;
|
||||
|
||||
/* Compute 16 outputs at a time */
|
||||
blkCnt = blockSize >> 4U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecA = vld1q_u8(pSrcA);
|
||||
vecB = vld1q_u8(pSrcB);
|
||||
|
||||
vst1q_u8(pDst, vandq_u8(vecA, vecB) );
|
||||
|
||||
pSrcA += 16;
|
||||
pSrcB += 16;
|
||||
pDst += 16;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0xF;
|
||||
#else
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
#endif
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
*pDst++ = (*pSrcA++)&(*pSrcB++);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
#endif /* if defined(ARM_MATH_MVEI) */
|
||||
}
|
||||
|
||||
/**
|
||||
@} end of And group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_and_u8.c
|
||||
* Description: uint8_t bitwise AND
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
@addtogroup And
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Compute the logical bitwise AND of two fixed-point vectors.
|
||||
@param[in] pSrcA points to input vector A
|
||||
@param[in] pSrcB points to input vector B
|
||||
@param[out] pDst points to output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_and_u8(
|
||||
const uint8_t * pSrcA,
|
||||
const uint8_t * pSrcB,
|
||||
uint8_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
uint8x16_t vecSrcA, vecSrcB;
|
||||
|
||||
/* Compute 16 outputs at a time */
|
||||
blkCnt = blockSize >> 4;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
|
||||
vst1q(pDst, vandq_u8(vecSrcA, vecSrcB) );
|
||||
|
||||
pSrcA += 16;
|
||||
pSrcB += 16;
|
||||
pDst += 16;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0xF;
|
||||
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp8q(blkCnt);
|
||||
vecSrcA = vld1q(pSrcA);
|
||||
vecSrcB = vld1q(pSrcB);
|
||||
vstrbq_p(pDst, vandq_u8(vecSrcA, vecSrcB), p0);
|
||||
}
|
||||
#else
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
uint8x16_t vecA, vecB;
|
||||
|
||||
/* Compute 16 outputs at a time */
|
||||
blkCnt = blockSize >> 4U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vecA = vld1q_u8(pSrcA);
|
||||
vecB = vld1q_u8(pSrcB);
|
||||
|
||||
vst1q_u8(pDst, vandq_u8(vecA, vecB) );
|
||||
|
||||
pSrcA += 16;
|
||||
pSrcB += 16;
|
||||
pDst += 16;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0xF;
|
||||
#else
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
#endif
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
*pDst++ = (*pSrcA++)&(*pSrcB++);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
#endif /* if defined(ARM_MATH_MVEI) */
|
||||
}
|
||||
|
||||
/**
|
||||
@} end of And group
|
||||
*/
|
||||
|
||||
141
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_clip_f16.c
Normal file
141
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_clip_f16.c
Normal file
@@ -0,0 +1,141 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_clip_f16.c
|
||||
* Description: Floating-point vector addition
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions_f16.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
@addtogroup BasicClip
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Elementwise floating-point clipping
|
||||
@param[in] pSrc points to input values
|
||||
@param[out] pDst points to output clipped values
|
||||
@param[in] low lower bound
|
||||
@param[in] high higher bound
|
||||
@param[in] numSamples number of samples to clip
|
||||
@return none
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_clip_f16(const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
float16_t low,
|
||||
float16_t high,
|
||||
uint32_t numSamples)
|
||||
{
|
||||
uint32_t blkCnt;
|
||||
f16x8_t curVec0, curVec1;
|
||||
f16x8_t vecLow, vecHigh;
|
||||
|
||||
vecLow = vdupq_n_f16(low);
|
||||
vecHigh = vdupq_n_f16(high);
|
||||
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 8;
|
||||
/*
|
||||
* unrolled x 2 to allow
|
||||
* vldr/vstr/vmin/vmax
|
||||
* stall free interleaving
|
||||
*/
|
||||
blkCnt = numSamples >> 4;
|
||||
while (blkCnt--)
|
||||
{
|
||||
curVec0 = vmaxnmq(curVec0, vecLow);
|
||||
curVec1 = vld1q(pSrc);
|
||||
pSrc += 8;
|
||||
curVec0 = vminnmq(curVec0, vecHigh);
|
||||
vst1q(pDst, curVec0);
|
||||
pDst += 8;
|
||||
curVec1 = vmaxnmq(curVec1, vecLow);
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 8;
|
||||
curVec1 = vminnmq(curVec1, vecHigh);
|
||||
vst1q(pDst, curVec1);
|
||||
pDst += 8;
|
||||
}
|
||||
/*
|
||||
* Tail handling
|
||||
*/
|
||||
blkCnt = numSamples - ((numSamples >> 4) << 4);
|
||||
if (blkCnt >= 8)
|
||||
{
|
||||
curVec0 = vmaxnmq(curVec0, vecLow);
|
||||
curVec0 = vminnmq(curVec0, vecHigh);
|
||||
vst1q(pDst, curVec0);
|
||||
pDst += 8;
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 8;
|
||||
}
|
||||
|
||||
if (blkCnt > 0)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(blkCnt & 7);
|
||||
curVec0 = vmaxnmq(curVec0, vecLow);
|
||||
curVec0 = vminnmq(curVec0, vecHigh);
|
||||
vstrhq_p(pDst, curVec0, p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
|
||||
void arm_clip_f16(const float16_t * pSrc,
|
||||
float16_t * pDst,
|
||||
float16_t low,
|
||||
float16_t high,
|
||||
uint32_t numSamples)
|
||||
{
|
||||
for (uint32_t i = 0; i < numSamples; i++)
|
||||
{
|
||||
if ((_Float16)pSrc[i] > (_Float16)high)
|
||||
pDst[i] = high;
|
||||
else if ((_Float16)pSrc[i] < (_Float16)low)
|
||||
pDst[i] = low;
|
||||
else
|
||||
pDst[i] = pSrc[i];
|
||||
}
|
||||
}
|
||||
#endif /* defined(ARM_FLOAT16_SUPPORTED */
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
|
||||
|
||||
/**
|
||||
@} end of BasicClip group
|
||||
*/
|
||||
144
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_clip_f32.c
Normal file
144
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_clip_f32.c
Normal file
@@ -0,0 +1,144 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_clip_f32.c
|
||||
* Description: Floating-point vector addition
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup BasicClip Elementwise clipping
|
||||
|
||||
Element-by-element clipping of a value.
|
||||
|
||||
The value is constrained between 2 bounds.
|
||||
|
||||
There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicClip
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Elementwise floating-point clipping
|
||||
@param[in] pSrc points to input values
|
||||
@param[out] pDst points to output clipped values
|
||||
@param[in] low lower bound
|
||||
@param[in] high higher bound
|
||||
@param[in] numSamples number of samples to clip
|
||||
@return none
|
||||
*/
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_clip_f32(const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
float32_t low,
|
||||
float32_t high,
|
||||
uint32_t numSamples)
|
||||
{
|
||||
uint32_t blkCnt;
|
||||
f32x4_t curVec0, curVec1;
|
||||
f32x4_t vecLow, vecHigh;
|
||||
|
||||
vecLow = vdupq_n_f32(low);
|
||||
vecHigh = vdupq_n_f32(high);
|
||||
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 4;
|
||||
/*
|
||||
* unrolled x 2 to allow
|
||||
* vldr/vstr/vmin/vmax
|
||||
* stall free interleaving
|
||||
*/
|
||||
blkCnt = numSamples >> 3;
|
||||
while (blkCnt--)
|
||||
{
|
||||
curVec0 = vmaxnmq(curVec0, vecLow);
|
||||
curVec1 = vld1q(pSrc);
|
||||
pSrc += 4;
|
||||
curVec0 = vminnmq(curVec0, vecHigh);
|
||||
vst1q(pDst, curVec0);
|
||||
pDst += 4;
|
||||
curVec1 = vmaxnmq(curVec1, vecLow);
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 4;
|
||||
curVec1 = vminnmq(curVec1, vecHigh);
|
||||
vst1q(pDst, curVec1);
|
||||
pDst += 4;
|
||||
}
|
||||
/*
|
||||
* Tail handling
|
||||
*/
|
||||
blkCnt = numSamples - ((numSamples >> 3) << 3);
|
||||
if (blkCnt >= 4)
|
||||
{
|
||||
curVec0 = vmaxnmq(curVec0, vecLow);
|
||||
curVec0 = vminnmq(curVec0, vecHigh);
|
||||
vst1q(pDst, curVec0);
|
||||
pDst += 4;
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 4;
|
||||
}
|
||||
|
||||
if (blkCnt > 0)
|
||||
{
|
||||
mve_pred16_t p0 = vctp32q(blkCnt & 3);
|
||||
curVec0 = vmaxnmq(curVec0, vecLow);
|
||||
curVec0 = vminnmq(curVec0, vecHigh);
|
||||
vstrwq_p(pDst, curVec0, p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_clip_f32(const float32_t * pSrc,
|
||||
float32_t * pDst,
|
||||
float32_t low,
|
||||
float32_t high,
|
||||
uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
if (pSrc[i] > high)
|
||||
pDst[i] = high;
|
||||
else if (pSrc[i] < low)
|
||||
pDst[i] = low;
|
||||
else
|
||||
pDst[i] = pSrc[i];
|
||||
}
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
|
||||
/**
|
||||
@} end of BasicClip group
|
||||
*/
|
||||
134
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_clip_q15.c
Normal file
134
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_clip_q15.c
Normal file
@@ -0,0 +1,134 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_clip_q15.c
|
||||
* Description: Floating-point vector addition
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
@addtogroup BasicClip
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Elementwise fixed-point clipping
|
||||
@param[in] pSrc points to input values
|
||||
@param[out] pDst points to output clipped values
|
||||
@param[in] low lower bound
|
||||
@param[in] high higher bound
|
||||
@param[in] numSamples number of samples to clip
|
||||
@return none
|
||||
*/
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
void arm_clip_q15(const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
q15_t low,
|
||||
q15_t high,
|
||||
uint32_t numSamples)
|
||||
{
|
||||
uint32_t blkCnt;
|
||||
q15x8_t curVec0, curVec1;
|
||||
q15x8_t vecLow, vecHigh;
|
||||
|
||||
vecLow = vdupq_n_s16(low);
|
||||
vecHigh = vdupq_n_s16(high);
|
||||
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 8;
|
||||
/*
|
||||
* unrolled x 2 to allow
|
||||
* vldr/vstr/vmin/vmax
|
||||
* stall free interleaving
|
||||
*/
|
||||
blkCnt = numSamples >> 4;
|
||||
while (blkCnt--)
|
||||
{
|
||||
curVec0 = vmaxq(curVec0, vecLow);
|
||||
curVec1 = vld1q(pSrc);
|
||||
pSrc += 8;
|
||||
curVec0 = vminq(curVec0, vecHigh);
|
||||
vst1q(pDst, curVec0);
|
||||
pDst += 8;
|
||||
curVec1 = vmaxq(curVec1, vecLow);
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 8;
|
||||
curVec1 = vminq(curVec1, vecHigh);
|
||||
vst1q(pDst, curVec1);
|
||||
pDst += 8;
|
||||
}
|
||||
/*
|
||||
* Tail handling
|
||||
*/
|
||||
blkCnt = numSamples - ((numSamples >> 4) << 4);
|
||||
if (blkCnt >= 8)
|
||||
{
|
||||
curVec0 = vmaxq(curVec0, vecLow);
|
||||
curVec0 = vminq(curVec0, vecHigh);
|
||||
vst1q(pDst, curVec0);
|
||||
pDst += 8;
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 8;
|
||||
}
|
||||
|
||||
if (blkCnt > 0)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(blkCnt & 7);
|
||||
curVec0 = vmaxq(curVec0, vecLow);
|
||||
curVec0 = vminq(curVec0, vecHigh);
|
||||
vstrhq_p(pDst, curVec0, p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_clip_q15(const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
q15_t low,
|
||||
q15_t high,
|
||||
uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
if (pSrc[i] > high)
|
||||
pDst[i] = high;
|
||||
else if (pSrc[i] < low)
|
||||
pDst[i] = low;
|
||||
else
|
||||
pDst[i] = pSrc[i];
|
||||
}
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BasicClip group
|
||||
*/
|
||||
134
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_clip_q31.c
Normal file
134
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_clip_q31.c
Normal file
@@ -0,0 +1,134 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_clip_q31.c
|
||||
* Description: Floating-point vector addition
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
@addtogroup BasicClip
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Elementwise fixed-point clipping
|
||||
@param[in] pSrc points to input values
|
||||
@param[out] pDst points to output clipped values
|
||||
@param[in] low lower bound
|
||||
@param[in] high higher bound
|
||||
@param[in] numSamples number of samples to clip
|
||||
@return none
|
||||
*/
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
void arm_clip_q31(const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
q31_t low,
|
||||
q31_t high,
|
||||
uint32_t numSamples)
|
||||
{
|
||||
uint32_t blkCnt;
|
||||
q31x4_t curVec0, curVec1;
|
||||
q31x4_t vecLow, vecHigh;
|
||||
|
||||
vecLow = vdupq_n_s32(low);
|
||||
vecHigh = vdupq_n_s32(high);
|
||||
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 4;
|
||||
/*
|
||||
* unrolled x 2 to allow
|
||||
* vldr/vstr/vmin/vmax
|
||||
* stall free interleaving
|
||||
*/
|
||||
blkCnt = numSamples >> 3;
|
||||
while (blkCnt--)
|
||||
{
|
||||
curVec0 = vmaxq(curVec0, vecLow);
|
||||
curVec1 = vld1q(pSrc);
|
||||
pSrc += 4;
|
||||
curVec0 = vminq(curVec0, vecHigh);
|
||||
vst1q(pDst, curVec0);
|
||||
pDst += 4;
|
||||
curVec1 = vmaxq(curVec1, vecLow);
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 4;
|
||||
curVec1 = vminq(curVec1, vecHigh);
|
||||
vst1q(pDst, curVec1);
|
||||
pDst += 4;
|
||||
}
|
||||
/*
|
||||
* Tail handling
|
||||
*/
|
||||
blkCnt = numSamples - ((numSamples >> 3) << 3);
|
||||
if (blkCnt >= 4)
|
||||
{
|
||||
curVec0 = vmaxq(curVec0, vecLow);
|
||||
curVec0 = vminq(curVec0, vecHigh);
|
||||
vst1q(pDst, curVec0);
|
||||
pDst += 4;
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 4;
|
||||
}
|
||||
|
||||
if (blkCnt > 0)
|
||||
{
|
||||
mve_pred16_t p0 = vctp32q(blkCnt & 3);
|
||||
curVec0 = vmaxq(curVec0, vecLow);
|
||||
curVec0 = vminq(curVec0, vecHigh);
|
||||
vstrwq_p(pDst, curVec0, p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_clip_q31(const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
q31_t low,
|
||||
q31_t high,
|
||||
uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
if (pSrc[i] > high)
|
||||
pDst[i] = high;
|
||||
else if (pSrc[i] < low)
|
||||
pDst[i] = low;
|
||||
else
|
||||
pDst[i] = pSrc[i];
|
||||
}
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BasicClip group
|
||||
*/
|
||||
134
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_clip_q7.c
Normal file
134
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_clip_q7.c
Normal file
@@ -0,0 +1,134 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_clip_q7.c
|
||||
* Description: Floating-point vector addition
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
@addtogroup BasicClip
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Elementwise fixed-point clipping
|
||||
@param[in] pSrc points to input values
|
||||
@param[out] pDst points to output clipped values
|
||||
@param[in] low lower bound
|
||||
@param[in] high higher bound
|
||||
@param[in] numSamples number of samples to clip
|
||||
@return none
|
||||
*/
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
void arm_clip_q7(const q7_t * pSrc,
|
||||
q7_t * pDst,
|
||||
q7_t low,
|
||||
q7_t high,
|
||||
uint32_t numSamples)
|
||||
{
|
||||
uint32_t blkCnt;
|
||||
q7x16_t curVec0, curVec1;
|
||||
q7x16_t vecLow, vecHigh;
|
||||
|
||||
vecLow = vdupq_n_s8(low);
|
||||
vecHigh = vdupq_n_s8(high);
|
||||
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 16;
|
||||
/*
|
||||
* unrolled x 2 to allow
|
||||
* vldr/vstr/vmin/vmax
|
||||
* stall free interleaving
|
||||
*/
|
||||
blkCnt = numSamples >> 5;
|
||||
while (blkCnt--)
|
||||
{
|
||||
curVec0 = vmaxq(curVec0, vecLow);
|
||||
curVec1 = vld1q(pSrc);
|
||||
pSrc += 16;
|
||||
curVec0 = vminq(curVec0, vecHigh);
|
||||
vst1q(pDst, curVec0);
|
||||
pDst += 16;
|
||||
curVec1 = vmaxq(curVec1, vecLow);
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 16;
|
||||
curVec1 = vminq(curVec1, vecHigh);
|
||||
vst1q(pDst, curVec1);
|
||||
pDst += 16;
|
||||
}
|
||||
/*
|
||||
* Tail handling
|
||||
*/
|
||||
blkCnt = numSamples - ((numSamples >> 5) << 5);
|
||||
if (blkCnt >= 16)
|
||||
{
|
||||
curVec0 = vmaxq(curVec0, vecLow);
|
||||
curVec0 = vminq(curVec0, vecHigh);
|
||||
vst1q(pDst, curVec0);
|
||||
pDst += 16;
|
||||
curVec0 = vld1q(pSrc);
|
||||
pSrc += 16;
|
||||
}
|
||||
|
||||
if (blkCnt > 0)
|
||||
{
|
||||
mve_pred16_t p0 = vctp8q(blkCnt & 0xf);
|
||||
curVec0 = vmaxq(curVec0, vecLow);
|
||||
curVec0 = vminq(curVec0, vecHigh);
|
||||
vstrbq_p(pDst, curVec0, p0);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_clip_q7(const q7_t * pSrc,
|
||||
q7_t * pDst,
|
||||
q7_t low,
|
||||
q7_t high,
|
||||
uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
if (pSrc[i] > high)
|
||||
pDst[i] = high;
|
||||
else if (pSrc[i] < low)
|
||||
pDst[i] = low;
|
||||
else
|
||||
pDst[i] = pSrc[i];
|
||||
}
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BasicClip group
|
||||
*/
|
||||
184
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_dot_prod_f16.c
Normal file
184
libraries/cmsis/dsp/Source/BasicMathFunctions/arm_dot_prod_f16.c
Normal file
@@ -0,0 +1,184 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_f16.c
|
||||
* Description: Floating-point dot product
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions_f16.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup BasicDotProd Vector Dot Product
|
||||
|
||||
Computes the dot product of two vectors.
|
||||
The vectors are multiplied element-by-element and then summed.
|
||||
|
||||
<pre>
|
||||
sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
|
||||
</pre>
|
||||
|
||||
There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicDotProd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Dot product of floating-point vectors.
|
||||
@param[in] pSrcA points to the first input vector.
|
||||
@param[in] pSrcB points to the second input vector.
|
||||
@param[in] blockSize number of samples in each vector.
|
||||
@param[out] result output result returned here.
|
||||
@return none
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
|
||||
void arm_dot_prod_f16(
|
||||
const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float16_t * result)
|
||||
{
|
||||
f16x8_t vecA, vecB;
|
||||
f16x8_t vecSum;
|
||||
uint32_t blkCnt;
|
||||
float16_t sum = 0.0f;
|
||||
vecSum = vdupq_n_f16(0.0f);
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 3U;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
|
||||
* Calculate dot product and then store the result in a temporary buffer.
|
||||
* and advance vector source and destination pointers
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
pSrcA += 8;
|
||||
|
||||
vecB = vld1q(pSrcB);
|
||||
pSrcB += 8;
|
||||
|
||||
vecSum = vfmaq(vecSum, vecA, vecB);
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt --;
|
||||
}
|
||||
|
||||
|
||||
blkCnt = blockSize & 7;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vecSum = vfmaq_m(vecSum, vecA, vecB, p0);
|
||||
}
|
||||
|
||||
sum = vecAddAcrossF16Mve(vecSum);
|
||||
|
||||
/* Store result in destination buffer */
|
||||
*result = sum;
|
||||
|
||||
}
|
||||
|
||||
#else
|
||||
#if defined(ARM_FLOAT16_SUPPORTED)
|
||||
void arm_dot_prod_f16(
|
||||
const float16_t * pSrcA,
|
||||
const float16_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float16_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
_Float16 sum = 0.0f; /* Temporary return variable */
|
||||
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
|
||||
|
||||
sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
|
||||
|
||||
sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
|
||||
|
||||
sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Store result in destination buffer */
|
||||
*result = sum;
|
||||
}
|
||||
#endif
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
/**
|
||||
@} end of BasicDotProd group
|
||||
*/
|
||||
@@ -1,226 +1,228 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_f32.c
|
||||
* Description: Floating-point dot product
|
||||
*
|
||||
* $Date: 18. March 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup BasicDotProd Vector Dot Product
|
||||
|
||||
Computes the dot product of two vectors.
|
||||
The vectors are multiplied element-by-element and then summed.
|
||||
|
||||
<pre>
|
||||
sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
|
||||
</pre>
|
||||
|
||||
There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicDotProd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Dot product of floating-point vectors.
|
||||
@param[in] pSrcA points to the first input vector.
|
||||
@param[in] pSrcB points to the second input vector.
|
||||
@param[in] blockSize number of samples in each vector.
|
||||
@param[out] result output result returned here.
|
||||
@return none
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
|
||||
void arm_dot_prod_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float32_t * result)
|
||||
{
|
||||
f32x4_t vecA, vecB;
|
||||
f32x4_t vecSum;
|
||||
uint32_t blkCnt;
|
||||
float32_t sum = 0.0f;
|
||||
vecSum = vdupq_n_f32(0.0f);
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
|
||||
* Calculate dot product and then store the result in a temporary buffer.
|
||||
* and advance vector source and destination pointers
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
pSrcA += 4;
|
||||
|
||||
vecB = vld1q(pSrcB);
|
||||
pSrcB += 4;
|
||||
|
||||
vecSum = vfmaq(vecSum, vecA, vecB);
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt --;
|
||||
}
|
||||
|
||||
|
||||
blkCnt = blockSize & 3;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vecSum = vfmaq_m(vecSum, vecA, vecB, p0);
|
||||
}
|
||||
|
||||
sum = vecAddAcrossF32Mve(vecSum);
|
||||
|
||||
/* Store result in destination buffer */
|
||||
*result = sum;
|
||||
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
void arm_dot_prod_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float32_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
float32_t sum = 0.0f; /* Temporary return variable */
|
||||
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
f32x4_t vec1;
|
||||
f32x4_t vec2;
|
||||
f32x4_t accum = vdupq_n_f32(0);
|
||||
f32x2_t tmp = vdup_n_f32(0);
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
vec1 = vld1q_f32(pSrcA);
|
||||
vec2 = vld1q_f32(pSrcB);
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]*B[0] + A[1]*B[1] + A[2]*B[2] + ... + A[blockSize-1]*B[blockSize-1] */
|
||||
/* Calculate dot product and then store the result in a temporary buffer. */
|
||||
|
||||
accum = vmlaq_f32(accum, vec1, vec2);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
|
||||
vec1 = vld1q_f32(pSrcA);
|
||||
vec2 = vld1q_f32(pSrcB);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
#if __aarch64__
|
||||
sum = vpadds_f32(vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)));
|
||||
#else
|
||||
tmp = vpadd_f32(vget_low_f32(accum), vget_high_f32(accum));
|
||||
sum = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1);
|
||||
|
||||
#endif
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
#else
|
||||
#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum += (*pSrcA++) * (*pSrcB++);
|
||||
|
||||
sum += (*pSrcA++) * (*pSrcB++);
|
||||
|
||||
sum += (*pSrcA++) * (*pSrcB++);
|
||||
|
||||
sum += (*pSrcA++) * (*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
#endif /* #if defined(ARM_MATH_NEON) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum += (*pSrcA++) * (*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Store result in destination buffer */
|
||||
*result = sum;
|
||||
}
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
/**
|
||||
@} end of BasicDotProd group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_f32.c
|
||||
* Description: Floating-point dot product
|
||||
*
|
||||
* $Date: 05 October 2021
|
||||
* $Revision: V1.9.1
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@defgroup BasicDotProd Vector Dot Product
|
||||
|
||||
Computes the dot product of two vectors.
|
||||
The vectors are multiplied element-by-element and then summed.
|
||||
|
||||
<pre>
|
||||
sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
|
||||
</pre>
|
||||
|
||||
There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicDotProd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Dot product of floating-point vectors.
|
||||
@param[in] pSrcA points to the first input vector.
|
||||
@param[in] pSrcB points to the second input vector.
|
||||
@param[in] blockSize number of samples in each vector.
|
||||
@param[out] result output result returned here.
|
||||
@return none
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
|
||||
void arm_dot_prod_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float32_t * result)
|
||||
{
|
||||
f32x4_t vecA, vecB;
|
||||
f32x4_t vecSum;
|
||||
uint32_t blkCnt;
|
||||
float32_t sum = 0.0f;
|
||||
vecSum = vdupq_n_f32(0.0f);
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
|
||||
* Calculate dot product and then store the result in a temporary buffer.
|
||||
* and advance vector source and destination pointers
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
pSrcA += 4;
|
||||
|
||||
vecB = vld1q(pSrcB);
|
||||
pSrcB += 4;
|
||||
|
||||
vecSum = vfmaq(vecSum, vecA, vecB);
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt --;
|
||||
}
|
||||
|
||||
|
||||
blkCnt = blockSize & 3;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
vecSum = vfmaq_m(vecSum, vecA, vecB, p0);
|
||||
}
|
||||
|
||||
sum = vecAddAcrossF32Mve(vecSum);
|
||||
|
||||
/* Store result in destination buffer */
|
||||
*result = sum;
|
||||
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
void arm_dot_prod_f32(
|
||||
const float32_t * pSrcA,
|
||||
const float32_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float32_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
float32_t sum = 0.0f; /* Temporary return variable */
|
||||
|
||||
#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
f32x4_t vec1;
|
||||
f32x4_t vec2;
|
||||
f32x4_t accum = vdupq_n_f32(0);
|
||||
#if !defined(__aarch64__)
|
||||
f32x2_t tmp = vdup_n_f32(0);
|
||||
#endif
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
vec1 = vld1q_f32(pSrcA);
|
||||
vec2 = vld1q_f32(pSrcB);
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]*B[0] + A[1]*B[1] + A[2]*B[2] + ... + A[blockSize-1]*B[blockSize-1] */
|
||||
/* Calculate dot product and then store the result in a temporary buffer. */
|
||||
|
||||
accum = vmlaq_f32(accum, vec1, vec2);
|
||||
|
||||
/* Increment pointers */
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
|
||||
vec1 = vld1q_f32(pSrcA);
|
||||
vec2 = vld1q_f32(pSrcB);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
#if defined(__aarch64__)
|
||||
sum = vpadds_f32(vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)));
|
||||
#else
|
||||
tmp = vpadd_f32(vget_low_f32(accum), vget_high_f32(accum));
|
||||
sum = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1);
|
||||
|
||||
#endif
|
||||
|
||||
/* Tail */
|
||||
blkCnt = blockSize & 0x3;
|
||||
|
||||
#else
|
||||
#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum += (*pSrcA++) * (*pSrcB++);
|
||||
|
||||
sum += (*pSrcA++) * (*pSrcB++);
|
||||
|
||||
sum += (*pSrcA++) * (*pSrcB++);
|
||||
|
||||
sum += (*pSrcA++) * (*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
#endif /* #if defined(ARM_MATH_NEON) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum += (*pSrcA++) * (*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Store result in destination buffer */
|
||||
*result = sum;
|
||||
}
|
||||
|
||||
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
|
||||
/**
|
||||
@} end of BasicDotProd group
|
||||
*/
|
||||
|
||||
@@ -0,0 +1,78 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_f64.c
|
||||
* Description: Floating-point dot product
|
||||
*
|
||||
* $Date: 13 September 2021
|
||||
* $Revision: V1.10.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicDotProd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Dot product of floating-point vectors.
|
||||
@param[in] pSrcA points to the first input vector.
|
||||
@param[in] pSrcB points to the second input vector.
|
||||
@param[in] blockSize number of samples in each vector.
|
||||
@param[out] result output result returned here.
|
||||
@return none
|
||||
*/
|
||||
|
||||
void arm_dot_prod_f64(
|
||||
const float64_t * pSrcA,
|
||||
const float64_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
float64_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
float64_t sum = 0.; /* Temporary return variable */
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum += (*pSrcA++) * (*pSrcB++);
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Store result in destination buffer */
|
||||
*result = sum;
|
||||
}
|
||||
|
||||
/**
|
||||
@} end of BasicDotProd group
|
||||
*/
|
||||
@@ -1,172 +1,172 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_q15.c
|
||||
* Description: Q15 dot product
|
||||
*
|
||||
* $Date: 18. March 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicDotProd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Dot product of Q15 vectors.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@param[out] result output result returned here
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
|
||||
results are added to a 64-bit accumulator in 34.30 format.
|
||||
Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
|
||||
there is no risk of overflow.
|
||||
The return result is in 34.30 format.
|
||||
*/
|
||||
#if defined(ARM_MATH_MVEI)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_dot_prod_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q63_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q15x8_t vecA;
|
||||
q15x8_t vecB;
|
||||
q63_t sum = 0LL;
|
||||
|
||||
/* Compute 8 outputs at a time */
|
||||
blkCnt = blockSize >> 3;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
|
||||
* Calculate dot product and then store the result in a temporary buffer.
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
sum = vmlaldavaq(sum, vecA, vecB);
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrcA += 8;
|
||||
pSrcB += 8;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 7;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
sum = vmlaldavaq_p(sum, vecA, vecB, p0);
|
||||
}
|
||||
|
||||
*result = sum;
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_dot_prod_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q63_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
q63_t sum = 0; /* Temporary return variable */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
|
||||
sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
|
||||
#else
|
||||
sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
|
||||
sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
|
||||
sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
|
||||
sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
//#if defined (ARM_MATH_DSP)
|
||||
// sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
|
||||
//#else
|
||||
sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
|
||||
//#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Store result in destination buffer in 34.30 format */
|
||||
*result = sum;
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BasicDotProd group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_q15.c
|
||||
* Description: Q15 dot product
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicDotProd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Dot product of Q15 vectors.
|
||||
@param[in] pSrcA points to the first input vector
|
||||
@param[in] pSrcB points to the second input vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
@param[out] result output result returned here
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
|
||||
results are added to a 64-bit accumulator in 34.30 format.
|
||||
Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
|
||||
there is no risk of overflow.
|
||||
The return result is in 34.30 format.
|
||||
*/
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_dot_prod_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q63_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q15x8_t vecA;
|
||||
q15x8_t vecB;
|
||||
q63_t sum = 0LL;
|
||||
|
||||
/* Compute 8 outputs at a time */
|
||||
blkCnt = blockSize >> 3;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
|
||||
* Calculate dot product and then store the result in a temporary buffer.
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
sum = vmlaldavaq(sum, vecA, vecB);
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrcA += 8;
|
||||
pSrcB += 8;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 7;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
sum = vmlaldavaq_p(sum, vecA, vecB, p0);
|
||||
}
|
||||
|
||||
*result = sum;
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_dot_prod_q15(
|
||||
const q15_t * pSrcA,
|
||||
const q15_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q63_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
q63_t sum = 0; /* Temporary return variable */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum = __SMLALD(read_q15x2_ia (&pSrcA), read_q15x2_ia (&pSrcB), sum);
|
||||
sum = __SMLALD(read_q15x2_ia (&pSrcA), read_q15x2_ia (&pSrcB), sum);
|
||||
#else
|
||||
sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
|
||||
sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
|
||||
sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
|
||||
sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
|
||||
#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
//#if defined (ARM_MATH_DSP)
|
||||
// sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
|
||||
//#else
|
||||
sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
|
||||
//#endif
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Store result in destination buffer in 34.30 format */
|
||||
*result = sum;
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BasicDotProd group
|
||||
*/
|
||||
|
||||
@@ -1,174 +1,174 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_q31.c
|
||||
* Description: Q31 dot product
|
||||
*
|
||||
* $Date: 18. March 2019
|
||||
* $Revision: V1.6.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicDotProd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Dot product of Q31 vectors.
|
||||
@param[in] pSrcA points to the first input vector.
|
||||
@param[in] pSrcB points to the second input vector.
|
||||
@param[in] blockSize number of samples in each vector.
|
||||
@param[out] result output result returned here.
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
|
||||
are truncated to 2.48 format by discarding the lower 14 bits.
|
||||
The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
|
||||
There are 15 guard bits in the accumulator and there is no risk of overflow as long as
|
||||
the length of the vectors is less than 2^16 elements.
|
||||
The return result is in 16.48 format.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_dot_prod_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q63_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q31x4_t vecA;
|
||||
q31x4_t vecB;
|
||||
q63_t sum = 0LL;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
|
||||
* Calculate dot product and then store the result in a temporary buffer.
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
sum = vrmlaldavhaq(sum, vecA, vecB);
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 3;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
sum = vrmlaldavhaq_p(sum, vecA, vecB, p0);
|
||||
}
|
||||
|
||||
/*
|
||||
* vrmlaldavhaq provides extra intermediate accumulator headroom.
|
||||
* limiting the need of intermediate scaling
|
||||
* Scalar variant uses 2.48 accu format by right shifting accumulators by 14.
|
||||
* 16.48 output conversion is performed outside the loop by scaling accu. by 6
|
||||
*/
|
||||
*result = asrl(sum, (14 - 8));
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_dot_prod_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q63_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
q63_t sum = 0; /* Temporary return variable */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
|
||||
|
||||
sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
|
||||
|
||||
sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
|
||||
|
||||
sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Store result in destination buffer in 16.48 format */
|
||||
*result = sum;
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BasicDotProd group
|
||||
*/
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_q31.c
|
||||
* Description: Q31 dot product
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/basic_math_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BasicDotProd
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Dot product of Q31 vectors.
|
||||
@param[in] pSrcA points to the first input vector.
|
||||
@param[in] pSrcB points to the second input vector.
|
||||
@param[in] blockSize number of samples in each vector.
|
||||
@param[out] result output result returned here.
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
|
||||
are truncated to 2.48 format by discarding the lower 14 bits.
|
||||
The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
|
||||
There are 15 guard bits in the accumulator and there is no risk of overflow as long as
|
||||
the length of the vectors is less than 2^16 elements.
|
||||
The return result is in 16.48 format.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
|
||||
void arm_dot_prod_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q63_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* loop counters */
|
||||
q31x4_t vecA;
|
||||
q31x4_t vecB;
|
||||
q63_t sum = 0LL;
|
||||
|
||||
/* Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
|
||||
* Calculate dot product and then store the result in a temporary buffer.
|
||||
*/
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
sum = vrmlaldavhaq(sum, vecA, vecB);
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
/*
|
||||
* advance vector source and destination pointers
|
||||
*/
|
||||
pSrcA += 4;
|
||||
pSrcB += 4;
|
||||
}
|
||||
/*
|
||||
* tail
|
||||
*/
|
||||
blkCnt = blockSize & 3;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp32q(blkCnt);
|
||||
vecA = vld1q(pSrcA);
|
||||
vecB = vld1q(pSrcB);
|
||||
sum = vrmlaldavhaq_p(sum, vecA, vecB, p0);
|
||||
}
|
||||
|
||||
/*
|
||||
* vrmlaldavhaq provides extra intermediate accumulator headroom.
|
||||
* limiting the need of intermediate scaling
|
||||
* Scalar variant uses 2.48 accu format by right shifting accumulators by 14.
|
||||
* 16.48 output conversion is performed outside the loop by scaling accu. by 6
|
||||
*/
|
||||
*result = asrl(sum, (14 - 8));
|
||||
}
|
||||
|
||||
#else
|
||||
void arm_dot_prod_q31(
|
||||
const q31_t * pSrcA,
|
||||
const q31_t * pSrcB,
|
||||
uint32_t blockSize,
|
||||
q63_t * result)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
q63_t sum = 0; /* Temporary return variable */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
|
||||
|
||||
sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
|
||||
|
||||
sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
|
||||
|
||||
sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
|
||||
|
||||
/* Calculate dot product and store result in a temporary buffer. */
|
||||
sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Store result in destination buffer in 16.48 format */
|
||||
*result = sum;
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BasicDotProd group
|
||||
*/
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user