ArteryTek/AT32F415_Firmware_Library
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update version to v2.1.0

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Artery-MCU
2023-08-08 19:30:55 +08:00
parent d7bcb64bf8
commit f49a554036
408 changed files with 224076 additions and 1271 deletions
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2
project/at_start_f415/examples/usart/half_duplex/readme.txt
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@@ -13,4 +13,4 @@
- connect usart2 tx pin (pa2) to usart3 tx pin (pb10)
- connect a pull-up resistor to this line (10k).
for more detailed information. please refer to the application note document AN0099.
for more detailed information. please refer to the application note document AN0099.

6
project/at_start_f415/examples/usart/half_duplex/src/at32f415_clock.c
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@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

6
project/at_start_f415/examples/usart/hw_flow_control/src/at32f415_clock.c
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@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

2
project/at_start_f415/examples/usart/idle_detection/readme.txt
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@@ -13,4 +13,4 @@
set-up
- connect usart2 tx pin(pa2) to rx pin(pa3)
for more detailed information. please refer to the application note document AN0099.
for more detailed information. please refer to the application note document AN0099.

6
project/at_start_f415/examples/usart/idle_detection/src/at32f415_clock.c
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@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

2
project/at_start_f415/examples/usart/interrupt/readme.txt
View File

@@ -13,4 +13,4 @@
- connect usart2 tx pin (pa2) to usart3 rx pin (pb11)
- connect usart2 rx pin (pa3) to usart3 tx pin (pb10)
for more detailed information. please refer to the application note document AN0099.
for more detailed information. please refer to the application note document AN0099.

6
project/at_start_f415/examples/usart/interrupt/src/at32f415_clock.c
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@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

2
project/at_start_f415/examples/usart/irda/readme.txt
View File

@@ -12,4 +12,4 @@
set-up
- use usart2 tx pin (pa2) and rx pin (pa3)
for more detailed information. please refer to the application note document AN0099.
for more detailed information. please refer to the application note document AN0099.

6
project/at_start_f415/examples/usart/irda/src/at32f415_clock.c
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@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

2
project/at_start_f415/examples/usart/polling/readme.txt
View File

@@ -13,4 +13,4 @@
- connect usart2 tx pin (pa2) to usart3 rx pin (pb11)
- connect usart2 rx pin (pa3) to usart3 tx pin (pb10)
for more detailed information. please refer to the application note document AN0099.
for more detailed information. please refer to the application note document AN0099.

6
project/at_start_f415/examples/usart/polling/src/at32f415_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

2
project/at_start_f415/examples/usart/printf/readme.txt
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@@ -9,4 +9,4 @@
the c library printf function to the usart. this implementation output the printf
message on the hyperterminal using usart1. using pa9 to transmit data(printf).
for more detailed information. please refer to the application note document AN0099.
for more detailed information. please refer to the application note document AN0099.

6
project/at_start_f415/examples/usart/printf/src/at32f415_clock.c
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@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

2
project/at_start_f415/examples/usart/receiver_mute/readme.txt
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@@ -15,4 +15,4 @@
set-up
- connect usart2 tx pin (pa2) -> usart3 rx pin (pb11)
for more detailed information. please refer to the application note document AN0099.
for more detailed information. please refer to the application note document AN0099.

6
project/at_start_f415/examples/usart/receiver_mute/src/at32f415_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

2
project/at_start_f415/examples/usart/rs485/readme.txt
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@@ -11,4 +11,4 @@
set-up
- usart tx ---> pa2
- usart rx ---> pa3
- usart de ---> pa1
- usart de ---> pa1

6
project/at_start_f415/examples/usart/rs485/src/at32f415_clock.c
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@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

2
project/at_start_f415/examples/usart/smartcard/readme.txt
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@@ -16,4 +16,4 @@
- sc usart cmdvcc ---> pa7
- sc usart off ---> pa8
for more detailed information. please refer to the application note document AN0099.
for more detailed information. please refer to the application note document AN0099.

6
project/at_start_f415/examples/usart/smartcard/src/at32f415_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

1
project/at_start_f415/examples/usart/smartcard/src/main.c
View File

@@ -170,7 +170,6 @@ void usart_configuration(void)
usart_smartcard_guard_time_set(SC_USART, 0x2);
/* configure sc usart clk */
usart_clock_config(SC_USART, USART_CLOCK_POLARITY_LOW, USART_CLOCK_PHASE_1EDGE, USART_CLOCK_LAST_BIT_OUTPUT);
usart_clock_enable(SC_USART, TRUE);
crm_clocks_freq_get(&crm_clocks_struct);

2
project/at_start_f415/examples/usart/synchronous/readme.txt
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@@ -35,4 +35,4 @@
- connect usart2_rx(pa3) to spi2_miso(pb14)
- connect usart2_ck(pa4) to spi2_sck(pb13)
for more detailed information. please refer to the application note document AN0099.
for more detailed information. please refer to the application note document AN0099.

6
project/at_start_f415/examples/usart/synchronous/src/at32f415_clock.c
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@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

2
project/at_start_f415/examples/usart/transfer_by_dma_interrupt/readme.txt
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@@ -13,4 +13,4 @@
- connect usart2 tx pin (pa2) to usart3 rx pin (pb11)
- connect usart2 rx pin (pa3) to usart3 tx pin (pb10)
for more detailed information. please refer to the application note document AN0099.
for more detailed information. please refer to the application note document AN0099.

6
project/at_start_f415/examples/usart/transfer_by_dma_interrupt/src/at32f415_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000

8
project/at_start_f415/examples/usart/transfer_by_dma_interrupt/src/main.c
View File

@@ -132,7 +132,7 @@ void dma_configuration(void)
dma_init_struct.loop_mode_enable = FALSE;
dma_init(DMA1_CHANNEL1, &dma_init_struct);
/* enable transfer full data intterrupt */
/* enable transfer full data interrupt */
dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
/* dma1 channel1 interrupt nvic init */
@@ -156,7 +156,7 @@ void dma_configuration(void)
dma_init_struct.loop_mode_enable = FALSE;
dma_init(DMA1_CHANNEL2, &dma_init_struct);
/* enable transfer full data intterrupt */
/* enable transfer full data interrupt */
dma_interrupt_enable(DMA1_CHANNEL2, DMA_FDT_INT, TRUE);
/* dma1 channel2 interrupt nvic init */
@@ -180,7 +180,7 @@ void dma_configuration(void)
dma_init_struct.loop_mode_enable = FALSE;
dma_init(DMA1_CHANNEL3, &dma_init_struct);
/* enable transfer full data intterrupt */
/* enable transfer full data interrupt */
dma_interrupt_enable(DMA1_CHANNEL3, DMA_FDT_INT, TRUE);
/* dma1 channel3 interrupt nvic init */
@@ -204,7 +204,7 @@ void dma_configuration(void)
dma_init_struct.loop_mode_enable = FALSE;
dma_init(DMA1_CHANNEL4, &dma_init_struct);
/* enable transfer full data intterrupt */
/* enable transfer full data interrupt */
dma_interrupt_enable(DMA1_CHANNEL4, DMA_FDT_INT, TRUE);
/* dma1 channel4 interrupt nvic init */

2
project/at_start_f415/examples/usart/transfer_by_dma_polling/readme.txt
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@@ -13,4 +13,4 @@
- connect usart2 tx pin (pa2) to usart3 rx pin (pb11)
- connect usart2 rx pin (pa3) to usart3 tx pin (pb10)
for more detailed information. please refer to the application note document AN0099.
for more detailed information. please refer to the application note document AN0099.

6
project/at_start_f415/examples/usart/transfer_by_dma_polling/src/at32f415_clock.c
View File

@@ -28,9 +28,9 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = hext / 2 * pll_mult
* - system clock source = pll (hext)
* - hext = 8000000
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000