update version to v2.1.0

This commit is contained in:
Artery-MCU
2023-08-08 19:30:55 +08:00
parent d7bcb64bf8
commit f49a554036
408 changed files with 224076 additions and 1271 deletions

View File

@@ -66,6 +66,17 @@ typedef enum
CRC_REVERSE_OUTPUT_DATA = 0x01 /*!< output data reverse by word */
} crc_reverse_output_type;
/**
* @brief crc polynomial size
*/
typedef enum
{
CRC_POLY_SIZE_32B = 0x00, /*!< polynomial size 32 bits */
CRC_POLY_SIZE_16B = 0x01, /*!< polynomial size 16 bits */
CRC_POLY_SIZE_8B = 0x02, /*!< polynomial size 8 bits */
CRC_POLY_SIZE_7B = 0x03 /*!< polynomial size 7 bits */
} crc_poly_size_type;
/**
* @brief type define crc register all
*/
@@ -97,7 +108,7 @@ typedef struct
};
/**
* @brief crc ctrl register, offset:0x08
* @brief crc ctrl register, offset:0x08
*/
union
{
@@ -105,7 +116,8 @@ typedef struct
struct
{
__IO uint32_t rst : 1 ; /* [0] */
__IO uint32_t reserved1 : 4 ; /* [4:1] */
__IO uint32_t reserved1 : 2 ; /* [2:1] */
__IO uint32_t poly_size : 2 ; /* [4:3] */
__IO uint32_t revid : 2 ; /* [6:5] */
__IO uint32_t revod : 1 ; /* [7] */
__IO uint32_t reserved2 : 24 ;/* [31:8] */
@@ -129,6 +141,18 @@ typedef struct
} idt_bit;
};
/**
* @brief crc polynomial register, offset:0x14
*/
union
{
__IO uint32_t poly;
struct
{
__IO uint32_t poly : 32; /* [31:0] */
} poly_bit;
};
} crc_type;
/**
@@ -150,6 +174,10 @@ uint8_t crc_common_data_get(void);
void crc_init_data_set(uint32_t value);
void crc_reverse_input_data_set(crc_reverse_input_type value);
void crc_reverse_output_data_set(crc_reverse_output_type value);
void crc_poly_value_set(uint32_t value);
uint32_t crc_poly_value_get(void);
void crc_poly_size_set(crc_poly_size_type size);
crc_poly_size_type crc_poly_size_get(void);
/**
* @}

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@@ -87,10 +87,6 @@ extern "C" {
#define ERTC_ALARM_MASK_DATE_WEEK ((uint32_t)0x80000000) /*!< ertc alarm don't match date or week */
#define ERTC_ALARM_MASK_ALL ((uint32_t)0x80808080) /*!< ertc alarm don't match all */
/**
* @}
*/
/**
* @brief compatible with older versions
*/

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@@ -705,6 +705,7 @@ typedef struct
__IO uint32_t nptxfspcavail : 16; /* [15:0] */
__IO uint32_t nptxqspcavail : 8; /* [23:16] */
__IO uint32_t nptxqtop : 7; /* [30:24] */
__IO uint32_t reserved1 : 1; /* [31] */
} gnptxsts_bit;
};

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@@ -82,7 +82,7 @@ void adc_enable(adc_type *adc_x, confirm_state new_state)
* - ADC_LEFT_ALIGNMENT
* @param ordinary_channel_length: configure the adc ordinary channel sequence length.
* this parameter can be:
* - (0x1~0xf)
* - (0x1~0x10)
* @retval none
*/
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
@@ -312,117 +312,42 @@ void adc_voltage_monitor_single_channel_select(adc_type *adc_x, adc_channel_sele
*/
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
{
switch(adc_channel)
uint32_t tmp_reg;
if(adc_channel < ADC_CHANNEL_10)
{
case ADC_CHANNEL_0:
adc_x->spt2_bit.cspt0 = adc_sampletime;
break;
case ADC_CHANNEL_1:
adc_x->spt2_bit.cspt1 = adc_sampletime;
break;
case ADC_CHANNEL_2:
adc_x->spt2_bit.cspt2 = adc_sampletime;
break;
case ADC_CHANNEL_3:
adc_x->spt2_bit.cspt3 = adc_sampletime;
break;
case ADC_CHANNEL_4:
adc_x->spt2_bit.cspt4 = adc_sampletime;
break;
case ADC_CHANNEL_5:
adc_x->spt2_bit.cspt5 = adc_sampletime;
break;
case ADC_CHANNEL_6:
adc_x->spt2_bit.cspt6 = adc_sampletime;
break;
case ADC_CHANNEL_7:
adc_x->spt2_bit.cspt7 = adc_sampletime;
break;
case ADC_CHANNEL_8:
adc_x->spt2_bit.cspt8 = adc_sampletime;
break;
case ADC_CHANNEL_9:
adc_x->spt2_bit.cspt9 = adc_sampletime;
break;
case ADC_CHANNEL_10:
adc_x->spt1_bit.cspt10 = adc_sampletime;
break;
case ADC_CHANNEL_11:
adc_x->spt1_bit.cspt11 = adc_sampletime;
break;
case ADC_CHANNEL_12:
adc_x->spt1_bit.cspt12 = adc_sampletime;
break;
case ADC_CHANNEL_13:
adc_x->spt1_bit.cspt13 = adc_sampletime;
break;
case ADC_CHANNEL_14:
adc_x->spt1_bit.cspt14 = adc_sampletime;
break;
case ADC_CHANNEL_15:
adc_x->spt1_bit.cspt15 = adc_sampletime;
break;
case ADC_CHANNEL_16:
adc_x->spt1_bit.cspt16 = adc_sampletime;
break;
case ADC_CHANNEL_17:
adc_x->spt1_bit.cspt17 = adc_sampletime;
break;
default:
break;
tmp_reg = adc_x->spt2;
tmp_reg &= ~(0x07 << 3 * adc_channel);
tmp_reg |= adc_sampletime << 3 * adc_channel;
adc_x->spt2 = tmp_reg;
}
switch(adc_sequence)
else
{
case 1:
adc_x->osq3_bit.osn1 = adc_channel;
break;
case 2:
adc_x->osq3_bit.osn2 = adc_channel;
break;
case 3:
adc_x->osq3_bit.osn3 = adc_channel;
break;
case 4:
adc_x->osq3_bit.osn4 = adc_channel;
break;
case 5:
adc_x->osq3_bit.osn5 = adc_channel;
break;
case 6:
adc_x->osq3_bit.osn6 = adc_channel;
break;
case 7:
adc_x->osq2_bit.osn7 = adc_channel;
break;
case 8:
adc_x->osq2_bit.osn8 = adc_channel;
break;
case 9:
adc_x->osq2_bit.osn9 = adc_channel;
break;
case 10:
adc_x->osq2_bit.osn10 = adc_channel;
break;
case 11:
adc_x->osq2_bit.osn11 = adc_channel;
break;
case 12:
adc_x->osq2_bit.osn12 = adc_channel;
break;
case 13:
adc_x->osq1_bit.osn13 = adc_channel;
break;
case 14:
adc_x->osq1_bit.osn14 = adc_channel;
break;
case 15:
adc_x->osq1_bit.osn15 = adc_channel;
break;
case 16:
adc_x->osq1_bit.osn16 = adc_channel;
break;
default:
break;
tmp_reg = adc_x->spt1;
tmp_reg &= ~(0x07 << 3 * (adc_channel - ADC_CHANNEL_10));
tmp_reg |= adc_sampletime << 3 * (adc_channel - ADC_CHANNEL_10);
adc_x->spt1 = tmp_reg;
}
if(adc_sequence >= 13)
{
tmp_reg = adc_x->osq1;
tmp_reg &= ~(0x01F << 5 * (adc_sequence - 13));
tmp_reg |= adc_channel << 5 * (adc_sequence - 13);
adc_x->osq1 = tmp_reg;
}
else if(adc_sequence >= 7)
{
tmp_reg = adc_x->osq2;
tmp_reg &= ~(0x01F << 5 * (adc_sequence - 7));
tmp_reg |= adc_channel << 5 * (adc_sequence - 7);
adc_x->osq2 = tmp_reg;
}
else
{
tmp_reg = adc_x->osq3;
tmp_reg &= ~(0x01F << 5 * (adc_sequence - 1));
tmp_reg |= adc_channel << 5 * (adc_sequence - 1);
adc_x->osq3 = tmp_reg;
}
}
@@ -470,66 +395,23 @@ void adc_preempt_channel_length_set(adc_type *adc_x, uint8_t adc_channel_lenght)
*/
void adc_preempt_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
{
uint16_t sequence_index=0;
switch(adc_channel)
uint32_t tmp_reg;
uint8_t sequence_index;
if(adc_channel < ADC_CHANNEL_10)
{
case ADC_CHANNEL_0:
adc_x->spt2_bit.cspt0 = adc_sampletime;
break;
case ADC_CHANNEL_1:
adc_x->spt2_bit.cspt1 = adc_sampletime;
break;
case ADC_CHANNEL_2:
adc_x->spt2_bit.cspt2 = adc_sampletime;
break;
case ADC_CHANNEL_3:
adc_x->spt2_bit.cspt3 = adc_sampletime;
break;
case ADC_CHANNEL_4:
adc_x->spt2_bit.cspt4 = adc_sampletime;
break;
case ADC_CHANNEL_5:
adc_x->spt2_bit.cspt5 = adc_sampletime;
break;
case ADC_CHANNEL_6:
adc_x->spt2_bit.cspt6 = adc_sampletime;
break;
case ADC_CHANNEL_7:
adc_x->spt2_bit.cspt7 = adc_sampletime;
break;
case ADC_CHANNEL_8:
adc_x->spt2_bit.cspt8 = adc_sampletime;
break;
case ADC_CHANNEL_9:
adc_x->spt2_bit.cspt9 = adc_sampletime;
break;
case ADC_CHANNEL_10:
adc_x->spt1_bit.cspt10 = adc_sampletime;
break;
case ADC_CHANNEL_11:
adc_x->spt1_bit.cspt11 = adc_sampletime;
break;
case ADC_CHANNEL_12:
adc_x->spt1_bit.cspt12 = adc_sampletime;
break;
case ADC_CHANNEL_13:
adc_x->spt1_bit.cspt13 = adc_sampletime;
break;
case ADC_CHANNEL_14:
adc_x->spt1_bit.cspt14 = adc_sampletime;
break;
case ADC_CHANNEL_15:
adc_x->spt1_bit.cspt15 = adc_sampletime;
break;
case ADC_CHANNEL_16:
adc_x->spt1_bit.cspt16 = adc_sampletime;
break;
case ADC_CHANNEL_17:
adc_x->spt1_bit.cspt17 = adc_sampletime;
break;
default:
break;
tmp_reg = adc_x->spt2;
tmp_reg &= ~(0x07 << 3 * adc_channel);
tmp_reg |= adc_sampletime << 3 * adc_channel;
adc_x->spt2 = tmp_reg;
}
else
{
tmp_reg = adc_x->spt1;
tmp_reg &= ~(0x07 << 3 * (adc_channel - ADC_CHANNEL_10));
tmp_reg |= adc_sampletime << 3 * (adc_channel - ADC_CHANNEL_10);
adc_x->spt1 = tmp_reg;
}
sequence_index = adc_sequence + 3 - adc_x->psq_bit.pclen;
switch(sequence_index)
{

View File

@@ -147,6 +147,52 @@ void crc_reverse_output_data_set(crc_reverse_output_type value)
CRC->ctrl_bit.revod = value;
}
/**
* @brief config crc polynomial value
* @param value
* 32-bit new data of crc poly value
* @retval none.
*/
void crc_poly_value_set(uint32_t value)
{
CRC->poly = value;
}
/**
* @brief return crc polynomial value
* @param none
* @retval 32-bit value of the polynomial value.
*/
uint32_t crc_poly_value_get(void)
{
return (CRC->poly);
}
/**
* @brief config crc polynomial data size
* @param size
* this parameter can be one of the following values:
* - CRC_POLY_SIZE_32B
* - CRC_POLY_SIZE_16B
* - CRC_POLY_SIZE_8B
* - CRC_POLY_SIZE_7B
* @retval none.
*/
void crc_poly_size_set(crc_poly_size_type size)
{
CRC->ctrl_bit.poly_size = size;
}
/**
* @brief return crc polynomial data size
* @param none
* @retval polynomial data size.
*/
crc_poly_size_type crc_poly_size_get(void)
{
return (crc_poly_size_type)(CRC->ctrl_bit.poly_size);
}
/**
* @}
*/

View File

@@ -258,8 +258,7 @@ uint32_t tmr_counter_value_get(tmr_type *tmr_x)
* @param tmr_x: select the tmr peripheral.
* this parameter can be one of the following values:
* TMR1, TMR2, TMR3, TMR4, TMR5, TMR9, TMR10, TMR11
* @param tmr_div_value (for 16 bit tmr 0x0000~0xFFFF,
* for 32 bit tmr 0x0000_0000~0xFFFF_FFFF)
* @param tmr_div_value (0x0000~0xFFFF)
* @retval none
*/
void tmr_div_value_set(tmr_type *tmr_x, uint32_t tmr_div_value)
@@ -799,7 +798,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct
switch(channel)
{
case TMR_SELECT_CHANNEL_1:
tmr_x->cctrl_bit.c1en = FALSE;
tmr_x->cctrl_bit.c1en = FALSE;
tmr_x->cctrl_bit.c1p = (uint32_t)input_struct->input_polarity_select;
tmr_x->cctrl_bit.c1cp = (input_struct->input_polarity_select & 0x2) >> 1;
tmr_x->cm1_input_bit.c1c = input_struct->input_mapped_select;
@@ -809,7 +808,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct
break;
case TMR_SELECT_CHANNEL_2:
tmr_x->cctrl_bit.c2en = FALSE;
tmr_x->cctrl_bit.c2en = FALSE;
tmr_x->cctrl_bit.c2p = (uint32_t)input_struct->input_polarity_select;
tmr_x->cctrl_bit.c2cp = (input_struct->input_polarity_select & 0x2) >> 1;
tmr_x->cm1_input_bit.c2c = input_struct->input_mapped_select;
@@ -819,7 +818,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct
break;
case TMR_SELECT_CHANNEL_3:
tmr_x->cctrl_bit.c3en = FALSE;
tmr_x->cctrl_bit.c3en = FALSE;
tmr_x->cctrl_bit.c3p = (uint32_t)input_struct->input_polarity_select;
tmr_x->cctrl_bit.c3cp = (input_struct->input_polarity_select & 0x2) >> 1;
tmr_x->cm2_input_bit.c3c = input_struct->input_mapped_select;
@@ -829,7 +828,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct
break;
case TMR_SELECT_CHANNEL_4:
tmr_x->cctrl_bit.c4en = FALSE;
tmr_x->cctrl_bit.c4en = FALSE;
tmr_x->cctrl_bit.c4p = (uint32_t)input_struct->input_polarity_select;
tmr_x->cm2_input_bit.c4c = input_struct->input_mapped_select;
tmr_x->cm2_input_bit.c4df = input_struct->input_filter_value;
@@ -1681,7 +1680,7 @@ void tmr_dma_control_config(tmr_type *tmr_x, tmr_dma_transfer_length_type dma_le
}
/**
* @brief config tmr break mode and dead-time
* @brief config tmr brake mode and dead-time
* @param tmr_x: select the tmr peripheral.
* this parameter can be one of the following values:
* TMR1

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@@ -90,6 +90,9 @@ void usart_reset(usart_type* usart_x)
* this parameter can be one of the following values:
* - USART_DATA_8BITS
* - USART_DATA_9BITS.
* note
* - when parity check is disabled, the data bit width is the actual data bit number.
* - when parity check is enabled, the data bit width is the actual data bit number minus 1, and the MSB bit is replaced with the parity bit.
* @param stop_bit: stop bits transmitted
* this parameter can be one of the following values:
* - USART_STOP_1_BIT

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@@ -100,7 +100,7 @@ void usb_global_init(otg_global_type *usbx)
*/
otg_global_type *usb_global_select_core(uint8_t usb_id)
{
/* use otg1 */
UNUSED(usb_id);
return OTG1_GLOBAL;
}
@@ -440,6 +440,7 @@ void usb_read_packet(otg_global_type *usbx, uint8_t *pusr_buf, uint16_t num, uin
uint32_t n_index;
uint32_t nhbytes = (nbytes + 3) / 4;
uint32_t *pbuf = (uint32_t *)pusr_buf;
UNUSED(num);
for(n_index = 0; n_index < nhbytes; n_index ++)
{
#if defined (__ICCARM__) && (__VER__ < 7000000)