update version to v2.1.6

This commit is contained in:
Artery-MCU
2024-12-31 09:21:09 +08:00
parent 716f545aa1
commit ee4796e775
795 changed files with 302228 additions and 217218 deletions

View File

@@ -810,7 +810,7 @@ typedef struct
/**
* @brief crm reserved2 register, offset:0x40~0x34
*/
__IO uint32_t reserved2[4];
__IO uint32_t reserved1[4];
/**
* @brief crm otg_extctrl register, offset:0x44
@@ -829,7 +829,7 @@ typedef struct
/**
* @brief crm reserved3 register, offset:0x50~0x48
*/
__IO uint32_t reserved3[3];
__IO uint32_t reserved2[3];
/**
* @brief crm misc2 register, offset:0x54

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@@ -207,7 +207,8 @@ typedef enum
{
DMA_DIR_PERIPHERAL_TO_MEMORY = 0x0000, /*!< dma data transfer direction:peripheral to memory */
DMA_DIR_MEMORY_TO_PERIPHERAL = 0x0010, /*!< dma data transfer direction:memory to peripheral */
DMA_DIR_MEMORY_TO_MEMORY = 0x4000 /*!< dma data transfer direction:memory to memory */
DMA_DIR_MEMORY_TO_MEMORY = 0x4000 /*!< dma data transfer direction:memory to memory,
note:if the direction is memory to memory,peripheral_base_addr as source and memory_base_addr as destnation */
} dma_dir_type;
/**

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@@ -90,7 +90,7 @@ extern "C" {
/**
* @brief compatible with older versions
*/
#define ERTC_WAT_CLK_CK_A_16BITS ERTC_WAT_CLK_CK_B_16BITS
#define ERTC_WAT_CLK_CK_A_16BITS ERTC_WAT_CLK_CK_B_16BITS
#define ERTC_WAT_CLK_CK_A_17BITS ERTC_WAT_CLK_CK_B_17BITS
/**

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@@ -578,16 +578,18 @@ can_transmit_status_type can_transmit_status_get(can_type* can_x, can_tx_mailbox
*/
void can_transmit_cancel(can_type* can_x, can_tx_mailbox_num_type transmit_mailbox)
{
uint32_t transmit_cancel_bit = 0;
transmit_cancel_bit = can_x->tsts & (CAN_TSTS_TM0CT_VAL | CAN_TSTS_TM1CT_VAL | CAN_TSTS_TM2CT_VAL);
switch (transmit_mailbox)
{
case CAN_TX_MAILBOX0:
can_x->tsts = CAN_TSTS_TM0CT_VAL;
can_x->tsts = transmit_cancel_bit | CAN_TSTS_TM0CT_VAL;
break;
case CAN_TX_MAILBOX1:
can_x->tsts = CAN_TSTS_TM1CT_VAL;
can_x->tsts = transmit_cancel_bit | CAN_TSTS_TM1CT_VAL;
break;
case CAN_TX_MAILBOX2:
can_x->tsts = CAN_TSTS_TM2CT_VAL;
can_x->tsts = transmit_cancel_bit | CAN_TSTS_TM2CT_VAL;
break;
default:
break;

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@@ -1440,7 +1440,7 @@ flag_status ertc_flag_get(uint32_t flag)
flag_status ertc_interrupt_flag_get(uint32_t flag)
{
__IO uint32_t iten = 0;
switch(flag)
{
case ERTC_ALAF_FLAG:
@@ -1458,7 +1458,7 @@ flag_status ertc_interrupt_flag_get(uint32_t flag)
case ERTC_TP1F_FLAG:
iten = ERTC->tamp_bit.tpien;
break;
default:
break;
}

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@@ -650,11 +650,11 @@ flag_status i2c_interrupt_flag_get(i2c_type *i2c_x, uint32_t flag)
case I2C_ALERTF_FLAG:
iten = i2c_x->ctrl2_bit.errien;
break;
default:
break;
}
reg = flag >> 28;
flag &= (uint32_t)0x00FFFFFF;
@@ -699,9 +699,9 @@ flag_status i2c_interrupt_flag_get(i2c_type *i2c_x, uint32_t flag)
* @retval none
*/
void i2c_flag_clear(i2c_type *i2c_x, uint32_t flag)
{
{
i2c_x->sts1 = (uint16_t)~(flag & (uint32_t)0x0000DF00);
if(flag & I2C_ADDR7F_FLAG)
{
UNUSED(i2c_x->sts1);

View File

@@ -486,6 +486,10 @@ void usb_ept_open(otg_global_type *usbx, usb_ept_info *ept_info)
mps = USB_EPT0_MPS_8;
}
}
if(ept_info->trans_type == EPT_ISO_TYPE)
{
OTG_DEVICE(usbx)->dctl |= 1 << 15;
}
/* endpoint direction is in */
if(ept_info->inout == EPT_DIR_IN)
{
@@ -535,11 +539,22 @@ void usb_ept_close(otg_global_type *usbx, usb_ept_info *ept_info)
if(ept_info->inout == EPT_DIR_IN)
{
OTG_DEVICE(usbx)->daintmsk &= ~(1 << ept_info->eptn);
if(USB_INEPT(usbx, ept_info->eptn)->diepctl_bit.eptena == SET)
{
USB_INEPT(usbx, ept_info->eptn)->diepctl_bit.eptdis = TRUE;
USB_INEPT(usbx, ept_info->eptn)->diepctl_bit.snak = TRUE;
}
USB_INEPT(usbx, ept_info->eptn)->diepctl_bit.usbacept = FALSE;
}
else
{
OTG_DEVICE(usbx)->daintmsk &= ~((1 << ept_info->eptn) << 16);
if(USB_OUTEPT(usbx, ept_info->eptn)->doepctl_bit.eptena == SET)
{
USB_OUTEPT(usbx, ept_info->eptn)->doepctl_bit.eptdis = TRUE;
USB_OUTEPT(usbx, ept_info->eptn)->doepctl_bit.snak = TRUE;
}
USB_OUTEPT(usbx, ept_info->eptn)->doepctl_bit.usbacept = FALSE;
}
}
@@ -897,7 +912,10 @@ void usb_hc_enable(otg_global_type *usbx,
{
otg_hchannel_type *hch = USB_CHL(usbx, chn);
otg_host_type *usb_host = OTG_HOST(usbx);
/* clear old interrupt flag */
hch->hcint = 0xFFFFFFFF;
switch(type)
{
case EPT_CONTROL_TYPE:
@@ -961,7 +979,7 @@ uint32_t usb_hch_read_interrupt(otg_global_type *usbx)
*/
void usb_host_disable(otg_global_type *usbx)
{
uint32_t i_index = 0, count = 0;
uint32_t i_index = 0;
otg_hchannel_type *hch;
otg_host_type *usb_host = OTG_HOST(usbx);
@@ -972,22 +990,10 @@ void usb_host_disable(otg_global_type *usbx)
for(i_index = 0; i_index < 16; i_index ++)
{
hch = USB_CHL(usbx, i_index);
hch->hcchar_bit.chdis = TRUE;
hch->hcchar_bit.chena = FALSE;
hch->hcchar_bit.eptdir = 0;
}
for(i_index = 0; i_index < 16; i_index ++)
{
hch = USB_CHL(usbx, i_index);
hch->hcchar_bit.chdis = TRUE;
hch->hcchar_bit.chena = TRUE;
hch->hcchar_bit.eptdir = 0;
do
if(hch->hcchar_bit.chena == TRUE)
{
if(count ++ > 1000)
break;
}while(hch->hcchar_bit.chena);
hch->hcchar_bit.chdis = TRUE;
}
}
usb_host->haint = 0xFFFFFFFF;
usbx->gintsts = 0xFFFFFFFF;
@@ -1017,7 +1023,8 @@ void usb_hch_halt(otg_global_type *usbx, uint8_t chn)
if((usbx->gnptxsts_bit.nptxqspcavail) == 0)
{
usb_chh->hcchar_bit.chena = FALSE;
usb_chh->hcchar_bit.chena = TRUE;
if(usb_chh->hcchar_bit.chena != TRUE)
usb_chh->hcchar_bit.chena = TRUE;
do
{
if(count ++ > 1000)
@@ -1026,7 +1033,8 @@ void usb_hch_halt(otg_global_type *usbx, uint8_t chn)
}
else
{
usb_chh->hcchar_bit.chena = TRUE;
if(usb_chh->hcchar_bit.chena != TRUE)
usb_chh->hcchar_bit.chena = TRUE;
}
}
else
@@ -1035,7 +1043,8 @@ void usb_hch_halt(otg_global_type *usbx, uint8_t chn)
if((usb_host->hptxsts_bit.ptxqspcavil) == 0)
{
usb_chh->hcchar_bit.chena = FALSE;
usb_chh->hcchar_bit.chena = TRUE;
if(usb_chh->hcchar_bit.chena != TRUE)
usb_chh->hcchar_bit.chena = TRUE;
do
{
if(count ++ > 1000)
@@ -1044,7 +1053,8 @@ void usb_hch_halt(otg_global_type *usbx, uint8_t chn)
}
else
{
usb_chh->hcchar_bit.chena = TRUE;
if(usb_chh->hcchar_bit.chena != TRUE)
usb_chh->hcchar_bit.chena = TRUE;
}
}
}