ArteryTek/AT32F415_Firmware_Library
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update version to v2.0.9

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This commit is contained in:
Artery-MCU
2023-02-28 12:59:38 +08:00
parent d4910499d3
commit d7bcb64bf8
539 changed files with 3073 additions and 5986 deletions
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2
libraries/cmsis/cm4/device_support/at32f415.h
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@@ -104,7 +104,7 @@ extern "C" {
*/
#define __AT32F415_LIBRARY_VERSION_MAJOR (0x02) /*!< [31:24] major version */
#define __AT32F415_LIBRARY_VERSION_MIDDLE (0x00) /*!< [23:16] middle version */
#define __AT32F415_LIBRARY_VERSION_MINOR (0x08) /*!< [15:8] minor version */
#define __AT32F415_LIBRARY_VERSION_MINOR (0x09) /*!< [15:8] minor version */
#define __AT32F415_LIBRARY_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __AT32F415_LIBRARY_VERSION ((__AT32F415_LIBRARY_VERSION_MAJOR << 24) | \
(__AT32F415_LIBRARY_VERSION_MIDDLE << 16) | \

5
libraries/cmsis/cm4/device_support/at32f415_conf_template.h
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@@ -45,8 +45,9 @@ extern "C" {
* @brief in the following line adjust the high speed exernal crystal (hext) startup
* timeout value
*/
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed exernal clock in hz */
/* module define -------------------------------------------------------------*/
#define CRM_MODULE_ENABLED

2
libraries/drivers/inc/at32f415_flash.h
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@@ -139,7 +139,7 @@ extern "C" {
* - FLASH_WAIT_CYCLE_3
* - FLASH_WAIT_CYCLE_4
*/
#define flash_psr_set(wtcyc) (FLASH->psr = (uint32_t)(0x150 | wtcyc))
#define flash_psr_set(wtcyc) (FLASH->psr = (uint32_t)(0x10 | wtcyc))
/** @defgroup FLASH_exported_types
* @{

2
libraries/drivers/inc/at32f415_tmr.h
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@@ -236,7 +236,7 @@ typedef enum
{
TMR_CC_CHANNEL_MAPPED_DIRECT = 0x01, /*!< channel is configured as input, mapped direct */
TMR_CC_CHANNEL_MAPPED_INDIRECT = 0x02, /*!< channel is configured as input, mapped indirect */
TMR_CC_CHANNEL_MAPPED_STI = 0x03 /*!< channel is configured as input, mapped trc */
TMR_CC_CHANNEL_MAPPED_STI = 0x03 /*!< channel is configured as input, mapped sti */
} tmr_input_direction_mapped_type;
/**

8
libraries/drivers/src/at32f415_ertc.c
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@@ -320,7 +320,7 @@ error_status ertc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t we
return ERROR;
}
/* Set the ertc_DR register */
/* set the ertc_date register */
ERTC->date = reg.date;
/* exit init mode */
@@ -1470,13 +1470,7 @@ void ertc_bpr_data_write(ertc_dt_type dt, uint32_t data)
reg = ERTC_BASE + 0x50 + (dt * 4);
/* disable write protection */
ertc_write_protect_disable();
*(__IO uint32_t *)reg = data;
/* enable write protection */
ertc_write_protect_enable();
}
/**