ArteryTek/AT32F415_Firmware_Library
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update version to v2.0.4

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Artery-MCU
2022-04-11 19:32:28 +08:00
parent 07d7347ba4
commit ccd0f1e108
1470 changed files with 213761 additions and 13939 deletions
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46
libraries/drivers/inc/at32f415_pwc.h
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@@ -1,17 +1,17 @@
/**
**************************************************************************
* @file at32f415_pwc.h
* @version v2.0.3
* @date 2022-02-11
* @version v2.0.4
* @date 2022-04-02
* @brief at32f415 pwc header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
@@ -31,8 +31,8 @@
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "at32f415.h"
@@ -44,8 +44,8 @@ extern "C" {
* @{
*/
/** @defgroup PWC_flags_definition
* @brief pwc flag
/** @defgroup PWC_flags_definition
* @brief pwc flag
* @{
*/
@@ -65,9 +65,9 @@ extern "C" {
/** @defgroup PWC_exported_types
* @{
*/
/**
* @brief pwc pvm voltage type
* @brief pwc pvm voltage type
*/
typedef enum
{
@@ -81,7 +81,7 @@ typedef enum
} pwc_pvm_voltage_type;
/**
* @brief pwc sleep enter type
* @brief pwc sleep enter type
*/
typedef enum
{
@@ -90,7 +90,7 @@ typedef enum
} pwc_sleep_enter_type;
/**
* @brief pwc deep sleep enter type
* @brief pwc deep sleep enter type
*/
typedef enum
{
@@ -99,7 +99,7 @@ typedef enum
} pwc_deep_sleep_enter_type;
/**
* @brief pwc regulator type
* @brief pwc regulator type
*/
typedef enum
{
@@ -128,11 +128,11 @@ typedef struct
__IO uint32_t pvmsel : 3; /* [7:5] */
__IO uint32_t bpwen : 1; /* [8] */
__IO uint32_t reserved1 : 23;/* [31:9] */
} ctrl_bit;
} ctrl_bit;
};
/**
* @brief pwc ctrlsts register, offset:0x04
* @brief pwc ctrlsts register, offset:0x04
*/
union
{
@@ -147,14 +147,14 @@ typedef struct
__IO uint32_t reserved2 : 23;/* [31:9] */
} ctrlsts_bit;
};
} pwc_type;
} pwc_type;
/**
* @}
*/
#define PWC ((pwc_type *) PWC_BASE)
#define PWC ((pwc_type *) PWC_BASE)
/** @defgroup PWC_exported_functions
* @{