mirror of
https://github.com/ArteryTek/AT32F415_Firmware_Library.git
synced 2026-05-21 01:12:20 +00:00
update version to v2.0.6
This commit is contained in:
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415.h
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* @version v2.0.5
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||||
* @date 2022-05-20
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||||
* @version v2.0.6
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* @date 2022-06-28
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||||
* @brief at32f415 header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -89,7 +89,7 @@ extern "C" {
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*/
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#define __AT32F415_LIBRARY_VERSION_MAJOR (0x02) /*!< [31:24] major version */
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#define __AT32F415_LIBRARY_VERSION_MIDDLE (0x00) /*!< [23:16] middle version */
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#define __AT32F415_LIBRARY_VERSION_MINOR (0x05) /*!< [15:8] minor version */
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#define __AT32F415_LIBRARY_VERSION_MINOR (0x06) /*!< [15:8] minor version */
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#define __AT32F415_LIBRARY_VERSION_RC (0x00) /*!< [7:0] release candidate */
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#define __AT32F415_LIBRARY_VERSION ((__AT32F415_LIBRARY_VERSION_MAJOR << 24) | \
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(__AT32F415_LIBRARY_VERSION_MIDDLE << 16) | \
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_conf.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 config header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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******************************************************************************
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* @file startup_at32f415.s
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415xx devices vector table for gcc toolchain.
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* this module performs:
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* - set the initial sp
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@@ -1,7 +1,7 @@
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;**************************************************************************
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;* @file startup_at32f415.s
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;* @version v2.0.5
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;* @date 2022-05-20
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;* @version v2.0.6
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;* @date 2022-06-28
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;* @brief at32f415 startup file for IAR Systems
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;**************************************************************************
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;
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@@ -1,7 +1,7 @@
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;**************************************************************************
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;* @file startup_at32f415.s
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;* @version v2.0.5
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;* @date 2022-05-20
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;* @version v2.0.6
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;* @date 2022-06-28
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;* @brief at32f415 startup file for keil
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;**************************************************************************
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;
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file system_at32f415.c
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief contains all the functions for cmsis cortex-m4 system source file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file system_at32f415.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief cmsis cortex-m4 system header file.
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -45,6 +45,7 @@ extern "C" {
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#define HEXT_STABLE_DELAY (5000u)
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#define PLL_STABLE_DELAY (500u)
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#define SystemCoreClock system_core_clock
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/**
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* @}
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@@ -1,7 +1,7 @@
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/******************************************************************************
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* @file arm_sorting.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief Private header file for CMSIS DSP Library
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******************************************************************************/
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/*
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@@ -1,7 +1,7 @@
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/******************************************************************************
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* @file arm_vec_fft.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief Private header file for CMSIS DSP Library
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******************************************************************************/
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/*
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@@ -1,7 +1,7 @@
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/******************************************************************************
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* @file arm_vec_filtering.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief Private header file for CMSIS DSP Library
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******************************************************************************/
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/*
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@@ -1,7 +1,7 @@
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/******************************************************************************
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* @file arm_math.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief Public header file for CMSIS DSP Library
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******************************************************************************/
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/*
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@@ -1,7 +1,7 @@
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/******************************************************************************
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* @file arm_vec_math.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief Public header file for CMSIS DSP Library
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******************************************************************************/
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/*
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_adc.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 adc header file
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**************************************************************************
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* Copyright notice & Disclaimer
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||||
@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_can.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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||||
* @date 2022-06-28
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||||
* @brief at32f415 can header file
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**************************************************************************
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* Copyright notice & Disclaimer
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||||
@@ -352,7 +352,7 @@ typedef struct
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*/
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typedef struct
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{
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uint16_t baudrate_div; /*!< baudrate division,this parameter can be 0x001~0x400.*/
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uint16_t baudrate_div; /*!< baudrate division,this parameter can be 0x001~0x1000.*/
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can_rsaw_type rsaw_size; /*!< resynchronization adjust width */
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_cmp.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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||||
* @date 2022-06-28
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||||
* @brief at32f415 cmp header file
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||||
**************************************************************************
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||||
* Copyright notice & Disclaimer
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||||
@@ -52,10 +52,9 @@ extern "C" {
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*/
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typedef enum
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{
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CMP_NON_INVERTING_PA5 = 0x00, /*!< comparator non-inverting connect to pa5 */
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CMP_NON_INVERTING_PA1 = 0x01, /*!< comparator non-inverting connect to pa1 */
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CMP_NON_INVERTING_PA0 = 0x02, /*!< comparator non-inverting connect to pa0 */
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CMP_NON_INVERTING_VSSA = 0x03 /*!< comparator non-inverting connect to vssa */
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CMP_NON_INVERTING_PA5_PA7 = 0x00, /*!< comparator1/2 non-inverting connect to pa5/pa7 */
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CMP_NON_INVERTING_PA1_PA3 = 0x01, /*!< comparator1/2 non-inverting connect to pa1/pa3 */
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CMP_NON_INVERTING_PA0_PA2 = 0x02, /*!< comparator1/2 non-inverting connect to pa0/pa2 */
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} cmp_non_inverting_type;
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/**
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@@ -69,8 +68,7 @@ typedef enum
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CMP_INVERTING_VREFINT = 0x03, /*!< comparator inverting connect to vrefint */
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CMP_INVERTING_PA4 = 0x04, /*!< comparator inverting connect to pa4 */
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CMP_INVERTING_PA5 = 0x05, /*!< comparator inverting connect to pa5 */
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CMP_INVERTING_PA0 = 0x06, /*!< comparator inverting connect to pa0 */
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CMP_INVERTING_PA2 = 0x07 /*!< comparator inverting connect to pa2 */
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CMP_INVERTING_PA0_PA2 = 0x06, /*!< comparator1/2 inverting connect to pa0/pa2 */
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} cmp_inverting_type;
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/**
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@@ -79,9 +77,7 @@ typedef enum
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typedef enum
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{
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CMP_SPEED_FAST = 0x00, /*!< comparator selected fast speed */
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CMP_SPEED_MEDIUM = 0x01, /*!< comparator selected medium speed */
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CMP_SPEED_SLOW = 0x02, /*!< comparator selected slow speed */
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CMP_SPEED_ULTRALOW = 0x03 /*!< comparator selected ultralow speed */
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CMP_SPEED_SLOW = 0x01, /*!< comparator selected slow speed */
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} cmp_speed_type;
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/**
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@@ -213,6 +209,7 @@ void cmp_enable(cmp_sel_type cmp_sel, confirm_state new_state);
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void cmp_input_shift_enable(confirm_state new_state);
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uint32_t cmp_output_value_get(cmp_sel_type cmp_sel);
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void cmp_write_protect_enable(cmp_sel_type cmp_sel);
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void cmp_double_mode_enable(confirm_state new_state);
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/**
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* @}
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@@ -1,8 +1,8 @@
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||||
/**
|
||||
**************************************************************************
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||||
* @file at32f415_crc.h
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||||
* @version v2.0.5
|
||||
* @date 2022-05-20
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||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 crc header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
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||||
|
||||
@@ -1,8 +1,8 @@
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||||
/**
|
||||
**************************************************************************
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||||
* @file at32f415_crm.h
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||||
* @version v2.0.5
|
||||
* @date 2022-05-20
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||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 crm header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -896,7 +896,7 @@ void crm_hick_sclk_frequency_select(crm_hick_sclk_frequency_type value);
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void crm_usb_clock_source_select(crm_usb_clock_source_type value);
|
||||
void crm_clkout_div_set(crm_clkout_div_type clkout_div);
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void crm_otgfs_ep3_remap_enable(confirm_state new_state);
|
||||
void crm_usbdiv_reset(confirm_state new_state);
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||||
void crm_usbdiv_reset(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_debug.h
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||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 debug header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_def.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 macros header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -62,6 +62,8 @@ extern "C" {
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define UNUSED(x) (void)x /* to avoid gcc/g++ warnings */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_dma.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 dma header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_ertc.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 ertc header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -89,6 +89,16 @@ extern "C" {
|
||||
#define ERTC_ALARM_MASK_DATE_WEEK ((uint32_t)0x80000000) /*!< ertc alarm don't match date or week */
|
||||
#define ERTC_ALARM_MASK_ALL ((uint32_t)0x80808080) /*!< ertc alarm don't match all */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief compatible with older versions
|
||||
*/
|
||||
#define ERTC_WAT_CLK_CK_A_16BITS ERTC_WAT_CLK_CK_B_16BITS
|
||||
#define ERTC_WAT_CLK_CK_A_17BITS ERTC_WAT_CLK_CK_B_17BITS
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -166,8 +176,8 @@ typedef enum
|
||||
ERTC_WAT_CLK_ERTCCLK_DIV8 = 0x01, /*!< the wake up timer clock is ERTC_CLK / 8 */
|
||||
ERTC_WAT_CLK_ERTCCLK_DIV4 = 0x02, /*!< the wake up timer clock is ERTC_CLK / 4 */
|
||||
ERTC_WAT_CLK_ERTCCLK_DIV2 = 0x03, /*!< the wake up timer clock is ERTC_CLK / 2 */
|
||||
ERTC_WAT_CLK_CK_A_16BITS = 0x04, /*!< the wake up timer clock is CK_A, wakeup counter = ERTC_WAT */
|
||||
ERTC_WAT_CLK_CK_A_17BITS = 0x06 /*!< the wake up timer clock is CK_A, wakeup counter = ERTC_WAT + 65535 */
|
||||
ERTC_WAT_CLK_CK_B_16BITS = 0x04, /*!< the wake up timer clock is CK_B, wakeup counter = ERTC_WAT */
|
||||
ERTC_WAT_CLK_CK_B_17BITS = 0x06 /*!< the wake up timer clock is CK_B, wakeup counter = ERTC_WAT + 65535 */
|
||||
} ertc_wakeup_clock_type;
|
||||
|
||||
/**
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_exint.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 exint header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_flash.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 flash header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_gpio.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 gpio header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -789,7 +789,7 @@ uint16_t gpio_output_data_read(gpio_type *gpio_x);
|
||||
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins);
|
||||
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins);
|
||||
void gpio_bits_write(gpio_type *gpio_x, uint16_t pins, confirm_state bit_state);
|
||||
void gpio_port_wirte(gpio_type *gpio_x, uint16_t port_value);
|
||||
void gpio_port_write(gpio_type *gpio_x, uint16_t port_value);
|
||||
void gpio_pin_wp_config(gpio_type *gpio_x, uint16_t pins);
|
||||
void gpio_event_output_config(gpio_port_source_type gpio_port_source, gpio_pins_source_type gpio_pin_source);
|
||||
void gpio_event_output_enable(confirm_state new_state);
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_i2c.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 i2c header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_misc.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 misc header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -76,9 +76,9 @@ typedef enum
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
NVIC_LP_SLEEPONEXIT = 0x02, /*!< send event on pending */
|
||||
NVIC_LP_SLEEPONEXIT = 0x02, /*!< enable sleep-on-exit feature */
|
||||
NVIC_LP_SLEEPDEEP = 0x04, /*!< enable sleep-deep output signal when entering sleep mode */
|
||||
NVIC_LP_SEVONPEND = 0x10 /*!< enable sleep-on-exit feature */
|
||||
NVIC_LP_SEVONPEND = 0x10 /*!< send event on pending */
|
||||
} nvic_lowpower_mode_type;
|
||||
|
||||
/**
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_pwc.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 pwc header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_sdio.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 sdio header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -577,7 +577,7 @@ typedef struct
|
||||
|
||||
void sdio_reset(sdio_type *sdio_x);
|
||||
void sdio_power_set(sdio_type *sdio_x, sdio_power_state_type power_state);
|
||||
flag_status sdio_power_status_get(sdio_type *sdio_x);
|
||||
sdio_power_state_type sdio_power_status_get(sdio_type *sdio_x);
|
||||
void sdio_clock_config(sdio_type *sdio_x, uint16_t clk_div, sdio_edge_phase_type clk_edg);
|
||||
void sdio_bus_width_config(sdio_type *sdio_x, sdio_bus_width_type width);
|
||||
void sdio_clock_bypass(sdio_type *sdio_x, confirm_state new_state);
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_spi.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 spi header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_tmr.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 tmr header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -882,7 +882,7 @@ void tmr_input_channel_filter_set(tmr_type *tmr_x, tmr_channel_select_type tmr_c
|
||||
uint16_t filter_value);
|
||||
void tmr_pwm_input_config(tmr_type *tmr_x, tmr_input_config_type *input_struct, \
|
||||
tmr_channel_input_divider_type divider_factor);
|
||||
void tmr_channel1_input_select(tmr_type *tmr_x, tmr_channel1_input_connected_type ti1_connect);
|
||||
void tmr_channel1_input_select(tmr_type *tmr_x, tmr_channel1_input_connected_type ch1_connect);
|
||||
void tmr_input_channel_divider_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, \
|
||||
tmr_channel_input_divider_type divider_factor);
|
||||
void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode);
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_usart.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 usart header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_usb.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 usb header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_wdt.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 wdt header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_wwdt.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief at32f415 wwdt header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_adc.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the adc firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_can.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the can firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_cmp.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the gpio firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -95,7 +95,7 @@ void cmp_init(cmp_sel_type cmp_sel, cmp_init_type* cmp_init_struct)
|
||||
void cmp_default_para_init(cmp_init_type *cmp_init_struct)
|
||||
{
|
||||
/* reset cmp init structure parameters values */
|
||||
cmp_init_struct->cmp_non_inverting = CMP_NON_INVERTING_PA1;
|
||||
cmp_init_struct->cmp_non_inverting = CMP_NON_INVERTING_PA1_PA3;
|
||||
cmp_init_struct->cmp_inverting = CMP_INVERTING_1_4VREFINT;
|
||||
cmp_init_struct->cmp_speed = CMP_SPEED_FAST;
|
||||
cmp_init_struct->cmp_output = CMP_OUTPUT_NONE;
|
||||
@@ -173,6 +173,16 @@ void cmp_write_protect_enable(cmp_sel_type cmp_sel)
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief enable or disable double comparator mode
|
||||
* @param new_state (TRUE or FALSE)
|
||||
* @retval none
|
||||
*/
|
||||
void cmp_double_mode_enable(confirm_state new_state)
|
||||
{
|
||||
CMP->ctrlsts1_bit.dcmpen = new_state;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_crc.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the crc firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_crm.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the crm firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -927,12 +927,13 @@ void crm_otgfs_ep3_remap_enable(confirm_state new_state)
|
||||
*
|
||||
* at32f415xx revision C: (support)
|
||||
* usb divider(CRM_CFG[usbdiv]) support to be reset.
|
||||
* @param new_state (TRUE or FALSE)
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void crm_usbdiv_reset(confirm_state new_state)
|
||||
void crm_usbdiv_reset(void)
|
||||
{
|
||||
CRM->otg_extctrl_bit.usbdivrst = new_state;
|
||||
CRM->otg_extctrl_bit.usbdivrst = 1;
|
||||
CRM->otg_extctrl_bit.usbdivrst = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_debug.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the debug firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_dma.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the dma firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_ertc.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the ertc firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -406,7 +406,7 @@ void ertc_calendar_get(ertc_time_type* time)
|
||||
ertc_reg_time_type reg_tm;
|
||||
ertc_reg_date_type reg_dt;
|
||||
|
||||
(void) (ERTC->sts);
|
||||
UNUSED(ERTC->sts);
|
||||
|
||||
reg_tm.time = ERTC->time;
|
||||
reg_dt.date = ERTC->date;
|
||||
@@ -724,8 +724,8 @@ uint32_t ertc_alarm_sub_second_get(ertc_alarm_type alarm_x)
|
||||
* - ERTC_WAT_CLK_ERTCCLK_DIV8: ERTC_CLK / 8.
|
||||
* - ERTC_WAT_CLK_ERTCCLK_DIV4: ERTC_CLK / 4.
|
||||
* - ERTC_WAT_CLK_ERTCCLK_DIV2: ERTC_CLK / 2.
|
||||
* - ERTC_WAT_CLK_CK_A_16BITS: CK_A, wakeup counter = ERTC_WAT
|
||||
* - ERTC_WAT_CLK_CK_A_17BITS: CK_A, wakeup counter = ERTC_WAT + 65535.
|
||||
* - ERTC_WAT_CLK_CK_B_16BITS: CK_B, wakeup counter = ERTC_WAT
|
||||
* - ERTC_WAT_CLK_CK_B_17BITS: CK_B, wakeup counter = ERTC_WAT + 65535.
|
||||
* @retval none.
|
||||
*/
|
||||
void ertc_wakeup_clock_set(ertc_wakeup_clock_type clock)
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_exint.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the exint firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_flash.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the flash firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -173,12 +173,7 @@ void flash_lock(void)
|
||||
flash_status_type flash_sector_erase(uint32_t sector_address)
|
||||
{
|
||||
flash_status_type status = FLASH_OPERATE_DONE;
|
||||
/* wait for last operation to be completed */
|
||||
status = flash_operation_wait_for(ERASE_TIMEOUT);
|
||||
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
/* if the previous operation is completed, continue to erase the sector */
|
||||
FLASH->ctrl_bit.secers = TRUE;
|
||||
FLASH->addr = sector_address;
|
||||
FLASH->ctrl_bit.erstr = TRUE;
|
||||
@@ -188,7 +183,7 @@ flash_status_type flash_sector_erase(uint32_t sector_address)
|
||||
|
||||
/* disable the secers bit */
|
||||
FLASH->ctrl_bit.secers = FALSE;
|
||||
}
|
||||
|
||||
/* return the erase status */
|
||||
return status;
|
||||
}
|
||||
@@ -202,12 +197,7 @@ flash_status_type flash_sector_erase(uint32_t sector_address)
|
||||
flash_status_type flash_internal_all_erase(void)
|
||||
{
|
||||
flash_status_type status = FLASH_OPERATE_DONE;
|
||||
/* wait for last operation to be completed */
|
||||
status = flash_operation_wait_for(ERASE_TIMEOUT);
|
||||
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
/* if the previous operation is completed, continue to erase */
|
||||
FLASH->ctrl_bit.bankers = TRUE;
|
||||
FLASH->ctrl_bit.erstr = TRUE;
|
||||
|
||||
@@ -216,7 +206,7 @@ flash_status_type flash_internal_all_erase(void)
|
||||
|
||||
/* disable the bankers bit */
|
||||
FLASH->ctrl_bit.bankers = FALSE;
|
||||
}
|
||||
|
||||
/* return the erase status */
|
||||
return status;
|
||||
}
|
||||
@@ -239,11 +229,6 @@ flash_status_type flash_user_system_data_erase(void)
|
||||
fap_val = 0x0000;
|
||||
}
|
||||
|
||||
/* wait for last operation to be completed */
|
||||
status = flash_operation_wait_for(ERASE_TIMEOUT);
|
||||
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
/* unlock the user system data */
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY1;
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY2;
|
||||
@@ -273,7 +258,7 @@ flash_status_type flash_user_system_data_erase(void)
|
||||
/*disable the usdprgm bit */
|
||||
FLASH->ctrl_bit.usdprgm = FALSE;
|
||||
}
|
||||
}
|
||||
|
||||
/* return the erase status */
|
||||
return status;
|
||||
}
|
||||
@@ -288,11 +273,7 @@ flash_status_type flash_user_system_data_erase(void)
|
||||
flash_status_type flash_word_program(uint32_t address, uint32_t data)
|
||||
{
|
||||
flash_status_type status = FLASH_OPERATE_DONE;
|
||||
/* wait for last operation to be completed */
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
FLASH->ctrl_bit.fprgm = TRUE;
|
||||
*(__IO uint32_t*)address = data;
|
||||
/* wait for operation to be completed */
|
||||
@@ -300,7 +281,7 @@ flash_status_type flash_word_program(uint32_t address, uint32_t data)
|
||||
|
||||
/* disable the fprgm bit */
|
||||
FLASH->ctrl_bit.fprgm = FALSE;
|
||||
}
|
||||
|
||||
/* return the program status */
|
||||
return status;
|
||||
}
|
||||
@@ -315,11 +296,7 @@ flash_status_type flash_word_program(uint32_t address, uint32_t data)
|
||||
flash_status_type flash_halfword_program(uint32_t address, uint16_t data)
|
||||
{
|
||||
flash_status_type status = FLASH_OPERATE_DONE;
|
||||
/* wait for last operation to be completed */
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
FLASH->ctrl_bit.fprgm = TRUE;
|
||||
*(__IO uint16_t*)address = data;
|
||||
/* wait for operation to be completed */
|
||||
@@ -327,7 +304,7 @@ flash_status_type flash_halfword_program(uint32_t address, uint16_t data)
|
||||
|
||||
/* disable the fprgm bit */
|
||||
FLASH->ctrl_bit.fprgm = FALSE;
|
||||
}
|
||||
|
||||
/* return the program status */
|
||||
return status;
|
||||
}
|
||||
@@ -342,11 +319,7 @@ flash_status_type flash_halfword_program(uint32_t address, uint16_t data)
|
||||
flash_status_type flash_byte_program(uint32_t address, uint8_t data)
|
||||
{
|
||||
flash_status_type status = FLASH_OPERATE_DONE;
|
||||
/* wait for last operation to be completed */
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
FLASH->ctrl_bit.fprgm = TRUE;
|
||||
*(__IO uint8_t*)address = data;
|
||||
/* wait for operation to be completed */
|
||||
@@ -354,7 +327,7 @@ flash_status_type flash_byte_program(uint32_t address, uint8_t data)
|
||||
|
||||
/* disable the fprgm bit */
|
||||
FLASH->ctrl_bit.fprgm = FALSE;
|
||||
}
|
||||
|
||||
/* return the program status */
|
||||
return status;
|
||||
}
|
||||
@@ -369,9 +342,7 @@ flash_status_type flash_byte_program(uint32_t address, uint8_t data)
|
||||
flash_status_type flash_user_system_data_program(uint32_t address, uint8_t data)
|
||||
{
|
||||
flash_status_type status = FLASH_OPERATE_DONE;
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
|
||||
/* unlock the user system data */
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY1;
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY2;
|
||||
@@ -386,7 +357,7 @@ flash_status_type flash_user_system_data_program(uint32_t address, uint8_t data)
|
||||
|
||||
/* disable the usdprgm bit */
|
||||
FLASH->ctrl_bit.usdprgm = FALSE;
|
||||
}
|
||||
|
||||
/* return the user system data program status */
|
||||
return status;
|
||||
}
|
||||
@@ -409,11 +380,7 @@ flash_status_type flash_epp_set(uint32_t *sector_bits)
|
||||
epp_data[1] = (uint16_t)((sector_bits[0] >> 8) & 0xFF);
|
||||
epp_data[2] = (uint16_t)((sector_bits[0] >> 16) & 0xFF);
|
||||
epp_data[3] = (uint16_t)((sector_bits[0] >> 24) & 0xFF);
|
||||
/* wait for last operation to be completed */
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
/* unlock the user system data */
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY1;
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY2;
|
||||
@@ -444,7 +411,7 @@ flash_status_type flash_epp_set(uint32_t *sector_bits)
|
||||
}
|
||||
/* disable the usdprgm bit */
|
||||
FLASH->ctrl_bit.usdprgm = FALSE;
|
||||
}
|
||||
|
||||
/* return the erase/program protection operation status */
|
||||
return status;
|
||||
}
|
||||
@@ -472,9 +439,7 @@ void flash_epp_status_get(uint32_t *sector_bits)
|
||||
flash_status_type flash_fap_enable(confirm_state new_state)
|
||||
{
|
||||
flash_status_type status = FLASH_OPERATE_DONE;
|
||||
status = flash_operation_wait_for(ERASE_TIMEOUT);
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
|
||||
/* unlock the user system data */
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY1;
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY2;
|
||||
@@ -503,7 +468,7 @@ flash_status_type flash_fap_enable(confirm_state new_state)
|
||||
FLASH->ctrl_bit.usdprgm = FALSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* return the flash access protection operation status */
|
||||
return status;
|
||||
}
|
||||
@@ -530,9 +495,7 @@ flag_status flash_fap_status_get(void)
|
||||
flash_status_type flash_fap_high_level_enable(confirm_state new_state)
|
||||
{
|
||||
flash_status_type status = FLASH_OPERATE_DONE;
|
||||
status = flash_operation_wait_for(ERASE_TIMEOUT);
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
|
||||
/* unlock the user system data */
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY1;
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY2;
|
||||
@@ -588,7 +551,7 @@ flash_status_type flash_fap_high_level_enable(confirm_state new_state)
|
||||
FLASH->ctrl_bit.usdprgm = FALSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* return the flash access protection operation status */
|
||||
return status;
|
||||
}
|
||||
@@ -625,11 +588,7 @@ flag_status flash_fap_high_level_status_get(void)
|
||||
flash_status_type flash_ssb_set(uint8_t usd_ssb)
|
||||
{
|
||||
flash_status_type status = FLASH_OPERATE_DONE;
|
||||
/* wait for last operation to be completed */
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
/* unlock the user system data */
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY1;
|
||||
FLASH->usd_unlock = FLASH_UNLOCK_KEY2;
|
||||
@@ -644,7 +603,7 @@ flash_status_type flash_ssb_set(uint8_t usd_ssb)
|
||||
|
||||
/* disable the usdprgm bit */
|
||||
FLASH->ctrl_bit.usdprgm = FALSE;
|
||||
}
|
||||
|
||||
/* return the user system data program status */
|
||||
return status;
|
||||
}
|
||||
@@ -692,16 +651,12 @@ flash_status_type flash_slib_enable(uint32_t pwd, uint16_t start_sector, uint16_
|
||||
{
|
||||
uint32_t slib_range;
|
||||
flash_status_type status = FLASH_OPERATE_DONE;
|
||||
/* wait for last operation to be completed */
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
|
||||
/*check range param limits*/
|
||||
if((start_sector>=data_start_sector) || ((data_start_sector > end_sector) && \
|
||||
(data_start_sector != 0x7FF)) || (start_sector > end_sector))
|
||||
return FLASH_PROGRAM_ERROR;
|
||||
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
/* unlock slib cfg register */
|
||||
FLASH->slib_unlock = SLIB_UNLOCK_KEY;
|
||||
while(FLASH->slib_misc_sts_bit.slib_ulkf==RESET);
|
||||
@@ -712,9 +667,12 @@ flash_status_type flash_slib_enable(uint32_t pwd, uint16_t start_sector, uint16_
|
||||
/* configure slib, set pwd and range */
|
||||
FLASH->slib_set_pwd = pwd;
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
FLASH->slib_set_range = slib_range;
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
@@ -824,11 +782,7 @@ void flash_boot_memory_extension_mode_enable(void)
|
||||
flash_status_type flash_extension_memory_slib_enable(uint32_t pwd, uint16_t data_start_sector)
|
||||
{
|
||||
flash_status_type status = FLASH_OPERATE_DONE;
|
||||
/* wait for last operation to be completed */
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
/* unlock slib cfg register */
|
||||
FLASH->slib_unlock = SLIB_UNLOCK_KEY;
|
||||
while(FLASH->slib_misc_sts_bit.slib_ulkf==RESET);
|
||||
@@ -836,9 +790,12 @@ flash_status_type flash_extension_memory_slib_enable(uint32_t pwd, uint16_t data
|
||||
/* configure slib, set pwd and range */
|
||||
FLASH->slib_set_pwd = pwd;
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
if(status == FLASH_OPERATE_DONE)
|
||||
{
|
||||
FLASH->em_slib_set = (uint32_t)(data_start_sector << 16) + (uint32_t)0x5AA5;
|
||||
status = flash_operation_wait_for(PROGRAMMING_TIMEOUT);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_gpio.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the gpio firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -390,7 +390,7 @@ void gpio_bits_write(gpio_type *gpio_x, uint16_t pins, confirm_state bit_state)
|
||||
* @param port_value: specifies the value to be written to the port output data register.
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_port_wirte(gpio_type *gpio_x, uint16_t port_value)
|
||||
void gpio_port_write(gpio_type *gpio_x, uint16_t port_value)
|
||||
{
|
||||
gpio_x->odt = port_value;
|
||||
}
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_i2c.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the i2c firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -600,7 +600,7 @@ flag_status i2c_flag_get(i2c_type *i2c_x, uint32_t flag)
|
||||
* @brief clear flag status
|
||||
* @param i2c_x: to select the i2c peripheral.
|
||||
* this parameter can be one of the following values:
|
||||
* I2C1, I2C2.
|
||||
* I2C1, I2C2, I2C3.
|
||||
* @param flag
|
||||
* this parameter can be any combination of the following values:
|
||||
* - I2C_BUSERR_FLAG: bus error flag.
|
||||
@@ -610,11 +610,23 @@ flag_status i2c_flag_get(i2c_type *i2c_x, uint32_t flag)
|
||||
* - I2C_PECERR_FLAG: pec receive error flag.
|
||||
* - I2C_TMOUT_FLAG: smbus timeout flag.
|
||||
* - I2C_ALERTF_FLAG: smbus alert flag.
|
||||
* - I2C_STOPF_FLAG: stop condition generation complete flag.
|
||||
* - I2C_ADDR7F_FLAG: i2c 0~7 bit address match flag.
|
||||
* @retval none
|
||||
*/
|
||||
void i2c_flag_clear(i2c_type *i2c_x, uint32_t flag)
|
||||
{
|
||||
i2c_x->sts1 = (uint16_t)~(flag & (uint32_t)0x00FFFFFF);
|
||||
i2c_x->sts1 = (uint16_t)~(flag & (uint32_t)0x0000DF00);
|
||||
|
||||
if(i2c_x->sts1 & I2C_ADDR7F_FLAG)
|
||||
{
|
||||
UNUSED(i2c_x->sts2);
|
||||
}
|
||||
|
||||
if(i2c_x->sts1 & I2C_STOPF_FLAG)
|
||||
{
|
||||
i2c_x->ctrl1_bit.i2cen = TRUE;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_misc.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the misc firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_pwc.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the pwc firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_sdio.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the sdio firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -82,22 +82,11 @@ void sdio_power_set(sdio_type *sdio_x, sdio_power_state_type power_state)
|
||||
* @param sdio_x: to select the sdio peripheral.
|
||||
* this parameter can be one of the following values:
|
||||
* SDIO1.
|
||||
* @retval flag_status (SET or RESET)
|
||||
* @retval sdio_power_state_type (SDIO_POWER_ON or SDIO_POWER_OFF)
|
||||
*/
|
||||
flag_status sdio_power_status_get(sdio_type *sdio_x)
|
||||
sdio_power_state_type sdio_power_status_get(sdio_type *sdio_x)
|
||||
{
|
||||
flag_status flag = RESET;
|
||||
|
||||
if(sdio_x->pwrctrl_bit.ps == SDIO_POWER_ON)
|
||||
{
|
||||
flag = SET;
|
||||
}
|
||||
else if(sdio_x->pwrctrl_bit.ps == SDIO_POWER_OFF)
|
||||
{
|
||||
flag = RESET;
|
||||
}
|
||||
|
||||
return flag;
|
||||
return (sdio_power_state_type)(sdio_x->pwrctrl_bit.ps);
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_spi.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the spi firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -579,23 +579,21 @@ flag_status spi_i2s_flag_get(spi_type* spi_x, uint32_t spi_i2s_flag)
|
||||
*/
|
||||
void spi_i2s_flag_clear(spi_type* spi_x, uint32_t spi_i2s_flag)
|
||||
{
|
||||
volatile uint32_t temp = 0;
|
||||
temp = temp;
|
||||
if(spi_i2s_flag == SPI_CCERR_FLAG)
|
||||
spi_x->sts = ~SPI_CCERR_FLAG;
|
||||
else if(spi_i2s_flag == SPI_I2S_RDBF_FLAG)
|
||||
temp = REG32(&spi_x->dt);
|
||||
UNUSED(spi_x->dt);
|
||||
else if(spi_i2s_flag == I2S_TUERR_FLAG)
|
||||
temp = REG32(&spi_x->sts);
|
||||
UNUSED(spi_x->sts);
|
||||
else if(spi_i2s_flag == SPI_MMERR_FLAG)
|
||||
{
|
||||
temp = REG32(&spi_x->sts);
|
||||
UNUSED(spi_x->sts);
|
||||
spi_x->ctrl1 = spi_x->ctrl1;
|
||||
}
|
||||
else if(spi_i2s_flag == SPI_I2S_ROERR_FLAG)
|
||||
{
|
||||
temp = REG32(&spi_x->dt);
|
||||
temp = REG32(&spi_x->sts);
|
||||
UNUSED(spi_x->dt);
|
||||
UNUSED(spi_x->sts);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_tmr.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the tmr firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -1046,15 +1046,15 @@ void tmr_pwm_input_config(tmr_type *tmr_x, tmr_input_config_type *input_struct,
|
||||
* @param tmr_x: select the tmr peripheral.
|
||||
* this parameter can be one of the following values:
|
||||
* TMR1, TMR2, TMR3, TMR4, TMR5
|
||||
* @param ti1_connect
|
||||
* @param ch1_connect
|
||||
* this parameter can be one of the following values:
|
||||
* - TMR_CHANEL1_CONNECTED_C1IRAW
|
||||
* - TMR_CHANEL1_2_3_CONNECTED_C1IRAW_XOR
|
||||
* @retval none
|
||||
*/
|
||||
void tmr_channel1_input_select(tmr_type *tmr_x, tmr_channel1_input_connected_type ti1_connect)
|
||||
void tmr_channel1_input_select(tmr_type *tmr_x, tmr_channel1_input_connected_type ch1_connect)
|
||||
{
|
||||
tmr_x->ctrl2_bit.c1insel = ti1_connect;
|
||||
tmr_x->ctrl2_bit.c1insel = ch1_connect;
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_usart.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the usart firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -579,6 +579,11 @@ flag_status usart_flag_get(usart_type* usart_x, uint32_t flag)
|
||||
* - USART_BFF_FLAG:
|
||||
* - USART_TDC_FLAG:
|
||||
* - USART_RDBF_FLAG:
|
||||
* - USART_PERR_FLAG:
|
||||
* - USART_FERR_FLAG:
|
||||
* - USART_NERR_FLAG:
|
||||
* - USART_ROERR_FLAG:
|
||||
* - USART_IDLEF_FLAG:
|
||||
* @note
|
||||
* - USART_PERR_FLAG, USART_FERR_FLAG, USART_NERR_FLAG, USART_ROERR_FLAG and USART_IDLEF_FLAG are cleared by software
|
||||
* sequence: a read operation to usart sts register (usart_flag_get())
|
||||
@@ -590,9 +595,17 @@ flag_status usart_flag_get(usart_type* usart_x, uint32_t flag)
|
||||
* @retval none
|
||||
*/
|
||||
void usart_flag_clear(usart_type* usart_x, uint32_t flag)
|
||||
{
|
||||
if(flag & (USART_PERR_FLAG | USART_FERR_FLAG | USART_NERR_FLAG | USART_ROERR_FLAG | USART_IDLEF_FLAG))
|
||||
{
|
||||
UNUSED(usart_x->sts);
|
||||
UNUSED(usart_x->dt);
|
||||
}
|
||||
else
|
||||
{
|
||||
usart_x->sts = ~flag;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_usb.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the usb firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_wdt.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the wdt firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_wwdt.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief contains all the functions for the wwdt firmware library
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file i2c_application.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief the driver library of the i2c peripheral
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -121,34 +121,6 @@ void i2c_config(i2c_handle_type* hi2c)
|
||||
i2c_enable(hi2c->i2cx, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief clear the addr flag.
|
||||
* @param hi2c: the handle points to the operation information.
|
||||
* @retval none.
|
||||
*/
|
||||
void i2c_addr_flag_clear(i2c_handle_type* hi2c)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
|
||||
tmpreg = hi2c->i2cx->sts1;
|
||||
|
||||
tmpreg = hi2c->i2cx->sts2;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief clear the stop flag.
|
||||
* @param hi2c: the handle points to the operation information.
|
||||
* @retval none.
|
||||
*/
|
||||
void i2c_stop_flag_clear(i2c_handle_type* hi2c)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
|
||||
tmpreg = hi2c->i2cx->sts1;
|
||||
|
||||
tmpreg = hi2c->i2cx->ctrl1_bit.i2cen = TRUE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief wait for the transfer to end.
|
||||
* @param hi2c: the handle points to the operation information.
|
||||
@@ -177,11 +149,33 @@ i2c_status_type i2c_wait_end(i2c_handle_type* hi2c, uint32_t timeout)
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief wait for the flag.
|
||||
* @brief wait for the flag to be set or reset, only BUSYF flag
|
||||
* is waiting to be reset, and other flags are waiting to be set
|
||||
* @param hi2c: the handle points to the operation information.
|
||||
* @param flag: flag to wait.
|
||||
* @param status: status to wait.
|
||||
* @param event_check: flag to check while waiting for the flag.
|
||||
* @param flag: specifies the flag to check.
|
||||
* this parameter can be one of the following values:
|
||||
* - I2C_STARTF_FLAG: start condition generation complete flag.
|
||||
* - I2C_ADDR7F_FLAG: 0~7 bit address match flag.
|
||||
* - I2C_TDC_FLAG: transmit data complete flag.
|
||||
* - I2C_ADDRHF_FLAG: master 9~8 bit address header match flag.
|
||||
* - I2C_STOPF_FLAG: stop condition generation complete flag.
|
||||
* - I2C_RDBF_FLAG: receive data buffer full flag.
|
||||
* - I2C_TDBE_FLAG: transmit data buffer empty flag.
|
||||
* - I2C_BUSERR_FLAG: bus error flag.
|
||||
* - I2C_ARLOST_FLAG: arbitration lost flag.
|
||||
* - I2C_ACKFAIL_FLAG: acknowledge failure flag.
|
||||
* - I2C_OUF_FLAG: overflow or underflow flag.
|
||||
* - I2C_PECERR_FLAG: pec receive error flag.
|
||||
* - I2C_TMOUT_FLAG: smbus timeout flag.
|
||||
* - I2C_ALERTF_FLAG: smbus alert flag.
|
||||
* - I2C_TRMODE_FLAG: transmission mode.
|
||||
* - I2C_BUSYF_FLAG: bus busy flag transmission mode.
|
||||
* - I2C_DIRF_FLAG: transmission direction flag.
|
||||
* - I2C_GCADDRF_FLAG: general call address received flag.
|
||||
* - I2C_DEVADDRF_FLAG: smbus device address received flag.
|
||||
* - I2C_HOSTADDRF_FLAG: smbus host address received flag.
|
||||
* - I2C_ADDR2_FLAG: own address 2 received flag.
|
||||
* @param event_check: check other error flags while waiting for the flag.
|
||||
* parameter as following values:
|
||||
* - I2C_EVENT_CHECK_NONE
|
||||
* - I2C_EVENT_CHECK_ACKFAIL
|
||||
@@ -189,9 +183,24 @@ i2c_status_type i2c_wait_end(i2c_handle_type* hi2c, uint32_t timeout)
|
||||
* @param timeout: maximum waiting time.
|
||||
* @retval i2c status.
|
||||
*/
|
||||
i2c_status_type i2c_wait_flag(i2c_handle_type* hi2c, uint32_t flag, flag_status status, uint32_t event_check, uint32_t timeout)
|
||||
i2c_status_type i2c_wait_flag(i2c_handle_type* hi2c, uint32_t flag, uint32_t event_check, uint32_t timeout)
|
||||
{
|
||||
while(i2c_flag_get(hi2c->i2cx, flag) == status)
|
||||
if(flag == I2C_BUSYF_FLAG)
|
||||
{
|
||||
while(i2c_flag_get(hi2c->i2cx, flag) != RESET)
|
||||
{
|
||||
/* check timeout */
|
||||
if((timeout--) == 0)
|
||||
{
|
||||
hi2c->error_code = I2C_ERR_TIMEOUT;
|
||||
|
||||
return I2C_ERR_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
while(i2c_flag_get(hi2c->i2cx, flag) == RESET)
|
||||
{
|
||||
/* check the ack fail flag */
|
||||
if(event_check & I2C_EVENT_CHECK_ACKFAIL)
|
||||
@@ -216,7 +225,7 @@ i2c_status_type i2c_wait_flag(i2c_handle_type* hi2c, uint32_t flag, flag_status
|
||||
if(i2c_flag_get(hi2c->i2cx, I2C_STOPF_FLAG) != RESET)
|
||||
{
|
||||
/* clear stop flag */
|
||||
i2c_stop_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_STOPF_FLAG);
|
||||
|
||||
hi2c->error_code = I2C_ERR_STOP;
|
||||
|
||||
@@ -232,6 +241,7 @@ i2c_status_type i2c_wait_flag(i2c_handle_type* hi2c, uint32_t flag, flag_status
|
||||
return I2C_ERR_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return I2C_OK;
|
||||
}
|
||||
@@ -279,7 +289,7 @@ i2c_status_type i2c_master_write_addr(i2c_handle_type *hi2c, uint16_t address, u
|
||||
i2c_start_generate(hi2c->i2cx);
|
||||
|
||||
/* wait for the start flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_STARTF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_STARTF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
hi2c->error_code = I2C_ERR_START;
|
||||
|
||||
@@ -297,7 +307,7 @@ i2c_status_type i2c_master_write_addr(i2c_handle_type *hi2c, uint16_t address, u
|
||||
i2c_data_send(hi2c->i2cx, (uint8_t)((address & 0x0300) >> 7) | 0xF0);
|
||||
|
||||
/* wait for the addrh flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDRHF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDRHF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
hi2c->error_code = I2C_ERR_ADDR10;
|
||||
|
||||
@@ -309,7 +319,7 @@ i2c_status_type i2c_master_write_addr(i2c_handle_type *hi2c, uint16_t address, u
|
||||
}
|
||||
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
hi2c->error_code = I2C_ERR_ADDR;
|
||||
|
||||
@@ -335,7 +345,7 @@ i2c_status_type i2c_master_read_addr(i2c_handle_type *hi2c, uint16_t address, ui
|
||||
i2c_start_generate(hi2c->i2cx);
|
||||
|
||||
/* wait for the start flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_STARTF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_STARTF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
hi2c->error_code = I2C_ERR_START;
|
||||
|
||||
@@ -353,7 +363,7 @@ i2c_status_type i2c_master_read_addr(i2c_handle_type *hi2c, uint16_t address, ui
|
||||
i2c_data_send(hi2c->i2cx, (uint8_t)((address & 0x0300) >> 7) | 0xF0);
|
||||
|
||||
/* wait for the addrh flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDRHF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDRHF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
hi2c->error_code = I2C_ERR_ADDR10;
|
||||
|
||||
@@ -364,7 +374,7 @@ i2c_status_type i2c_master_read_addr(i2c_handle_type *hi2c, uint16_t address, ui
|
||||
i2c_data_send(hi2c->i2cx, (uint8_t)(address & 0x00FF));
|
||||
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
hi2c->error_code = I2C_ERR_ADDR;
|
||||
|
||||
@@ -372,13 +382,13 @@ i2c_status_type i2c_master_read_addr(i2c_handle_type *hi2c, uint16_t address, ui
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* generate restart condtion */
|
||||
i2c_start_generate(hi2c->i2cx);
|
||||
|
||||
/* wait for the start flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_STARTF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_STARTF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
hi2c->error_code = I2C_ERR_START;
|
||||
|
||||
@@ -390,7 +400,7 @@ i2c_status_type i2c_master_read_addr(i2c_handle_type *hi2c, uint16_t address, ui
|
||||
}
|
||||
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
hi2c->error_code = I2C_ERR_ADDR;
|
||||
|
||||
@@ -418,7 +428,7 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -436,12 +446,12 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
while(size > 0)
|
||||
{
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -455,7 +465,7 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
}
|
||||
|
||||
/* wait for the tdc flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -486,7 +496,7 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -498,7 +508,7 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_
|
||||
i2c_ack_enable(hi2c->i2cx, TRUE);
|
||||
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -507,12 +517,12 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
while(size > 0)
|
||||
{
|
||||
/* wait for the rdbf flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, RESET, I2C_EVENT_CHECK_STOP, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_STOP, timeout) != I2C_OK)
|
||||
{
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -526,7 +536,7 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_
|
||||
}
|
||||
|
||||
/* wait for the stop flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -535,7 +545,7 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_
|
||||
}
|
||||
|
||||
/* clear stop flag */
|
||||
i2c_stop_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_STOPF_FLAG);
|
||||
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -561,7 +571,7 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -587,7 +597,7 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -601,7 +611,7 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -609,7 +619,7 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
|
||||
i2c_ack_enable(hi2c->i2cx, TRUE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
}
|
||||
|
||||
while(size > 0)
|
||||
@@ -620,7 +630,7 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
|
||||
if(size == 1)
|
||||
{
|
||||
/* wait for the rdbf flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -636,7 +646,7 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
|
||||
else if(size == 2)
|
||||
{
|
||||
/* wait for the tdc flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -659,7 +669,7 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
|
||||
else
|
||||
{
|
||||
/* wait for the tdc flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -675,7 +685,7 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
|
||||
size--;
|
||||
|
||||
/* wait for the tdc flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -698,7 +708,7 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
|
||||
else
|
||||
{
|
||||
/* wait for the rdbf flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -732,7 +742,7 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -744,7 +754,7 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
|
||||
i2c_ack_enable(hi2c->i2cx, TRUE);
|
||||
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -753,12 +763,12 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
if(hi2c->i2cx->oaddr1_bit.addr1mode == I2C_ADDRESS_MODE_10BIT)
|
||||
{
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -767,13 +777,13 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
}
|
||||
|
||||
while(size > 0)
|
||||
{
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -787,7 +797,7 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
|
||||
}
|
||||
|
||||
/* wait for the ackfail flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_5;
|
||||
}
|
||||
@@ -823,7 +833,7 @@ i2c_status_type i2c_master_transmit_int(i2c_handle_type* hi2c, uint16_t address,
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -841,7 +851,7 @@ i2c_status_type i2c_master_transmit_int(i2c_handle_type* hi2c, uint16_t address,
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* enable interrupt */
|
||||
i2c_interrupt_enable(hi2c->i2cx, I2C_EVT_INT | I2C_DATA_INT | I2C_ERR_INT, TRUE);
|
||||
@@ -870,7 +880,7 @@ i2c_status_type i2c_slave_receive_int(i2c_handle_type* hi2c, uint8_t* pdata, uin
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -882,13 +892,13 @@ i2c_status_type i2c_slave_receive_int(i2c_handle_type* hi2c, uint8_t* pdata, uin
|
||||
i2c_ack_enable(hi2c->i2cx, TRUE);
|
||||
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_2;
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* enable interrupt */
|
||||
i2c_interrupt_enable(hi2c->i2cx, I2C_EVT_INT | I2C_DATA_INT | I2C_ERR_INT, TRUE);
|
||||
@@ -918,7 +928,7 @@ i2c_status_type i2c_master_receive_int(i2c_handle_type* hi2c, uint16_t address,
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -944,7 +954,7 @@ i2c_status_type i2c_master_receive_int(i2c_handle_type* hi2c, uint16_t address,
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -955,7 +965,7 @@ i2c_status_type i2c_master_receive_int(i2c_handle_type* hi2c, uint16_t address,
|
||||
i2c_master_receive_ack_set(hi2c->i2cx, I2C_MASTER_ACK_NEXT);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -966,7 +976,7 @@ i2c_status_type i2c_master_receive_int(i2c_handle_type* hi2c, uint16_t address,
|
||||
i2c_ack_enable(hi2c->i2cx, TRUE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
}
|
||||
|
||||
/* enable interrupt */
|
||||
@@ -996,7 +1006,7 @@ i2c_status_type i2c_slave_transmit_int(i2c_handle_type* hi2c, uint8_t* pdata, ui
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -1008,18 +1018,18 @@ i2c_status_type i2c_slave_transmit_int(i2c_handle_type* hi2c, uint8_t* pdata, ui
|
||||
i2c_ack_enable(hi2c->i2cx, TRUE);
|
||||
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_2;
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
if(hi2c->i2cx->oaddr1_bit.addr1mode == I2C_ADDRESS_MODE_10BIT)
|
||||
{
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -1028,7 +1038,7 @@ i2c_status_type i2c_slave_transmit_int(i2c_handle_type* hi2c, uint8_t* pdata, ui
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
}
|
||||
|
||||
/* enable interrupt */
|
||||
@@ -1059,7 +1069,7 @@ i2c_status_type i2c_master_transmit_dma(i2c_handle_type* hi2c, uint16_t address,
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -1083,7 +1093,7 @@ i2c_status_type i2c_master_transmit_dma(i2c_handle_type* hi2c, uint16_t address,
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* enable dma request */
|
||||
i2c_dma_enable(hi2c->i2cx, TRUE);
|
||||
@@ -1112,7 +1122,7 @@ i2c_status_type i2c_slave_receive_dma(i2c_handle_type* hi2c, uint8_t* pdata, uin
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -1130,7 +1140,7 @@ i2c_status_type i2c_slave_receive_dma(i2c_handle_type* hi2c, uint8_t* pdata, uin
|
||||
i2c_dma_config(hi2c, hi2c->dma_rx_channel, pdata, size);
|
||||
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -1142,7 +1152,7 @@ i2c_status_type i2c_slave_receive_dma(i2c_handle_type* hi2c, uint8_t* pdata, uin
|
||||
i2c_dma_enable(hi2c->i2cx, TRUE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
return I2C_OK;
|
||||
}
|
||||
@@ -1169,7 +1179,7 @@ i2c_status_type i2c_master_receive_dma(i2c_handle_type* hi2c, uint16_t address,
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -1198,7 +1208,7 @@ i2c_status_type i2c_master_receive_dma(i2c_handle_type* hi2c, uint16_t address,
|
||||
if(size == 1)
|
||||
{
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -1218,7 +1228,7 @@ i2c_status_type i2c_master_receive_dma(i2c_handle_type* hi2c, uint16_t address,
|
||||
i2c_dma_enable(hi2c->i2cx, TRUE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
}
|
||||
|
||||
return I2C_OK;
|
||||
@@ -1245,7 +1255,7 @@ i2c_status_type i2c_slave_transmit_dma(i2c_handle_type* hi2c, uint8_t* pdata, ui
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -1264,7 +1274,7 @@ i2c_status_type i2c_slave_transmit_dma(i2c_handle_type* hi2c, uint8_t* pdata, ui
|
||||
|
||||
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -1275,10 +1285,10 @@ i2c_status_type i2c_slave_transmit_dma(i2c_handle_type* hi2c, uint8_t* pdata, ui
|
||||
if(hi2c->i2cx->oaddr1_bit.addr1mode == I2C_ADDRESS_MODE_10BIT)
|
||||
{
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* wait for the addr7 flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_ADDR7F_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -1288,7 +1298,7 @@ i2c_status_type i2c_slave_transmit_dma(i2c_handle_type* hi2c, uint8_t* pdata, ui
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* enable dma request */
|
||||
i2c_dma_enable(hi2c->i2cx, TRUE);
|
||||
@@ -1315,7 +1325,7 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, uint16_t address, uint16
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -1333,10 +1343,10 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, uint16_t address, uint16
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1350,7 +1360,7 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, uint16_t address, uint16
|
||||
while(size > 0)
|
||||
{
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1364,7 +1374,7 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, uint16_t address, uint16
|
||||
}
|
||||
|
||||
/* wait for the tdc flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1397,7 +1407,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -1418,10 +1428,10 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1433,7 +1443,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_
|
||||
i2c_data_send(hi2c->i2cx, mem_address);
|
||||
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1456,7 +1466,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1467,7 +1477,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_
|
||||
i2c_master_receive_ack_set(hi2c->i2cx, I2C_MASTER_ACK_NEXT);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -1478,7 +1488,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_
|
||||
i2c_ack_enable(hi2c->i2cx, TRUE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
}
|
||||
|
||||
while(size > 0)
|
||||
@@ -1489,7 +1499,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_
|
||||
if(size == 1)
|
||||
{
|
||||
/* wait for the rdbf flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1505,7 +1515,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_
|
||||
else if(size == 2)
|
||||
{
|
||||
/* wait for the tdc flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1528,7 +1538,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_
|
||||
else
|
||||
{
|
||||
/* wait for the tdc flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1544,7 +1554,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_
|
||||
size--;
|
||||
|
||||
/* wait for the tdc flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1567,7 +1577,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_
|
||||
else
|
||||
{
|
||||
/* wait for the rdbf flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1607,7 +1617,7 @@ i2c_status_type i2c_memory_write_int(i2c_handle_type* hi2c, uint16_t address, ui
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -1625,10 +1635,10 @@ i2c_status_type i2c_memory_write_int(i2c_handle_type* hi2c, uint16_t address, ui
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1640,7 +1650,7 @@ i2c_status_type i2c_memory_write_int(i2c_handle_type* hi2c, uint16_t address, ui
|
||||
i2c_data_send(hi2c->i2cx, mem_address);
|
||||
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1677,7 +1687,7 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -1695,10 +1705,10 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1710,7 +1720,7 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
i2c_data_send(hi2c->i2cx, mem_address);
|
||||
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1733,7 +1743,7 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1744,7 +1754,7 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
i2c_master_receive_ack_set(hi2c->i2cx, I2C_MASTER_ACK_NEXT);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -1755,7 +1765,7 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
i2c_ack_enable(hi2c->i2cx, TRUE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
}
|
||||
|
||||
/* enable interrupt */
|
||||
@@ -1787,7 +1797,7 @@ i2c_status_type i2c_memory_write_dma(i2c_handle_type* hi2c, uint16_t address, ui
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -1811,10 +1821,10 @@ i2c_status_type i2c_memory_write_dma(i2c_handle_type* hi2c, uint16_t address, ui
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1826,7 +1836,7 @@ i2c_status_type i2c_memory_write_dma(i2c_handle_type* hi2c, uint16_t address, ui
|
||||
i2c_data_send(hi2c->i2cx, mem_address);
|
||||
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1863,7 +1873,7 @@ i2c_status_type i2c_memory_read_dma(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
hi2c->error_code = I2C_OK;
|
||||
|
||||
/* wait for the busy flag to be reset */
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
|
||||
{
|
||||
return I2C_ERR_STEP_1;
|
||||
}
|
||||
@@ -1890,10 +1900,10 @@ i2c_status_type i2c_memory_read_dma(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
}
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1905,7 +1915,7 @@ i2c_status_type i2c_memory_read_dma(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
i2c_data_send(hi2c->i2cx, mem_address);
|
||||
|
||||
/* wait for the tdbe flag to be set */
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
if(i2c_wait_flag(hi2c, I2C_TDBE_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
|
||||
{
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
@@ -1925,7 +1935,7 @@ i2c_status_type i2c_memory_read_dma(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
if(size == 1)
|
||||
{
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
|
||||
/* disable ack */
|
||||
i2c_ack_enable(hi2c->i2cx, FALSE);
|
||||
@@ -1945,7 +1955,7 @@ i2c_status_type i2c_memory_read_dma(i2c_handle_type* hi2c, uint16_t address, uin
|
||||
i2c_dma_enable(hi2c->i2cx, TRUE);
|
||||
|
||||
/* clear addr flag */
|
||||
i2c_addr_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ADDR7F_FLAG);
|
||||
}
|
||||
|
||||
return I2C_OK;
|
||||
@@ -2076,7 +2086,7 @@ void i2c_slave_tx_isr_int(i2c_handle_type* hi2c)
|
||||
i2c_interrupt_enable(hi2c->i2cx, I2C_DATA_INT | I2C_EVT_INT | I2C_ERR_INT, FALSE);
|
||||
|
||||
/* wait for the ackfail flag to be set */
|
||||
hi2c->status = i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, RESET, I2C_EVENT_CHECK_NONE, hi2c->timeout);
|
||||
hi2c->status = i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, I2C_EVENT_CHECK_NONE, hi2c->timeout);
|
||||
|
||||
/* clear ackfail flag */
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ACKFAIL_FLAG);
|
||||
@@ -2111,7 +2121,7 @@ void i2c_slave_rx_isr_int(i2c_handle_type* hi2c)
|
||||
else if(i2c_flag_get(hi2c->i2cx, I2C_STOPF_FLAG) != RESET)
|
||||
{
|
||||
/* clear stop flag */
|
||||
i2c_stop_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_STOPF_FLAG);
|
||||
|
||||
/* transfer complete */
|
||||
hi2c->status = I2C_END;
|
||||
@@ -2167,14 +2177,14 @@ void i2c_dma_tx_irq_handler(i2c_handle_type* hi2c)
|
||||
{
|
||||
case I2C_DMA_MA_TX:
|
||||
/* wait for the tdc flag to be set */
|
||||
hi2c->status = i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_NONE, hi2c->timeout);
|
||||
hi2c->status = i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, hi2c->timeout);
|
||||
|
||||
/* generate stop condtion */
|
||||
i2c_stop_generate(hi2c->i2cx);
|
||||
break;
|
||||
case I2C_DMA_SLA_TX:
|
||||
/* wait for the ackfail flag to be set */
|
||||
hi2c->status = i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, RESET, I2C_EVENT_CHECK_NONE, hi2c->timeout);
|
||||
hi2c->status = i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, I2C_EVENT_CHECK_NONE, hi2c->timeout);
|
||||
|
||||
/* clear ackfail flag */
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_ACKFAIL_FLAG);
|
||||
@@ -2226,10 +2236,10 @@ void i2c_dma_rx_irq_handler(i2c_handle_type* hi2c)
|
||||
break;
|
||||
case I2C_DMA_SLA_RX:
|
||||
/* wait for the stop flag to be set */
|
||||
hi2c->status = i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_NONE, hi2c->timeout);
|
||||
hi2c->status = i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_NONE, hi2c->timeout);
|
||||
|
||||
/* clear stop flag */
|
||||
i2c_stop_flag_clear(hi2c);
|
||||
i2c_flag_clear(hi2c->i2cx, I2C_STOPF_FLAG);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file i2c_application.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief i2c application libray header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
@@ -114,7 +114,6 @@ typedef struct
|
||||
{
|
||||
i2c_type *i2cx; /*!< i2c registers base address */
|
||||
uint8_t *pbuff; /*!< pointer to i2c transfer buffer */
|
||||
__IO uint16_t psize; /*!< i2c transfer size */
|
||||
__IO uint16_t pcount; /*!< i2c transfer counter */
|
||||
__IO uint32_t mode; /*!< i2c communication mode */
|
||||
__IO uint32_t timeout; /*!< i2c wait time */
|
||||
@@ -135,9 +134,8 @@ typedef struct
|
||||
|
||||
void i2c_config (i2c_handle_type* hi2c);
|
||||
void i2c_lowlevel_init (i2c_handle_type* hi2c);
|
||||
void i2c_reset_ctrl2_register (i2c_handle_type* hi2c);
|
||||
i2c_status_type i2c_wait_end (i2c_handle_type* hi2c, uint32_t timeout);
|
||||
i2c_status_type i2c_wait_flag (i2c_handle_type* hi2c, uint32_t flag, flag_status status, uint32_t event_check, uint32_t timeout);
|
||||
i2c_status_type i2c_wait_flag (i2c_handle_type* hi2c, uint32_t flag, uint32_t event_check, uint32_t timeout);
|
||||
|
||||
i2c_status_type i2c_master_transmit (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
|
||||
i2c_status_type i2c_master_receive (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usb_core.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb core header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usb_std.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb standard header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usbd_core.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb device core header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usbd_int.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb interrupt header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usb_sdr.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usbh_core.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb host core header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usbh_ctrl.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usbh_int.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usb_core.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb driver
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usbd_core.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb device driver
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usbd_int.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb interrupt request
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usbd_sdr.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb standard device request
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usbh_core.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb host driver
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usbh_ctrl.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb host control request
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file usbh_int.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb host interrupt request
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file audio_class.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb audio class type
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file audio_class.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb audio class file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file audio_conf.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb audio config
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file audio_desc.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb audio device descriptor
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file audio_desc.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb audio descriptor header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file audio_conf.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb audio config
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file audio_class.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb audio class type
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file audio_class.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb audio class file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file audio_desc.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb audio device descriptor
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file audio_desc.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb audio descriptor header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_class.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc class type
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_class.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc class file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_desc.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc device descriptor
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_desc.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc descriptor header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_keyboard_class.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc and keyboard class type
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_keyboard_class.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc and keyboard class file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_keyboard_desc.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc and keyboard device descriptor
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_keyboard_desc.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc and keyboard descriptor header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_msc_class.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc class type
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_msc_class.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc class file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_msc_desc.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc device descriptor
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file cdc_msc_desc.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb cdc descriptor header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file msc_bot_scsi.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb mass storage bulk-only transport and scsi command
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file custom_hid_class.c
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb custom hid class type
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file custom_hid_class.h
|
||||
* @version v2.0.5
|
||||
* @date 2022-05-20
|
||||
* @version v2.0.6
|
||||
* @date 2022-06-28
|
||||
* @brief usb hid header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
|
||||
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Reference in New Issue
Block a user