mirror of
https://github.com/ArteryTek/AT32F415_Firmware_Library.git
synced 2026-05-21 01:12:20 +00:00
update version to v2.0.6
This commit is contained in:
@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_adc.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 adc header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_can.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 can header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -352,7 +352,7 @@ typedef struct
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*/
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typedef struct
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{
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uint16_t baudrate_div; /*!< baudrate division,this parameter can be 0x001~0x400.*/
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uint16_t baudrate_div; /*!< baudrate division,this parameter can be 0x001~0x1000.*/
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can_rsaw_type rsaw_size; /*!< resynchronization adjust width */
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_cmp.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 cmp header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -52,10 +52,9 @@ extern "C" {
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*/
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typedef enum
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{
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CMP_NON_INVERTING_PA5 = 0x00, /*!< comparator non-inverting connect to pa5 */
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CMP_NON_INVERTING_PA1 = 0x01, /*!< comparator non-inverting connect to pa1 */
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CMP_NON_INVERTING_PA0 = 0x02, /*!< comparator non-inverting connect to pa0 */
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CMP_NON_INVERTING_VSSA = 0x03 /*!< comparator non-inverting connect to vssa */
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CMP_NON_INVERTING_PA5_PA7 = 0x00, /*!< comparator1/2 non-inverting connect to pa5/pa7 */
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CMP_NON_INVERTING_PA1_PA3 = 0x01, /*!< comparator1/2 non-inverting connect to pa1/pa3 */
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CMP_NON_INVERTING_PA0_PA2 = 0x02, /*!< comparator1/2 non-inverting connect to pa0/pa2 */
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} cmp_non_inverting_type;
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/**
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@@ -69,8 +68,7 @@ typedef enum
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CMP_INVERTING_VREFINT = 0x03, /*!< comparator inverting connect to vrefint */
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CMP_INVERTING_PA4 = 0x04, /*!< comparator inverting connect to pa4 */
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CMP_INVERTING_PA5 = 0x05, /*!< comparator inverting connect to pa5 */
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CMP_INVERTING_PA0 = 0x06, /*!< comparator inverting connect to pa0 */
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CMP_INVERTING_PA2 = 0x07 /*!< comparator inverting connect to pa2 */
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CMP_INVERTING_PA0_PA2 = 0x06, /*!< comparator1/2 inverting connect to pa0/pa2 */
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} cmp_inverting_type;
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/**
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@@ -79,9 +77,7 @@ typedef enum
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typedef enum
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{
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CMP_SPEED_FAST = 0x00, /*!< comparator selected fast speed */
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CMP_SPEED_MEDIUM = 0x01, /*!< comparator selected medium speed */
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CMP_SPEED_SLOW = 0x02, /*!< comparator selected slow speed */
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CMP_SPEED_ULTRALOW = 0x03 /*!< comparator selected ultralow speed */
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CMP_SPEED_SLOW = 0x01, /*!< comparator selected slow speed */
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} cmp_speed_type;
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/**
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@@ -213,6 +209,7 @@ void cmp_enable(cmp_sel_type cmp_sel, confirm_state new_state);
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void cmp_input_shift_enable(confirm_state new_state);
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uint32_t cmp_output_value_get(cmp_sel_type cmp_sel);
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void cmp_write_protect_enable(cmp_sel_type cmp_sel);
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void cmp_double_mode_enable(confirm_state new_state);
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/**
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* @}
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_crc.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 crc header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_crm.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 crm header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -896,7 +896,7 @@ void crm_hick_sclk_frequency_select(crm_hick_sclk_frequency_type value);
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void crm_usb_clock_source_select(crm_usb_clock_source_type value);
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void crm_clkout_div_set(crm_clkout_div_type clkout_div);
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void crm_otgfs_ep3_remap_enable(confirm_state new_state);
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void crm_usbdiv_reset(confirm_state new_state);
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void crm_usbdiv_reset(void);
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/**
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* @}
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_debug.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 debug header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_def.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 macros header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -62,6 +62,8 @@ extern "C" {
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#endif
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#endif
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#define UNUSED(x) (void)x /* to avoid gcc/g++ warnings */
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#ifdef __cplusplus
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}
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#endif
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_dma.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 dma header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_ertc.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 ertc header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -89,6 +89,16 @@ extern "C" {
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#define ERTC_ALARM_MASK_DATE_WEEK ((uint32_t)0x80000000) /*!< ertc alarm don't match date or week */
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#define ERTC_ALARM_MASK_ALL ((uint32_t)0x80808080) /*!< ertc alarm don't match all */
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/**
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* @}
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*/
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/**
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* @brief compatible with older versions
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*/
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#define ERTC_WAT_CLK_CK_A_16BITS ERTC_WAT_CLK_CK_B_16BITS
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#define ERTC_WAT_CLK_CK_A_17BITS ERTC_WAT_CLK_CK_B_17BITS
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/**
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* @}
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*/
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@@ -166,8 +176,8 @@ typedef enum
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ERTC_WAT_CLK_ERTCCLK_DIV8 = 0x01, /*!< the wake up timer clock is ERTC_CLK / 8 */
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ERTC_WAT_CLK_ERTCCLK_DIV4 = 0x02, /*!< the wake up timer clock is ERTC_CLK / 4 */
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ERTC_WAT_CLK_ERTCCLK_DIV2 = 0x03, /*!< the wake up timer clock is ERTC_CLK / 2 */
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ERTC_WAT_CLK_CK_A_16BITS = 0x04, /*!< the wake up timer clock is CK_A, wakeup counter = ERTC_WAT */
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ERTC_WAT_CLK_CK_A_17BITS = 0x06 /*!< the wake up timer clock is CK_A, wakeup counter = ERTC_WAT + 65535 */
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ERTC_WAT_CLK_CK_B_16BITS = 0x04, /*!< the wake up timer clock is CK_B, wakeup counter = ERTC_WAT */
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ERTC_WAT_CLK_CK_B_17BITS = 0x06 /*!< the wake up timer clock is CK_B, wakeup counter = ERTC_WAT + 65535 */
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} ertc_wakeup_clock_type;
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/**
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_exint.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 exint header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_flash.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 flash header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_gpio.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 gpio header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -789,7 +789,7 @@ uint16_t gpio_output_data_read(gpio_type *gpio_x);
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void gpio_bits_set(gpio_type *gpio_x, uint16_t pins);
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void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins);
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void gpio_bits_write(gpio_type *gpio_x, uint16_t pins, confirm_state bit_state);
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void gpio_port_wirte(gpio_type *gpio_x, uint16_t port_value);
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void gpio_port_write(gpio_type *gpio_x, uint16_t port_value);
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void gpio_pin_wp_config(gpio_type *gpio_x, uint16_t pins);
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void gpio_event_output_config(gpio_port_source_type gpio_port_source, gpio_pins_source_type gpio_pin_source);
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void gpio_event_output_enable(confirm_state new_state);
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_i2c.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 i2c header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_misc.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 misc header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -76,9 +76,9 @@ typedef enum
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*/
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typedef enum
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{
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NVIC_LP_SLEEPONEXIT = 0x02, /*!< send event on pending */
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NVIC_LP_SLEEPONEXIT = 0x02, /*!< enable sleep-on-exit feature */
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NVIC_LP_SLEEPDEEP = 0x04, /*!< enable sleep-deep output signal when entering sleep mode */
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NVIC_LP_SEVONPEND = 0x10 /*!< enable sleep-on-exit feature */
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NVIC_LP_SEVONPEND = 0x10 /*!< send event on pending */
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} nvic_lowpower_mode_type;
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/**
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_pwc.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 pwc header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_sdio.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 sdio header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -577,7 +577,7 @@ typedef struct
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void sdio_reset(sdio_type *sdio_x);
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void sdio_power_set(sdio_type *sdio_x, sdio_power_state_type power_state);
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flag_status sdio_power_status_get(sdio_type *sdio_x);
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sdio_power_state_type sdio_power_status_get(sdio_type *sdio_x);
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void sdio_clock_config(sdio_type *sdio_x, uint16_t clk_div, sdio_edge_phase_type clk_edg);
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void sdio_bus_width_config(sdio_type *sdio_x, sdio_bus_width_type width);
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void sdio_clock_bypass(sdio_type *sdio_x, confirm_state new_state);
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_spi.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 spi header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_tmr.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 tmr header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -882,7 +882,7 @@ void tmr_input_channel_filter_set(tmr_type *tmr_x, tmr_channel_select_type tmr_c
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uint16_t filter_value);
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void tmr_pwm_input_config(tmr_type *tmr_x, tmr_input_config_type *input_struct, \
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tmr_channel_input_divider_type divider_factor);
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void tmr_channel1_input_select(tmr_type *tmr_x, tmr_channel1_input_connected_type ti1_connect);
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void tmr_channel1_input_select(tmr_type *tmr_x, tmr_channel1_input_connected_type ch1_connect);
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void tmr_input_channel_divider_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, \
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tmr_channel_input_divider_type divider_factor);
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void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode);
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_usart.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 usart header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_usb.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 usb header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_wdt.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 wdt header file
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**************************************************************************
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* Copyright notice & Disclaimer
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@@ -1,8 +1,8 @@
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/**
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**************************************************************************
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* @file at32f415_wwdt.h
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* @version v2.0.5
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* @date 2022-05-20
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* @version v2.0.6
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* @date 2022-06-28
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* @brief at32f415 wwdt header file
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**************************************************************************
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* Copyright notice & Disclaimer
|
||||
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