update version to v2.1.1

This commit is contained in:
Artery-MCU
2023-10-30 11:24:27 +08:00
parent f49a554036
commit 9d554c6b91
164 changed files with 1243 additions and 637 deletions

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@@ -128,7 +128,7 @@ extern "C" {
*/
#define __AT32F415_LIBRARY_VERSION_MAJOR (0x02) /*!< [31:24] major version */
#define __AT32F415_LIBRARY_VERSION_MIDDLE (0x01) /*!< [23:16] middle version */
#define __AT32F415_LIBRARY_VERSION_MINOR (0x00) /*!< [15:8] minor version */
#define __AT32F415_LIBRARY_VERSION_MINOR (0x01) /*!< [15:8] minor version */
#define __AT32F415_LIBRARY_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __AT32F415_LIBRARY_VERSION ((__AT32F415_LIBRARY_VERSION_MAJOR << 24) | \
(__AT32F415_LIBRARY_VERSION_MIDDLE << 16) | \

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@@ -32,22 +32,22 @@ extern "C" {
/**
* @brief in the following line adjust the value of high speed exernal crystal (hext)
* @brief in the following line adjust the value of high speed external crystal (hext)
* used in your application
* tip: to avoid modifying this file each time you need to use different hext, you
* can define the hext value in your toolchain compiler preprocessor.
*/
#if !defined HEXT_VALUE
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed external crystal in hz */
#endif
/**
* @brief in the following line adjust the high speed exernal crystal (hext) startup
* @brief in the following line adjust the high speed external crystal (hext) startup
* timeout value
*/
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed exernal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */
/* module define -------------------------------------------------------------*/
#define CRM_MODULE_ENABLED

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@@ -44,6 +44,10 @@ extern "C" {
#define HEXT_STABLE_DELAY (5000u)
#define PLL_STABLE_DELAY (500u)
#define SystemCoreClock system_core_clock
#define DUMMY_NOP() {__NOP();__NOP();__NOP();__NOP();__NOP(); \
__NOP();__NOP();__NOP();__NOP();__NOP(); \
__NOP();__NOP();__NOP();__NOP();__NOP(); \
__NOP();__NOP();__NOP();__NOP();__NOP();}
/**
* @}

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@@ -569,6 +569,7 @@ flag_status adc_preempt_software_trigger_status_get(adc_type *adc_x);
uint16_t adc_ordinary_conversion_data_get(adc_type *adc_x);
uint16_t adc_preempt_conversion_data_get(adc_type *adc_x, adc_preempt_channel_type adc_preempt_channel);
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag);
flag_status adc_interrupt_flag_get(adc_type *adc_x, uint8_t adc_flag);
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag);
/**

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@@ -961,6 +961,7 @@ can_error_record_type can_error_type_record_get(can_type* can_x);
uint8_t can_receive_error_counter_get(can_type* can_x);
uint8_t can_transmit_error_counter_get(can_type* can_x);
void can_interrupt_enable(can_type* can_x, uint32_t can_int, confirm_state new_state);
flag_status can_interrupt_flag_get(can_type* can_x, uint32_t can_flag);
flag_status can_flag_get(can_type* can_x, uint32_t can_flag);
void can_flag_clear(can_type* can_x, uint32_t can_flag);

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@@ -864,6 +864,7 @@ void crm_reset(void);
void crm_lext_bypass(confirm_state new_state);
void crm_hext_bypass(confirm_state new_state);
flag_status crm_flag_get(uint32_t flag);
flag_status crm_interrupt_flag_get(uint32_t flag);
error_status crm_hext_stable_wait(void);
void crm_hick_clock_trimming_set(uint8_t trim_value);
void crm_hick_clock_calibration_set(uint8_t cali_value);

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@@ -1176,6 +1176,7 @@ void ertc_tamper_enable(ertc_tamper_select_type tamper_x, confirm_state new_stat
void ertc_interrupt_enable(uint32_t source, confirm_state new_state);
flag_status ertc_interrupt_get(uint32_t source);
flag_status ertc_flag_get(uint32_t flag);
flag_status ertc_interrupt_flag_get(uint32_t flag);
void ertc_flag_clear(uint32_t flag);
void ertc_bpr_data_write(ertc_dt_type dt, uint32_t data);
uint32_t ertc_bpr_data_read(ertc_dt_type dt);

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@@ -209,6 +209,7 @@ void exint_default_para_init(exint_init_type *exint_struct);
void exint_init(exint_init_type *exint_struct);
void exint_flag_clear(uint32_t exint_line);
flag_status exint_flag_get(uint32_t exint_line);
flag_status exint_interrupt_flag_get(uint32_t exint_line);
void exint_software_interrupt_event_generate(uint32_t exint_line);
void exint_interrupt_enable(uint32_t exint_line, confirm_state new_state);
void exint_event_enable(uint32_t exint_line, confirm_state new_state);

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@@ -378,6 +378,7 @@ void i2c_7bit_address_send(i2c_type *i2c_x, uint8_t address, i2c_direction_type
void i2c_data_send(i2c_type *i2c_x, uint8_t data);
uint8_t i2c_data_receive(i2c_type *i2c_x);
flag_status i2c_flag_get(i2c_type *i2c_x, uint32_t flag);
flag_status i2c_interrupt_flag_get(i2c_type *i2c_x, uint32_t flag);
void i2c_flag_clear(i2c_type *i2c_x, uint32_t flag);
/**

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@@ -58,7 +58,7 @@ extern "C" {
/**
* @brief pwc wakeup pin num definition
*/
#define PWC_WAKEUP_PIN_1 ((uint32_t)0x00000100) /*!< standby wake-up pin1 */
#define PWC_WAKEUP_PIN_1 ((uint32_t)0x00000100) /*!< standby wake-up pin1(pa0) */
/** @defgroup PWC_exported_types
* @{

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@@ -585,6 +585,7 @@ void sdio_clock_enable(sdio_type *sdio_x, confirm_state new_state);
void sdio_dma_enable(sdio_type *sdio_x, confirm_state new_state);
void sdio_interrupt_enable(sdio_type *sdio_x, uint32_t int_opt, confirm_state new_state);
flag_status sdio_flag_get(sdio_type *sdio_x, uint32_t flag);
flag_status sdio_interrupt_flag_get(sdio_type *sdio_x, uint32_t flag);
void sdio_flag_clear(sdio_type *sdio_x, uint32_t flag);
void sdio_command_config(sdio_type *sdio_x, sdio_command_struct_type *command_struct);
void sdio_command_state_machine_enable(sdio_type *sdio_x, confirm_state new_state);

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@@ -472,6 +472,7 @@ void spi_i2s_dma_receiver_enable(spi_type* spi_x, confirm_state new_state);
void spi_i2s_data_transmit(spi_type* spi_x, uint16_t tx_data);
uint16_t spi_i2s_data_receive(spi_type* spi_x);
flag_status spi_i2s_flag_get(spi_type* spi_x, uint32_t spi_i2s_flag);
flag_status spi_i2s_interrupt_flag_get(spi_type* spi_x, uint32_t spi_i2s_flag);
void spi_i2s_flag_clear(spi_type* spi_x, uint32_t spi_i2s_flag);
/**

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@@ -902,6 +902,7 @@ void tmr_trigger_input_select(tmr_type *tmr_x, sub_tmr_input_sel_type trigger_se
void tmr_sub_sync_mode_set(tmr_type *tmr_x, confirm_state new_state);
void tmr_dma_request_enable(tmr_type *tmr_x, tmr_dma_request_type dma_request, confirm_state new_state);
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state);
flag_status tmr_interrupt_flag_get(tmr_type *tmr_x, uint32_t tmr_flag);
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag);
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag);
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event);

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@@ -356,6 +356,7 @@ void usart_irda_mode_enable(usart_type* usart_x, confirm_state new_state);
void usart_irda_low_power_enable(usart_type* usart_x, confirm_state new_state);
void usart_hardware_flow_control_set(usart_type* usart_x,usart_hardware_flow_control_type flow_state);
flag_status usart_flag_get(usart_type* usart_x, uint32_t flag);
flag_status usart_interrupt_flag_get(usart_type* usart_x, uint32_t flag);
void usart_flag_clear(usart_type* usart_x, uint32_t flag);
/**

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@@ -134,6 +134,7 @@ void wwdt_flag_clear(void);
void wwdt_enable(uint8_t wwdt_cnt);
void wwdt_interrupt_enable(void);
flag_status wwdt_flag_get(void);
flag_status wwdt_interrupt_flag_get(void);
void wwdt_counter_set(uint8_t wwdt_cnt);
void wwdt_window_counter_set(uint8_t window_cnt);

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@@ -745,6 +745,47 @@ flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
return status;
}
/**
* @brief get interrupt flag of the specified adc peripheral.
* @param adc_x: select the adc peripheral.
* this parameter can be one of the following values:
* ADC1.
* @param adc_flag: select the adc flag.
* this parameter can be one of the following values:
* - ADC_VMOR_FLAG
* - ADC_CCE_FLAG
* - ADC_PCCE_FLAG
* @retval the new state of adc flag status(SET or RESET).
*/
flag_status adc_interrupt_flag_get(adc_type *adc_x, uint8_t adc_flag)
{
flag_status status = RESET;
switch(adc_flag)
{
case ADC_VMOR_FLAG:
if(adc_x->sts_bit.vmor && adc_x->ctrl1_bit.vmorien)
{
status = SET;
}
break;
case ADC_CCE_FLAG:
if(adc_x->sts_bit.cce && adc_x->ctrl1_bit.cceien)
{
status = SET;
}
break;
case ADC_PCCE_FLAG:
if(adc_x->sts_bit.pcce && adc_x->ctrl1_bit.pcceien)
{
status = SET;
}
break;
default:
break;
}
return status;
}
/**
* @brief clear flag of the specified adc peripheral.
* @param adc_x: select the adc peripheral.

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@@ -923,6 +923,102 @@ void can_interrupt_enable(can_type* can_x, uint32_t can_int, confirm_state new_s
}
}
/**
* @brief get interrupt flag of the specified can peripheral.
* @param can_x: select the can peripheral.
* this parameter can be one of the following values:
* CAN1.
* @param can_flag: select the flag.
* this parameter can be one of the following flags:
* - CAN_EAF_FLAG
* - CAN_EPF_FLAG
* - CAN_BOF_FLAG
* - CAN_ETR_FLAG
* - CAN_EOIF_FLAG
* - CAN_TM0TCF_FLAG
* - CAN_TM1TCF_FLAG
* - CAN_TM2TCF_FLAG
* - CAN_RF0MN_FLAG
* - CAN_RF0FF_FLAG
* - CAN_RF0OF_FLAG
* - CAN_RF1MN_FLAG
* - CAN_RF1FF_FLAG
* - CAN_RF1OF_FLAG
* - CAN_QDZIF_FLAG
* - CAN_EDZC_FLAG
* - CAN_TMEF_FLAG
* note:the state of CAN_EDZC_FLAG need to check dzc and edzif bit
* note:the state of CAN_TMEF_FLAG need to check rqc0,rqc1 and rqc2 bit
* @retval status of can_flag, the returned value can be:SET or RESET.
*/
flag_status can_interrupt_flag_get(can_type* can_x, uint32_t can_flag)
{
flag_status bit_status = RESET;
flag_status int_status = RESET;
switch(can_flag)
{
case CAN_EAF_FLAG:
int_status = (flag_status)(can_x->inten_bit.eoien && can_x->inten_bit.eaien);
break;
case CAN_EPF_FLAG:
int_status = (flag_status)(can_x->inten_bit.eoien && can_x->inten_bit.epien);
break;
case CAN_BOF_FLAG:
int_status = (flag_status)(can_x->inten_bit.eoien && can_x->inten_bit.boien);
break;
case CAN_ETR_FLAG:
int_status = (flag_status)(can_x->inten_bit.eoien && can_x->inten_bit.etrien);
break;
case CAN_EOIF_FLAG:
int_status = (flag_status)can_x->inten_bit.eoien;
break;
case CAN_TM0TCF_FLAG:
case CAN_TM1TCF_FLAG:
case CAN_TM2TCF_FLAG:
int_status = (flag_status)can_x->inten_bit.tcien;
break;
case CAN_RF0MN_FLAG:
int_status = (flag_status)can_x->inten_bit.rf0mien;
break;
case CAN_RF0FF_FLAG:
int_status = (flag_status)can_x->inten_bit.rf0fien;
break;
case CAN_RF0OF_FLAG:
int_status = (flag_status)can_x->inten_bit.rf0oien;
break;
case CAN_RF1MN_FLAG:
int_status = (flag_status)can_x->inten_bit.rf1mien;
break;
case CAN_RF1FF_FLAG:
int_status = (flag_status)can_x->inten_bit.rf1fien;
break;
case CAN_RF1OF_FLAG:
int_status = (flag_status)can_x->inten_bit.rf1oien;
break;
case CAN_QDZIF_FLAG:
int_status = (flag_status)can_x->inten_bit.qdzien;
break;
case CAN_EDZC_FLAG:
int_status = (flag_status)can_x->inten_bit.edzien;
break;
case CAN_TMEF_FLAG:
int_status = (flag_status)can_x->inten_bit.tcien;
break;
default:
int_status = RESET;
break;
}
if(int_status != SET)
{
return RESET;
}
bit_status = can_flag_get(can_x, can_flag);
return bit_status;
}
/**
* @brief get flag of the specified can peripheral.
* @param can_x: select the can peripheral.

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@@ -134,6 +134,64 @@ flag_status crm_flag_get(uint32_t flag)
return status;
}
/**
* @brief get crm interrupt flag status
* @param flag
* this parameter can be one of the following values:
* - CRM_LICK_READY_INT_FLAG
* - CRM_LEXT_READY_INT_FLAG
* - CRM_HICK_READY_INT_FLAG
* - CRM_HEXT_READY_INT_FLAG
* - CRM_PLL_READY_INT_FLAG
* - CRM_CLOCK_FAILURE_INT_FLAG
* @retval flag_status (SET or RESET)
*/
flag_status crm_interrupt_flag_get(uint32_t flag)
{
flag_status status = RESET;
switch(flag)
{
case CRM_LICK_READY_INT_FLAG:
if(CRM->clkint_bit.lickstblf && CRM->clkint_bit.lickstblien)
{
status = SET;
}
break;
case CRM_LEXT_READY_INT_FLAG:
if(CRM->clkint_bit.lextstblf && CRM->clkint_bit.lextstblien)
{
status = SET;
}
break;
case CRM_HICK_READY_INT_FLAG:
if(CRM->clkint_bit.hickstblf && CRM->clkint_bit.hickstblien)
{
status = SET;
}
break;
case CRM_HEXT_READY_INT_FLAG:
if(CRM->clkint_bit.hextstblf && CRM->clkint_bit.hextstblien)
{
status = SET;
}
break;
case CRM_PLL_READY_INT_FLAG:
if(CRM->clkint_bit.pllstblf && CRM->clkint_bit.pllstblien)
{
status = SET;
}
break;
case CRM_CLOCK_FAILURE_INT_FLAG:
if(CRM->clkint_bit.cfdf && CRM->ctrl_bit.cfden)
{
status = SET;
}
break;
}
return status;
}
/**
* @brief wait for hext stable
* @param none
@@ -646,6 +704,7 @@ void crm_pll_config2(crm_pll_clock_source_type clock_source, uint16_t pll_ns, \
void crm_sysclk_switch(crm_sclk_type value)
{
CRM->cfg_bit.sclksel = value;
DUMMY_NOP();
}
/**

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@@ -1426,6 +1426,53 @@ flag_status ertc_flag_get(uint32_t flag)
}
}
/**
* @brief get interrupt flag status.
* @param flag: specifies the flag to check.
* this parameter can be one of the following values:
* - ERTC_ALAF_FLAG: alarm clock a flag.
* - ERTC_ALBF_FLAG: alarm clock b flag.
* - ERTC_WATF_FLAG: wakeup timer flag.
* - ERTC_TSF_FLAG: timestamp flag.
* - ERTC_TP1F_FLAG: tamper detection 1 flag.
* @retval the new state of flag (SET or RESET).
*/
flag_status ertc_interrupt_flag_get(uint32_t flag)
{
__IO uint32_t iten = 0;
switch(flag)
{
case ERTC_ALAF_FLAG:
iten = ERTC->ctrl_bit.alaien;
break;
case ERTC_ALBF_FLAG:
iten = ERTC->ctrl_bit.albien;
break;
case ERTC_WATF_FLAG:
iten = ERTC->ctrl_bit.watien;
break;
case ERTC_TSF_FLAG:
iten = ERTC->ctrl_bit.tsien;
break;
case ERTC_TP1F_FLAG:
iten = ERTC->tamp_bit.tpien;
break;
default:
break;
}
if(((ERTC->sts & flag) != (uint32_t)RESET) && (iten))
{
return SET;
}
else
{
return RESET;
}
}
/**
* @brief clear flag status
* @param flag: specifies the flag to clear.

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@@ -153,6 +153,33 @@ flag_status exint_flag_get(uint32_t exint_line)
return status;
}
/**
* @brief get exint interrupt flag
* @param exint_line
* this parameter can be one of the following values:
* - EXINT_LINE_0
* - EXINT_LINE_1
* ...
* - EXINT_LINE_21
* - EXINT_LINE_22
* @retval the new state of exint flag(SET or RESET).
*/
flag_status exint_interrupt_flag_get(uint32_t exint_line)
{
flag_status status = RESET;
uint32_t exint_flag =0;
exint_flag = EXINT->intsts & exint_line & EXINT->inten;
if((exint_flag != (uint16_t)RESET))
{
status = SET;
}
else
{
status = RESET;
}
return status;
}
/**
* @brief generate exint software interrupt event
* @param exint_line

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@@ -594,6 +594,85 @@ flag_status i2c_flag_get(i2c_type *i2c_x, uint32_t flag)
}
}
/**
* @brief get interrupt flag status
* @param i2c_x: to select the i2c peripheral.
* this parameter can be one of the following values:
* I2C1, I2C2.
* @param flag
* this parameter can be one of the following values:
* - I2C_STARTF_FLAG: start condition generation complete flag.
* - I2C_ADDR7F_FLAG: 0~7 bit address match flag.
* - I2C_TDC_FLAG: transmit data complete flag.
* - I2C_ADDRHF_FLAG: master 9~8 bit address header match flag.
* - I2C_STOPF_FLAG: stop condition generation complete flag.
* - I2C_RDBF_FLAG: receive data buffer full flag.
* - I2C_TDBE_FLAG: transmit data buffer empty flag.
* - I2C_BUSERR_FLAG: bus error flag.
* - I2C_ARLOST_FLAG: arbitration lost flag.
* - I2C_ACKFAIL_FLAG: acknowledge failure flag.
* - I2C_OUF_FLAG: overflow or underflow flag.
* - I2C_PECERR_FLAG: pec receive error flag.
* - I2C_TMOUT_FLAG: smbus timeout flag.
* - I2C_ALERTF_FLAG: smbus alert flag.
* @retval flag_status (SET or RESET)
*/
flag_status i2c_interrupt_flag_get(i2c_type *i2c_x, uint32_t flag)
{
__IO uint32_t reg = 0, value = 0, iten = 0;
switch(flag)
{
case I2C_STARTF_FLAG:
case I2C_ADDR7F_FLAG:
case I2C_TDC_FLAG:
case I2C_ADDRHF_FLAG:
case I2C_STOPF_FLAG:
iten = i2c_x->ctrl2_bit.evtien;
break;
case I2C_RDBF_FLAG:
case I2C_TDBE_FLAG:
iten = i2c_x->ctrl2_bit.dataien & i2c_x->ctrl2_bit.evtien;
break;
case I2C_BUSERR_FLAG:
case I2C_ARLOST_FLAG:
case I2C_ACKFAIL_FLAG:
case I2C_OUF_FLAG:
case I2C_PECERR_FLAG:
case I2C_TMOUT_FLAG:
case I2C_ALERTF_FLAG:
iten = i2c_x->ctrl2_bit.errien;
break;
default:
break;
}
reg = flag >> 28;
flag &= (uint32_t)0x00FFFFFF;
if(reg == 0)
{
value = i2c_x->sts1;
}
else
{
flag = (uint32_t)(flag >> 16);
value = i2c_x->sts2;
}
if(((value & flag) != (uint32_t)RESET) && (iten))
{
return SET;
}
else
{
return RESET;
}
}
/**
* @brief clear flag status
* @param i2c_x: to select the i2c peripheral.

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@@ -241,6 +241,50 @@ void sdio_interrupt_enable(sdio_type *sdio_x, uint32_t int_opt, confirm_state n
}
}
/**
* @brief get sdio interrupt flag.
* @param sdio_x: to select the sdio peripheral.
* this parameter can be one of the following values:
* SDIO1.
* @param flag
* this parameter can be one of the following values:
* - SDIO_CMDFAIL_FLAG
* - SDIO_DTFAIL_FLAG
* - SDIO_CMDTIMEOUT_FLAG
* - SDIO_DTTIMEOUT_FLAG
* - SDIO_TXERRU_FLAG
* - SDIO_RXERRO_FLAG
* - SDIO_CMDRSPCMPL_FLAG
* - SDIO_CMDCMPL_FLAG
* - SDIO_DTCMPL_FLAG
* - SDIO_SBITERR_FLAG
* - SDIO_DTBLKCMPL_FLAG
* - SDIO_DOCMD_FLAG
* - SDIO_DOTX_FLAG
* - SDIO_DORX_FLAG
* - SDIO_TXBUFH_FLAG
* - SDIO_RXBUFH_FLAG
* - SDIO_TXBUFF_FLAG
* - SDIO_RXBUFF_FLAG
* - SDIO_TXBUFE_FLAG
* - SDIO_RXBUFE_FLAG
* - SDIO_TXBUF_FLAG
* - SDIO_RXBUF_FLAG
* - SDIO_SDIOIF_FLAG
* @retval flag_status (SET or RESET)
*/
flag_status sdio_interrupt_flag_get(sdio_type *sdio_x, uint32_t flag)
{
flag_status status = RESET;
if((sdio_x->inten & flag) && (sdio_x->sts & flag))
{
status = SET;
}
return status;
}
/**
* @brief get sdio flag.
* @param sdio_x: to select the sdio peripheral.

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@@ -557,6 +557,69 @@ flag_status spi_i2s_flag_get(spi_type* spi_x, uint32_t spi_i2s_flag)
return status;
}
/**
* @brief get interrupt flag of the specified spi/i2s peripheral.
* @param spi_x: select the spi/i2s peripheral.
* this parameter can be one of the following values:
* SPI1, SPI2
* @param spi_i2s_flag: select the spi/i2s flag
* this parameter can be one of the following values:
* - SPI_I2S_RDBF_FLAG
* - SPI_I2S_TDBE_FLAG
* - I2S_TUERR_FLAG (this flag only use in i2s mode)
* - SPI_CCERR_FLAG (this flag only use in spi mode)
* - SPI_MMERR_FLAG (this flag only use in spi mode)
* - SPI_I2S_ROERR_FLAG
* @retval the new state of spi/i2s flag
*/
flag_status spi_i2s_interrupt_flag_get(spi_type* spi_x, uint32_t spi_i2s_flag)
{
flag_status status = RESET;
switch(spi_i2s_flag)
{
case SPI_I2S_RDBF_FLAG:
if(spi_x->sts_bit.rdbf && spi_x->ctrl2_bit.rdbfie)
{
status = SET;
}
break;
case SPI_I2S_TDBE_FLAG:
if(spi_x->sts_bit.tdbe && spi_x->ctrl2_bit.tdbeie)
{
status = SET;
}
break;
case I2S_TUERR_FLAG:
if(spi_x->sts_bit.tuerr && spi_x->ctrl2_bit.errie)
{
status = SET;
}
break;
case SPI_CCERR_FLAG:
if(spi_x->sts_bit.ccerr && spi_x->ctrl2_bit.errie)
{
status = SET;
}
break;
case SPI_MMERR_FLAG:
if(spi_x->sts_bit.mmerr && spi_x->ctrl2_bit.errie)
{
status = SET;
}
break;
case SPI_I2S_ROERR_FLAG:
if(spi_x->sts_bit.roerr && spi_x->ctrl2_bit.errie)
{
status = SET;
}
break;
default:
break;
};
return status;
}
/**
* @brief clear flag of the specified spi/i2s peripheral.
* @param spi_x: select the spi/i2s peripheral.

View File

@@ -1300,6 +1300,39 @@ void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state
}
}
/**
* @brief get tmr interrupt flag
* @param tmr_x: select the tmr peripheral.
* this parameter can be one of the following values:
* TMR1, TMR2, TMR3, TMR4, TMR5, TMR9, TMR10, TMR11
* @param tmr_flag
* this parameter can be one of the following values:
* - TMR_OVF_FLAG
* - TMR_C1_FLAG
* - TMR_C2_FLAG
* - TMR_C3_FLAG
* - TMR_C4_FLAG
* - TMR_HALL_FLAG
* - TMR_TRIGGER_FLAG
* - TMR_BRK_FLAG
* @retval state of tmr interrupt flag
*/
flag_status tmr_interrupt_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
{
flag_status status = RESET;
if((tmr_x->ists & tmr_flag) && (tmr_x->iden & tmr_flag))
{
status = SET;
}
else
{
status = RESET;
}
return status;
}
/**
* @brief get tmr flag
* @param tmr_x: select the tmr peripheral.

View File

@@ -573,6 +573,79 @@ flag_status usart_flag_get(usart_type* usart_x, uint32_t flag)
}
}
/**
* @brief check whether the specified usart interrupt flag is set or not.
* @param usart_x: select the usart or the uart peripheral.
* this parameter can be one of the following values:
* USART1, USART2, USART3, UART4 or UART5.
* @param flag: specifies the flag to check.
* this parameter can be one of the following values:
* - USART_CTSCF_FLAG: cts change flag (not available for UART4,UART5)
* - USART_BFF_FLAG: break frame flag
* - USART_TDBE_FLAG: transmit data buffer empty flag
* - USART_TDC_FLAG: transmit data complete flag
* - USART_RDBF_FLAG: receive data buffer full flag
* - USART_IDLEF_FLAG: idle flag
* - USART_ROERR_FLAG: receiver overflow error flag
* - USART_NERR_FLAG: noise error flag
* - USART_FERR_FLAG: framing error flag
* - USART_PERR_FLAG: parity error flag
* @retval the new state of usart_flag (SET or RESET).
*/
flag_status usart_interrupt_flag_get(usart_type* usart_x, uint32_t flag)
{
flag_status int_status = RESET;
switch(flag)
{
case USART_CTSCF_FLAG:
int_status = (flag_status)usart_x->ctrl3_bit.ctscfien;
break;
case USART_BFF_FLAG:
int_status = (flag_status)usart_x->ctrl2_bit.bfien;
break;
case USART_TDBE_FLAG:
int_status = (flag_status)usart_x->ctrl1_bit.tdbeien;
break;
case USART_TDC_FLAG:
int_status = (flag_status)usart_x->ctrl1_bit.tdcien;
break;
case USART_RDBF_FLAG:
int_status = (flag_status)usart_x->ctrl1_bit.rdbfien;
break;
case USART_ROERR_FLAG:
int_status = (flag_status)(usart_x->ctrl1_bit.rdbfien || usart_x->ctrl3_bit.errien);
break;
case USART_IDLEF_FLAG:
int_status = (flag_status)usart_x->ctrl1_bit.idleien;
break;
case USART_NERR_FLAG:
case USART_FERR_FLAG:
int_status = (flag_status)usart_x->ctrl3_bit.errien;
break;
case USART_PERR_FLAG:
int_status = (flag_status)usart_x->ctrl1_bit.perrien;
break;
default:
int_status = RESET;
break;
}
if(int_status != SET)
{
return RESET;
}
if(usart_x->sts & flag)
{
return SET;
}
else
{
return RESET;
}
}
/**
* @brief clear the usart's pending flags.
* @param usart_x: select the usart or the uart peripheral.

View File

@@ -104,6 +104,16 @@ flag_status wwdt_flag_get(void)
return (flag_status)WWDT->sts_bit.rldf;
}
/**
* @brief wwdt reload counter interrupt flag get
* @param none
* @retval state of reload counter interrupt flag
*/
flag_status wwdt_interrupt_flag_get(void)
{
return (flag_status)(WWDT->sts_bit.rldf && WWDT->cfg_bit.rldien);
}
/**
* @brief wwdt counter value set
* @param wwdt_cnt (0x40~0x7f)