ArteryTek/AT32F415_Firmware_Library
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update version to v2.1.4

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Artery-MCU
2024-05-13 13:48:59 +08:00
parent 0a93017e07
commit 95481a671d
13 changed files with 21 additions and 126 deletions
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4
project/at_start_f415/examples/i2s/halfduplex_dma/src/main.c
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@@ -87,7 +87,7 @@ static void i2s_config(void)
dma_init_struct.memory_base_addr = (uint32_t)i2s1_buffer_tx;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_base_addr = (uint32_t)0x4001300C;
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI1->dt);
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_HIGH;
@@ -96,7 +96,7 @@ static void i2s_config(void)
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx;
dma_init_struct.peripheral_base_addr = (uint32_t)0x4000380C;
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
dma_init(DMA1_CHANNEL4, &dma_init_struct);
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);

2
project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c
View File

@@ -86,7 +86,7 @@ static void spi_config(void)
dma_init_struct.memory_base_addr = (uint32_t)spi2_rx_buffer;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_base_addr = (uint32_t)0x4000380C;
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_MEDIUM;