ArteryTek/AT32F415_Firmware_Library
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update version to v2.0.2

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Artery-MCU
2022-01-21 15:54:53 +08:00
parent 47b90bbacd
commit 79c8fdf6b4
1190 changed files with 14716 additions and 25013 deletions
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29
libraries/drivers/inc/at32f415_can.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_can.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 can header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -110,16 +110,21 @@ extern "C" {
/**
* @brief can flag clear operation macro definition val
*/
#define CAN_MSTS_EOIF_VAL ((uint32_t)0x00000004) /*!< eoif bit w1 */
#define CAN_MSTS_QDZIF_VAL ((uint32_t)0x00000008) /*!< qdzif bit w1 */
#define CAN_MSTS_EDZIF_VAL ((uint32_t)0x00000010) /*!< edzif bit w1 */
#define CAN_TSTS_TM0TCF_VAL ((uint32_t)0x00000001) /*!< tm0tcf bit w1 */
#define CAN_TSTS_TM1TCF_VAL ((uint32_t)0x00000100) /*!< tm1tcf bit w1 */
#define CAN_TSTS_TM2TCF_VAL ((uint32_t)0x00010000) /*!< tm2tcf bit w1 */
#define CAN_RF0_RF0FF_VAL ((uint32_t)0x00000008) /*!< rf0ff bit w1 */
#define CAN_RF0_RF0OF_VAL ((uint32_t)0x00000010) /*!< rf0of bit w1 */
#define CAN_RF1_RF1FF_VAL ((uint32_t)0x00000008) /*!< rf1ff bit w1 */
#define CAN_RF1_RF1OF_VAL ((uint32_t)0x00000010) /*!< rf1of bit w1 */
#define CAN_MSTS_EOIF_VAL ((uint32_t)0x00000004) /*!< eoif bit value, it clear by writing 1 */
#define CAN_MSTS_QDZIF_VAL ((uint32_t)0x00000008) /*!< qdzif bit value, it clear by writing 1 */
#define CAN_MSTS_EDZIF_VAL ((uint32_t)0x00000010) /*!< edzif bit value, it clear by writing 1 */
#define CAN_TSTS_TM0TCF_VAL ((uint32_t)0x00000001) /*!< tm0tcf bit value, it clear by writing 1 */
#define CAN_TSTS_TM1TCF_VAL ((uint32_t)0x00000100) /*!< tm1tcf bit value, it clear by writing 1 */
#define CAN_TSTS_TM2TCF_VAL ((uint32_t)0x00010000) /*!< tm2tcf bit value, it clear by writing 1 */
#define CAN_TSTS_TM0CT_VAL ((uint32_t)0x00000080) /*!< tm0ct bit value, it clear by writing 1 */
#define CAN_TSTS_TM1CT_VAL ((uint32_t)0x00008000) /*!< tm1ct bit value, it clear by writing 1 */
#define CAN_TSTS_TM2CT_VAL ((uint32_t)0x00800000) /*!< tm2ct bit value, it clear by writing 1 */
#define CAN_RF0_RF0FF_VAL ((uint32_t)0x00000008) /*!< rf0ff bit value, it clear by writing 1 */
#define CAN_RF0_RF0OF_VAL ((uint32_t)0x00000010) /*!< rf0of bit value, it clear by writing 1 */
#define CAN_RF0_RF0R_VAL ((uint32_t)0x00000020) /*!< rf0r bit value, it clear by writing 1 */
#define CAN_RF1_RF1FF_VAL ((uint32_t)0x00000008) /*!< rf1ff bit value, it clear by writing 1 */
#define CAN_RF1_RF1OF_VAL ((uint32_t)0x00000010) /*!< rf1of bit value, it clear by writing 1 */
#define CAN_RF1_RF1R_VAL ((uint32_t)0x00000020) /*!< rf1r bit value, it clear by writing 1 */
/** @defgroup CAN_exported_types
* @{