ArteryTek/AT32F415_Firmware_Library
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update version to v2.0.2

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Artery-MCU
2022-01-21 15:54:53 +08:00
parent 47b90bbacd
commit 79c8fdf6b4
1190 changed files with 14716 additions and 25013 deletions
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4
libraries/drivers/inc/at32f415_adc.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_adc.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 adc header file
**************************************************************************
* Copyright notice & Disclaimer

29
libraries/drivers/inc/at32f415_can.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_can.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 can header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -110,16 +110,21 @@ extern "C" {
/**
* @brief can flag clear operation macro definition val
*/
#define CAN_MSTS_EOIF_VAL ((uint32_t)0x00000004) /*!< eoif bit w1 */
#define CAN_MSTS_QDZIF_VAL ((uint32_t)0x00000008) /*!< qdzif bit w1 */
#define CAN_MSTS_EDZIF_VAL ((uint32_t)0x00000010) /*!< edzif bit w1 */
#define CAN_TSTS_TM0TCF_VAL ((uint32_t)0x00000001) /*!< tm0tcf bit w1 */
#define CAN_TSTS_TM1TCF_VAL ((uint32_t)0x00000100) /*!< tm1tcf bit w1 */
#define CAN_TSTS_TM2TCF_VAL ((uint32_t)0x00010000) /*!< tm2tcf bit w1 */
#define CAN_RF0_RF0FF_VAL ((uint32_t)0x00000008) /*!< rf0ff bit w1 */
#define CAN_RF0_RF0OF_VAL ((uint32_t)0x00000010) /*!< rf0of bit w1 */
#define CAN_RF1_RF1FF_VAL ((uint32_t)0x00000008) /*!< rf1ff bit w1 */
#define CAN_RF1_RF1OF_VAL ((uint32_t)0x00000010) /*!< rf1of bit w1 */
#define CAN_MSTS_EOIF_VAL ((uint32_t)0x00000004) /*!< eoif bit value, it clear by writing 1 */
#define CAN_MSTS_QDZIF_VAL ((uint32_t)0x00000008) /*!< qdzif bit value, it clear by writing 1 */
#define CAN_MSTS_EDZIF_VAL ((uint32_t)0x00000010) /*!< edzif bit value, it clear by writing 1 */
#define CAN_TSTS_TM0TCF_VAL ((uint32_t)0x00000001) /*!< tm0tcf bit value, it clear by writing 1 */
#define CAN_TSTS_TM1TCF_VAL ((uint32_t)0x00000100) /*!< tm1tcf bit value, it clear by writing 1 */
#define CAN_TSTS_TM2TCF_VAL ((uint32_t)0x00010000) /*!< tm2tcf bit value, it clear by writing 1 */
#define CAN_TSTS_TM0CT_VAL ((uint32_t)0x00000080) /*!< tm0ct bit value, it clear by writing 1 */
#define CAN_TSTS_TM1CT_VAL ((uint32_t)0x00008000) /*!< tm1ct bit value, it clear by writing 1 */
#define CAN_TSTS_TM2CT_VAL ((uint32_t)0x00800000) /*!< tm2ct bit value, it clear by writing 1 */
#define CAN_RF0_RF0FF_VAL ((uint32_t)0x00000008) /*!< rf0ff bit value, it clear by writing 1 */
#define CAN_RF0_RF0OF_VAL ((uint32_t)0x00000010) /*!< rf0of bit value, it clear by writing 1 */
#define CAN_RF0_RF0R_VAL ((uint32_t)0x00000020) /*!< rf0r bit value, it clear by writing 1 */
#define CAN_RF1_RF1FF_VAL ((uint32_t)0x00000008) /*!< rf1ff bit value, it clear by writing 1 */
#define CAN_RF1_RF1OF_VAL ((uint32_t)0x00000010) /*!< rf1of bit value, it clear by writing 1 */
#define CAN_RF1_RF1R_VAL ((uint32_t)0x00000020) /*!< rf1r bit value, it clear by writing 1 */
/** @defgroup CAN_exported_types
* @{

4
libraries/drivers/inc/at32f415_cmp.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_cmp.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 cmp header file
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/inc/at32f415_crc.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_crc.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 crc header file
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/inc/at32f415_crm.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_crm.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 crm header file
**************************************************************************
* Copyright notice & Disclaimer

6
libraries/drivers/inc/at32f415_debug.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_debug.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 debug header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -133,7 +133,7 @@ typedef struct
* @}
*/
#define DEBUG ((debug_type *) DEBUG_BASE)
#define DEBUGMCU ((debug_type *) DEBUG_BASE)
/** @defgroup DEBUG_exported_functions
* @{

69
libraries/drivers/inc/at32f415_def.h Normal file
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@@ -0,0 +1,69 @@
/**
**************************************************************************
* @file at32f415_def.h
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 macros header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F415_DEF_H
#define __AT32F415_DEF_H
#ifdef __cplusplus
extern "C" {
#endif
/* gnu compiler */
#if defined (__GNUC__)
#ifndef ALIGNED_HEAD
#define ALIGNED_HEAD
#endif
#ifndef ALIGNED_TAIL
#define ALIGNED_TAIL __attribute__ ((aligned (4)))
#endif
#endif
/* arm compiler */
#if defined (__CC_ARM)
#ifndef ALIGNED_HEAD
#define ALIGNED_HEAD __align(4)
#endif
#ifndef ALIGNED_TAIL
#define ALIGNED_TAIL
#endif
#endif
/* iar compiler */
#if defined (__ICCARM__)
#ifndef ALIGNED_HEAD
#define ALIGNED_HEAD
#endif
#ifndef ALIGNED_TAIL
#define ALIGNED_TAIL
#endif
#endif
#ifdef __cplusplus
}
#endif
#endif

4
libraries/drivers/inc/at32f415_dma.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_dma.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 dma header file
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/inc/at32f415_ertc.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_ertc.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 ertc header file
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/inc/at32f415_exint.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_exint.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 exint header file
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/inc/at32f415_flash.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_flash.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 flash header file
**************************************************************************
* Copyright notice & Disclaimer

6
libraries/drivers/inc/at32f415_gpio.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_gpio.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 gpio header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -423,7 +423,7 @@ typedef struct
};
/**
* @brief gpio wcr register, offset:0x10
* @brief gpio scr register, offset:0x10
*/
union
{

4
libraries/drivers/inc/at32f415_i2c.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_i2c.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 i2c header file
**************************************************************************
* Copyright notice & Disclaimer

14
libraries/drivers/inc/at32f415_misc.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_misc.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 misc header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -64,11 +64,11 @@ extern "C" {
*/
typedef enum
{
NVIC_PRIORITY_GROUP_0 = ((uint32_t)0x700), /*!< 0 bits for preemption priority, 4 bits for subpriority */
NVIC_PRIORITY_GROUP_1 = ((uint32_t)0x600), /*!< 1 bits for preemption priority, 3 bits for subpriority */
NVIC_PRIORITY_GROUP_2 = ((uint32_t)0x500), /*!< 2 bits for preemption priority, 2 bits for subpriority */
NVIC_PRIORITY_GROUP_3 = ((uint32_t)0x400), /*!< 3 bits for preemption priority, 1 bits for subpriority */
NVIC_PRIORITY_GROUP_4 = ((uint32_t)0x300) /*!< 4 bits for preemption priority, 0 bits for subpriority */
NVIC_PRIORITY_GROUP_0 = ((uint32_t)0x7), /*!< 0 bits for preemption priority, 4 bits for subpriority */
NVIC_PRIORITY_GROUP_1 = ((uint32_t)0x6), /*!< 1 bits for preemption priority, 3 bits for subpriority */
NVIC_PRIORITY_GROUP_2 = ((uint32_t)0x5), /*!< 2 bits for preemption priority, 2 bits for subpriority */
NVIC_PRIORITY_GROUP_3 = ((uint32_t)0x4), /*!< 3 bits for preemption priority, 1 bits for subpriority */
NVIC_PRIORITY_GROUP_4 = ((uint32_t)0x3) /*!< 4 bits for preemption priority, 0 bits for subpriority */
} nvic_priority_group_type;
/**

11
libraries/drivers/inc/at32f415_pwc.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_pwc.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 pwc header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -57,6 +57,11 @@ extern "C" {
* @}
*/
/**
* @brief pwc wakeup pin num definition
*/
#define PWC_WAKEUP_PIN_1 ((uint32_t)0x00000100) /*!< standby wake-up pin1 */
/** @defgroup PWC_exported_types
* @{
*/
@@ -159,7 +164,7 @@ void pwc_reset(void);
void pwc_battery_powered_domain_access(confirm_state new_state);
void pwc_pvm_level_select(pwc_pvm_voltage_type pvm_voltage);
void pwc_power_voltage_monitor_enable(confirm_state new_state);
void pwc_wakeup_pin_enable(confirm_state new_state);
void pwc_wakeup_pin_enable(uint32_t pin_num, confirm_state new_state);
void pwc_flag_clear(uint32_t pwc_flag);
flag_status pwc_flag_get(uint32_t pwc_flag);
void pwc_sleep_mode_enter(pwc_sleep_enter_type pwc_sleep_enter);

4
libraries/drivers/inc/at32f415_sdio.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_sdio.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 sdio header file
**************************************************************************
* Copyright notice & Disclaimer

8
libraries/drivers/inc/at32f415_spi.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_spi.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 spi header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -122,8 +122,8 @@ typedef enum
*/
typedef enum
{
SPI_CS_HARDWARE_MODE = 0x00, /*!< cs is software mode */
SPI_CS_SOFTWARE_MODE = 0x01 /*!< cs is hardware mode */
SPI_CS_HARDWARE_MODE = 0x00, /*!< cs is hardware mode */
SPI_CS_SOFTWARE_MODE = 0x01 /*!< cs is software mode */
} spi_cs_mode_type;
/**

4
libraries/drivers/inc/at32f415_tmr.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_tmr.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 tmr header file
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/inc/at32f415_usart.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_usart.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 usart header file
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/inc/at32f415_usb.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_usb.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 usb header file
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/inc/at32f415_wdt.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_wdt.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 wdt header file
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/inc/at32f415_wwdt.h
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_wwdt.h
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief at32f415 wwdt header file
**************************************************************************
* Copyright notice & Disclaimer

6
libraries/drivers/src/at32f415_adc.c
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_adc.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the adc firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -911,7 +911,7 @@ flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
*/
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
{
adc_x->sts &= ~adc_flag;
adc_x->sts = ~adc_flag;
}
/**

14
libraries/drivers/src/at32f415_can.c
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_can.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the can firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -583,13 +583,13 @@ void can_transmit_cancel(can_type* can_x, can_tx_mailbox_num_type transmit_mailb
switch (transmit_mailbox)
{
case CAN_TX_MAILBOX0:
can_x->tsts_bit.tm0ct = TRUE;
can_x->tsts = CAN_TSTS_TM0CT_VAL;
break;
case CAN_TX_MAILBOX1:
can_x->tsts_bit.tm1ct = TRUE;
can_x->tsts = CAN_TSTS_TM1CT_VAL;
break;
case CAN_TX_MAILBOX2:
can_x->tsts_bit.tm2ct = TRUE;
can_x->tsts = CAN_TSTS_TM2CT_VAL;
break;
default:
break;
@@ -660,10 +660,10 @@ void can_receive_fifo_release(can_type* can_x, can_rx_fifo_num_type fifo_number)
switch (fifo_number)
{
case CAN_RX_FIFO0:
can_x->rf0_bit.rf0r = TRUE;
can_x->rf0 = CAN_RF0_RF0R_VAL;
break;
case CAN_RX_FIFO1:
can_x->rf1_bit.rf1r = TRUE;
can_x->rf1 = CAN_RF1_RF1R_VAL;
break;
default:
break;

4
libraries/drivers/src/at32f415_cmp.c
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_cmp.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the gpio firmware library
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/src/at32f415_crc.c
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_crc.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the crc firmware library
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/src/at32f415_crm.c
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_crm.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the crm firmware library
**************************************************************************
* Copyright notice & Disclaimer

11
libraries/drivers/src/at32f415_debug.c
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_debug.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the debug firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -48,7 +48,7 @@
*/
uint32_t debug_device_id_get(void)
{
return DEBUG->pid;
return DEBUGMCU->pid;
}
/**
* @brief set periph debug mode
@@ -75,14 +75,13 @@ uint32_t debug_device_id_get(void)
*/
void debug_periph_mode_set(uint32_t periph_debug_mode, confirm_state new_state)
{
if(new_state != FALSE)
{
DEBUG->ctrl |= periph_debug_mode;
DEBUGMCU->ctrl |= periph_debug_mode;
}
else
{
DEBUG->ctrl &= ~periph_debug_mode;
DEBUGMCU->ctrl &= ~periph_debug_mode;
}
}

11
libraries/drivers/src/at32f415_dma.c
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_dma.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the dma firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -214,8 +214,7 @@ void dma_channel_enable(dma_channel_type* dmax_channely, confirm_state new_state
* - FLEX_CHANNEL4
* - FLEX_CHANNEL5
* - FLEX_CHANNEL6
* - FLEX_CHANNEL7
* - DMA2_CHANNEL8
* - FLEX_CHANNEL7
* @param flexible_request: every peripheral have specified hardware_id.
* this parameter can be one of the following values:
* - DMA_FLEXIBLE_ADC1 - DMA_FLEXIBLE_SPI1_RX - DMA_FLEXIBLE_SPI1_TX - DMA_FLEXIBLE_SPI2_RX
@@ -342,9 +341,9 @@ flag_status dma_flag_get(uint32_t dmax_flag)
*/
void dma_flag_clear(uint32_t dmax_flag)
{
if(dmax_flag > 0x10000000)
if(dmax_flag > ((uint32_t)0x10000000))
{
DMA2->clr = dmax_flag;
DMA2->clr = (uint32_t)(dmax_flag & 0x0FFFFFFF);
}
else
{

14
libraries/drivers/src/at32f415_ertc.c
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_ertc.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the ertc firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -102,7 +102,7 @@ error_status ertc_wait_update(void)
ertc_write_protect_disable();
/* clear updf flag */
ERTC->sts_bit.updf = 0;
ERTC->sts = ~(ERTC_UPDF_FLAG | 0x00000080) | (ERTC->sts_bit.imen << 7);
/* enable write protection */
ertc_write_protect_enable();
@@ -170,7 +170,7 @@ error_status ertc_init_mode_enter(void)
if(ERTC->sts_bit.imf == 0)
{
/* enter init mode */
ERTC->sts_bit.imen = 1;
ERTC->sts = 0xFFFFFFFF;
while(ERTC->sts_bit.imf == 0)
{
@@ -196,7 +196,7 @@ error_status ertc_init_mode_enter(void)
*/
void ertc_init_mode_exit(void)
{
ERTC->sts_bit.imen = FALSE;
ERTC->sts = 0xFFFFFF7F;
}
/**
@@ -1328,7 +1328,7 @@ void ertc_tamper_enable(ertc_tamper_select_type tamper_x, confirm_state new_stat
/**
* @brief enable or disable interrupt.
* @param source: interrupts sources
* this parameter can be one of the following values:
* this parameter can be any combination of the following values:
* - ERTC_TP_INT: tamper interrupt.
* - ERTC_ALA_INT: alarm a interrupt.
* - ERTC_ALB_INT: alarm b interrupt.
@@ -1463,7 +1463,7 @@ void ertc_flag_clear(uint32_t flag)
/* disable write protection */
ertc_write_protect_disable();
ERTC->sts &= ~flag;
ERTC->sts = ~(flag | 0x00000080) | (ERTC->sts_bit.imen << 7);
/* enable write protection */
ertc_write_protect_enable();

4
libraries/drivers/src/at32f415_exint.c
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_exint.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the exint firmware library
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/src/at32f415_flash.c
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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_flash.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the flash firmware library
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/src/at32f415_gpio.c
View File

@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_gpio.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the gpio firmware library
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/src/at32f415_i2c.c
View File

@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_i2c.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the i2c firmware library
**************************************************************************
* Copyright notice & Disclaimer

4
libraries/drivers/src/at32f415_misc.c
View File

@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_misc.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the misc firmware library
**************************************************************************
* Copyright notice & Disclaimer

18
libraries/drivers/src/at32f415_pwc.c
View File

@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_pwc.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the pwc firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -94,15 +94,25 @@ void pwc_power_voltage_monitor_enable(confirm_state new_state)
/**
* @brief enable or disable pwc standby wakeup pin
* @param pin_num: choose the wakeup pin.
* this parameter can be be any combination of the following values:
* - PWC_WAKEUP_PIN_1
* @param new_state: new state of the standby wakeup pin.
* this parameter can be one of the following values:
* - TRUE <wakeup pin is used for wake up cpu from standby mode>
* - FALSE <wakeup pin is used for general purpose I/O>
* @retval none
*/
void pwc_wakeup_pin_enable(confirm_state new_state)
void pwc_wakeup_pin_enable(uint32_t pin_num, confirm_state new_state)
{
PWC->ctrlsts_bit.swpen = new_state;
if(new_state == TRUE)
{
PWC->ctrlsts |= pin_num;
}
else
{
PWC->ctrlsts &= ~pin_num;
}
}
/**

6
libraries/drivers/src/at32f415_sdio.c
View File

@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_sdio.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the sdio firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -325,7 +325,7 @@ flag_status sdio_flag_get(sdio_type *sdio_x, uint32_t flag)
*/
void sdio_flag_clear(sdio_type *sdio_x, uint32_t flag)
{
sdio_x->intclr |= flag;
sdio_x->intclr = flag;
}
/**

8
libraries/drivers/src/at32f415_spi.c
View File

@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_spi.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the spi firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -580,9 +580,9 @@ flag_status spi_i2s_flag_get(spi_type* spi_x, uint32_t spi_i2s_flag)
void spi_i2s_flag_clear(spi_type* spi_x, uint32_t spi_i2s_flag)
{
volatile uint32_t temp = 0;
temp = temp;
if(spi_i2s_flag == SPI_CCERR_FLAG)
spi_x->sts_bit.ccerr = FALSE;
spi_x->sts = ~SPI_CCERR_FLAG;
else if(spi_i2s_flag == SPI_I2S_RDBF_FLAG)
temp = REG32(&spi_x->dt);
else if(spi_i2s_flag == I2S_TUERR_FLAG)

6
libraries/drivers/src/at32f415_tmr.c
View File

@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_tmr.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the tmr firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -1346,7 +1346,7 @@ flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
*/
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
{
tmr_x->ists &= ~tmr_flag;
tmr_x->ists = ~tmr_flag;
}
/**

4
libraries/drivers/src/at32f415_usart.c
View File

@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_usart.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the usart firmware library
**************************************************************************
* Copyright notice & Disclaimer

18
libraries/drivers/src/at32f415_usb.c
View File

@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_usb.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the usb firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -309,8 +309,7 @@ void usb_set_tx_fifo(otg_global_type *usbx, uint8_t txfifo, uint16_t size)
offset = usbx->grxfsiz;
if(txfifo == 0)
{
usbx->gnptxfsiz_ept0tx_bit.nptxfstaddr = offset;
usbx->gnptxfsiz_ept0tx_bit.nptxfdep = size;
usbx->gnptxfsiz_ept0tx = offset | (size << 16);
}
else
{
@@ -319,8 +318,7 @@ void usb_set_tx_fifo(otg_global_type *usbx, uint8_t txfifo, uint16_t size)
{
offset += usbx->dieptxfn_bit[i_index].ineptxfdep;
}
usbx->dieptxfn_bit[txfifo-1].ineptxfstaddr = offset;
usbx->dieptxfn_bit[txfifo-1].ineptxfdep = size;
usbx->dieptxfn[txfifo - 1] = offset | (size << 16);
}
}
@@ -423,7 +421,11 @@ void usb_write_packet(otg_global_type *usbx, uint8_t *pusr_buf, uint16_t num, ui
uint32_t *pbuf = (uint32_t *)pusr_buf;
for(n_index = 0; n_index < nhbytes; n_index ++)
{
#if defined (__ICCARM__) && (__VER__ < 7000000)
USB_FIFO(usbx, num) = *(__packed uint32_t *)pbuf;
#else
USB_FIFO(usbx, num) = __UNALIGNED_UINT32_READ(pbuf);
#endif
pbuf ++;
}
}
@@ -442,7 +444,11 @@ void usb_read_packet(otg_global_type *usbx, uint8_t *pusr_buf, uint16_t num, uin
uint32_t *pbuf = (uint32_t *)pusr_buf;
for(n_index = 0; n_index < nhbytes; n_index ++)
{
#if defined (__ICCARM__) && (__VER__ < 7000000)
*(__packed uint32_t *)pbuf = USB_FIFO(usbx, 0);
#else
__UNALIGNED_UINT32_WRITE(pbuf, (USB_FIFO(usbx, 0)));
#endif
pbuf ++;
}
}

4
libraries/drivers/src/at32f415_wdt.c
View File

@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_wdt.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the wdt firmware library
**************************************************************************
* Copyright notice & Disclaimer

6
libraries/drivers/src/at32f415_wwdt.c
View File

@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_wwdt.c
* @version v2.0.0
* @date 2021-11-26
* @version v2.0.2
* @date 2021-12-31
* @brief contains all the functions for the wwdt firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -73,7 +73,7 @@ void wwdt_divider_set(wwdt_division_type division)
*/
void wwdt_flag_clear(void)
{
WWDT->sts_bit.rldf = FALSE;
WWDT->sts = 0;
}
/**