mirror of
https://github.com/ArteryTek/AT32F415_Firmware_Library.git
synced 2026-05-21 01:12:20 +00:00
update version to v2.1.7
This commit is contained in:
@@ -24,8 +24,6 @@
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/* includes ------------------------------------------------------------------*/
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#include "at32f415_int.h"
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#include "at32f415_board.h"
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/** @addtogroup AT32F415_periph_examples
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* @{
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@@ -35,9 +35,6 @@
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__IO uint16_t adc1_ordinary_value = 0;
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static void dma_config(void);
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static void adc_config(void);
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/**
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* @brief dma configuration.
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* @param none
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@@ -60,8 +57,6 @@ static void dma_config(void)
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dma_init_struct.priority = DMA_PRIORITY_HIGH;
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dma_init_struct.loop_mode_enable = TRUE;
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dma_init(DMA1_CHANNEL1, &dma_init_struct);
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dma_channel_enable(DMA1_CHANNEL1, TRUE);
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}
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/**
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@@ -73,8 +68,10 @@ static void adc_config(void)
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{
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adc_base_config_type adc_base_struct;
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crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
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adc_reset(ADC1);
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crm_adc_clock_div_set(CRM_ADC_DIV_6);
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/* ADC1 config */
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adc_base_default_para_init(&adc_base_struct);
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adc_base_struct.sequence_mode = FALSE;
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adc_base_struct.repeat_mode = FALSE;
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@@ -87,6 +84,8 @@ static void adc_config(void)
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adc_tempersensor_vintrv_enable(TRUE);
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adc_enable(ADC1, TRUE);
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/* ADC calibration */
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adc_calibration_init(ADC1);
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while(adc_calibration_init_status_get(ADC1));
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adc_calibration_start(ADC1);
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@@ -100,7 +99,6 @@ static void adc_config(void)
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*/
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int main(void)
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{
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__IO uint32_t index = 0;
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nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
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system_clock_config();
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at32_board_init();
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@@ -110,19 +108,27 @@ int main(void)
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uart_print_init(115200);
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dma_config();
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adc_config();
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/* enable DMA after ADC activation */
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dma_channel_enable(DMA1_CHANNEL1, TRUE);
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printf("adc1_vref_check \r\n");
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while(1)
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{
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at32_led_on(LED2);
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delay_sec(1);
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/* ordinary software start conversion */
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adc_ordinary_software_trigger_enable(ADC1, TRUE);
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/* wait conversion end */
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while(dma_flag_get(DMA1_FDT1_FLAG) == RESET);
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dma_flag_clear(DMA1_FDT1_FLAG);
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printf("vref_value = %f V\r\n", ((double)1.2 * 4095) / adc1_ordinary_value);
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}
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}
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/**
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* @}
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*/
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@@ -8,13 +8,14 @@
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this demo is based on the at-start board, in this demo, shows how to use
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the exint line trigger source trigger adc in partitioned mode.
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the convert data as follow:
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- adc1_ordinary_valuetab[n][0] ---> adc1_channel_4
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- adc1_ordinary_valuetab[n][1] ---> adc1_channel_5
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- adc1_ordinary_valuetab[n][2] ---> adc1_channel_6
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- adc1_preempt_valuetab[n][0] ---> adc1_channel_7
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- adc1_preempt_valuetab[n][1] ---> adc1_channel_8
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- adc1_preempt_valuetab[n][2] ---> adc1_channel_9
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- adc1_ordinary_valuetab[0] ---> adc1_channel_4
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- adc1_ordinary_valuetab[1] ---> adc1_channel_5
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- adc1_ordinary_valuetab[2] ---> adc1_channel_6
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- adc1_preempt_valuetab[0] ---> adc1_channel_7
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- adc1_preempt_valuetab[1] ---> adc1_channel_8
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- adc1_preempt_valuetab[2] ---> adc1_channel_9
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trigger source:
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- ordinary --> exint line11(pc11)
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- preempt --> exint line15(pa15)
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for more detailed information. please refer to the application note document AN0115.
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for more detailed information. please refer to the application note document AN0115.
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@@ -24,11 +24,6 @@
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/* includes ------------------------------------------------------------------*/
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#include "at32f415_int.h"
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#include "at32f415_board.h"
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extern __IO uint16_t adc1_preempt_valuetab[3][3];
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extern __IO uint16_t dma_trans_complete_flag;
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extern __IO uint16_t preempt_trigger_count;
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/** @addtogroup AT32F415_periph_examples
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* @{
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@@ -135,41 +130,6 @@ void SysTick_Handler(void)
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{
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}
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/**
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* @brief this function handles dma1_channel1 handler.
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* @param none
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* @retval none
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*/
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void DMA1_Channel1_IRQHandler(void)
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{
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if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
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{
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dma_flag_clear(DMA1_FDT1_FLAG);
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dma_trans_complete_flag = 1;
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}
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}
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/**
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* @brief this function handles adc1_2 handler.
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* @param none
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* @retval none
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*/
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void ADC1_IRQHandler(void)
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{
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if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
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{
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adc_flag_clear(ADC1, ADC_PCCE_FLAG);
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if(preempt_trigger_count < 3)
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{
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adc1_preempt_valuetab[preempt_trigger_count][0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
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adc1_preempt_valuetab[preempt_trigger_count][1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
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adc1_preempt_valuetab[preempt_trigger_count][2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
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preempt_trigger_count++;
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}
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}
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}
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/**
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* @}
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*/
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@@ -34,15 +34,12 @@
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*/
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__IO uint16_t adc1_ordinary_valuetab[3][3] = {0};
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__IO uint16_t adc1_preempt_valuetab[3][3] = {0};
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__IO uint16_t adc1_ordinary_valuetab[3] = {0};
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__IO uint16_t adc1_preempt_valuetab[3] = {0};
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__IO uint16_t dma_trans_complete_flag = 0;
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__IO uint16_t ordinary_conversion_times_index = 0;
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__IO uint16_t preempt_trigger_count = 0;
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static void gpio_config(void);
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static void exint_config(void);
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static void dma_config(void);
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static void adc_config(void);
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__IO uint16_t preempt_conversion_times_index = 0;
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/**
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* @brief gpio configuration.
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@@ -79,6 +76,9 @@ static void exint_config(void)
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crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
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crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
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gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOC, GPIO_PINS_SOURCE11);
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gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOA, GPIO_PINS_SOURCE15);
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gpio_default_para_init(&gpio_initstructure);
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gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
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gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
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@@ -91,9 +91,6 @@ static void exint_config(void)
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gpio_initstructure.gpio_pins = GPIO_PINS_15;
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gpio_init(GPIOA, &gpio_initstructure);
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gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOC, GPIO_PINS_SOURCE11);
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gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOA, GPIO_PINS_SOURCE15);
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exint_default_para_init(&exint_init_struct);
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exint_init_struct.line_enable = TRUE;
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exint_init_struct.line_mode = EXINT_LINE_EVENT;
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@@ -117,7 +114,7 @@ static void dma_config(void)
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nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
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dma_reset(DMA1_CHANNEL1);
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dma_default_para_init(&dma_init_struct);
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dma_init_struct.buffer_size = 9;
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dma_init_struct.buffer_size = 3;
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dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
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dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
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dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
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@@ -126,11 +123,10 @@ static void dma_config(void)
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dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
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dma_init_struct.peripheral_inc_enable = FALSE;
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dma_init_struct.priority = DMA_PRIORITY_HIGH;
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dma_init_struct.loop_mode_enable = FALSE;
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dma_init_struct.loop_mode_enable = TRUE;
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dma_init(DMA1_CHANNEL1, &dma_init_struct);
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dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
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dma_channel_enable(DMA1_CHANNEL1, TRUE);
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}
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/**
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@@ -142,10 +138,12 @@ static void adc_config(void)
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{
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adc_base_config_type adc_base_struct;
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crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
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adc_reset(ADC1);
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crm_adc_clock_div_set(CRM_ADC_DIV_6);
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nvic_irq_enable(ADC1_IRQn, 0, 0);
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adc_base_default_para_init(&adc_base_struct);
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/* ADC1 config */
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adc_base_struct.sequence_mode = TRUE;
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adc_base_struct.repeat_mode = FALSE;
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adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
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@@ -167,12 +165,45 @@ static void adc_config(void)
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adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE);
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adc_enable(ADC1, TRUE);
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/* ADC calibration */
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adc_calibration_init(ADC1);
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while(adc_calibration_init_status_get(ADC1));
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adc_calibration_start(ADC1);
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while(adc_calibration_status_get(ADC1));
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}
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/**
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* @brief this function handles dma1_channel1 handler.
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* @param none
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* @retval none
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*/
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void DMA1_Channel1_IRQHandler(void)
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{
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if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
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{
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dma_flag_clear(DMA1_FDT1_FLAG);
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dma_trans_complete_flag++;
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}
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}
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/**
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* @brief this function handles adc1 handler.
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* @param none
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* @retval none
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*/
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void ADC1_IRQHandler(void)
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{
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if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
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{
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adc_flag_clear(ADC1, ADC_PCCE_FLAG);
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adc1_preempt_valuetab[0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
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adc1_preempt_valuetab[1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
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adc1_preempt_valuetab[2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
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preempt_trigger_count++;
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}
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}
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/**
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* @brief main function.
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* @param none
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@@ -180,7 +211,6 @@ static void adc_config(void)
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*/
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int main(void)
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{
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__IO uint32_t index = 0;
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nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
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system_clock_config();
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at32_board_init();
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@@ -192,22 +222,36 @@ int main(void)
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exint_config();
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dma_config();
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adc_config();
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/* enable DMA after ADC activation */
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dma_channel_enable(DMA1_CHANNEL1, TRUE);
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printf("exint_trigger_partitioned \r\n");
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while(dma_trans_complete_flag == 0);
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while(preempt_trigger_count != 3);
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for(index = 0; index < 3; index++)
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{
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printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][0]);
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printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][1]);
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printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][2]);
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printf("adc1_preempt_valuetab[%d][0] = 0x%x\r\n",index, adc1_preempt_valuetab[index][0]);
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printf("adc1_preempt_valuetab[%d][1] = 0x%x\r\n",index, adc1_preempt_valuetab[index][1]);
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printf("adc1_preempt_valuetab[%d][2] = 0x%x\r\n",index, adc1_preempt_valuetab[index][2]);
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printf("\r\n");
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}
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at32_led_on(LED2);
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while(1)
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{
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/* wait ordinary conversion end */
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if(ordinary_conversion_times_index != dma_trans_complete_flag)
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{
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ordinary_conversion_times_index = dma_trans_complete_flag;
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printf("ordinary_conversion_times_index = %d\r\n",ordinary_conversion_times_index);
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printf("adc1_ordinary_valuetab[0] = 0x%x\r\n", adc1_ordinary_valuetab[0]);
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printf("adc1_ordinary_valuetab[1] = 0x%x\r\n", adc1_ordinary_valuetab[1]);
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printf("adc1_ordinary_valuetab[2] = 0x%x\r\n", adc1_ordinary_valuetab[2]);
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printf("\r\n");
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at32_led_toggle(LED2);
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}
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/* wait preempt conversion end */
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if(preempt_conversion_times_index != preempt_trigger_count)
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{
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preempt_conversion_times_index = preempt_trigger_count;
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printf("preempt_conversion_times_index = %d\r\n",preempt_conversion_times_index);
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printf("adc1_preempt_valuetab[0] = 0x%x\r\n", adc1_preempt_valuetab[0]);
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printf("adc1_preempt_valuetab[1] = 0x%x\r\n", adc1_preempt_valuetab[1]);
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printf("adc1_preempt_valuetab[2] = 0x%x\r\n", adc1_preempt_valuetab[2]);
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printf("\r\n");
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at32_led_toggle(LED3);
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}
|
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}
|
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}
|
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@@ -40,9 +40,6 @@
|
||||
|
||||
__IO uint16_t adc1_ordinary_value = 0;
|
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|
||||
static void dma_config(void);
|
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static void adc_config(void);
|
||||
|
||||
/**
|
||||
* @brief dma configuration.
|
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* @param none
|
||||
@@ -65,8 +62,6 @@ static void dma_config(void)
|
||||
dma_init_struct.priority = DMA_PRIORITY_HIGH;
|
||||
dma_init_struct.loop_mode_enable = TRUE;
|
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dma_init(DMA1_CHANNEL1, &dma_init_struct);
|
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|
||||
dma_channel_enable(DMA1_CHANNEL1, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -78,11 +73,13 @@ static void adc_config(void)
|
||||
{
|
||||
adc_base_config_type adc_base_struct;
|
||||
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
|
||||
adc_reset(ADC1);
|
||||
crm_adc_clock_div_set(CRM_ADC_DIV_6);
|
||||
|
||||
adc_base_default_para_init(&adc_base_struct);
|
||||
|
||||
/* ADC1 config */
|
||||
adc_base_struct.sequence_mode = FALSE;
|
||||
adc_base_struct.repeat_mode = TRUE;
|
||||
adc_base_struct.repeat_mode = FALSE;
|
||||
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
|
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adc_base_struct.ordinary_channel_length = 1;
|
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adc_base_config(ADC1, &adc_base_struct);
|
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@@ -92,6 +89,8 @@ static void adc_config(void)
|
||||
adc_tempersensor_vintrv_enable(TRUE);
|
||||
|
||||
adc_enable(ADC1, TRUE);
|
||||
|
||||
/* ADC calibration */
|
||||
adc_calibration_init(ADC1);
|
||||
while(adc_calibration_init_status_get(ADC1));
|
||||
adc_calibration_start(ADC1);
|
||||
@@ -105,7 +104,6 @@ static void adc_config(void)
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
__IO uint32_t index = 0;
|
||||
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
@@ -115,19 +113,27 @@ int main(void)
|
||||
uart_print_init(115200);
|
||||
dma_config();
|
||||
adc_config();
|
||||
|
||||
/* enable DMA after ADC activation */
|
||||
dma_channel_enable(DMA1_CHANNEL1, TRUE);
|
||||
|
||||
printf("internal_temperature_sensor \r\n");
|
||||
adc_ordinary_software_trigger_enable(ADC1, TRUE);
|
||||
while(1)
|
||||
{
|
||||
/* ordinary software start conversion */
|
||||
adc_ordinary_software_trigger_enable(ADC1, TRUE);
|
||||
|
||||
/* wait conversion end */
|
||||
while(dma_flag_get(DMA1_FDT1_FLAG) == RESET)
|
||||
{
|
||||
}
|
||||
dma_flag_clear(DMA1_FDT1_FLAG);
|
||||
printf("internal_temperature = %f deg C\r\n",(ADC_TEMP_BASE - (double)adc1_ordinary_value * ADC_VREF / 4095) / ADC_TEMP_SLOPE + 25);
|
||||
at32_led_on(LED2);
|
||||
delay_sec(1);
|
||||
while(dma_flag_get(DMA1_FDT1_FLAG) == RESET);
|
||||
dma_flag_clear(DMA1_FDT1_FLAG);
|
||||
printf("internal_temperature = %f deg C\r\n",(ADC_TEMP_BASE - (double)adc1_ordinary_value * ADC_VREF / 4096) / ADC_TEMP_SLOPE + 25);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
@@ -24,9 +24,6 @@
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_int.h"
|
||||
#include "at32f415_board.h"
|
||||
|
||||
extern __IO uint16_t dma_trans_complete_flag;
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
@@ -133,21 +130,6 @@ void SysTick_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles dma1_channel1 handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void DMA1_Channel1_IRQHandler(void)
|
||||
{
|
||||
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
|
||||
{
|
||||
dma_flag_clear(DMA1_FDT1_FLAG);
|
||||
dma_trans_complete_flag++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
@@ -36,10 +36,6 @@
|
||||
__IO uint16_t adc1_ordinary_valuetab[3] = {0};
|
||||
__IO uint16_t dma_trans_complete_flag = 0;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void dma_config(void);
|
||||
static void adc_config(void);
|
||||
|
||||
/**
|
||||
* @brief gpio configuration.
|
||||
* @param none
|
||||
@@ -81,7 +77,6 @@ static void dma_config(void)
|
||||
dma_init(DMA1_CHANNEL1, &dma_init_struct);
|
||||
|
||||
dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
|
||||
dma_channel_enable(DMA1_CHANNEL1, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -93,9 +88,11 @@ static void adc_config(void)
|
||||
{
|
||||
adc_base_config_type adc_base_struct;
|
||||
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
|
||||
adc_reset(ADC1);
|
||||
crm_adc_clock_div_set(CRM_ADC_DIV_6);
|
||||
|
||||
adc_base_default_para_init(&adc_base_struct);
|
||||
|
||||
/* ADC1 config */
|
||||
adc_base_struct.sequence_mode = TRUE;
|
||||
adc_base_struct.repeat_mode = TRUE;
|
||||
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
|
||||
@@ -108,12 +105,28 @@ static void adc_config(void)
|
||||
adc_dma_mode_enable(ADC1, TRUE);
|
||||
|
||||
adc_enable(ADC1, TRUE);
|
||||
|
||||
/* ADC calibration */
|
||||
adc_calibration_init(ADC1);
|
||||
while(adc_calibration_init_status_get(ADC1));
|
||||
adc_calibration_start(ADC1);
|
||||
while(adc_calibration_status_get(ADC1));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles dma1_channel1 handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void DMA1_Channel1_IRQHandler(void)
|
||||
{
|
||||
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
|
||||
{
|
||||
dma_flag_clear(DMA1_FDT1_FLAG);
|
||||
dma_trans_complete_flag++;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief main function.
|
||||
* @param none
|
||||
@@ -121,7 +134,6 @@ static void adc_config(void)
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
__IO uint32_t index = 0;
|
||||
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
@@ -132,8 +144,14 @@ int main(void)
|
||||
gpio_config();
|
||||
dma_config();
|
||||
adc_config();
|
||||
|
||||
/* enable DMA after ADC activation */
|
||||
dma_channel_enable(DMA1_CHANNEL1, TRUE);
|
||||
|
||||
printf("repeat_conversion_loop_transfer \r\n");
|
||||
printf("please_debug_check_data_and_conversion_times \r\n");
|
||||
|
||||
/* ordinary software start conversion */
|
||||
adc_ordinary_software_trigger_enable(ADC1, TRUE);
|
||||
at32_led_on(LED2);
|
||||
while(1)
|
||||
|
||||
@@ -1,14 +0,0 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file readme.txt
|
||||
* @brief readme
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
this demo is based on the at-start board, in this demo, shows how to use
|
||||
the software trigger source trigger adc.
|
||||
the convert data as follow:
|
||||
- adc1_ordinary_valuetab[0] ---> adc1_channel_4
|
||||
- adc1_ordinary_valuetab[1] ---> adc1_channel_5
|
||||
- adc1_ordinary_valuetab[2] ---> adc1_channel_6
|
||||
for more detailed information. please refer to the application note document AN0115.
|
||||
@@ -1,150 +0,0 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file main.c
|
||||
* @brief main program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
#include "at32f415_board.h"
|
||||
#include "at32f415_clock.h"
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup 415_ADC_software_trigger_repeat ADC_software_trigger_repeat
|
||||
* @{
|
||||
*/
|
||||
|
||||
__IO uint16_t adc1_ordinary_valuetab[3] = {0};
|
||||
__IO uint16_t dma_trans_complete_flag = 0;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void dma_config(void);
|
||||
static void adc_config(void);
|
||||
|
||||
/**
|
||||
* @brief gpio configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void gpio_config(void)
|
||||
{
|
||||
gpio_init_type gpio_initstructure;
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
|
||||
gpio_default_para_init(&gpio_initstructure);
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief dma configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void dma_config(void)
|
||||
{
|
||||
dma_init_type dma_init_struct;
|
||||
crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
|
||||
nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
|
||||
dma_reset(DMA1_CHANNEL1);
|
||||
dma_default_para_init(&dma_init_struct);
|
||||
dma_init_struct.buffer_size = 3;
|
||||
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
|
||||
dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
|
||||
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
|
||||
dma_init_struct.memory_inc_enable = TRUE;
|
||||
dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
|
||||
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
|
||||
dma_init_struct.peripheral_inc_enable = FALSE;
|
||||
dma_init_struct.priority = DMA_PRIORITY_HIGH;
|
||||
dma_init_struct.loop_mode_enable = TRUE;
|
||||
dma_init(DMA1_CHANNEL1, &dma_init_struct);
|
||||
|
||||
dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
|
||||
dma_channel_enable(DMA1_CHANNEL1, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief adc configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void adc_config(void)
|
||||
{
|
||||
adc_base_config_type adc_base_struct;
|
||||
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
|
||||
crm_adc_clock_div_set(CRM_ADC_DIV_6);
|
||||
|
||||
adc_base_default_para_init(&adc_base_struct);
|
||||
adc_base_struct.sequence_mode = TRUE;
|
||||
adc_base_struct.repeat_mode = TRUE;
|
||||
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
|
||||
adc_base_struct.ordinary_channel_length = 3;
|
||||
adc_base_config(ADC1, &adc_base_struct);
|
||||
adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_239_5);
|
||||
adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_239_5);
|
||||
adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_239_5);
|
||||
adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
|
||||
adc_dma_mode_enable(ADC1, TRUE);
|
||||
|
||||
adc_enable(ADC1, TRUE);
|
||||
adc_calibration_init(ADC1);
|
||||
while(adc_calibration_init_status_get(ADC1));
|
||||
adc_calibration_start(ADC1);
|
||||
while(adc_calibration_status_get(ADC1));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief main function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
__IO uint32_t index = 0;
|
||||
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_off(LED2);
|
||||
at32_led_off(LED3);
|
||||
at32_led_off(LED4);
|
||||
uart_print_init(115200);
|
||||
gpio_config();
|
||||
dma_config();
|
||||
adc_config();
|
||||
printf("software_trigger_repeat \r\n");
|
||||
printf("please_debug_check_data_and_conversion_times \r\n");
|
||||
adc_ordinary_software_trigger_enable(ADC1, TRUE);
|
||||
at32_led_on(LED2);
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -9,10 +9,11 @@
|
||||
the preempt group automatic conversion(whitch ordinary trigger source is
|
||||
tmr).
|
||||
the convert data as follow:
|
||||
- adc1_ordinary_valuetab[n][0] ---> adc1_channel_4
|
||||
- adc1_ordinary_valuetab[n][1] ---> adc1_channel_5
|
||||
- adc1_ordinary_valuetab[n][2] ---> adc1_channel_6
|
||||
- adc1_preempt_valuetab[n][0] ---> adc1_channel_7
|
||||
- adc1_preempt_valuetab[n][1] ---> adc1_channel_8
|
||||
- adc1_preempt_valuetab[n][2] ---> adc1_channel_9
|
||||
for more detailed information. please refer to the application note document AN0115.
|
||||
- adc1_ordinary_valuetab[0] ---> adc1_channel_4
|
||||
- adc1_ordinary_valuetab[1] ---> adc1_channel_5
|
||||
- adc1_ordinary_valuetab[2] ---> adc1_channel_6
|
||||
- adc1_preempt_valuetab[0] ---> adc1_channel_7
|
||||
- adc1_preempt_valuetab[1] ---> adc1_channel_8
|
||||
- adc1_preempt_valuetab[2] ---> adc1_channel_9
|
||||
for more detailed information. please refer to the application note document AN0115.
|
||||
|
||||
|
||||
@@ -24,12 +24,6 @@
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_int.h"
|
||||
#include "at32f415_board.h"
|
||||
|
||||
extern __IO uint16_t adc1_ordinary_valuetab[5][3];
|
||||
extern __IO uint16_t adc1_preempt_valuetab[5][3];
|
||||
extern __IO uint16_t dma_trans_complete_flag;
|
||||
extern __IO uint16_t preempt_conversion_count;
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
@@ -136,43 +130,6 @@ void SysTick_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles dma1_channel1 handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void DMA1_Channel1_IRQHandler(void)
|
||||
{
|
||||
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
|
||||
{
|
||||
dma_flag_clear(DMA1_FDT1_FLAG);
|
||||
dma_trans_complete_flag = 1;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles adc1_2 handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void ADC1_IRQHandler(void)
|
||||
{
|
||||
if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
|
||||
{
|
||||
adc_flag_clear(ADC1, ADC_PCCE_FLAG);
|
||||
if(preempt_conversion_count < 5)
|
||||
{
|
||||
adc1_preempt_valuetab[preempt_conversion_count][0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
|
||||
adc1_preempt_valuetab[preempt_conversion_count][1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
|
||||
adc1_preempt_valuetab[preempt_conversion_count][2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
|
||||
preempt_conversion_count++;
|
||||
}
|
||||
at32_led_toggle(LED3);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
@@ -33,16 +33,12 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
__IO uint16_t adc1_ordinary_valuetab[5][3] = {0};
|
||||
__IO uint16_t adc1_preempt_valuetab[5][3] = {0};
|
||||
__IO uint16_t adc1_ordinary_valuetab[3] = {0};
|
||||
__IO uint16_t adc1_preempt_valuetab[3] = {0};
|
||||
__IO uint16_t dma_trans_complete_flag = 0;
|
||||
__IO uint16_t ordinary_conversion_times_index = 0;
|
||||
__IO uint16_t preempt_conversion_count = 0;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void dma_config(void);
|
||||
static void tmr1_config(void);
|
||||
static void adc_config(void);
|
||||
__IO uint16_t preempt_conversion_times_index = 0;
|
||||
|
||||
/**
|
||||
* @brief gpio configuration.
|
||||
@@ -77,7 +73,7 @@ static void dma_config(void)
|
||||
nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
|
||||
dma_reset(DMA1_CHANNEL1);
|
||||
dma_default_para_init(&dma_init_struct);
|
||||
dma_init_struct.buffer_size = 15;
|
||||
dma_init_struct.buffer_size = 3;
|
||||
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
|
||||
dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
|
||||
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
|
||||
@@ -86,11 +82,10 @@ static void dma_config(void)
|
||||
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
|
||||
dma_init_struct.peripheral_inc_enable = FALSE;
|
||||
dma_init_struct.priority = DMA_PRIORITY_HIGH;
|
||||
dma_init_struct.loop_mode_enable = FALSE;
|
||||
dma_init_struct.loop_mode_enable = TRUE;
|
||||
dma_init(DMA1_CHANNEL1, &dma_init_struct);
|
||||
|
||||
dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
|
||||
dma_channel_enable(DMA1_CHANNEL1, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -118,8 +113,8 @@ static void tmr1_config(void)
|
||||
|
||||
crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* (systemclock/(systemclock/10000))/1000 = 10Hz(100ms) */
|
||||
tmr_base_init(TMR1, 999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
|
||||
/* (systemclock/(systemclock/10000))/10000 = 1Hz(1s) */
|
||||
tmr_base_init(TMR1, 9999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
|
||||
tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
|
||||
tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
|
||||
|
||||
@@ -129,7 +124,7 @@ static void tmr1_config(void)
|
||||
tmr_oc_init_structure.oc_output_state = TRUE;
|
||||
tmr_oc_init_structure.oc_idle_state = FALSE;
|
||||
tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
|
||||
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 500);
|
||||
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 5000);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -141,10 +136,12 @@ static void adc_config(void)
|
||||
{
|
||||
adc_base_config_type adc_base_struct;
|
||||
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
|
||||
crm_adc_clock_div_set(CRM_ADC_DIV_6);
|
||||
adc_reset(ADC1);
|
||||
nvic_irq_enable(ADC1_IRQn, 0, 0);
|
||||
|
||||
crm_adc_clock_div_set(CRM_ADC_DIV_6);
|
||||
adc_base_default_para_init(&adc_base_struct);
|
||||
|
||||
/* ADC1 config */
|
||||
adc_base_struct.sequence_mode = TRUE;
|
||||
adc_base_struct.repeat_mode = FALSE;
|
||||
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
|
||||
@@ -165,14 +162,45 @@ static void adc_config(void)
|
||||
adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE);
|
||||
|
||||
adc_enable(ADC1, TRUE);
|
||||
|
||||
/* ADC calibration */
|
||||
adc_calibration_init(ADC1);
|
||||
while(adc_calibration_init_status_get(ADC1));
|
||||
adc_calibration_start(ADC1);
|
||||
while(adc_calibration_status_get(ADC1));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles dma1_channel1 handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void DMA1_Channel1_IRQHandler(void)
|
||||
{
|
||||
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
|
||||
{
|
||||
dma_flag_clear(DMA1_FDT1_FLAG);
|
||||
dma_trans_complete_flag++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief this function handles adc1 handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void ADC1_IRQHandler(void)
|
||||
{
|
||||
if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
|
||||
{
|
||||
adc_flag_clear(ADC1, ADC_PCCE_FLAG);
|
||||
adc1_preempt_valuetab[0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
|
||||
adc1_preempt_valuetab[1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
|
||||
adc1_preempt_valuetab[2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
|
||||
preempt_conversion_count++;
|
||||
at32_led_toggle(LED3);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief main function.
|
||||
@@ -181,7 +209,6 @@ static void adc_config(void)
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
__IO uint32_t index = 0;
|
||||
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
@@ -193,30 +220,42 @@ int main(void)
|
||||
tmr1_config();
|
||||
dma_config();
|
||||
adc_config();
|
||||
|
||||
/* enable DMA after ADC activation */
|
||||
dma_channel_enable(DMA1_CHANNEL1, TRUE);
|
||||
|
||||
printf("tmr_trigger_automatic_preempted \r\n");
|
||||
tmr_counter_enable(TMR1, TRUE);
|
||||
tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1, TRUE);
|
||||
tmr_output_enable(TMR1, TRUE);
|
||||
while(preempt_conversion_count < 5);
|
||||
while(dma_trans_complete_flag == 0);
|
||||
tmr_counter_enable(TMR1, FALSE);
|
||||
for(index = 0; index < 5; index++)
|
||||
{
|
||||
printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][0]);
|
||||
printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][1]);
|
||||
printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][2]);
|
||||
printf("adc1_preempted_valuetab[%d][0] = 0x%x\r\n", index, adc1_preempt_valuetab[index][0]);
|
||||
printf("adc1_preempted_valuetab[%d][1] = 0x%x\r\n", index, adc1_preempt_valuetab[index][1]);
|
||||
printf("adc1_preempted_valuetab[%d][2] = 0x%x\r\n", index, adc1_preempt_valuetab[index][2]);
|
||||
printf("\r\n");
|
||||
}
|
||||
at32_led_on(LED2);
|
||||
while(1)
|
||||
{
|
||||
/* wait ordinary conversion end */
|
||||
if(ordinary_conversion_times_index != dma_trans_complete_flag)
|
||||
{
|
||||
ordinary_conversion_times_index = dma_trans_complete_flag;
|
||||
printf("ordinary_conversion_times_index = %d\r\n",ordinary_conversion_times_index);
|
||||
printf("adc1_ordinary_valuetab[0] = 0x%x\r\n", adc1_ordinary_valuetab[0]);
|
||||
printf("adc1_ordinary_valuetab[1] = 0x%x\r\n", adc1_ordinary_valuetab[1]);
|
||||
printf("adc1_ordinary_valuetab[2] = 0x%x\r\n", adc1_ordinary_valuetab[2]);
|
||||
printf("\r\n");
|
||||
at32_led_toggle(LED2);
|
||||
}
|
||||
|
||||
/* wait preempt conversion end */
|
||||
if(preempt_conversion_times_index != preempt_conversion_count)
|
||||
{
|
||||
preempt_conversion_times_index = preempt_conversion_count;
|
||||
printf("preempt_conversion_times_index = %d\r\n",preempt_conversion_times_index);
|
||||
printf("adc1_preempt_valuetab[0] = 0x%x\r\n", adc1_preempt_valuetab[0]);
|
||||
printf("adc1_preempt_valuetab[1] = 0x%x\r\n", adc1_preempt_valuetab[1]);
|
||||
printf("adc1_preempt_valuetab[2] = 0x%x\r\n", adc1_preempt_valuetab[2]);
|
||||
printf("\r\n");
|
||||
at32_led_toggle(LED3);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
@@ -24,10 +24,6 @@
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_int.h"
|
||||
#include "at32f415_board.h"
|
||||
|
||||
extern __IO uint16_t adc1_ordinary_valuetab[3];
|
||||
extern __IO uint16_t vmor_flag_index;
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
@@ -135,21 +131,6 @@ void SysTick_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles adc1_2 handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void ADC1_IRQHandler(void)
|
||||
{
|
||||
if(adc_interrupt_flag_get(ADC1, ADC_VMOR_FLAG) != RESET)
|
||||
{
|
||||
at32_led_toggle(LED3);
|
||||
adc_flag_clear(ADC1, ADC_VMOR_FLAG);
|
||||
vmor_flag_index = 1;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
@@ -35,10 +35,7 @@
|
||||
|
||||
__IO uint16_t adc1_ordinary_valuetab[3] = {0};
|
||||
__IO uint16_t vmor_flag_index = 0;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void dma_config(void);
|
||||
static void adc_config(void);
|
||||
__IO uint16_t error_times_index = 0;
|
||||
|
||||
/**
|
||||
* @brief gpio configuration.
|
||||
@@ -78,8 +75,6 @@ static void dma_config(void)
|
||||
dma_init_struct.priority = DMA_PRIORITY_HIGH;
|
||||
dma_init_struct.loop_mode_enable = TRUE;
|
||||
dma_init(DMA1_CHANNEL1, &dma_init_struct);
|
||||
|
||||
dma_channel_enable(DMA1_CHANNEL1, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -91,10 +86,12 @@ static void adc_config(void)
|
||||
{
|
||||
adc_base_config_type adc_base_struct;
|
||||
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
|
||||
crm_adc_clock_div_set(CRM_ADC_DIV_6);
|
||||
adc_reset(ADC1);
|
||||
nvic_irq_enable(ADC1_IRQn, 0, 0);
|
||||
|
||||
crm_adc_clock_div_set(CRM_ADC_DIV_6);
|
||||
adc_base_default_para_init(&adc_base_struct);
|
||||
|
||||
/* ADC1 config */
|
||||
adc_base_struct.sequence_mode = TRUE;
|
||||
adc_base_struct.repeat_mode = FALSE;
|
||||
adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
|
||||
@@ -111,12 +108,29 @@ static void adc_config(void)
|
||||
adc_interrupt_enable(ADC1, ADC_VMOR_INT, TRUE);
|
||||
|
||||
adc_enable(ADC1, TRUE);
|
||||
|
||||
/* ADC calibration */
|
||||
adc_calibration_init(ADC1);
|
||||
while(adc_calibration_init_status_get(ADC1));
|
||||
adc_calibration_start(ADC1);
|
||||
while(adc_calibration_status_get(ADC1));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles adc1 handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void ADC1_IRQHandler(void)
|
||||
{
|
||||
if(adc_interrupt_flag_get(ADC1, ADC_VMOR_FLAG) != RESET)
|
||||
{
|
||||
at32_led_toggle(LED3);
|
||||
adc_flag_clear(ADC1, ADC_VMOR_FLAG);
|
||||
vmor_flag_index++;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief main function.
|
||||
* @param none
|
||||
@@ -124,7 +138,6 @@ static void adc_config(void)
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
__IO uint32_t index = 0;
|
||||
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
@@ -135,14 +148,19 @@ int main(void)
|
||||
gpio_config();
|
||||
dma_config();
|
||||
adc_config();
|
||||
|
||||
/* enable DMA after ADC activation */
|
||||
dma_channel_enable(DMA1_CHANNEL1, TRUE);
|
||||
|
||||
printf("voltage_monitoring \r\n");
|
||||
while(1)
|
||||
{
|
||||
at32_led_toggle(LED2);
|
||||
delay_sec(1);
|
||||
if(vmor_flag_index == 1)
|
||||
if(error_times_index != vmor_flag_index)
|
||||
{
|
||||
vmor_flag_index = 0;
|
||||
error_times_index = vmor_flag_index;
|
||||
printf("error_times_index = %d\r\n",error_times_index);
|
||||
printf("out of range:adc1_channel_5 value is = %x!\r\n", adc1_ordinary_valuetab[1]);
|
||||
}
|
||||
adc_ordinary_software_trigger_enable(ADC1, TRUE);
|
||||
|
||||
@@ -48,7 +48,7 @@ void systick_handler(void)
|
||||
ticks ++;
|
||||
|
||||
/* toggle led */
|
||||
if(ticks > DELAY)
|
||||
if(ticks >= DELAY)
|
||||
{
|
||||
at32_led_toggle(LED2);
|
||||
ticks = 0;
|
||||
|
||||
@@ -8,10 +8,11 @@
|
||||
this demo is based on the at-start board, in this demo, shows in halfduplex
|
||||
mode how to use dma transfer data.
|
||||
the pins connection as follow:
|
||||
- pb0 as mck out
|
||||
- pb6 as mck out
|
||||
- i2s2 slaver i2s1 master
|
||||
- pb12 <---> pa4(ws)
|
||||
- pb13 <---> pa5(ck)
|
||||
- pb15 <---> pa7(sd)
|
||||
- pb12 <---> pa15(ws)
|
||||
- pb13 <---> pb3(ck)
|
||||
- pb15 <---> pb5(sd)
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
@@ -44,10 +44,6 @@ uint16_t i2s1_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C,
|
||||
uint16_t i2s2_buffer_rx[32];
|
||||
volatile error_status transfer_status = ERROR;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void i2s_config(void);
|
||||
error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
|
||||
|
||||
/**
|
||||
* @brief buffer_compare function.
|
||||
* @param none
|
||||
@@ -69,17 +65,17 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief i2s configuration.
|
||||
* @brief dma configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void i2s_config(void)
|
||||
static void dma_config(void)
|
||||
{
|
||||
dma_init_type dma_init_struct;
|
||||
i2s_init_type i2s_init_struct;
|
||||
|
||||
crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
|
||||
dma_reset(DMA1_CHANNEL4);
|
||||
|
||||
/* use dma1_channel3 as spi1 transmit channel */
|
||||
dma_reset(DMA1_CHANNEL3);
|
||||
dma_default_para_init(&dma_init_struct);
|
||||
dma_init_struct.buffer_size = 32;
|
||||
@@ -93,15 +89,36 @@ static void i2s_config(void)
|
||||
dma_init_struct.priority = DMA_PRIORITY_HIGH;
|
||||
dma_init_struct.loop_mode_enable = FALSE;
|
||||
dma_init(DMA1_CHANNEL3, &dma_init_struct);
|
||||
|
||||
|
||||
/* use dma1_channel4 as spi2 receive channel */
|
||||
dma_reset(DMA1_CHANNEL4);
|
||||
dma_init_struct.buffer_size = 32;
|
||||
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
|
||||
dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx;
|
||||
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
|
||||
dma_init_struct.memory_inc_enable = TRUE;
|
||||
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
|
||||
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
|
||||
dma_init_struct.peripheral_inc_enable = FALSE;
|
||||
dma_init_struct.priority = DMA_PRIORITY_HIGH;
|
||||
dma_init_struct.loop_mode_enable = FALSE;
|
||||
dma_init(DMA1_CHANNEL4, &dma_init_struct);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief i2s configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void i2s_config(void)
|
||||
{
|
||||
i2s_init_type i2s_init_struct;
|
||||
|
||||
/* master i2s initialization */
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
i2s_default_para_init(&i2s_init_struct);
|
||||
|
||||
/* master transmission mode */
|
||||
i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
|
||||
i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT;
|
||||
i2s_init_struct.mclk_output_enable = TRUE;
|
||||
@@ -109,14 +126,27 @@ static void i2s_config(void)
|
||||
i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
|
||||
i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX;
|
||||
i2s_init(SPI1, &i2s_init_struct);
|
||||
|
||||
i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX;
|
||||
|
||||
/* use dma transmit */
|
||||
spi_i2s_dma_transmitter_enable(SPI1, TRUE);
|
||||
|
||||
i2s_enable(SPI1, TRUE);
|
||||
|
||||
/* slave i2s initialization */
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* slave reception mode */
|
||||
i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
|
||||
i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT;
|
||||
i2s_init_struct.mclk_output_enable = TRUE;
|
||||
i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K;
|
||||
i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
|
||||
i2s_init_struct.operation_mode = I2S_MODE_SLAVE_RX;
|
||||
i2s_init(SPI2, &i2s_init_struct);
|
||||
|
||||
dma_channel_enable(DMA1_CHANNEL3, TRUE);
|
||||
dma_channel_enable(DMA1_CHANNEL4, TRUE);
|
||||
/* use dma receive */
|
||||
spi_i2s_dma_receiver_enable(SPI2, TRUE);
|
||||
i2s_enable(SPI1, TRUE);
|
||||
|
||||
i2s_enable(SPI2, TRUE);
|
||||
}
|
||||
|
||||
@@ -130,49 +160,54 @@ static void gpio_config(void)
|
||||
gpio_init_type gpio_initstructure;
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);
|
||||
gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE);
|
||||
gpio_pin_remap_config(SPI1_MUX_01, TRUE);
|
||||
|
||||
/* master ws pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
/* master i2s ws pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master mck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_0;
|
||||
/* master i2s ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_3;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ws pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
/* master i2s sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
/* master i2s mck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_6;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
/* slave i2s ws pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave i2s ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave i2s sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
}
|
||||
|
||||
@@ -185,14 +220,25 @@ int main(void)
|
||||
{
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_off(LED2);
|
||||
at32_led_off(LED3);
|
||||
at32_led_off(LED4);
|
||||
at32_led_on(LED4);
|
||||
gpio_config();
|
||||
dma_config();
|
||||
i2s_config();
|
||||
spi_i2s_dma_transmitter_enable(SPI1, TRUE);
|
||||
|
||||
/* enable i2s slave dma to get data */
|
||||
dma_channel_enable(DMA1_CHANNEL4, TRUE);
|
||||
|
||||
/* enable i2s master dma to fill data */
|
||||
dma_channel_enable(DMA1_CHANNEL3, TRUE);
|
||||
|
||||
while(dma_flag_get(DMA1_FDT4_FLAG) == RESET);
|
||||
/* wait slave i2s data receive end */
|
||||
while(dma_flag_get(DMA1_FDT4_FLAG) == RESET)
|
||||
{
|
||||
}
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32);
|
||||
@@ -204,7 +250,7 @@ int main(void)
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
at32_led_on(LED3);
|
||||
}
|
||||
while(1)
|
||||
{
|
||||
|
||||
@@ -8,10 +8,11 @@
|
||||
this demo is based on the at-start board, in this demo, shows in halfduplex
|
||||
mode how to use interrupt transfer data.
|
||||
the pins connection as follow:
|
||||
- pb0 as mck out
|
||||
- pb6 as mck out
|
||||
- i2s2 slaver i2s1 master
|
||||
- pb12 <---> pa4(ws)
|
||||
- pb13 <---> pa5(ck)
|
||||
- pb15 <---> pa7(sd)
|
||||
- pb12 <---> pa15(ws)
|
||||
- pb13 <---> pb3(ck)
|
||||
- pb15 <---> pb5(sd)
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
@@ -24,11 +24,6 @@
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_int.h"
|
||||
#include "at32f415_board.h"
|
||||
|
||||
extern uint16_t i2s1_buffer_tx[];
|
||||
extern uint16_t i2s2_buffer_rx[];
|
||||
extern __IO uint32_t tx_index, rx_index;
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
@@ -135,37 +130,6 @@ void SysTick_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief This function handles the spi2 interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SPI2_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET)
|
||||
{
|
||||
i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles the spi1 interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SPI1_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET)
|
||||
{
|
||||
spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]);
|
||||
if(tx_index == 32)
|
||||
{
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
@@ -44,11 +44,6 @@ uint16_t i2s2_buffer_rx[32];
|
||||
__IO uint32_t tx_index = 0, rx_index = 0;
|
||||
volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq);
|
||||
error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
|
||||
error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
|
||||
|
||||
/**
|
||||
* @brief buffer_compare function.
|
||||
* @param none
|
||||
@@ -100,15 +95,14 @@ error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint1
|
||||
static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq)
|
||||
{
|
||||
i2s_init_type i2s_init_struct;
|
||||
|
||||
|
||||
/* master i2s initialization */
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
nvic_irq_enable(SPI1_IRQn, 0, 0);
|
||||
nvic_irq_enable(SPI2_IRQn, 0, 0);
|
||||
spi_i2s_reset(SPI2);
|
||||
spi_i2s_reset(SPI1);
|
||||
i2s_default_para_init(&i2s_init_struct);
|
||||
|
||||
/* master transmission mode */
|
||||
i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
|
||||
i2s_init_struct.data_channel_format = format;
|
||||
i2s_init_struct.mclk_output_enable = TRUE;
|
||||
@@ -116,14 +110,26 @@ static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_f
|
||||
i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
|
||||
i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX;
|
||||
i2s_init(SPI1, &i2s_init_struct);
|
||||
|
||||
|
||||
/* enable transmit data buffer empty interrupt */
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE);
|
||||
|
||||
/* slave i2s initialization */
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
nvic_irq_enable(SPI2_IRQn, 0, 0);
|
||||
spi_i2s_reset(SPI2);
|
||||
|
||||
/* slave reception mode */
|
||||
i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
|
||||
i2s_init_struct.data_channel_format = format;
|
||||
i2s_init_struct.mclk_output_enable = TRUE;
|
||||
i2s_init_struct.audio_sampling_freq = freq;
|
||||
i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
|
||||
i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX;
|
||||
i2s_init(SPI2, &i2s_init_struct);
|
||||
|
||||
|
||||
/* enable receive data buffer full interrupt */
|
||||
spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE);
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE);
|
||||
i2s_enable(SPI2, TRUE);
|
||||
i2s_enable(SPI1, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -136,50 +142,85 @@ static void gpio_config(void)
|
||||
gpio_init_type gpio_initstructure;
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);
|
||||
gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE);
|
||||
gpio_pin_remap_config(SPI1_MUX_01, TRUE);
|
||||
|
||||
/* master ws pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
/* master i2s ws pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master mck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_0;
|
||||
/* master i2s ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_3;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ws pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
/* master i2s sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
/* master i2s mck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_6;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
/* slave i2s ws pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave i2s ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave i2s sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief spi2 interrupt function
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SPI2_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET)
|
||||
{
|
||||
i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief spi1 interrupt function
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SPI1_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET)
|
||||
{
|
||||
spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]);
|
||||
if(tx_index == 32)
|
||||
{
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -193,22 +234,45 @@ int main(void)
|
||||
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_off(LED2);
|
||||
at32_led_off(LED3);
|
||||
at32_led_off(LED4);
|
||||
at32_led_on(LED4);
|
||||
gpio_config();
|
||||
i2s_config(I2S_DATA_16BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_48K);
|
||||
|
||||
/* enable slave and master i2s to start communication */
|
||||
i2s_enable(SPI2, TRUE);
|
||||
i2s_enable(SPI1, TRUE);
|
||||
|
||||
/* wait data receive end */
|
||||
while(rx_index < 32);
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32);
|
||||
|
||||
for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0;
|
||||
/* receive buffer clear */
|
||||
tx_index = 0;
|
||||
rx_index = 0;
|
||||
|
||||
for(index = 0; index < 32; index++)
|
||||
{
|
||||
i2s2_buffer_rx[index] = 0;
|
||||
}
|
||||
|
||||
/* change frame format */
|
||||
i2s_config(I2S_DATA_24BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_16K);
|
||||
|
||||
/* enable slave and master i2s to start communication */
|
||||
i2s_enable(SPI2, TRUE);
|
||||
i2s_enable(SPI1, TRUE);
|
||||
|
||||
/* wait data receive end */
|
||||
while(rx_index < 32);
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status2 = buffer_compare_24bits(i2s2_buffer_rx, i2s1_buffer_tx, 32);
|
||||
@@ -220,7 +284,7 @@ int main(void)
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
at32_led_on(LED3);
|
||||
}
|
||||
|
||||
while(1)
|
||||
|
||||
@@ -11,8 +11,9 @@
|
||||
the pins connection as follow:
|
||||
- pb0 as mck out
|
||||
- i2s2 slaver i2s1 master
|
||||
- pb12 <---> pa4(ws)
|
||||
- pb13 <---> pa5(ck)
|
||||
- pb15 <---> pa7(sd)
|
||||
- pb12 <---> pa15(ws)
|
||||
- pb13 <---> pb3(ck)
|
||||
- pb15 <---> pb5(sd)
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
@@ -34,6 +34,9 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15)
|
||||
#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15)
|
||||
|
||||
uint16_t i2s1_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C,
|
||||
0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718,
|
||||
0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324,
|
||||
@@ -41,7 +44,7 @@ uint16_t i2s1_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C,
|
||||
0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C,
|
||||
0x3D3E, 0x3F40
|
||||
};
|
||||
uint16_t SPI1_buffer_tx[32] = {0x5152, 0x5354, 0x5556, 0x5758, 0x595A, 0x5B5C,
|
||||
uint16_t spi1_buffer_tx[32] = {0x5152, 0x5354, 0x5556, 0x5758, 0x595A, 0x5B5C,
|
||||
0x5D5E, 0x5F60, 0x6162, 0x6364, 0x6566, 0x6768,
|
||||
0x696A, 0x6B6C, 0x6D6E, 0x6F70, 0x7172, 0x7374,
|
||||
0x7576, 0x7778, 0x797A, 0x7B7C, 0x7D7E, 0x7F80,
|
||||
@@ -53,11 +56,6 @@ uint16_t spi2_buffer_rx[32];
|
||||
__IO uint32_t tx_index = 0, rx_index = 0;
|
||||
volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR, transfer_status3 = ERROR;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void spi_config(void);
|
||||
static void i2s_config(i2s_operation_mode_type i2s1_mode, i2s_operation_mode_type i2s2_mode);
|
||||
error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
|
||||
|
||||
/**
|
||||
* @brief buffer_compare function.
|
||||
* @param none
|
||||
@@ -86,13 +84,12 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf
|
||||
static void i2s_config(i2s_operation_mode_type i2s1_mode, i2s_operation_mode_type i2s2_mode)
|
||||
{
|
||||
i2s_init_type i2s_init_struct;
|
||||
|
||||
|
||||
/* i2s1 initialization */
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
spi_i2s_reset(SPI2);
|
||||
spi_i2s_reset(SPI1);
|
||||
i2s_default_para_init(&i2s_init_struct);
|
||||
|
||||
i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
|
||||
i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT;
|
||||
i2s_init_struct.mclk_output_enable = FALSE;
|
||||
@@ -100,7 +97,15 @@ static void i2s_config(i2s_operation_mode_type i2s1_mode, i2s_operation_mode_typ
|
||||
i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
|
||||
i2s_init_struct.operation_mode = i2s1_mode;
|
||||
i2s_init(SPI1, &i2s_init_struct);
|
||||
|
||||
|
||||
/* i2s2 initialization */
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
spi_i2s_reset(SPI2);
|
||||
i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
|
||||
i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT;
|
||||
i2s_init_struct.mclk_output_enable = FALSE;
|
||||
i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K;
|
||||
i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
|
||||
i2s_init_struct.operation_mode =i2s2_mode;
|
||||
i2s_init(SPI2, &i2s_init_struct);
|
||||
}
|
||||
@@ -113,12 +118,13 @@ static void i2s_config(i2s_operation_mode_type i2s1_mode, i2s_operation_mode_typ
|
||||
static void spi_config(void)
|
||||
{
|
||||
spi_init_type spi_init_struct;
|
||||
|
||||
/* master spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
spi_i2s_reset(SPI2);
|
||||
spi_i2s_reset(SPI1);
|
||||
spi_default_para_init(&spi_init_struct);
|
||||
|
||||
/* single line bidirectional half duplex mode-transmitting */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX;
|
||||
spi_init_struct.master_slave_mode =SPI_MODE_MASTER;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
@@ -128,68 +134,92 @@ static void spi_config(void)
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
|
||||
spi_init(SPI1, &spi_init_struct);
|
||||
|
||||
|
||||
spi_enable(SPI1, TRUE);
|
||||
|
||||
/* slave spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
spi_i2s_reset(SPI2);
|
||||
|
||||
/* dual line unidirectional simplex receive-only mode */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_SIMPLEX_RX;
|
||||
spi_init_struct.master_slave_mode =SPI_MODE_SLAVE;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
|
||||
spi_init_struct.frame_bit_num = SPI_FRAME_16BIT;
|
||||
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
spi_enable(SPI2, TRUE);
|
||||
spi_enable(SPI1, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief gpio configuration.
|
||||
* @param none
|
||||
* @param spi_i2s_mode:select spi or i2s to be use
|
||||
* - 0 (spi mode)
|
||||
* - 1 (i2s mode)
|
||||
* @retval none
|
||||
*/
|
||||
static void gpio_config(void)
|
||||
static void gpio_config(uint16_t spi_i2s_mode)
|
||||
{
|
||||
gpio_init_type gpio_initstructure;
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);
|
||||
gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE);
|
||||
gpio_pin_remap_config(SPI1_MUX_01, TRUE);
|
||||
|
||||
/* master ws pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
/* master ws/cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
if(spi_i2s_mode == 0)
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
}
|
||||
else
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
}
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
if(spi_i2s_mode == 0)
|
||||
{
|
||||
/* non communication time: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
}
|
||||
|
||||
/* master ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_3;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* master sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master mck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_0;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ws pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
}
|
||||
|
||||
@@ -203,53 +233,97 @@ int main(void)
|
||||
__IO uint32_t index = 0;
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_off(LED2);
|
||||
at32_led_off(LED3);
|
||||
at32_led_off(LED4);
|
||||
gpio_config();
|
||||
at32_led_on(LED4);
|
||||
|
||||
/* first: i2s communication */
|
||||
gpio_config(1);
|
||||
i2s_config(I2S_MODE_MASTER_TX, I2S_MODE_SLAVE_RX);
|
||||
i2s_enable(SPI2, TRUE);
|
||||
i2s_enable(SPI1, TRUE);
|
||||
while(rx_index < 32)
|
||||
{
|
||||
/* i2s transmit data fill */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]);
|
||||
|
||||
/* i2s receive data get */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32);
|
||||
|
||||
/* receive buffer clear */
|
||||
tx_index = 0;
|
||||
rx_index = 0;
|
||||
for(index = 0; index < 32; index++)
|
||||
{
|
||||
i2s2_buffer_rx[index] = 0;
|
||||
}
|
||||
|
||||
/* second: spi communication */
|
||||
gpio_config(0);
|
||||
spi_config();
|
||||
|
||||
/* start communication: master pull down CS pin select slave */
|
||||
SPI_MASTER_CS_LOW;
|
||||
|
||||
while(rx_index < 32)
|
||||
{
|
||||
/* spi transmit data fill */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, SPI1_buffer_tx[tx_index++]);
|
||||
spi_i2s_data_transmit(SPI1, spi1_buffer_tx[tx_index++]);
|
||||
|
||||
/* spi receive data get */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
spi2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* end communication: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status2 = buffer_compare(spi2_buffer_rx, SPI1_buffer_tx, 32);
|
||||
transfer_status2 = buffer_compare(spi2_buffer_rx, spi1_buffer_tx, 32);
|
||||
|
||||
for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0;
|
||||
/* receive buffer clear */
|
||||
tx_index = 0;
|
||||
rx_index = 0;
|
||||
for(index = 0; index < 32; index++)
|
||||
{
|
||||
i2s2_buffer_rx[index] = 0;
|
||||
}
|
||||
|
||||
/* third: i2s communication */
|
||||
gpio_config(1);
|
||||
i2s_config(I2S_MODE_SLAVE_TX, I2S_MODE_MASTER_RX);
|
||||
|
||||
/* when slave transmission mode,the slave trans data need fill in advance */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]);
|
||||
|
||||
i2s_enable(SPI1, TRUE);
|
||||
i2s_enable(SPI2, TRUE);
|
||||
while(rx_index < 32)
|
||||
{
|
||||
/* i2s receive data get */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
|
||||
/* i2s transmit data fill */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]);
|
||||
}
|
||||
|
||||
/* master half duplex receiving mode,the busy flag isnot usefull */
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status3 = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32);
|
||||
@@ -261,7 +335,7 @@ int main(void)
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
at32_led_on(LED3);
|
||||
}
|
||||
while(1)
|
||||
{
|
||||
|
||||
@@ -169,11 +169,14 @@ void system_clock_recover(void)
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
__IO uint32_t delay_index = 0;
|
||||
crm_clocks_freq_type crm_clocks_freq_struct = {0};
|
||||
__IO uint32_t systick_index = 0;
|
||||
|
||||
/* congfig the system clock */
|
||||
system_clock_config();
|
||||
|
||||
/* get system clock */
|
||||
crm_clocks_freq_get(&crm_clocks_freq_struct);
|
||||
|
||||
/* init at start board */
|
||||
at32_board_init();
|
||||
@@ -219,8 +222,18 @@ int main(void)
|
||||
|
||||
at32_led_on(LED2);
|
||||
|
||||
/* wait 3 LICK cycles to ensureclock stable */
|
||||
delay_us(7);
|
||||
/* wait 3 LICK(maximum 120us) cycles to ensure clock stable */
|
||||
/* when wakeup from deepsleep,system clock source changes to HICK */
|
||||
if((CRM->misc2_bit.hick_to_sclk == TRUE) && (CRM->misc1_bit.hickdiv == TRUE))
|
||||
{
|
||||
/* HICK is 48MHz */
|
||||
delay_us(((120 * 6 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* HICK is 8MHz */
|
||||
delay_us(((120 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1);
|
||||
}
|
||||
|
||||
/* wake up from deep sleep mode, congfig the system clock */
|
||||
system_clock_recover();
|
||||
|
||||
@@ -139,11 +139,14 @@ void system_clock_recover(void)
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
__IO uint32_t delay_index = 0;
|
||||
crm_clocks_freq_type crm_clocks_freq_struct = {0};
|
||||
__IO uint32_t systick_index = 0;
|
||||
|
||||
/* congfig the system clock */
|
||||
system_clock_config();
|
||||
|
||||
/* get system clock */
|
||||
crm_clocks_freq_get(&crm_clocks_freq_struct);
|
||||
|
||||
/* init at start board */
|
||||
at32_board_init();
|
||||
@@ -187,8 +190,18 @@ int main(void)
|
||||
|
||||
at32_led_on(LED2);
|
||||
|
||||
/* wait 3 LICK cycles to ensureclock stable */
|
||||
delay_us(7);
|
||||
/* wait 3 LICK(maximum 120us) cycles to ensure clock stable */
|
||||
/* when wakeup from deepsleep,system clock source changes to HICK */
|
||||
if((CRM->misc2_bit.hick_to_sclk == TRUE) && (CRM->misc1_bit.hickdiv == TRUE))
|
||||
{
|
||||
/* HICK is 48MHz */
|
||||
delay_us(((120 * 6 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* HICK is 8MHz */
|
||||
delay_us(((120 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1);
|
||||
}
|
||||
|
||||
/* wake up from deep sleep mode, congfig the system clock */
|
||||
system_clock_recover();
|
||||
|
||||
@@ -9,8 +9,10 @@
|
||||
crc value by polling mode.
|
||||
the pins connection as follow:
|
||||
- spi2 slaver spi1 master
|
||||
pb12(cs) <---> pa4(cs)
|
||||
pb13(sck) <---> pa5(sck)
|
||||
pb14(miso) <---> pa6(miso)
|
||||
pb15(mosi) <---> pa7(mosi)
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
|
||||
|
||||
@@ -34,7 +34,9 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BUFFER_SIZE 32
|
||||
#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4)
|
||||
#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4)
|
||||
#define BUFFER_SIZE 32
|
||||
|
||||
uint16_t spi1_tx_buffer[BUFFER_SIZE] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, 0x0D0E, 0x0F10,
|
||||
0x1112, 0x1314, 0x1516, 0x1718, 0x191A, 0x1B1C, 0x1D1E, 0x1F20,
|
||||
@@ -49,10 +51,6 @@ uint32_t tx_index = 0, rx_index = 0;
|
||||
__IO uint16_t crc1_value = 0, crc2_value = 0;
|
||||
volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void spi_config(void);
|
||||
error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
|
||||
|
||||
/**
|
||||
* @brief buffer compare function.
|
||||
* @param pbuffer1, pbuffer2: buffers to be compared.
|
||||
@@ -81,9 +79,12 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf
|
||||
static void spi_config(void)
|
||||
{
|
||||
spi_init_type spi_init_struct;
|
||||
|
||||
/* master spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
spi_default_para_init(&spi_init_struct);
|
||||
|
||||
/* dual line unidirectional full-duplex mode */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
@@ -93,15 +94,31 @@ static void spi_config(void)
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
|
||||
spi_init(SPI1, &spi_init_struct);
|
||||
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
|
||||
/* hardware crc calculation config */
|
||||
spi_crc_polynomial_set(SPI1, 7);
|
||||
spi_crc_polynomial_set(SPI2, 7);
|
||||
spi_crc_enable(SPI1, TRUE);
|
||||
spi_crc_enable(SPI2, TRUE);
|
||||
|
||||
spi_enable(SPI1, TRUE);
|
||||
|
||||
/* slave spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* dual line unidirectional full-duplex mode */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
|
||||
spi_init_struct.frame_bit_num = SPI_FRAME_16BIT;
|
||||
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
/* hardware crc calculation config */
|
||||
spi_crc_polynomial_set(SPI2, 7);
|
||||
spi_crc_enable(SPI2, TRUE);
|
||||
|
||||
spi_enable(SPI2, TRUE);
|
||||
}
|
||||
|
||||
@@ -115,47 +132,72 @@ static void gpio_config(void)
|
||||
gpio_init_type gpio_initstructure;
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
|
||||
/* master spi cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
|
||||
/* non communication time: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* master spi sck pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_6;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
|
||||
/* master spi miso pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_6;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
|
||||
/* master spi mosi pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* slave spi cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
|
||||
/* slave spi sck pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_14;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
|
||||
/* slave spi miso pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_14;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave spi mosi pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
}
|
||||
|
||||
@@ -168,35 +210,58 @@ int main(void)
|
||||
{
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_on(LED4);
|
||||
gpio_config();
|
||||
spi_config();
|
||||
|
||||
|
||||
/* start communication: master pull down CS pin select slave */
|
||||
SPI_MASTER_CS_LOW;
|
||||
|
||||
/* transfer procedure:the "BUFFER_SIZE-1" data transfer */
|
||||
while(tx_index < BUFFER_SIZE - 1)
|
||||
{
|
||||
/* slave and master transmit data fill */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]);
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]);
|
||||
|
||||
/* slave and master receive data get */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2);
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1);
|
||||
}
|
||||
|
||||
/* wait master and slave transmit data buffer empty */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
|
||||
/* transfer procedure:the last data and crc transfer */
|
||||
/* slave the last transmit data fill and crc transfer setting */
|
||||
spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]);
|
||||
spi_crc_next_transmit(SPI2);
|
||||
|
||||
/* master the last transmit data fill and crc transfer setting */
|
||||
spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index]);
|
||||
spi_crc_next_transmit(SPI1);
|
||||
|
||||
/* wait master and slave the last data transfer end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
spi1_rx_buffer[rx_index] = spi_i2s_data_receive(SPI1);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2);
|
||||
|
||||
/* wait master and slave the crc transfer end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* end communication: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* test result:the data and crc check */
|
||||
transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE);
|
||||
@@ -214,14 +279,14 @@ int main(void)
|
||||
crc1_value = spi_i2s_data_receive(SPI1);
|
||||
crc2_value = spi_i2s_data_receive(SPI2);
|
||||
|
||||
/* test result indicate:if success ,led2 lights */
|
||||
/* test result indicate:if SUCCESS ,led2 lights */
|
||||
if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS))
|
||||
{
|
||||
at32_led_on(LED2);
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
at32_led_on(LED3);
|
||||
}
|
||||
while(1)
|
||||
{
|
||||
|
||||
@@ -22,7 +22,7 @@
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>use_jtagpin_hardwarecs_dma</TargetName>
|
||||
<TargetName>fullduplex_dma_jtagpin</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
@@ -7,7 +7,7 @@
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>use_jtagpin_hardwarecs_dma</TargetName>
|
||||
<TargetName>fullduplex_dma_jtagpin</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
|
||||
@@ -48,7 +48,7 @@
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\objects\</OutputDirectory>
|
||||
<OutputName>use_jtagpin_hardwarecs_dma</OutputName>
|
||||
<OutputName>fullduplex_dma_jtagpin</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
@@ -482,7 +482,7 @@
|
||||
<LayerInfo>
|
||||
<Layers>
|
||||
<Layer>
|
||||
<LayName><Project Info></LayName>
|
||||
<LayName>fullduplex_dma_jtagpin</LayName>
|
||||
<LayTarg>0</LayTarg>
|
||||
<LayPrjMark>1</LayPrjMark>
|
||||
</Layer>
|
||||
@@ -0,0 +1,19 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file readme.txt
|
||||
* @brief readme
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
this demo is based on the at-start board, in this demo, shows how to use
|
||||
dma recieve data. spi1 use jtag pin as spi pin,and config spi in hardware
|
||||
cs mode.
|
||||
the pins connection as follow:
|
||||
- spi2 slaver spi1 master
|
||||
pb12(cs) <---> pa15(cs)
|
||||
pb13(sck) <---> pb3(sck)
|
||||
pb14(miso) <---> pb4(miso)
|
||||
pb15(mosi) <---> pb5(mosi)
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
|
||||
@@ -30,7 +30,7 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup 415_SPI_use_jtagpin_hardwarecs_dma
|
||||
/** @addtogroup 415_SPI_fullduplex_dma_jtagpin
|
||||
* @{
|
||||
*/
|
||||
|
||||
@@ -0,0 +1,331 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file main.c
|
||||
* @brief main program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
#include "at32f415_board.h"
|
||||
#include "at32f415_clock.h"
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup 415_SPI_fullduplex_dma_jtagpin SPI_fullduplex_dma_jtagpin
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15)
|
||||
#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15)
|
||||
#define BUFFER_SIZE 32
|
||||
|
||||
spi_init_type spi_init_struct;
|
||||
uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
|
||||
0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
|
||||
0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
|
||||
0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20};
|
||||
uint8_t spi2_tx_buffer[BUFFER_SIZE] = {0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58,
|
||||
0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, 0x60,
|
||||
0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
|
||||
0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70};
|
||||
uint8_t spi1_rx_buffer[BUFFER_SIZE], spi2_rx_buffer[BUFFER_SIZE];
|
||||
volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
|
||||
|
||||
/**
|
||||
* @brief buffer compare function.
|
||||
* @param pbuffer1, pbuffer2: buffers to be compared.
|
||||
* @param buffer_length: buffer's length
|
||||
* @retval the result of compare
|
||||
*/
|
||||
error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength)
|
||||
{
|
||||
while(bufferlength--)
|
||||
{
|
||||
if(*pbuffer1 != *pbuffer2)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
pbuffer1++;
|
||||
pbuffer2++;
|
||||
}
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief dma configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void dma_config(void)
|
||||
{
|
||||
dma_init_type dma_init_struct;
|
||||
crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* use dma1_channel3 as spi1 transmit channel */
|
||||
dma_reset(DMA1_CHANNEL3);
|
||||
dma_default_para_init(&dma_init_struct);
|
||||
dma_init_struct.buffer_size = BUFFER_SIZE;
|
||||
dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
|
||||
dma_init_struct.memory_base_addr = (uint32_t)spi1_tx_buffer;
|
||||
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
|
||||
dma_init_struct.memory_inc_enable = TRUE;
|
||||
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI1->dt);
|
||||
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
|
||||
dma_init_struct.peripheral_inc_enable = FALSE;
|
||||
dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
|
||||
dma_init_struct.loop_mode_enable = FALSE;
|
||||
dma_init(DMA1_CHANNEL3, &dma_init_struct);
|
||||
|
||||
/* use dma1_channel2 as spi1 receive channel */
|
||||
dma_reset(DMA1_CHANNEL2);
|
||||
dma_init_struct.buffer_size = BUFFER_SIZE;
|
||||
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
|
||||
dma_init_struct.memory_base_addr = (uint32_t)spi1_rx_buffer;
|
||||
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
|
||||
dma_init_struct.memory_inc_enable = TRUE;
|
||||
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI1->dt);
|
||||
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
|
||||
dma_init_struct.peripheral_inc_enable = FALSE;
|
||||
dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
|
||||
dma_init_struct.loop_mode_enable = FALSE;
|
||||
dma_init(DMA1_CHANNEL2, &dma_init_struct);
|
||||
|
||||
/* use dma1_channel5 as spi2 transmit channel */
|
||||
dma_reset(DMA1_CHANNEL5);
|
||||
dma_default_para_init(&dma_init_struct);
|
||||
dma_init_struct.buffer_size = BUFFER_SIZE;
|
||||
dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
|
||||
dma_init_struct.memory_base_addr = (uint32_t)spi2_tx_buffer;
|
||||
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
|
||||
dma_init_struct.memory_inc_enable = TRUE;
|
||||
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
|
||||
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
|
||||
dma_init_struct.peripheral_inc_enable = FALSE;
|
||||
dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
|
||||
dma_init_struct.loop_mode_enable = FALSE;
|
||||
dma_init(DMA1_CHANNEL5, &dma_init_struct);
|
||||
|
||||
/* use dma1_channel4 as spi2 receive channel */
|
||||
dma_reset(DMA1_CHANNEL4);
|
||||
dma_init_struct.buffer_size = BUFFER_SIZE;
|
||||
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
|
||||
dma_init_struct.memory_base_addr = (uint32_t)spi2_rx_buffer;
|
||||
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
|
||||
dma_init_struct.memory_inc_enable = TRUE;
|
||||
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
|
||||
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
|
||||
dma_init_struct.peripheral_inc_enable = FALSE;
|
||||
dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
|
||||
dma_init_struct.loop_mode_enable = FALSE;
|
||||
dma_init(DMA1_CHANNEL4, &dma_init_struct);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief spi configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void spi_config(void)
|
||||
{
|
||||
/* spi master initialization */
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
spi_default_para_init(&spi_init_struct);
|
||||
|
||||
/* dual line unidirectional full-duplex mode */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB;
|
||||
spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
|
||||
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
|
||||
spi_init(SPI1, &spi_init_struct);
|
||||
|
||||
/* use dma transmit and receive */
|
||||
spi_i2s_dma_transmitter_enable(SPI1, TRUE);
|
||||
spi_i2s_dma_receiver_enable(SPI1, TRUE);
|
||||
|
||||
spi_enable(SPI1, TRUE);
|
||||
|
||||
/* spi slave initialization */
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* dual line unidirectional full-duplex mode */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB;
|
||||
spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
|
||||
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
/* use dma transmit and receive */
|
||||
spi_i2s_dma_transmitter_enable(SPI2, TRUE);
|
||||
spi_i2s_dma_receiver_enable(SPI2, TRUE);
|
||||
|
||||
spi_enable(SPI2, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief gpio configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void gpio_config(void)
|
||||
{
|
||||
gpio_init_type gpio_initstructure;
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);
|
||||
gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE);
|
||||
gpio_pin_remap_config(SPI1_MUX_01, TRUE);
|
||||
gpio_default_para_init(&gpio_initstructure);
|
||||
|
||||
/* spi master gpio initialization */
|
||||
/* spi1 cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* non communication time: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* spi1 sck pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_3;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi1 miso pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi1 mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 gpio initialization */
|
||||
/* spi2 cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 miso pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_14;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief main function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
__IO uint32_t index = 0;
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_on(LED4);
|
||||
dma_config();
|
||||
gpio_config();
|
||||
spi_config();
|
||||
|
||||
/* start communication: master pull down CS pin select slave */
|
||||
SPI_MASTER_CS_LOW;
|
||||
|
||||
/* enable spi slave dma to fill and get data */
|
||||
dma_channel_enable(DMA1_CHANNEL5, TRUE);
|
||||
dma_channel_enable(DMA1_CHANNEL4, TRUE);
|
||||
|
||||
/* enable spi master dma to fill and get data */
|
||||
dma_channel_enable(DMA1_CHANNEL2, TRUE);
|
||||
dma_channel_enable(DMA1_CHANNEL3, TRUE);
|
||||
|
||||
/* wait master and slave spi data receive end */
|
||||
while(dma_flag_get(DMA1_FDT2_FLAG) == RESET)
|
||||
{
|
||||
}
|
||||
while(dma_flag_get(DMA1_FDT4_FLAG) == RESET)
|
||||
{
|
||||
}
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* end communication: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE);
|
||||
transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE);
|
||||
|
||||
/* test result indicate:if SUCCESS ,led2 lights */
|
||||
if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS))
|
||||
{
|
||||
at32_led_on(LED2);
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_on(LED3);
|
||||
}
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -8,9 +8,11 @@
|
||||
this demo is based on the at-start board, in this demo, shows how to use
|
||||
fullduplex mode transfer data by polling mode.
|
||||
the pins connection as follow:
|
||||
- spi2 slaver spi1 master
|
||||
- spi2 spi1
|
||||
pb12(cs) <---> pa4(cs)
|
||||
pb13(sck) <---> pa5(sck)
|
||||
pb14(miso) <---> pa6(miso)
|
||||
pb15(mosi) <---> pa7(mosi)
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
|
||||
|
||||
@@ -34,7 +34,12 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BUFFER_SIZE 32
|
||||
#define SPI1_AS_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4)
|
||||
#define SPI1_AS_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4)
|
||||
|
||||
#define SPI2_AS_MASTER_CS_HIGH gpio_bits_set(GPIOB, GPIO_PINS_12)
|
||||
#define SPI2_AS_MASTER_CS_LOW gpio_bits_reset(GPIOB, GPIO_PINS_12)
|
||||
#define BUFFER_SIZE 32
|
||||
|
||||
spi_init_type spi_init_struct;
|
||||
uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
|
||||
@@ -50,10 +55,6 @@ uint32_t tx_index = 0, rx_index = 0;
|
||||
volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
|
||||
volatile error_status transfer_status3 = ERROR, transfer_status4 = ERROR;
|
||||
|
||||
static void gpio_config(uint16_t spi1_mode, uint16_t spi2_mode);
|
||||
static void spi_config(void);
|
||||
error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength);
|
||||
|
||||
/**
|
||||
* @brief buffer compare function.
|
||||
* @param pbuffer1, pbuffer2: buffers to be compared.
|
||||
@@ -82,9 +83,11 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe
|
||||
*/
|
||||
static void spi_config(void)
|
||||
{
|
||||
/* master spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
spi_default_para_init(&spi_init_struct);
|
||||
|
||||
/* dual line unidirectional full-duplex mode */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
@@ -94,11 +97,23 @@ static void spi_config(void)
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
|
||||
spi_init(SPI1, &spi_init_struct);
|
||||
|
||||
|
||||
spi_enable(SPI1, TRUE);
|
||||
|
||||
/* slave spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* dual line unidirectional full-duplex mode */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB;
|
||||
spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
|
||||
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
spi_enable(SPI1, TRUE);
|
||||
spi_enable(SPI2, TRUE);
|
||||
}
|
||||
|
||||
@@ -113,85 +128,124 @@ static void gpio_config(uint16_t spi1_mode, uint16_t spi2_mode)
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
gpio_default_para_init(&gpio_initstructure);
|
||||
/* spi1 sck pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
|
||||
/* spi1 cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
if(spi1_mode == SPI_MODE_MASTER)
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
}
|
||||
else
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
}
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* spi1 sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
if(spi1_mode == SPI_MODE_MASTER)
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
}
|
||||
else
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
}
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* spi1 miso pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
if(spi1_mode == SPI_MODE_MASTER)
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
}
|
||||
else
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
}
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_6;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_6;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* spi1 mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
if(spi1_mode == SPI_MODE_MASTER)
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
}
|
||||
else
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
}
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* spi2 sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
|
||||
/* spi2 cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
if(spi2_mode == SPI_MODE_SLAVE)
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
}
|
||||
else
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
}
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
if(spi2_mode == SPI_MODE_SLAVE)
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
}
|
||||
else
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
}
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 miso pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
if(spi2_mode == SPI_MODE_SLAVE)
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
}
|
||||
else
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
}
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_14;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_14;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
if(spi2_mode == SPI_MODE_SLAVE)
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
}
|
||||
else
|
||||
{
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
}
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* non communication time: master pull up CS pin release slave */
|
||||
if(spi1_mode == SPI_MODE_MASTER)
|
||||
{
|
||||
SPI1_AS_MASTER_CS_HIGH;
|
||||
}
|
||||
if(spi2_mode == SPI_MODE_MASTER)
|
||||
{
|
||||
SPI2_AS_MASTER_CS_HIGH;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -204,64 +258,96 @@ int main(void)
|
||||
__IO uint32_t index = 0;
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_on(LED4);
|
||||
gpio_config(SPI_MODE_MASTER, SPI_MODE_SLAVE);
|
||||
spi_config();
|
||||
|
||||
|
||||
/* start communication: master pull down CS pin select slave */
|
||||
SPI1_AS_MASTER_CS_LOW;
|
||||
|
||||
/* transfer procedure:the "BUFFER_SIZE" data transfer */
|
||||
while(tx_index < BUFFER_SIZE)
|
||||
{
|
||||
/* slave and master transmit data fill */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]);
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]);
|
||||
|
||||
/* slave and master receive data get */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2);
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1);
|
||||
}
|
||||
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* end communication: master pull up CS pin release slave */
|
||||
SPI1_AS_MASTER_CS_HIGH;
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE);
|
||||
transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE);
|
||||
|
||||
/* master &slave mode switch */
|
||||
|
||||
spi_enable(SPI1, FALSE);
|
||||
spi_enable(SPI2, FALSE);
|
||||
|
||||
/* master & slave mode switch */
|
||||
gpio_config(SPI_MODE_SLAVE, SPI_MODE_MASTER);
|
||||
spi_init_struct.master_slave_mode =SPI_MODE_SLAVE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
|
||||
spi_init(SPI1, &spi_init_struct);
|
||||
|
||||
|
||||
spi_init_struct.master_slave_mode =SPI_MODE_MASTER;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
|
||||
/* receive buffer clear */
|
||||
tx_index = 0;
|
||||
rx_index = 0;
|
||||
for(index = 0; index < BUFFER_SIZE; index++)
|
||||
{
|
||||
spi1_rx_buffer[index] = 0;
|
||||
for(index = 0; index < BUFFER_SIZE; index++)
|
||||
spi2_rx_buffer[index] = 0;
|
||||
|
||||
}
|
||||
|
||||
spi_enable(SPI2, TRUE);
|
||||
spi_enable(SPI1, TRUE);
|
||||
|
||||
/* start communication: master pull down CS pin select slave */
|
||||
SPI2_AS_MASTER_CS_LOW;
|
||||
|
||||
/* transfer procedure:the "BUFFER_SIZE" data transfer */
|
||||
while(tx_index < BUFFER_SIZE)
|
||||
{
|
||||
/* slave and master transmit data fill */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index]);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]);
|
||||
|
||||
/* slave and master receive data get */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
spi1_rx_buffer[rx_index] = spi_i2s_data_receive(SPI1);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* end communication: master pull up CS pin release slave */
|
||||
SPI2_AS_MASTER_CS_HIGH;
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status3 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE);
|
||||
transfer_status4 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE);
|
||||
|
||||
/* test result indicate:if success ,led2 lights */
|
||||
/* test result indicate:if SUCCESS ,led2 lights */
|
||||
if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS) && \
|
||||
(transfer_status3 == SUCCESS) && (transfer_status4 == SUCCESS))
|
||||
{
|
||||
@@ -269,7 +355,7 @@ int main(void)
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
at32_led_on(LED3);
|
||||
}
|
||||
while(1)
|
||||
{
|
||||
|
||||
@@ -22,7 +22,7 @@
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>software_trigger_repeat</TargetName>
|
||||
<TargetName>fullduplex_dma_jtagpin</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
@@ -282,8 +282,8 @@
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f415_dma.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_dma.c</FilenameWithoutPath>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f415_usart.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_usart.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
@@ -294,8 +294,8 @@
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f415_adc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_adc.c</FilenameWithoutPath>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f415_dma.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_dma.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
@@ -306,8 +306,8 @@
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f415_usart.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_usart.c</FilenameWithoutPath>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f415_spi.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_spi.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
@@ -7,7 +7,7 @@
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>software_trigger_repeat</TargetName>
|
||||
<TargetName>fullduplex_dma_jtagpin</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
|
||||
@@ -48,7 +48,7 @@
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\objects\</OutputDirectory>
|
||||
<OutputName>software_trigger_repeat</OutputName>
|
||||
<OutputName>fullduplex_dma_jtagpin</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
@@ -427,20 +427,20 @@
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_crm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_usart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_usart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_dma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_dma.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_adc.c</FileName>
|
||||
<FileName>at32f415_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_usart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_usart.c</FilePath>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_spi.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
@@ -482,7 +482,7 @@
|
||||
<LayerInfo>
|
||||
<Layers>
|
||||
<Layer>
|
||||
<LayName><Project Info></LayName>
|
||||
<LayName>fullduplex_dma_jtagpin</LayName>
|
||||
<LayTarg>0</LayTarg>
|
||||
<LayPrjMark>1</LayPrjMark>
|
||||
</Layer>
|
||||
@@ -6,12 +6,13 @@
|
||||
*/
|
||||
|
||||
this demo is based on the at-start board, in this demo, shows how to use
|
||||
dma recieve data. spi3 use jtag pin as spi pin,and config spi in hardware
|
||||
dma recieve data. spi1 use jtag pin as spi pin,and config spi in hardware
|
||||
cs mode.
|
||||
the pins connection as follow:
|
||||
- spi2 slaver spi1 master
|
||||
- pb12(cs) <---> pa15(cs)
|
||||
- spi2 slave spi1 master
|
||||
pb12(cs) <---> pa15(cs)
|
||||
pb13(sck) <---> pb3(sck)
|
||||
pb14(miso) <---> pb5(mosi)
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
|
||||
@@ -26,13 +26,11 @@
|
||||
#include "at32f415_int.h"
|
||||
#include "at32f415_board.h"
|
||||
|
||||
extern __IO uint16_t dma_trans_complete_flag;
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup 415_ADC_software_trigger_repeat
|
||||
/** @addtogroup 415_SPI_fullduplex_dma_jtagpin
|
||||
* @{
|
||||
*/
|
||||
|
||||
@@ -133,21 +131,6 @@ void SysTick_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles dma1_channel1 handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void DMA1_Channel1_IRQHandler(void)
|
||||
{
|
||||
if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET)
|
||||
{
|
||||
dma_flag_clear(DMA1_FDT1_FLAG);
|
||||
dma_trans_complete_flag++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -155,3 +138,6 @@ void DMA1_Channel1_IRQHandler(void)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
@@ -29,33 +29,31 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup 415_SPI_use_jtagpin_hardwarecs_dma SPI_use_jtagpin_hardwarecs_dma
|
||||
/** @addtogroup 415_SPI_fullduplex_dma_jtagpin SPI_fullduplex_dma_jtagpin
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BUFFER_SIZE 32
|
||||
#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15)
|
||||
#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15)
|
||||
#define BUFFER_SIZE 32
|
||||
|
||||
spi_init_type spi_init_struct;
|
||||
uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
|
||||
0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
|
||||
0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
|
||||
0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20};
|
||||
uint8_t spi2_rx_buffer[BUFFER_SIZE];
|
||||
__IO uint8_t tx_index = 0;
|
||||
volatile error_status transfer_status = ERROR;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void spi_config(void);
|
||||
error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
|
||||
|
||||
/**
|
||||
* @brief buffer compare function.
|
||||
* @param pbuffer1, pbuffer2: buffers to be compared.
|
||||
* @param buffer_length: buffer's length
|
||||
* @retval the result of compare
|
||||
*/
|
||||
error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
|
||||
error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength)
|
||||
{
|
||||
while(buffer_length--)
|
||||
while(bufferlength--)
|
||||
{
|
||||
if(*pbuffer1 != *pbuffer2)
|
||||
{
|
||||
@@ -69,19 +67,33 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief spi configuration.
|
||||
* @brief dma configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void spi_config(void)
|
||||
static void dma_config(void)
|
||||
{
|
||||
dma_init_type dma_init_struct;
|
||||
spi_init_type spi_init_struct;
|
||||
|
||||
crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
|
||||
dma_reset(DMA1_CHANNEL4);
|
||||
|
||||
/* use dma1_channel3 as spi1 transmit channel */
|
||||
dma_reset(DMA1_CHANNEL3);
|
||||
dma_default_para_init(&dma_init_struct);
|
||||
dma_init_struct.buffer_size = BUFFER_SIZE;
|
||||
dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
|
||||
dma_init_struct.memory_base_addr = (uint32_t)spi1_tx_buffer;
|
||||
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
|
||||
dma_init_struct.memory_inc_enable = TRUE;
|
||||
dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI1->dt);
|
||||
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
|
||||
dma_init_struct.peripheral_inc_enable = FALSE;
|
||||
dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
|
||||
dma_init_struct.loop_mode_enable = FALSE;
|
||||
dma_init(DMA1_CHANNEL3, &dma_init_struct);
|
||||
|
||||
/* use dma1_channel4 as spi2 receive channel */
|
||||
dma_reset(DMA1_CHANNEL4);
|
||||
dma_init_struct.buffer_size = BUFFER_SIZE;
|
||||
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
|
||||
dma_init_struct.memory_base_addr = (uint32_t)spi2_rx_buffer;
|
||||
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
|
||||
@@ -92,10 +104,22 @@ static void spi_config(void)
|
||||
dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
|
||||
dma_init_struct.loop_mode_enable = FALSE;
|
||||
dma_init(DMA1_CHANNEL4, &dma_init_struct);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief spi configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void spi_config(void)
|
||||
{
|
||||
spi_init_type spi_init_struct;
|
||||
|
||||
/* spi master initialization */
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
spi_default_para_init(&spi_init_struct);
|
||||
|
||||
/* single line bidirectional half duplex mode-transmitting */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
@@ -103,16 +127,31 @@ static void spi_config(void)
|
||||
spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
|
||||
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
|
||||
spi_init(SPI1, &spi_init_struct);
|
||||
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
spi_hardware_cs_output_enable(SPI1, TRUE);
|
||||
spi_i2s_dma_receiver_enable(SPI2, TRUE);
|
||||
|
||||
/* use dma transmit */
|
||||
spi_i2s_dma_transmitter_enable(SPI1, TRUE);
|
||||
|
||||
spi_enable(SPI1, TRUE);
|
||||
|
||||
/* spi slave initialization */
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* single line bidirectional half duplex mode-receiving */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
|
||||
spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
|
||||
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
/* use dma receive */
|
||||
spi_i2s_dma_receiver_enable(SPI2, TRUE);
|
||||
|
||||
spi_enable(SPI2, TRUE);
|
||||
}
|
||||
|
||||
@@ -129,43 +168,53 @@ static void gpio_config(void)
|
||||
crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);
|
||||
gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE);
|
||||
gpio_pin_remap_config(SPI1_MUX_01, TRUE);
|
||||
|
||||
/* master sck pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_default_para_init(&gpio_initstructure);
|
||||
|
||||
/* spi master gpio initialization */
|
||||
/* spi1 cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_3;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* master mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* master cs pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* slave sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
|
||||
/* non communication time: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* spi1 sck pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_3;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave miso pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_14;
|
||||
/* spi1 mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 gpio initialization */
|
||||
/* spi2 cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave cs pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
/* spi2 sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 miso pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_14;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
}
|
||||
|
||||
@@ -176,35 +225,51 @@ static void gpio_config(void)
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
__IO uint32_t index = 0;
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
|
||||
/* button press:ensure code canbe download normally */
|
||||
while(at32_button_press() == NO_BUTTON);
|
||||
|
||||
at32_led_on(LED4);
|
||||
dma_config();
|
||||
gpio_config();
|
||||
spi_config();
|
||||
|
||||
/* start communication: master pull down CS pin select slave */
|
||||
SPI_MASTER_CS_LOW;
|
||||
|
||||
/* enable spi slave dma to get data */
|
||||
dma_channel_enable(DMA1_CHANNEL4, TRUE);
|
||||
|
||||
/* transfer procedure:the "BUFFER_SIZE" data transfer */
|
||||
while(tx_index < BUFFER_SIZE)
|
||||
|
||||
/* enable spi master dma to fill data */
|
||||
dma_channel_enable(DMA1_CHANNEL3, TRUE);
|
||||
|
||||
/* wait master spi data fill end */
|
||||
while(dma_flag_get(DMA1_FDT3_FLAG) == RESET)
|
||||
{
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]);
|
||||
}
|
||||
while(!dma_flag_get(DMA1_FDT4_FLAG));
|
||||
|
||||
/* wait slave spi data get end */
|
||||
while(dma_flag_get(DMA1_FDT4_FLAG) == RESET)
|
||||
{
|
||||
}
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* end communication: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE);
|
||||
|
||||
/* test result indicate:if success ,led2 lights */
|
||||
/* test result indicate:if SUCCESS ,led2 lights */
|
||||
if(transfer_status == SUCCESS)
|
||||
{
|
||||
at32_led_on(LED2);
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
at32_led_on(LED3);
|
||||
}
|
||||
while(1)
|
||||
{
|
||||
@@ -9,7 +9,9 @@
|
||||
halfduplex mode transfer data by interrupt mode.
|
||||
the pins connection as follow:
|
||||
- spi2 slaver spi1 master
|
||||
pb12(cs) <---> pa4(cs)
|
||||
pb13(sck) <---> pa5(sck)
|
||||
pb14(miso) <---> pa7(mosi)
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
|
||||
|
||||
@@ -24,12 +24,6 @@
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_int.h"
|
||||
#include "at32f415_board.h"
|
||||
|
||||
extern uint8_t spi1_tx_buffer[];
|
||||
extern uint8_t spi2_rx_buffer[];
|
||||
extern uint32_t tx_index;
|
||||
extern uint32_t rx_index;
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
@@ -138,36 +132,6 @@ void SysTick_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles the spi1 interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SPI1_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET)
|
||||
{
|
||||
spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]);
|
||||
if(tx_index == BUFFERSIZE)
|
||||
{
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles the spi2 interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SPI2_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET)
|
||||
{
|
||||
spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
@@ -33,9 +33,9 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BUFFER_SIZE 32
|
||||
|
||||
spi_init_type spi_init_struct;
|
||||
#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4)
|
||||
#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4)
|
||||
#define BUFFER_SIZE 32
|
||||
|
||||
uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
|
||||
0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
|
||||
@@ -45,10 +45,6 @@ uint8_t spi2_rx_buffer[BUFFER_SIZE];
|
||||
volatile uint32_t tx_index = 0, rx_index = 0;
|
||||
volatile error_status transfer_status = ERROR;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void spi_config(void);
|
||||
error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
|
||||
|
||||
/**
|
||||
* @brief buffer compare function.
|
||||
* @param pbuffer1, pbuffer2: buffers to be compared.
|
||||
@@ -77,9 +73,14 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe
|
||||
*/
|
||||
static void spi_config(void)
|
||||
{
|
||||
spi_init_type spi_init_struct;
|
||||
|
||||
/* master spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
nvic_irq_enable(SPI1_IRQn, 0, 0);
|
||||
spi_default_para_init(&spi_init_struct);
|
||||
|
||||
/* single line bidirectional half duplex mode - transmitting */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX;
|
||||
spi_init_struct.master_slave_mode =SPI_MODE_MASTER;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
@@ -89,18 +90,27 @@ static void spi_config(void)
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
|
||||
spi_init(SPI1, &spi_init_struct);
|
||||
|
||||
/* enable transmit data buffer empty interrupt */
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE);
|
||||
|
||||
/* slave spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
nvic_irq_enable(SPI2_IRQn, 0, 0);
|
||||
|
||||
/* single line bidirectional half duplex mode - receiving */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX;
|
||||
spi_init_struct.master_slave_mode =SPI_MODE_SLAVE;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
|
||||
spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
|
||||
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
nvic_irq_enable(SPI1_IRQn, 0, 0);
|
||||
nvic_irq_enable(SPI2_IRQn, 0, 0);
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE);
|
||||
|
||||
/* enable receive data buffer full interrupt */
|
||||
spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE);
|
||||
|
||||
spi_enable(SPI2, TRUE);
|
||||
spi_enable(SPI1, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -113,35 +123,83 @@ static void gpio_config(void)
|
||||
gpio_init_type gpio_initstructure;
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
|
||||
gpio_default_para_init(&gpio_initstructure);
|
||||
|
||||
/* spi1 sck pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
|
||||
/* master spi cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* non communication time: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* master spi sck pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* spi1 mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
/* master spi mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* spi2 sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
|
||||
/* slave spi cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave spi sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 miso pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_14;
|
||||
/* slave spi miso pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_14;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
}
|
||||
|
||||
while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13)!=RESET);
|
||||
/**
|
||||
* @brief spi1 interrupt function
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SPI1_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET)
|
||||
{
|
||||
spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]);
|
||||
if(tx_index == BUFFER_SIZE)
|
||||
{
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief spi2 interrupt function
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SPI2_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET)
|
||||
{
|
||||
spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -153,23 +211,39 @@ int main(void)
|
||||
{
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_on(LED4);
|
||||
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
|
||||
gpio_config();
|
||||
/* config spi1 send spi2 receive */
|
||||
spi_config();
|
||||
|
||||
/* start communication: master pull down CS pin select slave */
|
||||
SPI_MASTER_CS_LOW;
|
||||
|
||||
spi_enable(SPI2, TRUE);
|
||||
spi_enable(SPI1, TRUE);
|
||||
|
||||
/* wait slave data receive end */
|
||||
while(rx_index < BUFFER_SIZE);
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* end communication: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE);
|
||||
|
||||
/* test result indicate:if success ,led2 lights */
|
||||
/* test result indicate:if SUCCESS ,led2 lights */
|
||||
if(transfer_status==SUCCESS)
|
||||
{
|
||||
at32_led_on(LED2);
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
at32_led_on(LED3);
|
||||
}
|
||||
while(1)
|
||||
{
|
||||
|
||||
@@ -10,6 +10,7 @@
|
||||
realize data send and receive.
|
||||
the pins connection as follow:
|
||||
- spi2 slaver spi1 master
|
||||
pb12(cs) <---> pa4(cs)
|
||||
pb13(sck) <---> pa5(sck)
|
||||
pb14(miso) <---> pa7(mosi)
|
||||
|
||||
|
||||
@@ -24,14 +24,6 @@
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_int.h"
|
||||
#include "at32f415_board.h"
|
||||
|
||||
extern uint8_t spi1_tx_buffer[];
|
||||
extern uint8_t spi2_tx_buffer[];
|
||||
extern uint8_t spi1_rx_buffer[];
|
||||
extern uint8_t spi2_rx_buffer[];
|
||||
extern uint32_t tx_index;
|
||||
extern uint32_t rx_index;
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
@@ -140,54 +132,6 @@ void SysTick_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles the spi1 interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SPI1_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET)
|
||||
{
|
||||
spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]);
|
||||
if(tx_index == BUFFERSIZE)
|
||||
{
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE);
|
||||
}
|
||||
}
|
||||
if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_RDBF_FLAG) != RESET)
|
||||
{
|
||||
spi_enable(SPI1, FALSE);
|
||||
spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1);
|
||||
spi_enable(SPI1, TRUE);
|
||||
if(rx_index == BUFFERSIZE)
|
||||
{
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, FALSE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles the spi2 interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SPI2_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_TDBE_FLAG) != RESET)
|
||||
{
|
||||
spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]);
|
||||
if(tx_index == BUFFERSIZE)
|
||||
{
|
||||
spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, FALSE);
|
||||
}
|
||||
}
|
||||
if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET)
|
||||
{
|
||||
spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
@@ -33,8 +33,9 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BUFFER_SIZE 32
|
||||
|
||||
#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4)
|
||||
#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4)
|
||||
#define BUFFER_SIZE 32
|
||||
|
||||
spi_init_type spi_init_struct;
|
||||
uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
|
||||
@@ -49,10 +50,6 @@ uint8_t spi1_rx_buffer[BUFFER_SIZE], spi2_rx_buffer[BUFFER_SIZE];
|
||||
volatile uint32_t tx_index = 0, rx_index = 0;
|
||||
volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void spi_config(void);
|
||||
error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
|
||||
|
||||
/**
|
||||
* @brief buffer compare function.
|
||||
* @param pbuffer1, pbuffer2: buffers to be compared.
|
||||
@@ -81,9 +78,12 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe
|
||||
*/
|
||||
static void spi_config(void)
|
||||
{
|
||||
/* master spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
nvic_irq_enable(SPI1_IRQn, 0, 0);
|
||||
spi_default_para_init(&spi_init_struct);
|
||||
|
||||
/* single line bidirectional half duplex mode - transmitting */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256;
|
||||
@@ -93,18 +93,27 @@ static void spi_config(void)
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
|
||||
spi_init(SPI1, &spi_init_struct);
|
||||
|
||||
|
||||
/* enable transmit data buffer empty interrupt */
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE);
|
||||
|
||||
/* slave spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
nvic_irq_enable(SPI2_IRQn, 0, 0);
|
||||
|
||||
/* single line bidirectional half duplex mode - receiving */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256;
|
||||
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
|
||||
spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
|
||||
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
nvic_irq_enable(SPI1_IRQn, 0, 0);
|
||||
nvic_irq_enable(SPI2_IRQn, 0, 0);
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE);
|
||||
/* enable receive data buffer full interrupt */
|
||||
spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE);
|
||||
|
||||
spi_enable(SPI1, TRUE);
|
||||
spi_enable(SPI2, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -118,36 +127,103 @@ static void gpio_config(void)
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
gpio_default_para_init(&gpio_initstructure);
|
||||
|
||||
/* spi1 sck pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
|
||||
/* master spi cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* non communication time: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* master spi sck pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* spi1 mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
/* master spi mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* spi2 sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
|
||||
/* slave spi cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 miso pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_14;
|
||||
/* slave spi sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13)!=RESET);
|
||||
/* slave spi miso pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_14;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief spi1 interrupt function
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SPI1_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET)
|
||||
{
|
||||
spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]);
|
||||
if(tx_index == BUFFER_SIZE)
|
||||
{
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE);
|
||||
}
|
||||
}
|
||||
if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_RDBF_FLAG) != RESET)
|
||||
{
|
||||
spi_enable(SPI1, FALSE);
|
||||
spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1);
|
||||
spi_enable(SPI1, TRUE);
|
||||
if(rx_index == BUFFER_SIZE)
|
||||
{
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, FALSE);
|
||||
spi_enable(SPI1, FALSE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief spi2 interrupt function
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SPI2_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_TDBE_FLAG) != RESET)
|
||||
{
|
||||
spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]);
|
||||
if(tx_index == BUFFER_SIZE)
|
||||
{
|
||||
spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, FALSE);
|
||||
}
|
||||
}
|
||||
if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET)
|
||||
{
|
||||
spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief main function.
|
||||
* @param none
|
||||
@@ -157,37 +233,70 @@ int main(void)
|
||||
{
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_on(LED4);
|
||||
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
|
||||
gpio_config();
|
||||
|
||||
/* config spi1 send spi2 receive */
|
||||
spi_config();
|
||||
|
||||
/* start communication: master pull down CS pin select slave */
|
||||
SPI_MASTER_CS_LOW;
|
||||
|
||||
spi_enable(SPI2, TRUE);
|
||||
spi_enable(SPI1, TRUE);
|
||||
|
||||
/* wait data receive end */
|
||||
while(rx_index < BUFFER_SIZE);
|
||||
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* end communication: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE);
|
||||
|
||||
|
||||
/* config spi2 send spi1 receive */
|
||||
spi_enable(SPI1, FALSE);
|
||||
spi_enable(SPI2, FALSE);
|
||||
|
||||
rx_index = 0;
|
||||
tx_index = 0;
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE);
|
||||
spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, FALSE);
|
||||
|
||||
|
||||
/* single line bidirectional half duplex mode - receiving */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
|
||||
spi_init(SPI1, &spi_init_struct);
|
||||
|
||||
|
||||
/* single line bidirectional half duplex mode - transmitting */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, TRUE);
|
||||
spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, TRUE);
|
||||
|
||||
/* start communication: master pull down CS pin select slave */
|
||||
SPI_MASTER_CS_LOW;
|
||||
|
||||
spi_enable(SPI2, TRUE);
|
||||
spi_enable(SPI1, TRUE);
|
||||
|
||||
/* wait slave data receive end */
|
||||
while(rx_index < BUFFER_SIZE);
|
||||
|
||||
|
||||
/* master half duplex receiving mode£¬the busy flag isnot usefull */
|
||||
|
||||
/* end communication: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE);
|
||||
|
||||
@@ -198,7 +307,7 @@ int main(void)
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
at32_led_on(LED3);
|
||||
}
|
||||
while(1)
|
||||
{
|
||||
|
||||
@@ -9,7 +9,9 @@
|
||||
only receive mode receive data by polling mode.
|
||||
the pins connection as follow:
|
||||
- spi2 slaver spi1 master
|
||||
pb12(cs) <---> pa4(cs)
|
||||
pb13(sck) <---> pa5(sck)
|
||||
pb15(mosi) <---> pa7(mosi)
|
||||
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
for more detailed information. please refer to the application note document AN0102.
|
||||
|
||||
|
||||
@@ -33,9 +33,10 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BUFFER_SIZE 32
|
||||
#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4)
|
||||
#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4)
|
||||
#define BUFFER_SIZE 32
|
||||
|
||||
spi_init_type spi_init_struct;
|
||||
uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
|
||||
0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
|
||||
0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
|
||||
@@ -44,10 +45,6 @@ uint8_t spi2_rx_buffer[BUFFER_SIZE];
|
||||
uint32_t tx_index = 0, rx_index = 0;
|
||||
volatile error_status transfer_status = ERROR;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void spi_config(void);
|
||||
error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
|
||||
|
||||
/**
|
||||
* @brief buffer compare function.
|
||||
* @param pbuffer1, pbuffer2: buffers to be compared.
|
||||
@@ -76,9 +73,13 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe
|
||||
*/
|
||||
static void spi_config(void)
|
||||
{
|
||||
spi_init_type spi_init_struct;
|
||||
|
||||
/* master spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
spi_default_para_init(&spi_init_struct);
|
||||
|
||||
/* dual line unidirectional full-duplex mode */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
@@ -88,12 +89,23 @@ static void spi_config(void)
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
|
||||
spi_init(SPI1, &spi_init_struct);
|
||||
|
||||
|
||||
spi_enable(SPI1, TRUE);
|
||||
|
||||
/* slave spi initialization */
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* dual line unidirectional simplex receive-only mode */
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_SIMPLEX_RX;
|
||||
spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB;
|
||||
spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
|
||||
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
spi_enable(SPI1, TRUE);
|
||||
|
||||
spi_enable(SPI2, TRUE);
|
||||
}
|
||||
|
||||
@@ -108,34 +120,49 @@ static void gpio_config(void)
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
gpio_default_para_init(&gpio_initstructure);
|
||||
|
||||
/* spi1 sck pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
|
||||
/* master spi cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* spi1 mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
|
||||
/* non communication time: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* master spi sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* spi2 sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
|
||||
/* master spi mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* slave spi cs pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave spi sck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* spi2 mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
/* slave spi mosi pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13) != RESET);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -147,29 +174,43 @@ int main(void)
|
||||
{
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_on(LED4);
|
||||
gpio_config();
|
||||
spi_config();
|
||||
|
||||
|
||||
/* start communication: master pull down CS pin select slave */
|
||||
SPI_MASTER_CS_LOW;
|
||||
|
||||
/* transfer procedure:the "BUFFER_SIZE" data transfer */
|
||||
while(tx_index < BUFFER_SIZE)
|
||||
{
|
||||
/* master transmit data fill */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]);
|
||||
|
||||
/* slave receive data get */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
|
||||
/* wait master and slave idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
/* end communication: master pull up CS pin release slave */
|
||||
SPI_MASTER_CS_HIGH;
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE);
|
||||
|
||||
/* test result indicate:if success ,led2 lights */
|
||||
/* test result indicate:if SUCCESS ,led2 lights */
|
||||
if(transfer_status == SUCCESS)
|
||||
{
|
||||
at32_led_on(LED2);
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
at32_led_on(LED3);
|
||||
}
|
||||
while(1)
|
||||
{
|
||||
|
||||
@@ -5,8 +5,8 @@
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
this demo is based on the at-start board and AT32-Comm-EV board, in this demo,
|
||||
shows how to use spi access the w25q flash chip.
|
||||
this demo is based on the at-start board, in this demo, shows how to use spi access
|
||||
the w25q flash chip.
|
||||
the pins use as follow:
|
||||
- cs <---> pb12(software cs, pb12 as a general io to control flash cs)
|
||||
- sck <---> pb13
|
||||
|
||||
@@ -339,6 +339,9 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length)
|
||||
|
||||
while(dma_flag_get(DMA1_FDT4_FLAG) == RESET);
|
||||
dma_flag_clear(DMA1_FDT4_FLAG);
|
||||
|
||||
/* wait spi idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
dma_channel_enable(DMA1_CHANNEL4, FALSE);
|
||||
dma_channel_enable(DMA1_CHANNEL5, FALSE);
|
||||
@@ -354,6 +357,9 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length)
|
||||
dummy_data = spi_i2s_data_receive(SPI2);
|
||||
pbuffer++;
|
||||
}
|
||||
|
||||
/* wait spi idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -403,6 +409,9 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length)
|
||||
|
||||
while(dma_flag_get(DMA1_FDT4_FLAG) == RESET);
|
||||
dma_flag_clear(DMA1_FDT4_FLAG);
|
||||
|
||||
/* wait spi idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
dma_channel_enable(DMA1_CHANNEL4, FALSE);
|
||||
dma_channel_enable(DMA1_CHANNEL5, FALSE);
|
||||
@@ -418,6 +427,9 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length)
|
||||
*pbuffer = spi_i2s_data_receive(SPI2);
|
||||
pbuffer++;
|
||||
}
|
||||
|
||||
/* wait spi idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -490,7 +502,10 @@ uint8_t spi_byte_write(uint8_t data)
|
||||
spi_i2s_data_transmit(SPI2, data);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
brxbuff = spi_i2s_data_receive(SPI2);
|
||||
|
||||
/* wait spi idle when communication end */
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET);
|
||||
|
||||
return brxbuff;
|
||||
}
|
||||
|
||||
|
||||
@@ -98,7 +98,10 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
@@ -127,7 +130,6 @@ void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -108,7 +108,10 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
@@ -137,7 +140,6 @@ void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -228,7 +228,10 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
@@ -257,9 +260,7 @@ void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -127,36 +127,39 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -102,7 +102,10 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
@@ -131,7 +134,6 @@ void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -85,7 +85,6 @@ void keyboard_send_string(void *udev, uint8_t *string, uint8_t len)
|
||||
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief main function.
|
||||
* @param none
|
||||
@@ -148,21 +147,43 @@ int main(void)
|
||||
/* enter deep sleep */
|
||||
if(((keyboard_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag == 1)
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
at32_led_off(LED3);
|
||||
at32_led_off(LED4);
|
||||
/* congfig the voltage regulator mode */
|
||||
pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER);
|
||||
|
||||
/* enter deep sleep mode */
|
||||
pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI);
|
||||
/* wait clock stable */
|
||||
for(delay_index = 0; delay_index < 600; delay_index++)
|
||||
__disable_irq();
|
||||
if(OTG_PCGCCTL(otg_core_struct.usb_reg)->pcgcctl_bit.suspendm == 1
|
||||
&& usb_suspend_status_get(otg_core_struct.usb_reg) == 1)
|
||||
{
|
||||
__NOP();
|
||||
at32_led_off(LED2);
|
||||
at32_led_off(LED3);
|
||||
at32_led_off(LED4);
|
||||
/* congfig the voltage regulator mode */
|
||||
pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER);
|
||||
|
||||
/* enter deep sleep mode */
|
||||
pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI);
|
||||
|
||||
/* wait 3 LICK(maximum 120us) cycles to ensure clock stable */
|
||||
/* when wakeup from deepsleep,system clock source changes to HICK */
|
||||
if((CRM->misc2_bit.hick_to_sclk == TRUE) && (CRM->misc1_bit.hickdiv == TRUE))
|
||||
{
|
||||
/* HICK is 48MHz */
|
||||
for(delay_index = 0; delay_index < 750; delay_index++)
|
||||
{
|
||||
__NOP();
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* HICK is 8MHz */
|
||||
for(delay_index = 0; delay_index < 125; delay_index++)
|
||||
{
|
||||
__NOP();
|
||||
}
|
||||
}
|
||||
|
||||
system_clock_recover();
|
||||
}
|
||||
system_clock_recover();
|
||||
((keyboard_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag = 0;
|
||||
__enable_irq();
|
||||
|
||||
at32_led_on(LED2);
|
||||
at32_led_on(LED3);
|
||||
at32_led_on(LED4);
|
||||
@@ -179,7 +200,10 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
@@ -208,7 +232,6 @@ void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -118,21 +118,43 @@ int main(void)
|
||||
/* enter deep sleep */
|
||||
if(((mouse_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag == 1)
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
at32_led_off(LED3);
|
||||
at32_led_off(LED4);
|
||||
/* congfig the voltage regulator mode */
|
||||
pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER);
|
||||
|
||||
/* enter deep sleep mode */
|
||||
pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI);
|
||||
/* wait clock stable */
|
||||
for(delay_index = 0; delay_index < 600; delay_index++)
|
||||
__disable_irq();
|
||||
if(OTG_PCGCCTL(otg_core_struct.usb_reg)->pcgcctl_bit.suspendm == 1
|
||||
&& usb_suspend_status_get(otg_core_struct.usb_reg) == 1)
|
||||
{
|
||||
__NOP();
|
||||
at32_led_off(LED2);
|
||||
at32_led_off(LED3);
|
||||
at32_led_off(LED4);
|
||||
/* congfig the voltage regulator mode */
|
||||
pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER);
|
||||
|
||||
/* enter deep sleep mode */
|
||||
pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI);
|
||||
|
||||
/* wait 3 LICK(maximum 120us) cycles to ensure clock stable */
|
||||
/* when wakeup from deepsleep,system clock source changes to HICK */
|
||||
if((CRM->misc2_bit.hick_to_sclk == TRUE) && (CRM->misc1_bit.hickdiv == TRUE))
|
||||
{
|
||||
/* HICK is 48MHz */
|
||||
for(delay_index = 0; delay_index < 750; delay_index++)
|
||||
{
|
||||
__NOP();
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* HICK is 8MHz */
|
||||
for(delay_index = 0; delay_index < 125; delay_index++)
|
||||
{
|
||||
__NOP();
|
||||
}
|
||||
}
|
||||
|
||||
system_clock_recover();
|
||||
}
|
||||
system_clock_recover();
|
||||
((mouse_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag = 0;
|
||||
__enable_irq();
|
||||
|
||||
at32_led_on(LED2);
|
||||
at32_led_on(LED3);
|
||||
at32_led_on(LED4);
|
||||
@@ -148,7 +170,10 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
@@ -177,7 +202,6 @@ void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -44,7 +44,7 @@ extern "C" {
|
||||
#define SPI_FLASH_LUN 1
|
||||
#define SD_LUN 2
|
||||
|
||||
#define USB_FLASH_ADDR_OFFSET 0x08005000
|
||||
#define USB_FLASH_ADDR_OFFSET 0x08008000
|
||||
|
||||
#define SECTOR_SIZE_1K 1024
|
||||
#define SECTOR_SIZE_2K 2048
|
||||
|
||||
@@ -95,7 +95,10 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
@@ -124,7 +127,6 @@ void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -104,37 +104,39 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -127,36 +127,39 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -380,36 +380,39 @@ void usart_gpio_config(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -110,7 +110,10 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
@@ -139,7 +142,6 @@ void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -120,36 +120,39 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -275,7 +275,7 @@
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x3f0000</Size>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
|
||||
@@ -131,37 +131,39 @@ void cdc_receive_complete(usbh_core_type *uhost)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -142,7 +142,10 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
@@ -171,7 +174,6 @@ void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -275,7 +275,7 @@
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x3f0000</Size>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
|
||||
@@ -95,37 +95,39 @@ int main(void)
|
||||
*/
|
||||
void usb_clock48m_select(usb_clk48_s clk_s)
|
||||
{
|
||||
switch(system_core_clock)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
crm_clocks_freq_type clocks_struct;
|
||||
|
||||
crm_clocks_freq_get(&clocks_struct);
|
||||
switch(clocks_struct.sclk_freq)
|
||||
{
|
||||
/* 48MHz */
|
||||
case 48000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1);
|
||||
break;
|
||||
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
/* 72MHz */
|
||||
case 72000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
|
||||
break;
|
||||
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
/* 96MHz */
|
||||
case 96000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2);
|
||||
break;
|
||||
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
/* 120MHz */
|
||||
case 120000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
|
||||
break;
|
||||
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
/* 144MHz */
|
||||
case 144000000:
|
||||
crm_usb_clock_div_set(CRM_USB_DIV_3);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
Reference in New Issue
Block a user