diff --git a/AT32F415_periph_lib_V2.1.6.chm b/AT32F415_periph_lib_V2.1.7.chm similarity index 64% rename from AT32F415_periph_lib_V2.1.6.chm rename to AT32F415_periph_lib_V2.1.7.chm index 2ba09a6..ef6a593 100644 Binary files a/AT32F415_periph_lib_V2.1.6.chm and b/AT32F415_periph_lib_V2.1.7.chm differ diff --git a/document/AT32F415_firmware_BSP&Pack_user_guide_EN_V2.0.7.pdf b/document/AT32F415_firmware_BSP&Pack_user_guide_EN_V2.0.7.pdf deleted file mode 100644 index b1fc130..0000000 Binary files a/document/AT32F415_firmware_BSP&Pack_user_guide_EN_V2.0.7.pdf and /dev/null differ diff --git a/document/AT32F415鍥轰欢搴揃SP&Pack搴旂敤鎸囧崡.pdf b/document/AT32F415鍥轰欢搴揃SP&Pack搴旂敤鎸囧崡.pdf index bb8b97b..d09e295 100644 Binary files a/document/AT32F415鍥轰欢搴揃SP&Pack搴旂敤鎸囧崡.pdf and b/document/AT32F415鍥轰欢搴揃SP&Pack搴旂敤鎸囧崡.pdf differ diff --git a/document/ReleaseNotes_AT32F415_Firmware_Library.htm b/document/ReleaseNotes_AT32F415_Firmware_Library.htm new file mode 100644 index 0000000..ada5c49 --- /dev/null +++ b/document/ReleaseNotes_AT32F415_Firmware_Library.htm @@ -0,0 +1,837 @@ + + + + + + + + + + + +
+ +

Release +Notes for

+ +

AT32F415 +Firmware Library

+ +

V2.1.7-2025/08/04

+ +

1.         +Drivers

+ +

l  GPIO

+ +

w   新增gpio_bits_toggle()函数。

+ +

l  TMR

+ +

w   更新tmr_pwm_input_config()、tmr_encoder_mode_config()和tmr_output_channel_config()函数。通道模式配置前关闭通道使能，否则通道模式无法切换。

+ +

l  USART

+ +

w   更新usart_flag_clear()函数，更改USART_RDBF_FLAG的清除方式为读DT寄存器清。

+ +

2.         +Middlewares

+ +

l  USB

+ +

w   更新host模式下usbh_hch_in_handler()函数，在NAK时的中断传输和同步传输不使能通道。

+ +

w   更新keyboard class，在keyboard_type结构体中新增成员send_state用于记录发送状态，并更新函数usb_keyboard_class_send_report用于发送时的流控处理，避免发送数据出错。

+ +

w   更新audio class，修改audio sampling frequency请求的配置，解决部分主机下的兼容性问题。

+ +

3.         +Demos

+ +

l  PWC

+ +

w   更新deepsleep_ertc_alarm和deepsleep_ertc_tamper示例配置流程，并更新唤醒稳定延时方式。

+ +

l  USB

+ +

w   调整keyboard中进deepsleep为额外低功耗模式和配置流程，并更新唤醒稳定延时方式。

+ +

w   调整mouse中进deepsleep为额外低功耗模式和配置流程，并更新唤醒稳定延时方式。

+ +

w   更新msc中宏定义USB_FLASH_ADDR_OFFSET值，由0x08005000改为0x08008000，解决不同环境下编译范围溢出导致出错问题。

+ +

w   更新所有USB相关demo，调整USB时钟分频配置以SCLK作为参照。

+ +

l  SPI

+ +

w   更新所有SPI示例代码的结构和框架，移除usb_jtagpin_hardwarecs_dma并新增fullduplex_dma。

+ +

l  ADC

+ +

w   删除功能重复的software_trigger_repeat示例。

+ +

w   更新有使用到DMA的相关示例，调整为ADC循环触发转换，DMA循环取数据的方式。

+ +

w   更新所有ADC示例，调整初始化流程，加强特定环境下的ADC抗干扰能力，防止干扰可能导致的数据乱序现象。

+ +

l  templates

+ +

w   更新eclipse_gcc中工程配置的include路径，防止多工程导入时workspace_project_locations参数错误导致编译报错。

+ +

l  Board

+ +

w   更新board.c中部分参数变量的写法，解决新版编译器下编译警告。

+ +

l  Cortex-m4

+ +

w   更新systick_interrupt中判断延时的写法由大于改为大于等于，避免翻转IO多1ms问题。

+ +

l  Keil工程

+ +

w   更新部分Keil工程的IROM size配置。

+ +

4.         +更新部分注释。

+ +

 

+ +

V2.1.6-2024/12/13

+ +

1.         +更新内核DSP库。

+ +

2.         +更新CAN驱动。

+ +

3.         +更新SDIO协议层驱动，并新增emmc_card demo。

+ +

4.         +更新USB驱动。

+ +

5.         +更新I2C eeprom +demo，增加多页写逻辑。

+ +

6.         +优化PWR驱动和demo。

+ +

7.         +更新部分注释。

+ +

 

+ +

V2.1.5-2024/08/08

+ +

1.         +更新USB驱动。

+ +

2.         +调整sdio demo中总线时钟频率。

+ +

3.         +更新i2c_flag_clear和i2c_init函数。

+ +

4.         +更新msc iap +demo，完善兼容性问题。

+ +

5.         +更新I2C dma相关demo的初始化配置流程。

+ +

6.         +修正部分demo AC6环境下编译问题。

+ +

7.         +更新部分注释。

+ +

 

+ +

V2.1.4-2024/02/01

+ +

1.         +更新slib demo。

+ +

 

+ +

V2.1.3-2024/01/26

+ +

1.         +更新usbd_core_type +4字节对齐。

+ +

2.         +更新USB hid report描述符。

+ +

3.         +更新工程中sram size相关。

+ +

4.         +新增比较器输出参数定义。

+ +

5.         +更新部分注释。

+ +

 

+ +

V2.1.2-2024/01/05

+ +

1.         +更新timer下input_capture demo的计数计算方式。

+ +

2.         +更新部分USB demo +HID识别慢问题。

+ +

3.         +更新systick interrupt +demo中systick的初始化函数。

+ +

4.         +新增winusb demo。

+ +

5.         +各demo中更新xx_interrupt_flag_get函数调用方式。

+ +

 

+ +

V2.1.1-2023/10/26

+ +

1.         +更新USB驱动。

+ +

2.         +更新部分注释及readme。

+ +

 

+ +

V2.1.0-2023/08/04

+ +

1.         +utilities下各demo增加AT32IDE工程支持。

+ +

2.         +CRC驱动新增多项式及多项式宽度可修改的支持。

+ +

3.         +更新USB驱动及demo，完善数据对齐问题，优化代码流程。

+ +

4.         +完善IAR9使用printf时的重定向兼容性问题。

+ +

5.         +新增按FLASH容量区分的宏定义并更新FLASH demo。

+ +

6.         +更新部分注释。

+ +

 

+ +

V2.0.9-2023/02/16

+ +

1.         +完善utilities下freertos demo的AC6编译问题。

+ +

2.         +在at32f415_conf.h中新增了LEXT_VALUE宏定义。

+ +

3.         +调整system_clock_config系统时钟配置函数中crm_reset函数的调用位置，避免进行系统时钟来回切换使用时出错。

+ +

4.         +调整USB设置地址的时机，并修改USB host枚举超时处理流程。

+ +

5.         +更新部分注释。

+ +

 

+ +

V2.0.8-2022/11/18

+ +

1.         +移除各文件中文件头部分的版本及日期记录项。

+ +

2.         +新增一份release +notes drivers，单独记录drivers部分的更新，文件位于libraries\drivers目录下。

+ +

3.         +更新I2C中断和DMA demo为非阻塞方式。

+ +

4.         +修正USB的cdc_msc复合类在linux失败的问题。

+ +

5.         +更新USB的virtual msc iap demo以支持linux。

+ +

6.         +更新USB的audio相关内容，以提供更好的兼容性。

+ +

7.         +更新了IAR_Programmer.exe。

+ +

8.         +USART interrupt demo的中断函数中，标志位的检测加入了中断使能判断。

+ +

9.         +ADC新增repeat_conversion_loop_transfer demo，采用DMA循环取ADC数据。

+ +

 

+ +

V2.0.7-2022/08/16

+ +

1.         +更新I2C eeprom +demo，增加16 位地址支持。

+ +

2.         +新增USB主机CDC demo。

+ +

3.         +template下新增IAR v9.3的工程demo。

+ +

4.         +修正gcc环境下printf无法输出的问题。

+ +

5.         +启动文件支持configuration +wizard图形配置。

+ +

 

+ +

V2.0.6-2022/06/21

+ +

1.         +新增FLASH访问保护使能demo。

+ +

2.         +新增IO toggle +demo。

+ +

3.         +优化部分demo及驱动流程，更正注释。

+ +

 

+ +

V2.0.5-2022/05/20

+ +

1.         +修改USB +virtual msc iap demo的分区表描述符。

+ +

2.         +新增USB composite_vcp_msc +demo。

+ +

3.         +修改了SD卡相关demo，优化了卡初始化识别流程。

+ +

4.         +更正了部分CAN +demo中波特率分频设置。

+ +

5.         +优化部分demo及驱动流程，更正注释。

+ +

 

+ +

V2.0.4-2022/04/02

+ +

1.         +新增wdt_standby +demo。

+ +

2.         +导入DSP相关源码及新增cmsis_dsp demo。

+ +

3.         +优化部分demo及驱动流程，更正注释。

+ +

 

+ +

V2.0.3-2022/02/11

+ +

1.         +USB中新增virtual_comport demo。

+ +

2.         +完善USB msc +iap demo在不同系统下的兼容问题。

+ +

3.         +优化部分demo及驱动流程，更正注释。

+ +

 

+ +

V2.0.2-2021/12/31

+ +

1.         +修正中断优先级组参数定义错误的问题。

+ +

2.         +统一printf的串口初始化及重定向函数到xx_board.c中，并去除各demo中的相关内容。

+ +

3.         +更新部分demo，以支持AC6、 –O3优化等级编译。

+ +

4.         +USB中新增composite_audio_hid demo，并完善回馈及同步机制。

+ +

 

+ +

V2.0.1-2021/12/17

+ +

1.         +修正各外设的flag清除函数，防止位域方式下的误操作问题。

+ +

2.         +统一pwc_wakeup_pin_enable函数接口。

+ +

3.         +修正USB设备类数组4字节对齐问题。

+ +

4.         +更新virtual_msc_iap +demo的虚拟空间大小为100 MB。

+ +

5.         +修正composite_vcp_keyboard +demo中虚拟串口bulk传输结束问题。

+ +

6.         +更新USB demo中keyboard相关的发送函数。

+ +

7.         +更新ADC demo中timer触发adc转换的定时器频率配置流程。

+ +

 

+ +

V2.0.0-2021/11/26

+ +

1.         +AT32F415系列固件库初始发布版。

+ +
+ + + + diff --git a/document/ReleaseNotes_AT32F415_Firmware_Library_Drivers_EN_V2.0.5.pdf b/document/ReleaseNotes_AT32F415_Firmware_Library_Drivers_EN_V2.0.5.pdf deleted file mode 100644 index 8027d4d..0000000 Binary files a/document/ReleaseNotes_AT32F415_Firmware_Library_Drivers_EN_V2.0.5.pdf and /dev/null differ diff --git a/document/ReleaseNotes_AT32F415_Firmware_Library_EN_V2.1.6.pdf b/document/ReleaseNotes_AT32F415_Firmware_Library_EN_V2.1.6.pdf deleted file mode 100644 index 5acd405..0000000 Binary files a/document/ReleaseNotes_AT32F415_Firmware_Library_EN_V2.1.6.pdf and /dev/null differ diff --git a/libraries/cmsis/cm4/device_support/at32f415.h b/libraries/cmsis/cm4/device_support/at32f415.h index 7056d37..52ab026 100644 --- a/libraries/cmsis/cm4/device_support/at32f415.h +++ b/libraries/cmsis/cm4/device_support/at32f415.h @@ -128,7 +128,7 @@ extern "C" { */ #define __AT32F415_LIBRARY_VERSION_MAJOR (0x02) /*!< [31:24] major version */ #define __AT32F415_LIBRARY_VERSION_MIDDLE (0x01) /*!< [23:16] middle version */ -#define __AT32F415_LIBRARY_VERSION_MINOR (0x06) /*!< [15:8] minor version */ +#define __AT32F415_LIBRARY_VERSION_MINOR (0x07) /*!< [15:8] minor version */ #define __AT32F415_LIBRARY_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __AT32F415_LIBRARY_VERSION ((__AT32F415_LIBRARY_VERSION_MAJOR << 24) | \ (__AT32F415_LIBRARY_VERSION_MIDDLE << 16) | \ diff --git a/libraries/cmsis/cm4/device_support/system_at32f415.c b/libraries/cmsis/cm4/device_support/system_at32f415.c index 342c399..cfeb15c 100644 --- a/libraries/cmsis/cm4/device_support/system_at32f415.c +++ b/libraries/cmsis/cm4/device_support/system_at32f415.c @@ -141,14 +141,14 @@ void system_core_clock_update(void) pll_mult_h = CRM->cfg_bit.pllmult_h; /* process high bits */ if((pll_mult_h != 0U) || (pll_mult == 15U)){ - pll_mult += ((16U * pll_mult_h) + 1U); + pll_mult += ((16U * pll_mult_h) + 1U); } else { - pll_mult += 2U; + pll_mult += 2U; } - if (pll_clock_source == 0x00) + if(pll_clock_source == 0x00) { /* hick divided by 2 selected as pll clock entry */ system_core_clock = (HICK_VALUE >> 1) * pll_mult; @@ -156,7 +156,7 @@ void system_core_clock_update(void) else { /* hext selected as pll clock entry */ - if (CRM->cfg_bit.pllhextdiv != RESET) + if(CRM->cfg_bit.pllhextdiv != RESET) { /* hext clock divided by 2 */ system_core_clock = (HEXT_VALUE / 2) * pll_mult; @@ -173,7 +173,7 @@ void system_core_clock_update(void) pll_ns = CRM->pll_bit.pllns; pll_fr = CRM->pll_bit.pllfr; - if (pll_clock_source == 0x00) + if(pll_clock_source == 0x00) { /* hick divided by 2 selected as pll clock entry */ pllrcsfreq = (HICK_VALUE >> 1); @@ -181,7 +181,7 @@ void system_core_clock_update(void) else { /* hext selected as pll clock entry */ - if (CRM->cfg_bit.pllhextdiv != RESET) + if(CRM->cfg_bit.pllhextdiv != RESET) { /* hext clock divided by 2 */ pllrcsfreq = (HEXT_VALUE / 2); diff --git a/libraries/drivers/ReleaseNotes_AT32F415_Firmware_Library_Drivers.htm b/libraries/drivers/ReleaseNotes_AT32F415_Firmware_Library_Drivers.htm new file mode 100644 index 0000000..c75b6ed --- /dev/null +++ b/libraries/drivers/ReleaseNotes_AT32F415_Firmware_Library_Drivers.htm @@ -0,0 +1,255 @@ + + + + + + + + + + + +
+ +

Release +Notes for

+ +

AT32F415 +Firmware Library Drivers

+ +

V2.0.6-2025/08/04

+ +

1.         +GPIO

+ +

l  新增gpio_bits_toggle()函数。

+ +

2.         +TMR

+ +

l  更新tmr_pwm_input_config()、tmr_encoder_mode_config()和tmr_output_channel_config()函数。通道模式配置前关闭通道使能，否则通道模式无法切换。

+ +

3.         +USART

+ +

l  更新usart_flag_clear()函数，更改USART_RDBF_FLAG的清除方式为读DT寄存器清。

+ +

4.         +更新部分注释。

+ +

 

+ +

V2.0.5-2024/12/13

+ +

1.         +更新CAN驱动。

+ +

2.         +更新USB驱动。

+ +

3.         +更新部分注释。

+ +

 

+ +

V2.0.4-2024/08/08

+ +

1.         +更新i2c_flag_clear和i2c_init函数。

+ +

2.         +更新部分注释。

+ +

 

+ +

V2.0.3-2024/01/05

+ +

1.         +完善部分驱动流程在IAR7.4下的编译警告。

+ +

2.         +更新iar/gcc启动文件中ERTC对应的中断函数名。

+ +

 

+ +

V2.0.2-2023/10/26

+ +

1.         +各IP驱动新增interrupt_flag_get函数。

+ +

2.         +优化系统时钟切换流程。

+ +

 

+ +

V2.0.1-2023/08/04

+ +

1.         +CRC驱动新增多项式及多项式宽度可修改的支持。

+ +

2.         +更新了adc_ordinary_channel_set和adc_preempt_channel_set函数流程。

+ +

3.         +更新部分注释。

+ +

 

+ +

V2.0.0-2022/11/18

+ +

1.         +更新当HICK作为PLL时钟源时CRM_HICK48_NODIV作为默认设置。

+ +
+ + + + diff --git a/libraries/drivers/ReleaseNotes_AT32F415_Firmware_Library_Drivers.pdf b/libraries/drivers/ReleaseNotes_AT32F415_Firmware_Library_Drivers.pdf deleted file mode 100644 index f3f366b..0000000 Binary files a/libraries/drivers/ReleaseNotes_AT32F415_Firmware_Library_Drivers.pdf and /dev/null differ diff --git a/libraries/drivers/inc/at32f415_can.h b/libraries/drivers/inc/at32f415_can.h index 82de7fc..e1f6c58 100644 --- a/libraries/drivers/inc/at32f415_can.h +++ b/libraries/drivers/inc/at32f415_can.h @@ -707,7 +707,7 @@ typedef struct __IO uint32_t inten; struct { - __IO uint32_t tcien : 1; /* [0] */ + __IO uint32_t tcien : 1; /* [0] */ __IO uint32_t rf0mien : 1; /* [1] */ __IO uint32_t rf0fien : 1; /* [2] */ __IO uint32_t rf0oien : 1; /* [3] */ diff --git a/libraries/drivers/inc/at32f415_gpio.h b/libraries/drivers/inc/at32f415_gpio.h index bdfac5f..6296034 100644 --- a/libraries/drivers/inc/at32f415_gpio.h +++ b/libraries/drivers/inc/at32f415_gpio.h @@ -786,6 +786,7 @@ flag_status gpio_output_data_bit_read(gpio_type *gpio_x, uint16_t pins); uint16_t gpio_output_data_read(gpio_type *gpio_x); void gpio_bits_set(gpio_type *gpio_x, uint16_t pins); void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins); +void gpio_bits_toggle(gpio_type *gpio_x, uint16_t pins); void gpio_bits_write(gpio_type *gpio_x, uint16_t pins, confirm_state bit_state); void gpio_port_write(gpio_type *gpio_x, uint16_t port_value); void gpio_pin_wp_config(gpio_type *gpio_x, uint16_t pins); diff --git a/libraries/drivers/src/at32f415_crm.c b/libraries/drivers/src/at32f415_crm.c index 178cb3b..dc5cb31 100644 --- a/libraries/drivers/src/at32f415_crm.c +++ b/libraries/drivers/src/at32f415_crm.c @@ -763,14 +763,14 @@ void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct) /* process high bits */ if((pll_mult_h != 0U) || (pll_mult == 15U)) { - pll_mult += ((16U * pll_mult_h) + 1U); + pll_mult += ((16U * pll_mult_h) + 1U); } else { - pll_mult += 2U; + pll_mult += 2U; } - if (pll_clock_source == 0x00) + if(pll_clock_source == 0x00) { /* hick divided by 2 selected as pll clock entry */ clocks_struct->sclk_freq = (HICK_VALUE >> 1) * pll_mult; @@ -778,7 +778,7 @@ void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct) else { /* hext selected as pll clock entry */ - if (CRM->cfg_bit.pllhextdiv != RESET) + if(CRM->cfg_bit.pllhextdiv != RESET) { /* hext clock divided by 2 */ clocks_struct->sclk_freq = (HEXT_VALUE / 2) * pll_mult; @@ -795,7 +795,7 @@ void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct) pll_ns = CRM->pll_bit.pllns; pll_fr = CRM->pll_bit.pllfr; - if (pll_clock_source == 0x00) + if(pll_clock_source == 0x00) { /* hick divided by 2 selected as pll clock entry */ pllrcsfreq = (HICK_VALUE >> 1); @@ -803,7 +803,7 @@ void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct) else { /* hext selected as pll clock entry */ - if (CRM->cfg_bit.pllhextdiv != RESET) + if(CRM->cfg_bit.pllhextdiv != RESET) { /* hext clock divided by 2 */ pllrcsfreq = (HEXT_VALUE / 2); diff --git a/libraries/drivers/src/at32f415_gpio.c b/libraries/drivers/src/at32f415_gpio.c index a6a924c..b1d97d0 100644 --- a/libraries/drivers/src/at32f415_gpio.c +++ b/libraries/drivers/src/at32f415_gpio.c @@ -341,6 +341,37 @@ void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins) gpio_x->clr = pins; } +/** + * @brief toggle the selected data port bits. + * @param gpio_x: to select the gpio peripheral. + * this parameter can be one of the following values: + * GPIOA, GPIOB, GPIOC, GPIOD, GPIOF. + * @param pins: gpio pin number + * parameter can be any combination of gpio_pin_x, gpio_pin_x as following values: + * - GPIO_PINS_0 + * - GPIO_PINS_1 + * - GPIO_PINS_2 + * - GPIO_PINS_3 + * - GPIO_PINS_4 + * - GPIO_PINS_5 + * - GPIO_PINS_6 + * - GPIO_PINS_7 + * - GPIO_PINS_8 + * - GPIO_PINS_9 + * - GPIO_PINS_10 + * - GPIO_PINS_11 + * - GPIO_PINS_12 + * - GPIO_PINS_13 + * - GPIO_PINS_14 + * - GPIO_PINS_15 + * - GPIO_PINS_ALL + * @retval none + */ +void gpio_bits_toggle(gpio_type *gpio_x, uint16_t pins) +{ + gpio_x->odt ^= pins; +} + /** * @brief set or clear the selected data port bit. * @param gpio_x: to select the gpio peripheral. diff --git a/libraries/drivers/src/at32f415_tmr.c b/libraries/drivers/src/at32f415_tmr.c index d72199b..9a5ec9c 100644 --- a/libraries/drivers/src/at32f415_tmr.c +++ b/libraries/drivers/src/at32f415_tmr.c @@ -319,21 +319,31 @@ void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_chan /* set channel output mode */ channel = tmr_channel; + /* reset output channel(complementary) enable bit */ + chx_offset = (tmr_channel * 2); + chcx_offset = ((tmr_channel * 2) + 2); + tmr_x->cctrl &= ~(1<cctrl &= ~(1<cm1_output_bit.c1c = FALSE; tmr_x->cm1_output_bit.c1octrl = tmr_output_struct->oc_mode; break; case TMR_SELECT_CHANNEL_2: + tmr_x->cm1_output_bit.c2c = FALSE; tmr_x->cm1_output_bit.c2octrl = tmr_output_struct->oc_mode; break; case TMR_SELECT_CHANNEL_3: + tmr_x->cm2_output_bit.c3c = FALSE; tmr_x->cm2_output_bit.c3octrl = tmr_output_struct->oc_mode; break; case TMR_SELECT_CHANNEL_4: + tmr_x->cm2_output_bit.c4c = FALSE; tmr_x->cm2_output_bit.c4octrl = tmr_output_struct->oc_mode; break; @@ -358,9 +368,6 @@ void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_chan tmr_x->cctrl &= ~(1<cctrl |= channel_index; - chx_offset = (tmr_channel * 2); - chcx_offset = ((tmr_channel * 2) + 2); - /* get channel enable bit position in cctrl register */ channel_index = (uint16_t)(tmr_output_struct->oc_output_state << (tmr_channel * 2)); @@ -368,11 +375,9 @@ void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_chan channel_c_index = (uint16_t)(tmr_output_struct->occ_output_state << ((tmr_channel * 2) + 2)); /* set output channel complementary enable bit */ - tmr_x->cctrl &= ~(1<cctrl |= channel_c_index; /* set output channel enable bit */ - tmr_x->cctrl &= ~(1<cctrl |= channel_index; } @@ -798,7 +803,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct switch(channel) { case TMR_SELECT_CHANNEL_1: - tmr_x->cctrl_bit.c1en = FALSE; + tmr_x->cctrl_bit.c1en = FALSE; tmr_x->cctrl_bit.c1p = (uint32_t)input_struct->input_polarity_select; tmr_x->cctrl_bit.c1cp = (input_struct->input_polarity_select & 0x2) >> 1; tmr_x->cm1_input_bit.c1c = input_struct->input_mapped_select; @@ -808,7 +813,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct break; case TMR_SELECT_CHANNEL_2: - tmr_x->cctrl_bit.c2en = FALSE; + tmr_x->cctrl_bit.c2en = FALSE; tmr_x->cctrl_bit.c2p = (uint32_t)input_struct->input_polarity_select; tmr_x->cctrl_bit.c2cp = (input_struct->input_polarity_select & 0x2) >> 1; tmr_x->cm1_input_bit.c2c = input_struct->input_mapped_select; @@ -818,7 +823,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct break; case TMR_SELECT_CHANNEL_3: - tmr_x->cctrl_bit.c3en = FALSE; + tmr_x->cctrl_bit.c3en = FALSE; tmr_x->cctrl_bit.c3p = (uint32_t)input_struct->input_polarity_select; tmr_x->cctrl_bit.c3cp = (input_struct->input_polarity_select & 0x2) >> 1; tmr_x->cm2_input_bit.c3c = input_struct->input_mapped_select; @@ -828,7 +833,7 @@ void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct break; case TMR_SELECT_CHANNEL_4: - tmr_x->cctrl_bit.c4en = FALSE; + tmr_x->cctrl_bit.c4en = FALSE; tmr_x->cctrl_bit.c4p = (uint32_t)input_struct->input_polarity_select; tmr_x->cm2_input_bit.c4c = input_struct->input_mapped_select; tmr_x->cm2_input_bit.c4df = input_struct->input_filter_value; @@ -969,6 +974,8 @@ void tmr_pwm_input_config(tmr_type *tmr_x, tmr_input_config_type *input_struct, switch(channel) { case TMR_SELECT_CHANNEL_1: + tmr_x->cctrl_bit.c1en = FALSE; + tmr_x->cctrl_bit.c2en = FALSE; if(input_struct->input_polarity_select == TMR_INPUT_RISING_EDGE) { /* set channel polarity */ @@ -1012,6 +1019,8 @@ void tmr_pwm_input_config(tmr_type *tmr_x, tmr_input_config_type *input_struct, break; case TMR_SELECT_CHANNEL_2: + tmr_x->cctrl_bit.c1en = FALSE; + tmr_x->cctrl_bit.c2en = FALSE; if(input_struct->input_polarity_select == TMR_INPUT_RISING_EDGE) { /* set channel polarity */ @@ -1609,6 +1618,9 @@ void tmr_encoder_mode_config(tmr_type *tmr_x, tmr_encoder_mode_type encoder_mode { tmr_x->stctrl_bit.smsel = encoder_mode; + tmr_x->cctrl_bit.c1en = FALSE; + tmr_x->cctrl_bit.c2en = FALSE; + /* set ic1 polarity */ tmr_x->cctrl_bit.c1p = (ic1_polarity & 0x1); tmr_x->cctrl_bit.c1cp = (ic1_polarity >> 1); diff --git a/libraries/drivers/src/at32f415_usart.c b/libraries/drivers/src/at32f415_usart.c index 04f8e7c..cb169c1 100644 --- a/libraries/drivers/src/at32f415_usart.c +++ b/libraries/drivers/src/at32f415_usart.c @@ -90,7 +90,7 @@ void usart_reset(usart_type* usart_x) * this parameter can be one of the following values: * - USART_DATA_8BITS * - USART_DATA_9BITS. - * note锛� + * note: * - when parity check is disabled, the data bit width is the actual data bit number. * - when parity check is enabled, the data bit width is the actual data bit number minus 1, and the MSB bit is replaced with the parity bit. * @param stop_bit: stop bits transmitted @@ -666,7 +666,6 @@ flag_status usart_interrupt_flag_get(usart_type* usart_x, uint32_t flag) * - USART_PERR_FLAG, USART_FERR_FLAG, USART_NERR_FLAG, USART_ROERR_FLAG and USART_IDLEF_FLAG are cleared by software * sequence: a read operation to usart sts register (usart_flag_get()) * followed by a read operation to usart dt register (usart_data_receive()). - * - USART_RDBF_FLAG can be also cleared by a read to the usart dt register(usart_data_receive()). * - USART_TDC_FLAG can be also cleared by software sequence: a read operation to usart sts register (usart_flag_get()) * followed by a write operation to usart dt register (usart_data_transmit()). * - USART_TDBE_FLAG is cleared only by a write to the usart dt register(usart_data_transmit()). @@ -674,7 +673,7 @@ flag_status usart_interrupt_flag_get(usart_type* usart_x, uint32_t flag) */ void usart_flag_clear(usart_type* usart_x, uint32_t flag) { - if(flag & (USART_PERR_FLAG | USART_FERR_FLAG | USART_NERR_FLAG | USART_ROERR_FLAG | USART_IDLEF_FLAG)) + if(flag & (USART_PERR_FLAG | USART_FERR_FLAG | USART_NERR_FLAG | USART_ROERR_FLAG | USART_IDLEF_FLAG | USART_RDBF_FLAG)) { UNUSED(usart_x->sts); UNUSED(usart_x->dt); diff --git a/middlewares/usb_drivers/src/usbh_int.c b/middlewares/usb_drivers/src/usbh_int.c index cd383b8..a9b46b5 100644 --- a/middlewares/usb_drivers/src/usbh_int.c +++ b/middlewares/usb_drivers/src/usbh_int.c @@ -229,13 +229,21 @@ void usbh_hch_in_handler(usbh_core_type *uhost, uint8_t chn) { uhost->urb_state[chn] = URB_NOTREADY; } - usb_chh->hcchar_bit.chdis = FALSE; - usb_chh->hcchar_bit.chena = TRUE; + if(usb_chh->hcchar_bit.eptype == EPT_CONTROL_TYPE || + usb_chh->hcchar_bit.eptype == EPT_BULK_TYPE) + { + usb_chh->hcchar_bit.chdis = FALSE; + usb_chh->hcchar_bit.chena = TRUE; + } } else if(uhost->hch[chn].state == HCH_NAK) { - usb_chh->hcchar_bit.chdis = FALSE; - usb_chh->hcchar_bit.chena = TRUE; + if(usb_chh->hcchar_bit.eptype == EPT_CONTROL_TYPE || + usb_chh->hcchar_bit.eptype == EPT_BULK_TYPE) + { + usb_chh->hcchar_bit.chdis = FALSE; + usb_chh->hcchar_bit.chena = TRUE; + } uhost->urb_state[chn] = URB_NOTREADY; } usb_chh->hcint = USB_OTG_HC_CHHLTD_FLAG; diff --git a/middlewares/usbd_class/audio/audio_class.c b/middlewares/usbd_class/audio/audio_class.c index 60dd661..54d3cae 100644 --- a/middlewares/usbd_class/audio/audio_class.c +++ b/middlewares/usbd_class/audio/audio_class.c @@ -480,32 +480,75 @@ static void audio_req_get_cur(void *udev, usb_setup_type *setup) { usbd_core_type *pudev = (usbd_core_type *)udev; usb_audio_type *paudio = (usb_audio_type *)pudev->class_handler->pdata; - if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + + switch(setup->bmRequestType & AUDIO_REQ_CONTROL_MASK) { - if(HBYTE(setup->wValue) == AUDIO_MUTE_CONTROL) - { - paudio->g_audio_cur[0] = paudio->spk_mute; - usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); - } - else - { - *((uint16_t *)paudio->g_audio_cur) = paudio->spk_volume; - usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); - } - } - else - { - if(HBYTE(setup->wValue) == AUDIO_MUTE_CONTROL) - { - paudio->g_audio_cur[0] = paudio->mic_mute; - usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); - } - else - { - *((uint16_t *)paudio->g_audio_cur) = paudio->mic_volume; - usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); - } - + case AUDIO_REQ_CONTROL_INTERFACE: + if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + { + if(HBYTE(setup->wValue) == AUDIO_MUTE_CONTROL) + { + paudio->g_audio_cur[0] = paudio->spk_mute; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else if(HBYTE(setup->wValue) == AUDIO_VOLUME_CONTROL) + { + *((uint16_t *)paudio->g_audio_cur) = paudio->spk_volume; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + } + else if(HBYTE(setup->wIndex) == AUDIO_MIC_FEATURE_UNIT_ID) + { + if(HBYTE(setup->wValue) == AUDIO_MUTE_CONTROL) + { + paudio->g_audio_cur[0] = paudio->mic_mute; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else if(HBYTE(setup->wValue) == AUDIO_VOLUME_CONTROL) + { + *((uint16_t *)paudio->g_audio_cur) = paudio->mic_volume; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + } + else + { + usbd_ctrl_unsupport(pudev); + } + break; + case AUDIO_REQ_CONTROL_ENDPOINT: + if(HBYTE(setup->wValue) == AUDIO_SAMPLING_FREQ_CONTROL) + { + if(setup->wIndex == USBD_AUDIO_MIC_IN_EPT) + { + *((uint32_t *)paudio->g_audio_cur) = paudio->mic_freq; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else if(setup->wIndex == USBD_AUDIO_SPK_OUT_EPT) + { + *((uint32_t *)paudio->g_audio_cur) = paudio->spk_freq; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + } + else + { + usbd_ctrl_unsupport(pudev); + } + break; + default: + usbd_ctrl_unsupport(pudev); + break; } } @@ -534,19 +577,35 @@ static void audio_req_set_cur(void *udev, usb_setup_type *setup) { paudio->request_no = AUDIO_MUTE_CONTROL; } - else + else if(HBYTE(setup->wValue) == AUDIO_VOLUME_CONTROL) { paudio->request_no = AUDIO_VOLUME_CONTROL; } + else + { + usbd_ctrl_unsupport(pudev); + } break; case AUDIO_REQ_CONTROL_ENDPOINT: - paudio->enpd = setup->wIndex; - paudio->request_no = AUDIO_FREQ_SET_CONTROL; + if(HBYTE(setup->wValue) == AUDIO_SAMPLING_FREQ_CONTROL) + { + paudio->enpd = setup->wIndex; + paudio->request_no = AUDIO_FREQ_SET_CONTROL; + } + else + { + usbd_ctrl_unsupport(pudev); + } break; default: + usbd_ctrl_unsupport(pudev); break; } } + else + { + usbd_ctrl_unsupport(pudev); + } } /** @@ -559,15 +618,31 @@ static void audio_req_get_min(void *udev, usb_setup_type *setup) { usbd_core_type *pudev = (usbd_core_type *)udev; usb_audio_type *paudio = (usb_audio_type *)pudev->class_handler->pdata; - if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + + switch(setup->bmRequestType & AUDIO_REQ_CONTROL_MASK) { - *((uint16_t *)paudio->g_audio_cur) = paudio->spk_volume_limits[0]; - usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); - } - else - { - *((uint16_t *)paudio->g_audio_cur) = paudio->mic_volume_limits[0]; - usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + case AUDIO_REQ_CONTROL_INTERFACE: + if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio->g_audio_cur) = paudio->spk_volume_limits[0]; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else if(HBYTE(setup->wIndex) == AUDIO_MIC_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio->g_audio_cur) = paudio->mic_volume_limits[0]; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + break; + case AUDIO_REQ_CONTROL_ENDPOINT: + usbd_ctrl_unsupport(pudev); + break; + default: + usbd_ctrl_unsupport(pudev); + break; } } @@ -581,15 +656,31 @@ static void audio_req_get_max(void *udev, usb_setup_type *setup) { usbd_core_type *pudev = (usbd_core_type *)udev; usb_audio_type *paudio = (usb_audio_type *)pudev->class_handler->pdata; - if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + + switch(setup->bmRequestType & AUDIO_REQ_CONTROL_MASK) { - *((uint16_t *)paudio->g_audio_cur) = paudio->spk_volume_limits[1]; - usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); - } - else - { - *((uint16_t *)paudio->g_audio_cur) = paudio->mic_volume_limits[1]; - usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + case AUDIO_REQ_CONTROL_INTERFACE: + if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio->g_audio_cur) = paudio->spk_volume_limits[1]; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else if(HBYTE(setup->wIndex) == AUDIO_MIC_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio->g_audio_cur) = paudio->mic_volume_limits[1]; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + break; + case AUDIO_REQ_CONTROL_ENDPOINT: + usbd_ctrl_unsupport(pudev); + break; + default: + usbd_ctrl_unsupport(pudev); + break; } } @@ -603,15 +694,30 @@ static void audio_req_get_res(void *udev, usb_setup_type *setup) { usbd_core_type *pudev = (usbd_core_type *)udev; usb_audio_type *paudio = (usb_audio_type *)pudev->class_handler->pdata; - if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + switch(setup->bmRequestType & AUDIO_REQ_CONTROL_MASK) { - *((uint16_t *)paudio->g_audio_cur) = paudio->spk_volume_limits[2]; - usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); - } - else - { - *((uint16_t *)paudio->g_audio_cur) = paudio->mic_volume_limits[2]; - usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + case AUDIO_REQ_CONTROL_INTERFACE: + if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio->g_audio_cur) = paudio->spk_volume_limits[2]; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else if(HBYTE(setup->wIndex) == AUDIO_MIC_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio->g_audio_cur) = paudio->mic_volume_limits[2]; + usbd_ctrl_send(pudev, paudio->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + break; + case AUDIO_REQ_CONTROL_ENDPOINT: + usbd_ctrl_unsupport(pudev); + break; + default: + usbd_ctrl_unsupport(pudev); + break; } } @@ -668,7 +774,10 @@ static void audio_get_interface(void *udev, usb_setup_type *setup) { usbd_ctrl_send(pudev, (uint8_t *)&paudio->mic_alt_setting, 1); } - + else + { + usbd_ctrl_unsupport(pudev); + } } diff --git a/middlewares/usbd_class/audio/audio_class.h b/middlewares/usbd_class/audio/audio_class.h index 0a63892..3c35ca9 100644 --- a/middlewares/usbd_class/audio/audio_class.h +++ b/middlewares/usbd_class/audio/audio_class.h @@ -74,6 +74,7 @@ extern "C" { #define AUDIO_MUTE_CONTROL 0x01 #define AUDIO_VOLUME_CONTROL 0x02 #define AUDIO_FREQ_SET_CONTROL 0x03 +#define AUDIO_SAMPLING_FREQ_CONTROL 0x01 /** * @brief audio descriptor type diff --git a/middlewares/usbd_class/audio_hid/audio_hid_class.c b/middlewares/usbd_class/audio_hid/audio_hid_class.c index d60a2f3..eada72d 100644 --- a/middlewares/usbd_class/audio_hid/audio_hid_class.c +++ b/middlewares/usbd_class/audio_hid/audio_hid_class.c @@ -640,32 +640,75 @@ static void audio_req_get_cur(void *udev, usb_setup_type *setup) { usbd_core_type *pudev = (usbd_core_type *)udev; usb_audio_hid_type *paudio_hid = (usb_audio_hid_type *)pudev->class_handler->pdata; - if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + + switch(setup->bmRequestType & AUDIO_REQ_CONTROL_MASK) { - if(HBYTE(setup->wValue) == AUDIO_MUTE_CONTROL) - { - paudio_hid->g_audio_cur[0] = paudio_hid->spk_mute; - usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); - } - else - { - *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->spk_volume; - usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); - } - } - else - { - if(HBYTE(setup->wValue) == AUDIO_MUTE_CONTROL) - { - paudio_hid->g_audio_cur[0] = paudio_hid->mic_mute; - usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); - } - else - { - *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->mic_volume; - usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); - } - + case AUDIO_REQ_CONTROL_INTERFACE: + if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + { + if(HBYTE(setup->wValue) == AUDIO_MUTE_CONTROL) + { + paudio_hid->g_audio_cur[0] = paudio_hid->spk_mute; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else if(HBYTE(setup->wValue) == AUDIO_VOLUME_CONTROL) + { + *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->spk_volume; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + } + else if(HBYTE(setup->wIndex) == AUDIO_MIC_FEATURE_UNIT_ID) + { + if(HBYTE(setup->wValue) == AUDIO_MUTE_CONTROL) + { + paudio_hid->g_audio_cur[0] = paudio_hid->mic_mute; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else if(HBYTE(setup->wValue) == AUDIO_VOLUME_CONTROL) + { + *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->mic_volume; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + } + else + { + usbd_ctrl_unsupport(pudev); + } + break; + case AUDIO_REQ_CONTROL_ENDPOINT: + if(HBYTE(setup->wValue) == AUDIO_SAMPLING_FREQ_CONTROL) + { + if(setup->wIndex == USBD_AUHID_AUDIO_MIC_IN_EPT) + { + *((uint32_t *)paudio_hid->g_audio_cur) = paudio_hid->mic_freq; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else if(setup->wIndex == USBD_AUHID_AUDIO_SPK_OUT_EPT) + { + *((uint32_t *)paudio_hid->g_audio_cur) = paudio_hid->spk_freq; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + } + else + { + usbd_ctrl_unsupport(pudev); + } + break; + default: + usbd_ctrl_unsupport(pudev); + break; } } @@ -694,19 +737,35 @@ static void audio_req_set_cur(void *udev, usb_setup_type *setup) { paudio_hid->request_no = AUDIO_MUTE_CONTROL; } - else + else if(HBYTE(setup->wValue) == AUDIO_VOLUME_CONTROL) { paudio_hid->request_no = AUDIO_VOLUME_CONTROL; } + else + { + usbd_ctrl_unsupport(pudev); + } break; case AUDIO_REQ_CONTROL_ENDPOINT: - paudio_hid->enpd = setup->wIndex; - paudio_hid->request_no = AUDIO_FREQ_SET_CONTROL; + if(HBYTE(setup->wValue) == AUDIO_SAMPLING_FREQ_CONTROL) + { + paudio_hid->enpd = setup->wIndex; + paudio_hid->request_no = AUDIO_FREQ_SET_CONTROL; + } + else + { + usbd_ctrl_unsupport(pudev); + } break; default: + usbd_ctrl_unsupport(pudev); break; } } + else + { + usbd_ctrl_unsupport(pudev); + } } /** @@ -719,15 +778,31 @@ static void audio_req_get_min(void *udev, usb_setup_type *setup) { usbd_core_type *pudev = (usbd_core_type *)udev; usb_audio_hid_type *paudio_hid = (usb_audio_hid_type *)pudev->class_handler->pdata; - if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + + switch(setup->bmRequestType & AUDIO_REQ_CONTROL_MASK) { - *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->spk_volume_limits[0]; - usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); - } - else - { - *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->mic_volume_limits[0]; - usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + case AUDIO_REQ_CONTROL_INTERFACE: + if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->spk_volume_limits[0]; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else if(HBYTE(setup->wIndex) == AUDIO_MIC_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->mic_volume_limits[0]; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + break; + case AUDIO_REQ_CONTROL_ENDPOINT: + usbd_ctrl_unsupport(pudev); + break; + default: + usbd_ctrl_unsupport(pudev); + break; } } @@ -741,15 +816,31 @@ static void audio_req_get_max(void *udev, usb_setup_type *setup) { usbd_core_type *pudev = (usbd_core_type *)udev; usb_audio_hid_type *paudio_hid = (usb_audio_hid_type *)pudev->class_handler->pdata; - if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + + switch(setup->bmRequestType & AUDIO_REQ_CONTROL_MASK) { - *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->spk_volume_limits[1]; - usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); - } - else - { - *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->mic_volume_limits[1]; - usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + case AUDIO_REQ_CONTROL_INTERFACE: + if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->spk_volume_limits[1]; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else if(HBYTE(setup->wIndex) == AUDIO_MIC_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->mic_volume_limits[1]; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + break; + case AUDIO_REQ_CONTROL_ENDPOINT: + usbd_ctrl_unsupport(pudev); + break; + default: + usbd_ctrl_unsupport(pudev); + break; } } @@ -763,15 +854,31 @@ static void audio_req_get_res(void *udev, usb_setup_type *setup) { usbd_core_type *pudev = (usbd_core_type *)udev; usb_audio_hid_type *paudio_hid = (usb_audio_hid_type *)pudev->class_handler->pdata; - if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + + switch(setup->bmRequestType & AUDIO_REQ_CONTROL_MASK) { - *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->spk_volume_limits[2]; - usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); - } - else - { - *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->mic_volume_limits[2]; - usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + case AUDIO_REQ_CONTROL_INTERFACE: + if(HBYTE(setup->wIndex) == AUDIO_SPK_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->spk_volume_limits[2]; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else if(HBYTE(setup->wIndex) == AUDIO_MIC_FEATURE_UNIT_ID) + { + *((uint16_t *)paudio_hid->g_audio_cur) = paudio_hid->mic_volume_limits[2]; + usbd_ctrl_send(pudev, paudio_hid->g_audio_cur, setup->wLength); + } + else + { + usbd_ctrl_unsupport(pudev); + } + break; + case AUDIO_REQ_CONTROL_ENDPOINT: + usbd_ctrl_unsupport(pudev); + break; + default: + usbd_ctrl_unsupport(pudev); + break; } } @@ -827,7 +934,10 @@ static void audio_get_interface(void *udev, usb_setup_type *setup) { usbd_ctrl_send(pudev, (uint8_t *)&paudio_hid->mic_alt_setting, 1); } - + else + { + usbd_ctrl_unsupport(pudev); + } } /** diff --git a/middlewares/usbd_class/audio_hid/audio_hid_class.h b/middlewares/usbd_class/audio_hid/audio_hid_class.h index b829ac3..3ce4567 100644 --- a/middlewares/usbd_class/audio_hid/audio_hid_class.h +++ b/middlewares/usbd_class/audio_hid/audio_hid_class.h @@ -86,6 +86,7 @@ extern "C" { #define AUDIO_MUTE_CONTROL 0x01 #define AUDIO_VOLUME_CONTROL 0x02 #define AUDIO_FREQ_SET_CONTROL 0x03 +#define AUDIO_SAMPLING_FREQ_CONTROL 0x01 /** * @brief audio descriptor type diff --git a/middlewares/usbd_class/keyboard/keyboard_class.c b/middlewares/usbd_class/keyboard/keyboard_class.c index c923536..8075d1e 100644 --- a/middlewares/usbd_class/keyboard/keyboard_class.c +++ b/middlewares/usbd_class/keyboard/keyboard_class.c @@ -213,6 +213,7 @@ static usb_sts_type class_init_handler(void *udev) usbd_ept_open(pudev, USBD_KEYBOARD_IN_EPT, EPT_INT_TYPE, USBD_KEYBOARD_IN_MAXPACKET_SIZE); pkeyboard->g_u8tx_completed = 1; + pkeyboard->send_state = 0; return status; } @@ -369,6 +370,7 @@ static usb_sts_type class_in_handler(void *udev, uint8_t ept_num) trans next packet data */ pkeyboard->g_u8tx_completed = 1; + pkeyboard->send_state = 0; return status; } @@ -442,11 +444,16 @@ static usb_sts_type class_event_handler(void *udev, usbd_event_type event) */ usb_sts_type usb_keyboard_class_send_report(void *udev, uint8_t *report, uint16_t len) { - usb_sts_type status = USB_OK; + usb_sts_type status = USB_FAIL; usbd_core_type *pudev = (usbd_core_type *)udev; - - if(usbd_connect_state_get(pudev) == USB_CONN_STATE_CONFIGURED) + keyboard_type *pkeyboard = (keyboard_type *)pudev->class_handler->pdata; + + if(usbd_connect_state_get(pudev) == USB_CONN_STATE_CONFIGURED && pkeyboard->send_state == 0) + { + pkeyboard->send_state = 1; usbd_ept_send(pudev, USBD_KEYBOARD_IN_EPT, report, len); + status = USB_OK; + } return status; } diff --git a/middlewares/usbd_class/keyboard/keyboard_class.h b/middlewares/usbd_class/keyboard/keyboard_class.h index 4ae66a1..1767acb 100644 --- a/middlewares/usbd_class/keyboard/keyboard_class.h +++ b/middlewares/usbd_class/keyboard/keyboard_class.h @@ -71,6 +71,7 @@ typedef struct __IO uint8_t hid_suspend_flag; __IO uint8_t g_u8tx_completed; + uint8_t send_state; uint8_t hid_state; uint8_t temp; diff --git a/project/at32f415_board/at32f415_board.c b/project/at32f415_board/at32f415_board.c index f7204c1..c9fc6db 100644 --- a/project/at32f415_board/at32f415_board.c +++ b/project/at32f415_board/at32f415_board.c @@ -51,12 +51,12 @@ static __IO uint32_t fac_ms; __asm (".global __use_no_semihosting\n\t"); void _sys_exit(int x) { - x = x; + UNUSED(x); } /* __use_no_semihosting was requested, but _ttywrch was */ void _ttywrch(int ch) { - ch = ch; + UNUSED(ch); } FILE __stdout; #else @@ -69,12 +69,12 @@ static __IO uint32_t fac_ms; FILE __stdout; void _sys_exit(int x) { - x = x; + UNUSED(x); } /* __use_no_semihosting was requested, but _ttywrch was */ void _ttywrch(int ch) { - ch = ch; + UNUSED(ch); } #endif #endif @@ -92,6 +92,9 @@ static __IO uint32_t fac_ms; */ PUTCHAR_PROTOTYPE { +#if !defined (__GNUC__) || defined (__clang__) + UNUSED(f); +#endif while(usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET); usart_data_transmit(PRINT_UART, (uint16_t)ch); while(usart_flag_get(PRINT_UART, USART_TDC_FLAG) == RESET); @@ -106,6 +109,7 @@ int _write(int fd, char *pbuffer, int size) int __write(int fd, char *pbuffer, int size) #endif { + UNUSED(fd); for(int i = 0; i < size; i ++) { while(usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET); diff --git a/project/at_start_f415/examples/adc/current_vref_value_check/src/at32f415_int.c b/project/at_start_f415/examples/adc/current_vref_value_check/src/at32f415_int.c index 3d48a60..a3eaf53 100644 --- a/project/at_start_f415/examples/adc/current_vref_value_check/src/at32f415_int.c +++ b/project/at_start_f415/examples/adc/current_vref_value_check/src/at32f415_int.c @@ -24,8 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f415_int.h" -#include "at32f415_board.h" - /** @addtogroup AT32F415_periph_examples * @{ diff --git a/project/at_start_f415/examples/adc/current_vref_value_check/src/main.c b/project/at_start_f415/examples/adc/current_vref_value_check/src/main.c index 4c8247d..984939c 100644 --- a/project/at_start_f415/examples/adc/current_vref_value_check/src/main.c +++ b/project/at_start_f415/examples/adc/current_vref_value_check/src/main.c @@ -35,9 +35,6 @@ __IO uint16_t adc1_ordinary_value = 0; -static void dma_config(void); -static void adc_config(void); - /** * @brief dma configuration. * @param none @@ -60,8 +57,6 @@ static void dma_config(void) dma_init_struct.priority = DMA_PRIORITY_HIGH; dma_init_struct.loop_mode_enable = TRUE; dma_init(DMA1_CHANNEL1, &dma_init_struct); - - dma_channel_enable(DMA1_CHANNEL1, TRUE); } /** @@ -73,8 +68,10 @@ static void adc_config(void) { adc_base_config_type adc_base_struct; crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE); + adc_reset(ADC1); crm_adc_clock_div_set(CRM_ADC_DIV_6); + /* ADC1 config */ adc_base_default_para_init(&adc_base_struct); adc_base_struct.sequence_mode = FALSE; adc_base_struct.repeat_mode = FALSE; @@ -87,6 +84,8 @@ static void adc_config(void) adc_tempersensor_vintrv_enable(TRUE); adc_enable(ADC1, TRUE); + + /* ADC calibration */ adc_calibration_init(ADC1); while(adc_calibration_init_status_get(ADC1)); adc_calibration_start(ADC1); @@ -100,7 +99,6 @@ static void adc_config(void) */ int main(void) { - __IO uint32_t index = 0; nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); system_clock_config(); at32_board_init(); @@ -110,19 +108,27 @@ int main(void) uart_print_init(115200); dma_config(); adc_config(); + + /* enable DMA after ADC activation */ + dma_channel_enable(DMA1_CHANNEL1, TRUE); + printf("adc1_vref_check \r\n"); while(1) { at32_led_on(LED2); delay_sec(1); + + /* ordinary software start conversion */ adc_ordinary_software_trigger_enable(ADC1, TRUE); + + /* wait conversion end */ while(dma_flag_get(DMA1_FDT1_FLAG) == RESET); + dma_flag_clear(DMA1_FDT1_FLAG); printf("vref_value = %f V\r\n", ((double)1.2 * 4095) / adc1_ordinary_value); } } - /** * @} */ diff --git a/project/at_start_f415/examples/adc/exint_trigger_partitioned/readme.txt b/project/at_start_f415/examples/adc/exint_trigger_partitioned/readme.txt index b1cd84c..b7a0947 100644 --- a/project/at_start_f415/examples/adc/exint_trigger_partitioned/readme.txt +++ b/project/at_start_f415/examples/adc/exint_trigger_partitioned/readme.txt @@ -8,13 +8,14 @@ this demo is based on the at-start board, in this demo, shows how to use the exint line trigger source trigger adc in partitioned mode. the convert data as follow: - - adc1_ordinary_valuetab[n][0] ---> adc1_channel_4 - - adc1_ordinary_valuetab[n][1] ---> adc1_channel_5 - - adc1_ordinary_valuetab[n][2] ---> adc1_channel_6 - - adc1_preempt_valuetab[n][0] ---> adc1_channel_7 - - adc1_preempt_valuetab[n][1] ---> adc1_channel_8 - - adc1_preempt_valuetab[n][2] ---> adc1_channel_9 + - adc1_ordinary_valuetab[0] ---> adc1_channel_4 + - adc1_ordinary_valuetab[1] ---> adc1_channel_5 + - adc1_ordinary_valuetab[2] ---> adc1_channel_6 + - adc1_preempt_valuetab[0] ---> adc1_channel_7 + - adc1_preempt_valuetab[1] ---> adc1_channel_8 + - adc1_preempt_valuetab[2] ---> adc1_channel_9 trigger source: - ordinary --> exint line11(pc11) - preempt --> exint line15(pa15) - for more detailed information. please refer to the application note document AN0115. \ No newline at end of file + for more detailed information. please refer to the application note document AN0115. + diff --git a/project/at_start_f415/examples/adc/exint_trigger_partitioned/src/at32f415_int.c b/project/at_start_f415/examples/adc/exint_trigger_partitioned/src/at32f415_int.c index aff6257..8e6fb7a 100644 --- a/project/at_start_f415/examples/adc/exint_trigger_partitioned/src/at32f415_int.c +++ b/project/at_start_f415/examples/adc/exint_trigger_partitioned/src/at32f415_int.c @@ -24,11 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f415_int.h" -#include "at32f415_board.h" - -extern __IO uint16_t adc1_preempt_valuetab[3][3]; -extern __IO uint16_t dma_trans_complete_flag; -extern __IO uint16_t preempt_trigger_count; /** @addtogroup AT32F415_periph_examples * @{ @@ -135,41 +130,6 @@ void SysTick_Handler(void) { } -/** - * @brief this function handles dma1_channel1 handler. - * @param none - * @retval none - */ -void DMA1_Channel1_IRQHandler(void) -{ - if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET) - { - dma_flag_clear(DMA1_FDT1_FLAG); - dma_trans_complete_flag = 1; - } -} - -/** - * @brief this function handles adc1_2 handler. - * @param none - * @retval none - */ -void ADC1_IRQHandler(void) -{ - if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET) - { - adc_flag_clear(ADC1, ADC_PCCE_FLAG); - if(preempt_trigger_count < 3) - { - adc1_preempt_valuetab[preempt_trigger_count][0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1); - adc1_preempt_valuetab[preempt_trigger_count][1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2); - adc1_preempt_valuetab[preempt_trigger_count][2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3); - preempt_trigger_count++; - } - } -} - - /** * @} */ diff --git a/project/at_start_f415/examples/adc/exint_trigger_partitioned/src/main.c b/project/at_start_f415/examples/adc/exint_trigger_partitioned/src/main.c index 25e45e1..91079a8 100644 --- a/project/at_start_f415/examples/adc/exint_trigger_partitioned/src/main.c +++ b/project/at_start_f415/examples/adc/exint_trigger_partitioned/src/main.c @@ -34,15 +34,12 @@ */ -__IO uint16_t adc1_ordinary_valuetab[3][3] = {0}; -__IO uint16_t adc1_preempt_valuetab[3][3] = {0}; +__IO uint16_t adc1_ordinary_valuetab[3] = {0}; +__IO uint16_t adc1_preempt_valuetab[3] = {0}; __IO uint16_t dma_trans_complete_flag = 0; +__IO uint16_t ordinary_conversion_times_index = 0; __IO uint16_t preempt_trigger_count = 0; - -static void gpio_config(void); -static void exint_config(void); -static void dma_config(void); -static void adc_config(void); +__IO uint16_t preempt_conversion_times_index = 0; /** * @brief gpio configuration. @@ -79,6 +76,9 @@ static void exint_config(void) crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE); + gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOC, GPIO_PINS_SOURCE11); + gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOA, GPIO_PINS_SOURCE15); + gpio_default_para_init(&gpio_initstructure); gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; @@ -91,9 +91,6 @@ static void exint_config(void) gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOA, &gpio_initstructure); - gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOC, GPIO_PINS_SOURCE11); - gpio_exint_line_config(GPIO_PORT_SOURCE_GPIOA, GPIO_PINS_SOURCE15); - exint_default_para_init(&exint_init_struct); exint_init_struct.line_enable = TRUE; exint_init_struct.line_mode = EXINT_LINE_EVENT; @@ -117,7 +114,7 @@ static void dma_config(void) nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0); dma_reset(DMA1_CHANNEL1); dma_default_para_init(&dma_init_struct); - dma_init_struct.buffer_size = 9; + dma_init_struct.buffer_size = 3; dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; @@ -126,11 +123,10 @@ static void dma_config(void) dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_HIGH; - dma_init_struct.loop_mode_enable = FALSE; + dma_init_struct.loop_mode_enable = TRUE; dma_init(DMA1_CHANNEL1, &dma_init_struct); dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE); - dma_channel_enable(DMA1_CHANNEL1, TRUE); } /** @@ -142,10 +138,12 @@ static void adc_config(void) { adc_base_config_type adc_base_struct; crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE); + adc_reset(ADC1); crm_adc_clock_div_set(CRM_ADC_DIV_6); nvic_irq_enable(ADC1_IRQn, 0, 0); - adc_base_default_para_init(&adc_base_struct); + + /* ADC1 config */ adc_base_struct.sequence_mode = TRUE; adc_base_struct.repeat_mode = FALSE; adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT; @@ -167,12 +165,45 @@ static void adc_config(void) adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE); adc_enable(ADC1, TRUE); + + /* ADC calibration */ adc_calibration_init(ADC1); while(adc_calibration_init_status_get(ADC1)); adc_calibration_start(ADC1); while(adc_calibration_status_get(ADC1)); } +/** + * @brief this function handles dma1_channel1 handler. + * @param none + * @retval none + */ +void DMA1_Channel1_IRQHandler(void) +{ + if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET) + { + dma_flag_clear(DMA1_FDT1_FLAG); + dma_trans_complete_flag++; + } +} + +/** + * @brief this function handles adc1 handler. + * @param none + * @retval none + */ +void ADC1_IRQHandler(void) +{ + if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET) + { + adc_flag_clear(ADC1, ADC_PCCE_FLAG); + adc1_preempt_valuetab[0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1); + adc1_preempt_valuetab[1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2); + adc1_preempt_valuetab[2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3); + preempt_trigger_count++; + } +} + /** * @brief main function. * @param none @@ -180,7 +211,6 @@ static void adc_config(void) */ int main(void) { - __IO uint32_t index = 0; nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); system_clock_config(); at32_board_init(); @@ -192,22 +222,36 @@ int main(void) exint_config(); dma_config(); adc_config(); + + /* enable DMA after ADC activation */ + dma_channel_enable(DMA1_CHANNEL1, TRUE); + printf("exint_trigger_partitioned \r\n"); - while(dma_trans_complete_flag == 0); - while(preempt_trigger_count != 3); - for(index = 0; index < 3; index++) - { - printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][0]); - printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][1]); - printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][2]); - printf("adc1_preempt_valuetab[%d][0] = 0x%x\r\n",index, adc1_preempt_valuetab[index][0]); - printf("adc1_preempt_valuetab[%d][1] = 0x%x\r\n",index, adc1_preempt_valuetab[index][1]); - printf("adc1_preempt_valuetab[%d][2] = 0x%x\r\n",index, adc1_preempt_valuetab[index][2]); - printf("\r\n"); - } - at32_led_on(LED2); while(1) { + /* wait ordinary conversion end */ + if(ordinary_conversion_times_index != dma_trans_complete_flag) + { + ordinary_conversion_times_index = dma_trans_complete_flag; + printf("ordinary_conversion_times_index = %d\r\n",ordinary_conversion_times_index); + printf("adc1_ordinary_valuetab[0] = 0x%x\r\n", adc1_ordinary_valuetab[0]); + printf("adc1_ordinary_valuetab[1] = 0x%x\r\n", adc1_ordinary_valuetab[1]); + printf("adc1_ordinary_valuetab[2] = 0x%x\r\n", adc1_ordinary_valuetab[2]); + printf("\r\n"); + at32_led_toggle(LED2); + } + + /* wait preempt conversion end */ + if(preempt_conversion_times_index != preempt_trigger_count) + { + preempt_conversion_times_index = preempt_trigger_count; + printf("preempt_conversion_times_index = %d\r\n",preempt_conversion_times_index); + printf("adc1_preempt_valuetab[0] = 0x%x\r\n", adc1_preempt_valuetab[0]); + printf("adc1_preempt_valuetab[1] = 0x%x\r\n", adc1_preempt_valuetab[1]); + printf("adc1_preempt_valuetab[2] = 0x%x\r\n", adc1_preempt_valuetab[2]); + printf("\r\n"); + at32_led_toggle(LED3); + } } } diff --git a/project/at_start_f415/examples/adc/internal_temperature_sensor/src/main.c b/project/at_start_f415/examples/adc/internal_temperature_sensor/src/main.c index d382291..eb84600 100644 --- a/project/at_start_f415/examples/adc/internal_temperature_sensor/src/main.c +++ b/project/at_start_f415/examples/adc/internal_temperature_sensor/src/main.c @@ -40,9 +40,6 @@ __IO uint16_t adc1_ordinary_value = 0; -static void dma_config(void); -static void adc_config(void); - /** * @brief dma configuration. * @param none @@ -65,8 +62,6 @@ static void dma_config(void) dma_init_struct.priority = DMA_PRIORITY_HIGH; dma_init_struct.loop_mode_enable = TRUE; dma_init(DMA1_CHANNEL1, &dma_init_struct); - - dma_channel_enable(DMA1_CHANNEL1, TRUE); } /** @@ -78,11 +73,13 @@ static void adc_config(void) { adc_base_config_type adc_base_struct; crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE); + adc_reset(ADC1); crm_adc_clock_div_set(CRM_ADC_DIV_6); - adc_base_default_para_init(&adc_base_struct); + + /* ADC1 config */ adc_base_struct.sequence_mode = FALSE; - adc_base_struct.repeat_mode = TRUE; + adc_base_struct.repeat_mode = FALSE; adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT; adc_base_struct.ordinary_channel_length = 1; adc_base_config(ADC1, &adc_base_struct); @@ -92,6 +89,8 @@ static void adc_config(void) adc_tempersensor_vintrv_enable(TRUE); adc_enable(ADC1, TRUE); + + /* ADC calibration */ adc_calibration_init(ADC1); while(adc_calibration_init_status_get(ADC1)); adc_calibration_start(ADC1); @@ -105,7 +104,6 @@ static void adc_config(void) */ int main(void) { - __IO uint32_t index = 0; nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); system_clock_config(); at32_board_init(); @@ -115,19 +113,27 @@ int main(void) uart_print_init(115200); dma_config(); adc_config(); + + /* enable DMA after ADC activation */ + dma_channel_enable(DMA1_CHANNEL1, TRUE); + printf("internal_temperature_sensor \r\n"); - adc_ordinary_software_trigger_enable(ADC1, TRUE); while(1) { + /* ordinary software start conversion */ + adc_ordinary_software_trigger_enable(ADC1, TRUE); + + /* wait conversion end */ + while(dma_flag_get(DMA1_FDT1_FLAG) == RESET) + { + } + dma_flag_clear(DMA1_FDT1_FLAG); + printf("internal_temperature = %f deg C\r\n",(ADC_TEMP_BASE - (double)adc1_ordinary_value * ADC_VREF / 4095) / ADC_TEMP_SLOPE + 25); at32_led_on(LED2); delay_sec(1); - while(dma_flag_get(DMA1_FDT1_FLAG) == RESET); - dma_flag_clear(DMA1_FDT1_FLAG); - printf("internal_temperature = %f deg C\r\n",(ADC_TEMP_BASE - (double)adc1_ordinary_value * ADC_VREF / 4096) / ADC_TEMP_SLOPE + 25); } } - /** * @} */ diff --git a/project/at_start_f415/examples/adc/repeat_conversion_loop_transfer/src/at32f415_int.c b/project/at_start_f415/examples/adc/repeat_conversion_loop_transfer/src/at32f415_int.c index 698fed3..6ca6d8c 100644 --- a/project/at_start_f415/examples/adc/repeat_conversion_loop_transfer/src/at32f415_int.c +++ b/project/at_start_f415/examples/adc/repeat_conversion_loop_transfer/src/at32f415_int.c @@ -24,9 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f415_int.h" -#include "at32f415_board.h" - -extern __IO uint16_t dma_trans_complete_flag; /** @addtogroup AT32F415_periph_examples * @{ @@ -133,21 +130,6 @@ void SysTick_Handler(void) { } -/** - * @brief this function handles dma1_channel1 handler. - * @param none - * @retval none - */ -void DMA1_Channel1_IRQHandler(void) -{ - if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET) - { - dma_flag_clear(DMA1_FDT1_FLAG); - dma_trans_complete_flag++; - } -} - - /** * @} */ diff --git a/project/at_start_f415/examples/adc/repeat_conversion_loop_transfer/src/main.c b/project/at_start_f415/examples/adc/repeat_conversion_loop_transfer/src/main.c index c2a543b..d31bfa7 100644 --- a/project/at_start_f415/examples/adc/repeat_conversion_loop_transfer/src/main.c +++ b/project/at_start_f415/examples/adc/repeat_conversion_loop_transfer/src/main.c @@ -36,10 +36,6 @@ __IO uint16_t adc1_ordinary_valuetab[3] = {0}; __IO uint16_t dma_trans_complete_flag = 0; -static void gpio_config(void); -static void dma_config(void); -static void adc_config(void); - /** * @brief gpio configuration. * @param none @@ -81,7 +77,6 @@ static void dma_config(void) dma_init(DMA1_CHANNEL1, &dma_init_struct); dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE); - dma_channel_enable(DMA1_CHANNEL1, TRUE); } /** @@ -93,9 +88,11 @@ static void adc_config(void) { adc_base_config_type adc_base_struct; crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE); + adc_reset(ADC1); crm_adc_clock_div_set(CRM_ADC_DIV_6); - adc_base_default_para_init(&adc_base_struct); + + /* ADC1 config */ adc_base_struct.sequence_mode = TRUE; adc_base_struct.repeat_mode = TRUE; adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT; @@ -108,12 +105,28 @@ static void adc_config(void) adc_dma_mode_enable(ADC1, TRUE); adc_enable(ADC1, TRUE); + + /* ADC calibration */ adc_calibration_init(ADC1); while(adc_calibration_init_status_get(ADC1)); adc_calibration_start(ADC1); while(adc_calibration_status_get(ADC1)); } +/** + * @brief this function handles dma1_channel1 handler. + * @param none + * @retval none + */ +void DMA1_Channel1_IRQHandler(void) +{ + if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET) + { + dma_flag_clear(DMA1_FDT1_FLAG); + dma_trans_complete_flag++; + } +} + /** * @brief main function. * @param none @@ -121,7 +134,6 @@ static void adc_config(void) */ int main(void) { - __IO uint32_t index = 0; nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); system_clock_config(); at32_board_init(); @@ -132,8 +144,14 @@ int main(void) gpio_config(); dma_config(); adc_config(); + + /* enable DMA after ADC activation */ + dma_channel_enable(DMA1_CHANNEL1, TRUE); + printf("repeat_conversion_loop_transfer \r\n"); printf("please_debug_check_data_and_conversion_times \r\n"); + + /* ordinary software start conversion */ adc_ordinary_software_trigger_enable(ADC1, TRUE); at32_led_on(LED2); while(1) diff --git a/project/at_start_f415/examples/adc/software_trigger_repeat/readme.txt b/project/at_start_f415/examples/adc/software_trigger_repeat/readme.txt deleted file mode 100644 index e9e8161..0000000 --- a/project/at_start_f415/examples/adc/software_trigger_repeat/readme.txt +++ /dev/null @@ -1,14 +0,0 @@ -/** - ************************************************************************** - * @file readme.txt - * @brief readme - ************************************************************************** - */ - - this demo is based on the at-start board, in this demo, shows how to use - the software trigger source trigger adc. - the convert data as follow: - - adc1_ordinary_valuetab[0] ---> adc1_channel_4 - - adc1_ordinary_valuetab[1] ---> adc1_channel_5 - - adc1_ordinary_valuetab[2] ---> adc1_channel_6 - for more detailed information. please refer to the application note document AN0115. \ No newline at end of file diff --git a/project/at_start_f415/examples/adc/software_trigger_repeat/src/main.c b/project/at_start_f415/examples/adc/software_trigger_repeat/src/main.c deleted file mode 100644 index ea0dac7..0000000 --- a/project/at_start_f415/examples/adc/software_trigger_repeat/src/main.c +++ /dev/null @@ -1,150 +0,0 @@ -/** - ************************************************************************** - * @file main.c - * @brief main program - ************************************************************************** - * Copyright notice & Disclaimer - * - * The software Board Support Package (BSP) that is made available to - * download from Artery official website is the copyrighted work of Artery. - * Artery authorizes customers to use, copy, and distribute the BSP - * software and its related documentation for the purpose of design and - * development in conjunction with Artery microcontrollers. Use of the - * software is governed by this copyright notice and the following disclaimer. - * - * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, - * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, - * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR - * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, - * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. - * - ************************************************************************** - */ - -#include "at32f415_board.h" -#include "at32f415_clock.h" - -/** @addtogroup AT32F415_periph_examples - * @{ - */ - -/** @addtogroup 415_ADC_software_trigger_repeat ADC_software_trigger_repeat - * @{ - */ - -__IO uint16_t adc1_ordinary_valuetab[3] = {0}; -__IO uint16_t dma_trans_complete_flag = 0; - -static void gpio_config(void); -static void dma_config(void); -static void adc_config(void); - -/** - * @brief gpio configuration. - * @param none - * @retval none - */ -static void gpio_config(void) -{ - gpio_init_type gpio_initstructure; - crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); - - gpio_default_para_init(&gpio_initstructure); - gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG; - gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6; - gpio_init(GPIOA, &gpio_initstructure); -} - -/** - * @brief dma configuration. - * @param none - * @retval none - */ -static void dma_config(void) -{ - dma_init_type dma_init_struct; - crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); - nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0); - dma_reset(DMA1_CHANNEL1); - dma_default_para_init(&dma_init_struct); - dma_init_struct.buffer_size = 3; - dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; - dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab; - dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; - dma_init_struct.memory_inc_enable = TRUE; - dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt); - dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; - dma_init_struct.peripheral_inc_enable = FALSE; - dma_init_struct.priority = DMA_PRIORITY_HIGH; - dma_init_struct.loop_mode_enable = TRUE; - dma_init(DMA1_CHANNEL1, &dma_init_struct); - - dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE); - dma_channel_enable(DMA1_CHANNEL1, TRUE); -} - -/** - * @brief adc configuration. - * @param none - * @retval none - */ -static void adc_config(void) -{ - adc_base_config_type adc_base_struct; - crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE); - crm_adc_clock_div_set(CRM_ADC_DIV_6); - - adc_base_default_para_init(&adc_base_struct); - adc_base_struct.sequence_mode = TRUE; - adc_base_struct.repeat_mode = TRUE; - adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT; - adc_base_struct.ordinary_channel_length = 3; - adc_base_config(ADC1, &adc_base_struct); - adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_239_5); - adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_239_5); - adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_239_5); - adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE); - adc_dma_mode_enable(ADC1, TRUE); - - adc_enable(ADC1, TRUE); - adc_calibration_init(ADC1); - while(adc_calibration_init_status_get(ADC1)); - adc_calibration_start(ADC1); - while(adc_calibration_status_get(ADC1)); -} - -/** - * @brief main function. - * @param none - * @retval none - */ -int main(void) -{ - __IO uint32_t index = 0; - nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); - system_clock_config(); - at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); - uart_print_init(115200); - gpio_config(); - dma_config(); - adc_config(); - printf("software_trigger_repeat \r\n"); - printf("please_debug_check_data_and_conversion_times \r\n"); - adc_ordinary_software_trigger_enable(ADC1, TRUE); - at32_led_on(LED2); - while(1) - { - } -} - -/** - * @} - */ - -/** - * @} - */ diff --git a/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/readme.txt b/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/readme.txt index 88cb888..7c65a67 100644 --- a/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/readme.txt +++ b/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/readme.txt @@ -9,10 +9,11 @@ the preempt group automatic conversion(whitch ordinary trigger source is tmr). the convert data as follow: - - adc1_ordinary_valuetab[n][0] ---> adc1_channel_4 - - adc1_ordinary_valuetab[n][1] ---> adc1_channel_5 - - adc1_ordinary_valuetab[n][2] ---> adc1_channel_6 - - adc1_preempt_valuetab[n][0] ---> adc1_channel_7 - - adc1_preempt_valuetab[n][1] ---> adc1_channel_8 - - adc1_preempt_valuetab[n][2] ---> adc1_channel_9 - for more detailed information. please refer to the application note document AN0115. \ No newline at end of file + - adc1_ordinary_valuetab[0] ---> adc1_channel_4 + - adc1_ordinary_valuetab[1] ---> adc1_channel_5 + - adc1_ordinary_valuetab[2] ---> adc1_channel_6 + - adc1_preempt_valuetab[0] ---> adc1_channel_7 + - adc1_preempt_valuetab[1] ---> adc1_channel_8 + - adc1_preempt_valuetab[2] ---> adc1_channel_9 + for more detailed information. please refer to the application note document AN0115. + diff --git a/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/src/at32f415_int.c b/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/src/at32f415_int.c index 36802cf..105e671 100644 --- a/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/src/at32f415_int.c +++ b/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/src/at32f415_int.c @@ -24,12 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f415_int.h" -#include "at32f415_board.h" - -extern __IO uint16_t adc1_ordinary_valuetab[5][3]; -extern __IO uint16_t adc1_preempt_valuetab[5][3]; -extern __IO uint16_t dma_trans_complete_flag; -extern __IO uint16_t preempt_conversion_count; /** @addtogroup AT32F415_periph_examples * @{ @@ -136,43 +130,6 @@ void SysTick_Handler(void) { } -/** - * @brief this function handles dma1_channel1 handler. - * @param none - * @retval none - */ -void DMA1_Channel1_IRQHandler(void) -{ - if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET) - { - dma_flag_clear(DMA1_FDT1_FLAG); - dma_trans_complete_flag = 1; - } -} - -/** - * @brief this function handles adc1_2 handler. - * @param none - * @retval none - */ -void ADC1_IRQHandler(void) -{ - if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET) - { - adc_flag_clear(ADC1, ADC_PCCE_FLAG); - if(preempt_conversion_count < 5) - { - adc1_preempt_valuetab[preempt_conversion_count][0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1); - adc1_preempt_valuetab[preempt_conversion_count][1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2); - adc1_preempt_valuetab[preempt_conversion_count][2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3); - preempt_conversion_count++; - } - at32_led_toggle(LED3); - } -} - - - /** * @} */ diff --git a/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/src/main.c b/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/src/main.c index de1937c..a38a73c 100644 --- a/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/src/main.c +++ b/project/at_start_f415/examples/adc/tmr_trigger_automatic_preempted/src/main.c @@ -33,16 +33,12 @@ * @{ */ - -__IO uint16_t adc1_ordinary_valuetab[5][3] = {0}; -__IO uint16_t adc1_preempt_valuetab[5][3] = {0}; +__IO uint16_t adc1_ordinary_valuetab[3] = {0}; +__IO uint16_t adc1_preempt_valuetab[3] = {0}; __IO uint16_t dma_trans_complete_flag = 0; +__IO uint16_t ordinary_conversion_times_index = 0; __IO uint16_t preempt_conversion_count = 0; - -static void gpio_config(void); -static void dma_config(void); -static void tmr1_config(void); -static void adc_config(void); +__IO uint16_t preempt_conversion_times_index = 0; /** * @brief gpio configuration. @@ -77,7 +73,7 @@ static void dma_config(void) nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0); dma_reset(DMA1_CHANNEL1); dma_default_para_init(&dma_init_struct); - dma_init_struct.buffer_size = 15; + dma_init_struct.buffer_size = 3; dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; @@ -86,11 +82,10 @@ static void dma_config(void) dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_HIGH; - dma_init_struct.loop_mode_enable = FALSE; + dma_init_struct.loop_mode_enable = TRUE; dma_init(DMA1_CHANNEL1, &dma_init_struct); dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE); - dma_channel_enable(DMA1_CHANNEL1, TRUE); } /** @@ -118,8 +113,8 @@ static void tmr1_config(void) crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE); - /* (systemclock/(systemclock/10000))/1000 = 10Hz(100ms) */ - tmr_base_init(TMR1, 999, (crm_clocks_freq_struct.sclk_freq/10000 - 1)); + /* (systemclock/(systemclock/10000))/10000 = 1Hz(1s) */ + tmr_base_init(TMR1, 9999, (crm_clocks_freq_struct.sclk_freq/10000 - 1)); tmr_cnt_dir_set(TMR1, TMR_COUNT_UP); tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1); @@ -129,7 +124,7 @@ static void tmr1_config(void) tmr_oc_init_structure.oc_output_state = TRUE; tmr_oc_init_structure.oc_idle_state = FALSE; tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure); - tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 500); + tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 5000); } /** @@ -141,10 +136,12 @@ static void adc_config(void) { adc_base_config_type adc_base_struct; crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE); - crm_adc_clock_div_set(CRM_ADC_DIV_6); + adc_reset(ADC1); nvic_irq_enable(ADC1_IRQn, 0, 0); - + crm_adc_clock_div_set(CRM_ADC_DIV_6); adc_base_default_para_init(&adc_base_struct); + + /* ADC1 config */ adc_base_struct.sequence_mode = TRUE; adc_base_struct.repeat_mode = FALSE; adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT; @@ -165,14 +162,45 @@ static void adc_config(void) adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE); adc_enable(ADC1, TRUE); + + /* ADC calibration */ adc_calibration_init(ADC1); while(adc_calibration_init_status_get(ADC1)); adc_calibration_start(ADC1); while(adc_calibration_status_get(ADC1)); } +/** + * @brief this function handles dma1_channel1 handler. + * @param none + * @retval none + */ +void DMA1_Channel1_IRQHandler(void) +{ + if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET) + { + dma_flag_clear(DMA1_FDT1_FLAG); + dma_trans_complete_flag++; + } +} - +/** + * @brief this function handles adc1 handler. + * @param none + * @retval none + */ +void ADC1_IRQHandler(void) +{ + if(adc_interrupt_flag_get(ADC1, ADC_PCCE_FLAG) != RESET) + { + adc_flag_clear(ADC1, ADC_PCCE_FLAG); + adc1_preempt_valuetab[0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1); + adc1_preempt_valuetab[1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2); + adc1_preempt_valuetab[2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3); + preempt_conversion_count++; + at32_led_toggle(LED3); + } +} /** * @brief main function. @@ -181,7 +209,6 @@ static void adc_config(void) */ int main(void) { - __IO uint32_t index = 0; nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); system_clock_config(); at32_board_init(); @@ -193,30 +220,42 @@ int main(void) tmr1_config(); dma_config(); adc_config(); + + /* enable DMA after ADC activation */ + dma_channel_enable(DMA1_CHANNEL1, TRUE); + printf("tmr_trigger_automatic_preempted \r\n"); tmr_counter_enable(TMR1, TRUE); tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1, TRUE); tmr_output_enable(TMR1, TRUE); - while(preempt_conversion_count < 5); - while(dma_trans_complete_flag == 0); - tmr_counter_enable(TMR1, FALSE); - for(index = 0; index < 5; index++) - { - printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][0]); - printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][1]); - printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][2]); - printf("adc1_preempted_valuetab[%d][0] = 0x%x\r\n", index, adc1_preempt_valuetab[index][0]); - printf("adc1_preempted_valuetab[%d][1] = 0x%x\r\n", index, adc1_preempt_valuetab[index][1]); - printf("adc1_preempted_valuetab[%d][2] = 0x%x\r\n", index, adc1_preempt_valuetab[index][2]); - printf("\r\n"); - } - at32_led_on(LED2); while(1) { + /* wait ordinary conversion end */ + if(ordinary_conversion_times_index != dma_trans_complete_flag) + { + ordinary_conversion_times_index = dma_trans_complete_flag; + printf("ordinary_conversion_times_index = %d\r\n",ordinary_conversion_times_index); + printf("adc1_ordinary_valuetab[0] = 0x%x\r\n", adc1_ordinary_valuetab[0]); + printf("adc1_ordinary_valuetab[1] = 0x%x\r\n", adc1_ordinary_valuetab[1]); + printf("adc1_ordinary_valuetab[2] = 0x%x\r\n", adc1_ordinary_valuetab[2]); + printf("\r\n"); + at32_led_toggle(LED2); + } + + /* wait preempt conversion end */ + if(preempt_conversion_times_index != preempt_conversion_count) + { + preempt_conversion_times_index = preempt_conversion_count; + printf("preempt_conversion_times_index = %d\r\n",preempt_conversion_times_index); + printf("adc1_preempt_valuetab[0] = 0x%x\r\n", adc1_preempt_valuetab[0]); + printf("adc1_preempt_valuetab[1] = 0x%x\r\n", adc1_preempt_valuetab[1]); + printf("adc1_preempt_valuetab[2] = 0x%x\r\n", adc1_preempt_valuetab[2]); + printf("\r\n"); + at32_led_toggle(LED3); + } } } - /** * @} */ diff --git a/project/at_start_f415/examples/adc/voltage_monitoring/src/at32f415_int.c b/project/at_start_f415/examples/adc/voltage_monitoring/src/at32f415_int.c index f78c386..e170751 100644 --- a/project/at_start_f415/examples/adc/voltage_monitoring/src/at32f415_int.c +++ b/project/at_start_f415/examples/adc/voltage_monitoring/src/at32f415_int.c @@ -24,10 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f415_int.h" -#include "at32f415_board.h" - -extern __IO uint16_t adc1_ordinary_valuetab[3]; -extern __IO uint16_t vmor_flag_index; /** @addtogroup AT32F415_periph_examples * @{ @@ -135,21 +131,6 @@ void SysTick_Handler(void) { } -/** - * @brief this function handles adc1_2 handler. - * @param none - * @retval none - */ -void ADC1_IRQHandler(void) -{ - if(adc_interrupt_flag_get(ADC1, ADC_VMOR_FLAG) != RESET) - { - at32_led_toggle(LED3); - adc_flag_clear(ADC1, ADC_VMOR_FLAG); - vmor_flag_index = 1; - } -} - /** * @} */ diff --git a/project/at_start_f415/examples/adc/voltage_monitoring/src/main.c b/project/at_start_f415/examples/adc/voltage_monitoring/src/main.c index 1a4ec57..5d09ba9 100644 --- a/project/at_start_f415/examples/adc/voltage_monitoring/src/main.c +++ b/project/at_start_f415/examples/adc/voltage_monitoring/src/main.c @@ -35,10 +35,7 @@ __IO uint16_t adc1_ordinary_valuetab[3] = {0}; __IO uint16_t vmor_flag_index = 0; - -static void gpio_config(void); -static void dma_config(void); -static void adc_config(void); +__IO uint16_t error_times_index = 0; /** * @brief gpio configuration. @@ -78,8 +75,6 @@ static void dma_config(void) dma_init_struct.priority = DMA_PRIORITY_HIGH; dma_init_struct.loop_mode_enable = TRUE; dma_init(DMA1_CHANNEL1, &dma_init_struct); - - dma_channel_enable(DMA1_CHANNEL1, TRUE); } /** @@ -91,10 +86,12 @@ static void adc_config(void) { adc_base_config_type adc_base_struct; crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE); - crm_adc_clock_div_set(CRM_ADC_DIV_6); + adc_reset(ADC1); nvic_irq_enable(ADC1_IRQn, 0, 0); - + crm_adc_clock_div_set(CRM_ADC_DIV_6); adc_base_default_para_init(&adc_base_struct); + + /* ADC1 config */ adc_base_struct.sequence_mode = TRUE; adc_base_struct.repeat_mode = FALSE; adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT; @@ -111,12 +108,29 @@ static void adc_config(void) adc_interrupt_enable(ADC1, ADC_VMOR_INT, TRUE); adc_enable(ADC1, TRUE); + + /* ADC calibration */ adc_calibration_init(ADC1); while(adc_calibration_init_status_get(ADC1)); adc_calibration_start(ADC1); while(adc_calibration_status_get(ADC1)); } +/** + * @brief this function handles adc1 handler. + * @param none + * @retval none + */ +void ADC1_IRQHandler(void) +{ + if(adc_interrupt_flag_get(ADC1, ADC_VMOR_FLAG) != RESET) + { + at32_led_toggle(LED3); + adc_flag_clear(ADC1, ADC_VMOR_FLAG); + vmor_flag_index++; + } +} + /** * @brief main function. * @param none @@ -124,7 +138,6 @@ static void adc_config(void) */ int main(void) { - __IO uint32_t index = 0; nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); system_clock_config(); at32_board_init(); @@ -135,14 +148,19 @@ int main(void) gpio_config(); dma_config(); adc_config(); + + /* enable DMA after ADC activation */ + dma_channel_enable(DMA1_CHANNEL1, TRUE); + printf("voltage_monitoring \r\n"); while(1) { at32_led_toggle(LED2); delay_sec(1); - if(vmor_flag_index == 1) + if(error_times_index != vmor_flag_index) { - vmor_flag_index = 0; + error_times_index = vmor_flag_index; + printf("error_times_index = %d\r\n",error_times_index); printf("out of range:adc1_channel_5 value is = %x!\r\n", adc1_ordinary_valuetab[1]); } adc_ordinary_software_trigger_enable(ADC1, TRUE); diff --git a/project/at_start_f415/examples/cortex_m4/systick_interrupt/src/main.c b/project/at_start_f415/examples/cortex_m4/systick_interrupt/src/main.c index 673e768..b4e1b29 100644 --- a/project/at_start_f415/examples/cortex_m4/systick_interrupt/src/main.c +++ b/project/at_start_f415/examples/cortex_m4/systick_interrupt/src/main.c @@ -48,7 +48,7 @@ void systick_handler(void) ticks ++; /* toggle led */ - if(ticks > DELAY) + if(ticks >= DELAY) { at32_led_toggle(LED2); ticks = 0; diff --git a/project/at_start_f415/examples/i2s/halfduplex_dma/readme.txt b/project/at_start_f415/examples/i2s/halfduplex_dma/readme.txt index 942341d..d73f4a2 100644 --- a/project/at_start_f415/examples/i2s/halfduplex_dma/readme.txt +++ b/project/at_start_f415/examples/i2s/halfduplex_dma/readme.txt @@ -8,10 +8,11 @@ this demo is based on the at-start board, in this demo, shows in halfduplex mode how to use dma transfer data. the pins connection as follow: - - pb0 as mck out + - pb6 as mck out - i2s2 slaver i2s1 master - - pb12 <---> pa4(ws) - - pb13 <---> pa5(ck) - - pb15 <---> pa7(sd) + - pb12 <---> pa15(ws) + - pb13 <---> pb3(ck) + - pb15 <---> pb5(sd) + + for more detailed information. please refer to the application note document AN0102. - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file diff --git a/project/at_start_f415/examples/i2s/halfduplex_dma/src/main.c b/project/at_start_f415/examples/i2s/halfduplex_dma/src/main.c index ccf220b..3848646 100644 --- a/project/at_start_f415/examples/i2s/halfduplex_dma/src/main.c +++ b/project/at_start_f415/examples/i2s/halfduplex_dma/src/main.c @@ -44,10 +44,6 @@ uint16_t i2s1_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, uint16_t i2s2_buffer_rx[32]; volatile error_status transfer_status = ERROR; -static void gpio_config(void); -static void i2s_config(void); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer_compare function. * @param none @@ -69,17 +65,17 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf } /** - * @brief i2s configuration. + * @brief dma configuration. * @param none * @retval none */ -static void i2s_config(void) +static void dma_config(void) { dma_init_type dma_init_struct; - i2s_init_type i2s_init_struct; crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); - dma_reset(DMA1_CHANNEL4); + + /* use dma1_channel3 as spi1 transmit channel */ dma_reset(DMA1_CHANNEL3); dma_default_para_init(&dma_init_struct); dma_init_struct.buffer_size = 32; @@ -93,15 +89,36 @@ static void i2s_config(void) dma_init_struct.priority = DMA_PRIORITY_HIGH; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL3, &dma_init_struct); - + + /* use dma1_channel4 as spi2 receive channel */ + dma_reset(DMA1_CHANNEL4); + dma_init_struct.buffer_size = 32; dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD; + dma_init_struct.memory_inc_enable = TRUE; dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_HIGH; + dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL4, &dma_init_struct); +} +/** + * @brief i2s configuration. + * @param none + * @retval none + */ +static void i2s_config(void) +{ + i2s_init_type i2s_init_struct; + + /* master i2s initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); i2s_default_para_init(&i2s_init_struct); + + /* master transmission mode */ i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; i2s_init_struct.mclk_output_enable = TRUE; @@ -109,14 +126,27 @@ static void i2s_config(void) i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX; i2s_init(SPI1, &i2s_init_struct); - - i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX; + + /* use dma transmit */ + spi_i2s_dma_transmitter_enable(SPI1, TRUE); + + i2s_enable(SPI1, TRUE); + + /* slave i2s initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* slave reception mode */ + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; + i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; + i2s_init_struct.mclk_output_enable = TRUE; + i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K; + i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; + i2s_init_struct.operation_mode = I2S_MODE_SLAVE_RX; i2s_init(SPI2, &i2s_init_struct); - dma_channel_enable(DMA1_CHANNEL3, TRUE); - dma_channel_enable(DMA1_CHANNEL4, TRUE); + /* use dma receive */ spi_i2s_dma_receiver_enable(SPI2, TRUE); - i2s_enable(SPI1, TRUE); + i2s_enable(SPI2, TRUE); } @@ -130,49 +160,54 @@ static void gpio_config(void) gpio_init_type gpio_initstructure; crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); + gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); + gpio_pin_remap_config(SPI1_MUX_01, TRUE); - /* master ws pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOA, &gpio_initstructure); - /* master ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; - gpio_init(GPIOA, &gpio_initstructure); - - /* master sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; - gpio_init(GPIOA, &gpio_initstructure); - - /* master mck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_0; + /* master i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_3; gpio_init(GPIOB, &gpio_initstructure); - /* slave ws pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + /* master i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOB, &gpio_initstructure); - /* slave ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + /* master i2s mck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_6; gpio_init(GPIOB, &gpio_initstructure); - /* slave sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + /* slave i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); } @@ -185,14 +220,25 @@ int main(void) { system_clock_config(); at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); + at32_led_on(LED4); gpio_config(); + dma_config(); i2s_config(); - spi_i2s_dma_transmitter_enable(SPI1, TRUE); + + /* enable i2s slave dma to get data */ + dma_channel_enable(DMA1_CHANNEL4, TRUE); + + /* enable i2s master dma to fill data */ + dma_channel_enable(DMA1_CHANNEL3, TRUE); - while(dma_flag_get(DMA1_FDT4_FLAG) == RESET); + /* wait slave i2s data receive end */ + while(dma_flag_get(DMA1_FDT4_FLAG) == RESET) + { + } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32); @@ -204,7 +250,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f415/examples/i2s/halfduplex_interrupt/readme.txt b/project/at_start_f415/examples/i2s/halfduplex_interrupt/readme.txt index 8c534b7..b0800aa 100644 --- a/project/at_start_f415/examples/i2s/halfduplex_interrupt/readme.txt +++ b/project/at_start_f415/examples/i2s/halfduplex_interrupt/readme.txt @@ -8,10 +8,11 @@ this demo is based on the at-start board, in this demo, shows in halfduplex mode how to use interrupt transfer data. the pins connection as follow: - - pb0 as mck out + - pb6 as mck out - i2s2 slaver i2s1 master - - pb12 <---> pa4(ws) - - pb13 <---> pa5(ck) - - pb15 <---> pa7(sd) + - pb12 <---> pa15(ws) + - pb13 <---> pb3(ck) + - pb15 <---> pb5(sd) + + for more detailed information. please refer to the application note document AN0102. - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file diff --git a/project/at_start_f415/examples/i2s/halfduplex_interrupt/src/at32f415_int.c b/project/at_start_f415/examples/i2s/halfduplex_interrupt/src/at32f415_int.c index d5153a4..6a7f7a9 100644 --- a/project/at_start_f415/examples/i2s/halfduplex_interrupt/src/at32f415_int.c +++ b/project/at_start_f415/examples/i2s/halfduplex_interrupt/src/at32f415_int.c @@ -24,11 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f415_int.h" -#include "at32f415_board.h" - -extern uint16_t i2s1_buffer_tx[]; -extern uint16_t i2s2_buffer_rx[]; -extern __IO uint32_t tx_index, rx_index; /** @addtogroup AT32F415_periph_examples * @{ @@ -135,37 +130,6 @@ void SysTick_Handler(void) { } - -/** - * @brief This function handles the spi2 interrupt request. - * @param None - * @retval None - */ - void SPI2_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) - { - i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); - } -} - -/** - * @brief This function handles the spi1 interrupt request. - * @param None - * @retval None - */ -void SPI1_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]); - if(tx_index == 32) - { - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); - } - } -} - /** * @} */ diff --git a/project/at_start_f415/examples/i2s/halfduplex_interrupt/src/main.c b/project/at_start_f415/examples/i2s/halfduplex_interrupt/src/main.c index 4854b0c..03a2043 100644 --- a/project/at_start_f415/examples/i2s/halfduplex_interrupt/src/main.c +++ b/project/at_start_f415/examples/i2s/halfduplex_interrupt/src/main.c @@ -44,11 +44,6 @@ uint16_t i2s2_buffer_rx[32]; __IO uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; -static void gpio_config(void); -static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); -error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer_compare function. * @param none @@ -100,15 +95,14 @@ error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint1 static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq) { i2s_init_type i2s_init_struct; - + + /* master i2s initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); - nvic_irq_enable(SPI1_IRQn, 0, 0); - nvic_irq_enable(SPI2_IRQn, 0, 0); - spi_i2s_reset(SPI2); spi_i2s_reset(SPI1); i2s_default_para_init(&i2s_init_struct); + + /* master transmission mode */ i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; i2s_init_struct.data_channel_format = format; i2s_init_struct.mclk_output_enable = TRUE; @@ -116,14 +110,26 @@ static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_f i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX; i2s_init(SPI1, &i2s_init_struct); - + + /* enable transmit data buffer empty interrupt */ + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + + /* slave i2s initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI2_IRQn, 0, 0); + spi_i2s_reset(SPI2); + + /* slave reception mode */ + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; + i2s_init_struct.data_channel_format = format; + i2s_init_struct.mclk_output_enable = TRUE; + i2s_init_struct.audio_sampling_freq = freq; + i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX; i2s_init(SPI2, &i2s_init_struct); - + + /* enable receive data buffer full interrupt */ spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE); - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); - i2s_enable(SPI2, TRUE); - i2s_enable(SPI1, TRUE); } /** @@ -136,50 +142,85 @@ static void gpio_config(void) gpio_init_type gpio_initstructure; crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); + gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); + gpio_pin_remap_config(SPI1_MUX_01, TRUE); - /* master ws pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOA, &gpio_initstructure); - /* master ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; - gpio_init(GPIOA, &gpio_initstructure); - - /* master sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; - gpio_init(GPIOA, &gpio_initstructure); - - /* master mck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_0; + /* master i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_3; gpio_init(GPIOB, &gpio_initstructure); - /* slave ws pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + /* master i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOB, &gpio_initstructure); - /* slave ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + /* master i2s mck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_6; gpio_init(GPIOB, &gpio_initstructure); - /* slave sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + /* slave i2s ws pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); + + /* slave i2s ck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave i2s sd pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_init(GPIOB, &gpio_initstructure); +} + +/** + * @brief spi2 interrupt function + * @param none + * @retval none + */ + void SPI2_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) + { + i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); + } +} + +/** + * @brief spi1 interrupt function + * @param none + * @retval none + */ +void SPI1_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]); + if(tx_index == 32) + { + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); + } + } } /** @@ -193,22 +234,45 @@ int main(void) nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); system_clock_config(); at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); + at32_led_on(LED4); gpio_config(); i2s_config(I2S_DATA_16BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_48K); + + /* enable slave and master i2s to start communication */ + i2s_enable(SPI2, TRUE); + i2s_enable(SPI1, TRUE); + + /* wait data receive end */ while(rx_index < 32); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32); - for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0; + /* receive buffer clear */ tx_index = 0; rx_index = 0; - + for(index = 0; index < 32; index++) + { + i2s2_buffer_rx[index] = 0; + } + + /* change frame format */ i2s_config(I2S_DATA_24BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_16K); + + /* enable slave and master i2s to start communication */ + i2s_enable(SPI2, TRUE); + i2s_enable(SPI1, TRUE); + + /* wait data receive end */ while(rx_index < 32); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status2 = buffer_compare_24bits(i2s2_buffer_rx, i2s1_buffer_tx, 32); @@ -220,7 +284,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) diff --git a/project/at_start_f415/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt b/project/at_start_f415/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt index 1152255..cba191a 100644 --- a/project/at_start_f415/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt +++ b/project/at_start_f415/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt @@ -11,8 +11,9 @@ the pins connection as follow: - pb0 as mck out - i2s2 slaver i2s1 master - - pb12 <---> pa4(ws) - - pb13 <---> pa5(ck) - - pb15 <---> pa7(sd) + - pb12 <---> pa15(ws) + - pb13 <---> pb3(ck) + - pb15 <---> pb5(sd) + + for more detailed information. please refer to the application note document AN0102. - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file diff --git a/project/at_start_f415/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c b/project/at_start_f415/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c index 97640a2..cd34fd3 100644 --- a/project/at_start_f415/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c +++ b/project/at_start_f415/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c @@ -34,6 +34,9 @@ * @{ */ +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15) + uint16_t i2s1_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718, 0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324, @@ -41,7 +44,7 @@ uint16_t i2s1_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, 0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C, 0x3D3E, 0x3F40 }; -uint16_t SPI1_buffer_tx[32] = {0x5152, 0x5354, 0x5556, 0x5758, 0x595A, 0x5B5C, +uint16_t spi1_buffer_tx[32] = {0x5152, 0x5354, 0x5556, 0x5758, 0x595A, 0x5B5C, 0x5D5E, 0x5F60, 0x6162, 0x6364, 0x6566, 0x6768, 0x696A, 0x6B6C, 0x6D6E, 0x6F70, 0x7172, 0x7374, 0x7576, 0x7778, 0x797A, 0x7B7C, 0x7D7E, 0x7F80, @@ -53,11 +56,6 @@ uint16_t spi2_buffer_rx[32]; __IO uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR, transfer_status3 = ERROR; -static void gpio_config(void); -static void spi_config(void); -static void i2s_config(i2s_operation_mode_type i2s1_mode, i2s_operation_mode_type i2s2_mode); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer_compare function. * @param none @@ -86,13 +84,12 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf static void i2s_config(i2s_operation_mode_type i2s1_mode, i2s_operation_mode_type i2s2_mode) { i2s_init_type i2s_init_struct; - + + /* i2s1 initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); - - spi_i2s_reset(SPI2); spi_i2s_reset(SPI1); i2s_default_para_init(&i2s_init_struct); + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; i2s_init_struct.mclk_output_enable = FALSE; @@ -100,7 +97,15 @@ static void i2s_config(i2s_operation_mode_type i2s1_mode, i2s_operation_mode_typ i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode = i2s1_mode; i2s_init(SPI1, &i2s_init_struct); - + + /* i2s2 initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + spi_i2s_reset(SPI2); + i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS; + i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT; + i2s_init_struct.mclk_output_enable = FALSE; + i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K; + i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW; i2s_init_struct.operation_mode =i2s2_mode; i2s_init(SPI2, &i2s_init_struct); } @@ -113,12 +118,13 @@ static void i2s_config(i2s_operation_mode_type i2s1_mode, i2s_operation_mode_typ static void spi_config(void) { spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); - - spi_i2s_reset(SPI2); spi_i2s_reset(SPI1); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode-transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode =SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -128,68 +134,92 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + spi_enable(SPI1, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + spi_i2s_reset(SPI2); + + /* dual line unidirectional simplex receive-only mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_SIMPLEX_RX; spi_init_struct.master_slave_mode =SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_16BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); spi_enable(SPI2, TRUE); - spi_enable(SPI1, TRUE); } /** * @brief gpio configuration. - * @param none + * @param spi_i2s_mode:select spi or i2s to be use + * - 0 (spi mode) + * - 1 (i2s mode) * @retval none */ -static void gpio_config(void) +static void gpio_config(uint16_t spi_i2s_mode) { gpio_init_type gpio_initstructure; crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); + gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); + gpio_pin_remap_config(SPI1_MUX_01, TRUE); - /* master ws pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + /* master ws/cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + if(spi_i2s_mode == 0) + { + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + } + else + { + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + } gpio_init(GPIOA, &gpio_initstructure); + if(spi_i2s_mode == 0) + { + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + } /* master ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; - gpio_init(GPIOA, &gpio_initstructure); + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_3; + gpio_init(GPIOB, &gpio_initstructure); /* master sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; - gpio_init(GPIOA, &gpio_initstructure); - - /* master mck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_0; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOB, &gpio_initstructure); /* slave ws pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); /* slave ck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); /* slave sd pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); } @@ -203,53 +233,97 @@ int main(void) __IO uint32_t index = 0; system_clock_config(); at32_board_init(); - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); - gpio_config(); + at32_led_on(LED4); + + /* first: i2s communication */ + gpio_config(1); i2s_config(I2S_MODE_MASTER_TX, I2S_MODE_SLAVE_RX); i2s_enable(SPI2, TRUE); i2s_enable(SPI1, TRUE); while(rx_index < 32) { + /* i2s transmit data fill */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]); + + /* i2s receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); /* test result:the data check */ transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32); + /* receive buffer clear */ tx_index = 0; rx_index = 0; + for(index = 0; index < 32; index++) + { + i2s2_buffer_rx[index] = 0; + } + + /* second: spi communication */ + gpio_config(0); spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + while(rx_index < 32) { + /* spi transmit data fill */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); - spi_i2s_data_transmit(SPI1, SPI1_buffer_tx[tx_index++]); + spi_i2s_data_transmit(SPI1, spi1_buffer_tx[tx_index++]); + + /* spi receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ - transfer_status2 = buffer_compare(spi2_buffer_rx, SPI1_buffer_tx, 32); + transfer_status2 = buffer_compare(spi2_buffer_rx, spi1_buffer_tx, 32); - for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0; + /* receive buffer clear */ tx_index = 0; rx_index = 0; + for(index = 0; index < 32; index++) + { + i2s2_buffer_rx[index] = 0; + } + + /* third: i2s communication */ + gpio_config(1); i2s_config(I2S_MODE_SLAVE_TX, I2S_MODE_MASTER_RX); + + /* when slave transmission mode,the slave trans data need fill in advance */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]); + i2s_enable(SPI1, TRUE); i2s_enable(SPI2, TRUE); while(rx_index < 32) { + /* i2s receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2); + + /* i2s transmit data fill */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]); } + + /* master half duplex receiving mode,the busy flag isnot usefull */ /* test result:the data check */ transfer_status3 = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32); @@ -261,7 +335,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f415/examples/pwc/deepsleep_ertc_alarm/src/main.c b/project/at_start_f415/examples/pwc/deepsleep_ertc_alarm/src/main.c index 38b2975..8b34a78 100644 --- a/project/at_start_f415/examples/pwc/deepsleep_ertc_alarm/src/main.c +++ b/project/at_start_f415/examples/pwc/deepsleep_ertc_alarm/src/main.c @@ -169,11 +169,14 @@ void system_clock_recover(void) */ int main(void) { - __IO uint32_t delay_index = 0; + crm_clocks_freq_type crm_clocks_freq_struct = {0}; __IO uint32_t systick_index = 0; /* congfig the system clock */ system_clock_config(); + + /* get system clock */ + crm_clocks_freq_get(&crm_clocks_freq_struct); /* init at start board */ at32_board_init(); @@ -219,8 +222,18 @@ int main(void) at32_led_on(LED2); - /* wait 3 LICK cycles to ensureclock stable */ - delay_us(7); + /* wait 3 LICK(maximum 120us) cycles to ensure clock stable */ + /* when wakeup from deepsleep,system clock source changes to HICK */ + if((CRM->misc2_bit.hick_to_sclk == TRUE) && (CRM->misc1_bit.hickdiv == TRUE)) + { + /* HICK is 48MHz */ + delay_us(((120 * 6 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1); + } + else + { + /* HICK is 8MHz */ + delay_us(((120 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1); + } /* wake up from deep sleep mode, congfig the system clock */ system_clock_recover(); diff --git a/project/at_start_f415/examples/pwc/deepsleep_ertc_tamper/src/main.c b/project/at_start_f415/examples/pwc/deepsleep_ertc_tamper/src/main.c index ee80b17..07313e7 100644 --- a/project/at_start_f415/examples/pwc/deepsleep_ertc_tamper/src/main.c +++ b/project/at_start_f415/examples/pwc/deepsleep_ertc_tamper/src/main.c @@ -139,11 +139,14 @@ void system_clock_recover(void) */ int main(void) { - __IO uint32_t delay_index = 0; + crm_clocks_freq_type crm_clocks_freq_struct = {0}; __IO uint32_t systick_index = 0; /* congfig the system clock */ system_clock_config(); + + /* get system clock */ + crm_clocks_freq_get(&crm_clocks_freq_struct); /* init at start board */ at32_board_init(); @@ -187,8 +190,18 @@ int main(void) at32_led_on(LED2); - /* wait 3 LICK cycles to ensureclock stable */ - delay_us(7); + /* wait 3 LICK(maximum 120us) cycles to ensure clock stable */ + /* when wakeup from deepsleep,system clock source changes to HICK */ + if((CRM->misc2_bit.hick_to_sclk == TRUE) && (CRM->misc1_bit.hickdiv == TRUE)) + { + /* HICK is 48MHz */ + delay_us(((120 * 6 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1); + } + else + { + /* HICK is 8MHz */ + delay_us(((120 * HICK_VALUE) /crm_clocks_freq_struct.sclk_freq) + 1); + } /* wake up from deep sleep mode, congfig the system clock */ system_clock_recover(); diff --git a/project/at_start_f415/examples/spi/crc_transfer_polling/readme.txt b/project/at_start_f415/examples/spi/crc_transfer_polling/readme.txt index 9c89d4c..ec29e71 100644 --- a/project/at_start_f415/examples/spi/crc_transfer_polling/readme.txt +++ b/project/at_start_f415/examples/spi/crc_transfer_polling/readme.txt @@ -9,8 +9,10 @@ crc value by polling mode. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa6(miso) pb15(mosi) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f415/examples/spi/crc_transfer_polling/src/main.c b/project/at_start_f415/examples/spi/crc_transfer_polling/src/main.c index 4184381..e288dd2 100644 --- a/project/at_start_f415/examples/spi/crc_transfer_polling/src/main.c +++ b/project/at_start_f415/examples/spi/crc_transfer_polling/src/main.c @@ -34,7 +34,9 @@ * @{ */ -#define BUFFER_SIZE 32 +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 uint16_t spi1_tx_buffer[BUFFER_SIZE] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718, 0x191A, 0x1B1C, 0x1D1E, 0x1F20, @@ -49,10 +51,6 @@ uint32_t tx_index = 0, rx_index = 0; __IO uint16_t crc1_value = 0, crc2_value = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -81,9 +79,12 @@ error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buf static void spi_config(void) { spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -93,15 +94,31 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - - spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; - spi_init(SPI2, &spi_init_struct); - + + /* hardware crc calculation config */ spi_crc_polynomial_set(SPI1, 7); - spi_crc_polynomial_set(SPI2, 7); spi_crc_enable(SPI1, TRUE); - spi_crc_enable(SPI2, TRUE); + spi_enable(SPI1, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; + spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_16BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init(SPI2, &spi_init_struct); + + /* hardware crc calculation config */ + spi_crc_polynomial_set(SPI2, 7); + spi_crc_enable(SPI2, TRUE); + spi_enable(SPI2, TRUE); } @@ -115,47 +132,72 @@ static void gpio_config(void) gpio_init_type gpio_initstructure; crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_5; + gpio_initstructure.gpio_pins = GPIO_PINS_4; gpio_init(GPIOA, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_6; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* master spi miso pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_7; + gpio_initstructure.gpio_pins = GPIO_PINS_6; gpio_init(GPIOA, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* master spi mosi pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + gpio_initstructure.gpio_pins = GPIO_PINS_7; + gpio_init(GPIOA, &gpio_initstructure); + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + + /* slave spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_14; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + + /* slave spi miso pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pins = GPIO_PINS_14; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave spi mosi pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); } @@ -168,35 +210,58 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); gpio_config(); spi_config(); - + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + /* transfer procedure:the "BUFFER_SIZE-1" data transfer */ while(tx_index < BUFFER_SIZE - 1) { + /* slave and master transmit data fill */ while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]); while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + + /* slave and master receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2); while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); } + + /* wait master and slave transmit data buffer empty */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); /* transfer procedure:the last data and crc transfer */ + /* slave the last transmit data fill and crc transfer setting */ spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]); spi_crc_next_transmit(SPI2); + + /* master the last transmit data fill and crc transfer setting */ spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index]); spi_crc_next_transmit(SPI1); + + /* wait master and slave the last data transfer end */ while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index] = spi_i2s_data_receive(SPI1); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2); + + /* wait master and slave the crc transfer end */ while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data and crc check */ transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); @@ -214,14 +279,14 @@ int main(void) crc1_value = spi_i2s_data_receive(SPI1); crc2_value = spi_i2s_data_receive(SPI2); - /* test result indicate:if success ,led2 lights */ + /* test result indicate:if SUCCESS ,led2 lights */ if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS)) { at32_led_on(LED2); } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f415/examples/adc/software_trigger_repeat/inc/at32f415_clock.h b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/inc/at32f415_clock.h similarity index 100% rename from project/at_start_f415/examples/adc/software_trigger_repeat/inc/at32f415_clock.h rename to project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/inc/at32f415_clock.h diff --git a/project/at_start_f415/examples/adc/software_trigger_repeat/inc/at32f415_conf.h b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/inc/at32f415_conf.h similarity index 100% rename from project/at_start_f415/examples/adc/software_trigger_repeat/inc/at32f415_conf.h rename to project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/inc/at32f415_conf.h diff --git a/project/at_start_f415/examples/adc/software_trigger_repeat/inc/at32f415_int.h b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/inc/at32f415_int.h similarity index 100% rename from project/at_start_f415/examples/adc/software_trigger_repeat/inc/at32f415_int.h rename to project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/inc/at32f415_int.h diff --git a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvoptx b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvoptx similarity index 99% rename from project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvoptx rename to project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvoptx index 2a24344..5c003ab 100644 --- a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvoptx +++ b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvoptx @@ -22,7 +22,7 @@ - use_jtagpin_hardwarecs_dma + fullduplex_dma_jtagpin 0x4 ARM-ADS diff --git a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvprojx b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvprojx similarity index 99% rename from project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvprojx rename to project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvprojx index db71f65..3a8e394 100644 --- a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/mdk_v5/use_jtagpin_hardwarecs_dma.uvprojx +++ b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/mdk_v5/fullduplex_dma_jtagpin.uvprojx @@ -7,7 +7,7 @@ - use_jtagpin_hardwarecs_dma + fullduplex_dma_jtagpin 0x4 ARM-ADS 5060960::V5.06 update 7 (build 960)::.\ARMCC @@ -48,7 +48,7 @@ 1 .\objects\ - use_jtagpin_hardwarecs_dma + fullduplex_dma_jtagpin 1 0 1 @@ -482,7 +482,7 @@ - <Project Info> + fullduplex_dma_jtagpin 0 1 diff --git a/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/readme.txt b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/readme.txt new file mode 100644 index 0000000..365379c --- /dev/null +++ b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/readme.txt @@ -0,0 +1,19 @@ +/** + ************************************************************************** + * @file readme.txt + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board, in this demo, shows how to use + dma recieve data. spi1 use jtag pin as spi pin,and config spi in hardware + cs mode. + the pins connection as follow: + - spi2 slaver spi1 master + pb12(cs) <---> pa15(cs) + pb13(sck) <---> pb3(sck) + pb14(miso) <---> pb4(miso) + pb15(mosi) <---> pb5(mosi) + + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f415/examples/adc/software_trigger_repeat/src/at32f415_clock.c b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/src/at32f415_clock.c similarity index 100% rename from project/at_start_f415/examples/adc/software_trigger_repeat/src/at32f415_clock.c rename to project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/src/at32f415_clock.c diff --git a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f415_int.c b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/src/at32f415_int.c similarity index 93% rename from project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f415_int.c rename to project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/src/at32f415_int.c index 4439eed..09ca896 100644 --- a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f415_int.c +++ b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/src/at32f415_int.c @@ -30,7 +30,7 @@ * @{ */ -/** @addtogroup 415_SPI_use_jtagpin_hardwarecs_dma +/** @addtogroup 415_SPI_fullduplex_dma_jtagpin * @{ */ diff --git a/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/src/main.c b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/src/main.c new file mode 100644 index 0000000..1fc1d61 --- /dev/null +++ b/project/at_start_f415/examples/spi/fullduplex_dma_jtagpin/src/main.c @@ -0,0 +1,331 @@ +/** + ************************************************************************** + * @file main.c + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +#include "at32f415_board.h" +#include "at32f415_clock.h" + +/** @addtogroup AT32F415_periph_examples + * @{ + */ + +/** @addtogroup 415_SPI_fullduplex_dma_jtagpin SPI_fullduplex_dma_jtagpin + * @{ + */ + +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15) +#define BUFFER_SIZE 32 + +spi_init_type spi_init_struct; +uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, + 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, + 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, + 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20}; +uint8_t spi2_tx_buffer[BUFFER_SIZE] = {0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, + 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, 0x60, + 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, + 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70}; +uint8_t spi1_rx_buffer[BUFFER_SIZE], spi2_rx_buffer[BUFFER_SIZE]; +volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; + +/** + * @brief buffer compare function. + * @param pbuffer1, pbuffer2: buffers to be compared. + * @param buffer_length: buffer's length + * @retval the result of compare + */ +error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength) +{ + while(bufferlength--) + { + if(*pbuffer1 != *pbuffer2) + { + return ERROR; + } + + pbuffer1++; + pbuffer2++; + } + return SUCCESS; +} + +/** + * @brief dma configuration. + * @param none + * @retval none + */ +static void dma_config(void) +{ + dma_init_type dma_init_struct; + crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); + + /* use dma1_channel3 as spi1 transmit channel */ + dma_reset(DMA1_CHANNEL3); + dma_default_para_init(&dma_init_struct); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; + dma_init_struct.memory_base_addr = (uint32_t)spi1_tx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI1->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA1_CHANNEL3, &dma_init_struct); + + /* use dma1_channel2 as spi1 receive channel */ + dma_reset(DMA1_CHANNEL2); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; + dma_init_struct.memory_base_addr = (uint32_t)spi1_rx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI1->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA1_CHANNEL2, &dma_init_struct); + + /* use dma1_channel5 as spi2 transmit channel */ + dma_reset(DMA1_CHANNEL5); + dma_default_para_init(&dma_init_struct); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; + dma_init_struct.memory_base_addr = (uint32_t)spi2_tx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA1_CHANNEL5, &dma_init_struct); + + /* use dma1_channel4 as spi2 receive channel */ + dma_reset(DMA1_CHANNEL4); + dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; + dma_init_struct.memory_base_addr = (uint32_t)spi2_rx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA1_CHANNEL4, &dma_init_struct); +} + +/** + * @brief spi configuration. + * @param none + * @retval none + */ +static void spi_config(void) +{ + /* spi master initialization */ + crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); + spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; + spi_init_struct.master_slave_mode = SPI_MODE_MASTER; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; + spi_init(SPI1, &spi_init_struct); + + /* use dma transmit and receive */ + spi_i2s_dma_transmitter_enable(SPI1, TRUE); + spi_i2s_dma_receiver_enable(SPI1, TRUE); + + spi_enable(SPI1, TRUE); + + /* spi slave initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; + spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init(SPI2, &spi_init_struct); + + /* use dma transmit and receive */ + spi_i2s_dma_transmitter_enable(SPI2, TRUE); + spi_i2s_dma_receiver_enable(SPI2, TRUE); + + spi_enable(SPI2, TRUE); +} + +/** + * @brief gpio configuration. + * @param none + * @retval none + */ +static void gpio_config(void) +{ + gpio_init_type gpio_initstructure; + crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); + gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); + gpio_pin_remap_config(SPI1_MUX_01, TRUE); + gpio_default_para_init(&gpio_initstructure); + + /* spi master gpio initialization */ + /* spi1 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* spi1 sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_3; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi1 miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi1 mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 gpio initialization */ + /* spi2 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_14; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_init(GPIOB, &gpio_initstructure); +} + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + __IO uint32_t index = 0; + system_clock_config(); + at32_board_init(); + at32_led_on(LED4); + dma_config(); + gpio_config(); + spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + /* enable spi slave dma to fill and get data */ + dma_channel_enable(DMA1_CHANNEL5, TRUE); + dma_channel_enable(DMA1_CHANNEL4, TRUE); + + /* enable spi master dma to fill and get data */ + dma_channel_enable(DMA1_CHANNEL2, TRUE); + dma_channel_enable(DMA1_CHANNEL3, TRUE); + + /* wait master and slave spi data receive end */ + while(dma_flag_get(DMA1_FDT2_FLAG) == RESET) + { + } + while(dma_flag_get(DMA1_FDT4_FLAG) == RESET) + { + } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* test result:the data check */ + transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); + transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE); + + /* test result indicate:if SUCCESS ,led2 lights */ + if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS)) + { + at32_led_on(LED2); + } + else + { + at32_led_on(LED3); + } + while(1) + { + } +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f415/examples/spi/fullduplex_polling/readme.txt b/project/at_start_f415/examples/spi/fullduplex_polling/readme.txt index 780ce5e..f75f4e1 100644 --- a/project/at_start_f415/examples/spi/fullduplex_polling/readme.txt +++ b/project/at_start_f415/examples/spi/fullduplex_polling/readme.txt @@ -8,9 +8,11 @@ this demo is based on the at-start board, in this demo, shows how to use fullduplex mode transfer data by polling mode. the pins connection as follow: - - spi2 slaver spi1 master + - spi2 spi1 + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa6(miso) pb15(mosi) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f415/examples/spi/fullduplex_polling/src/main.c b/project/at_start_f415/examples/spi/fullduplex_polling/src/main.c index b25c48b..eff4ac0 100644 --- a/project/at_start_f415/examples/spi/fullduplex_polling/src/main.c +++ b/project/at_start_f415/examples/spi/fullduplex_polling/src/main.c @@ -34,7 +34,12 @@ * @{ */ -#define BUFFER_SIZE 32 +#define SPI1_AS_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI1_AS_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) + +#define SPI2_AS_MASTER_CS_HIGH gpio_bits_set(GPIOB, GPIO_PINS_12) +#define SPI2_AS_MASTER_CS_LOW gpio_bits_reset(GPIOB, GPIO_PINS_12) +#define BUFFER_SIZE 32 spi_init_type spi_init_struct; uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, @@ -50,10 +55,6 @@ uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; volatile error_status transfer_status3 = ERROR, transfer_status4 = ERROR; -static void gpio_config(uint16_t spi1_mode, uint16_t spi2_mode); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -82,9 +83,11 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -94,11 +97,23 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + spi_enable(SPI1, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional full-duplex mode */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - spi_enable(SPI1, TRUE); spi_enable(SPI2, TRUE); } @@ -113,85 +128,124 @@ static void gpio_config(uint16_t spi1_mode, uint16_t spi2_mode) crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); gpio_default_para_init(&gpio_initstructure); - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* spi1 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; if(spi1_mode == SPI_MODE_MASTER) { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } - gpio_initstructure.gpio_pins = GPIO_PINS_5; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* spi1 sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + if(spi1_mode == SPI_MODE_MASTER) + { + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + } + else + { + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + } + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); /* spi1 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi1_mode == SPI_MODE_MASTER) { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } - gpio_initstructure.gpio_pins = GPIO_PINS_6; + gpio_initstructure.gpio_pins = GPIO_PINS_6; gpio_init(GPIOA, &gpio_initstructure); /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi1_mode == SPI_MODE_MASTER) { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } - gpio_initstructure.gpio_pins = GPIO_PINS_7; + gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); - - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + + /* spi2 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; if(spi2_mode == SPI_MODE_SLAVE) { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; } - gpio_initstructure.gpio_pins = GPIO_PINS_13; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + if(spi2_mode == SPI_MODE_SLAVE) + { + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + } + else + { + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + } + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); /* spi2 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi2_mode == SPI_MODE_SLAVE) { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } - gpio_initstructure.gpio_pins = GPIO_PINS_14; + gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); /* spi2 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; if(spi2_mode == SPI_MODE_SLAVE) { - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; } else { - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; } - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + if(spi1_mode == SPI_MODE_MASTER) + { + SPI1_AS_MASTER_CS_HIGH; + } + if(spi2_mode == SPI_MODE_MASTER) + { + SPI2_AS_MASTER_CS_HIGH; + } } /** @@ -204,64 +258,96 @@ int main(void) __IO uint32_t index = 0; system_clock_config(); at32_board_init(); + at32_led_on(LED4); gpio_config(SPI_MODE_MASTER, SPI_MODE_SLAVE); spi_config(); - + + /* start communication: master pull down CS pin select slave */ + SPI1_AS_MASTER_CS_LOW; + /* transfer procedure:the "BUFFER_SIZE" data transfer */ while(tx_index < BUFFER_SIZE) { + /* slave and master transmit data fill */ while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index]); while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + + /* slave and master receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index] = spi_i2s_data_receive(SPI2); while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); } - + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI1_AS_MASTER_CS_HIGH; + /* test result:the data check */ transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE); - - /* master &slave mode switch */ + spi_enable(SPI1, FALSE); spi_enable(SPI2, FALSE); + + /* master & slave mode switch */ gpio_config(SPI_MODE_SLAVE, SPI_MODE_MASTER); spi_init_struct.master_slave_mode =SPI_MODE_SLAVE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI1, &spi_init_struct); - + spi_init_struct.master_slave_mode =SPI_MODE_MASTER; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI2, &spi_init_struct); - + + /* receive buffer clear */ tx_index = 0; rx_index = 0; for(index = 0; index < BUFFER_SIZE; index++) + { spi1_rx_buffer[index] = 0; - for(index = 0; index < BUFFER_SIZE; index++) spi2_rx_buffer[index] = 0; - + } + spi_enable(SPI2, TRUE); spi_enable(SPI1, TRUE); + + /* start communication: master pull down CS pin select slave */ + SPI2_AS_MASTER_CS_LOW; /* transfer procedure:the "BUFFER_SIZE" data transfer */ while(tx_index < BUFFER_SIZE) { + /* slave and master transmit data fill */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index]); while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]); + + /* slave and master receive data get */ while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); spi1_rx_buffer[rx_index] = spi_i2s_data_receive(SPI1); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI2_AS_MASTER_CS_HIGH; /* test result:the data check */ transfer_status3 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); transfer_status4 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE); - /* test result indicate:if success ,led2 lights */ + /* test result indicate:if SUCCESS ,led2 lights */ if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS) && \ (transfer_status3 == SUCCESS) && (transfer_status4 == SUCCESS)) { @@ -269,7 +355,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f415_clock.h b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/inc/at32f415_clock.h similarity index 100% rename from project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f415_clock.h rename to project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/inc/at32f415_clock.h diff --git a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f415_conf.h b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/inc/at32f415_conf.h similarity index 100% rename from project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f415_conf.h rename to project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/inc/at32f415_conf.h diff --git a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f415_int.h b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/inc/at32f415_int.h similarity index 100% rename from project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f415_int.h rename to project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/inc/at32f415_int.h diff --git a/project/at_start_f415/examples/adc/software_trigger_repeat/mdk_v5/software_trigger_repeat.uvoptx b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvoptx similarity index 98% rename from project/at_start_f415/examples/adc/software_trigger_repeat/mdk_v5/software_trigger_repeat.uvoptx rename to project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvoptx index 0c0f5f3..5c003ab 100644 --- a/project/at_start_f415/examples/adc/software_trigger_repeat/mdk_v5/software_trigger_repeat.uvoptx +++ b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvoptx @@ -22,7 +22,7 @@ - software_trigger_repeat + fullduplex_dma_jtagpin 0x4 ARM-ADS @@ -282,8 +282,8 @@ 0 0 0 - ..\..\..\..\..\..\libraries\drivers\src\at32f415_dma.c - at32f415_dma.c + ..\..\..\..\..\..\libraries\drivers\src\at32f415_usart.c + at32f415_usart.c 0 0 @@ -294,8 +294,8 @@ 0 0 0 - ..\..\..\..\..\..\libraries\drivers\src\at32f415_adc.c - at32f415_adc.c + ..\..\..\..\..\..\libraries\drivers\src\at32f415_dma.c + at32f415_dma.c 0 0 @@ -306,8 +306,8 @@ 0 0 0 - ..\..\..\..\..\..\libraries\drivers\src\at32f415_usart.c - at32f415_usart.c + ..\..\..\..\..\..\libraries\drivers\src\at32f415_spi.c + at32f415_spi.c 0 0 diff --git a/project/at_start_f415/examples/adc/software_trigger_repeat/mdk_v5/software_trigger_repeat.uvprojx b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvprojx similarity index 98% rename from project/at_start_f415/examples/adc/software_trigger_repeat/mdk_v5/software_trigger_repeat.uvprojx rename to project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvprojx index 407f105..3a8e394 100644 --- a/project/at_start_f415/examples/adc/software_trigger_repeat/mdk_v5/software_trigger_repeat.uvprojx +++ b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/mdk_v5/halfduplex_dma_jtagpin.uvprojx @@ -7,7 +7,7 @@ - software_trigger_repeat + fullduplex_dma_jtagpin 0x4 ARM-ADS 5060960::V5.06 update 7 (build 960)::.\ARMCC @@ -48,7 +48,7 @@ 1 .\objects\ - software_trigger_repeat + fullduplex_dma_jtagpin 1 0 1 @@ -427,20 +427,20 @@ 1 ..\..\..\..\..\..\libraries\drivers\src\at32f415_crm.c + + at32f415_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f415_usart.c + at32f415_dma.c 1 ..\..\..\..\..\..\libraries\drivers\src\at32f415_dma.c - at32f415_adc.c + at32f415_spi.c 1 - ..\..\..\..\..\..\libraries\drivers\src\at32f415_adc.c - - - at32f415_usart.c - 1 - ..\..\..\..\..\..\libraries\drivers\src\at32f415_usart.c + ..\..\..\..\..\..\libraries\drivers\src\at32f415_spi.c @@ -482,7 +482,7 @@ - <Project Info> + fullduplex_dma_jtagpin 0 1 diff --git a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/readme.txt similarity index 72% rename from project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt rename to project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/readme.txt index 6a35227..dc45154 100644 --- a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt +++ b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/readme.txt @@ -6,12 +6,13 @@ */ this demo is based on the at-start board, in this demo, shows how to use - dma recieve data. spi3 use jtag pin as spi pin,and config spi in hardware + dma recieve data. spi1 use jtag pin as spi pin,and config spi in hardware cs mode. the pins connection as follow: - - spi2 slaver spi1 master - - pb12(cs) <---> pa15(cs) + - spi2 slave spi1 master + pb12(cs) <---> pa15(cs) pb13(sck) <---> pb3(sck) pb14(miso) <---> pb5(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f415_clock.c b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/src/at32f415_clock.c similarity index 100% rename from project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f415_clock.c rename to project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/src/at32f415_clock.c diff --git a/project/at_start_f415/examples/adc/software_trigger_repeat/src/at32f415_int.c b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/src/at32f415_int.c similarity index 85% rename from project/at_start_f415/examples/adc/software_trigger_repeat/src/at32f415_int.c rename to project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/src/at32f415_int.c index d9b8226..09ca896 100644 --- a/project/at_start_f415/examples/adc/software_trigger_repeat/src/at32f415_int.c +++ b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/src/at32f415_int.c @@ -26,13 +26,11 @@ #include "at32f415_int.h" #include "at32f415_board.h" -extern __IO uint16_t dma_trans_complete_flag; - /** @addtogroup AT32F415_periph_examples * @{ */ -/** @addtogroup 415_ADC_software_trigger_repeat +/** @addtogroup 415_SPI_fullduplex_dma_jtagpin * @{ */ @@ -133,21 +131,6 @@ void SysTick_Handler(void) { } -/** - * @brief this function handles dma1_channel1 handler. - * @param none - * @retval none - */ -void DMA1_Channel1_IRQHandler(void) -{ - if(dma_interrupt_flag_get(DMA1_FDT1_FLAG) != RESET) - { - dma_flag_clear(DMA1_FDT1_FLAG); - dma_trans_complete_flag++; - } -} - - /** * @} */ @@ -155,3 +138,6 @@ void DMA1_Channel1_IRQHandler(void) /** * @} */ + + + diff --git a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/src/main.c similarity index 53% rename from project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c rename to project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/src/main.c index 9510a76..ca684e1 100644 --- a/project/at_start_f415/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c +++ b/project/at_start_f415/examples/spi/halfduplex_dma_jtagpin/src/main.c @@ -29,33 +29,31 @@ * @{ */ -/** @addtogroup 415_SPI_use_jtagpin_hardwarecs_dma SPI_use_jtagpin_hardwarecs_dma +/** @addtogroup 415_SPI_fullduplex_dma_jtagpin SPI_fullduplex_dma_jtagpin * @{ */ -#define BUFFER_SIZE 32 +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_15) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_15) +#define BUFFER_SIZE 32 +spi_init_type spi_init_struct; uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20}; uint8_t spi2_rx_buffer[BUFFER_SIZE]; -__IO uint8_t tx_index = 0; volatile error_status transfer_status = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. * @param buffer_length: buffer's length * @retval the result of compare */ -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length) +error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength) { - while(buffer_length--) + while(bufferlength--) { if(*pbuffer1 != *pbuffer2) { @@ -69,19 +67,33 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe } /** - * @brief spi configuration. + * @brief dma configuration. * @param none * @retval none */ -static void spi_config(void) +static void dma_config(void) { dma_init_type dma_init_struct; - spi_init_type spi_init_struct; - crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); - dma_reset(DMA1_CHANNEL4); + + /* use dma1_channel3 as spi1 transmit channel */ + dma_reset(DMA1_CHANNEL3); dma_default_para_init(&dma_init_struct); dma_init_struct.buffer_size = BUFFER_SIZE; + dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; + dma_init_struct.memory_base_addr = (uint32_t)spi1_tx_buffer; + dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; + dma_init_struct.memory_inc_enable = TRUE; + dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI1->dt); + dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; + dma_init_struct.peripheral_inc_enable = FALSE; + dma_init_struct.priority = DMA_PRIORITY_MEDIUM; + dma_init_struct.loop_mode_enable = FALSE; + dma_init(DMA1_CHANNEL3, &dma_init_struct); + + /* use dma1_channel4 as spi2 receive channel */ + dma_reset(DMA1_CHANNEL4); + dma_init_struct.buffer_size = BUFFER_SIZE; dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init_struct.memory_base_addr = (uint32_t)spi2_rx_buffer; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; @@ -92,10 +104,22 @@ static void spi_config(void) dma_init_struct.priority = DMA_PRIORITY_MEDIUM; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL4, &dma_init_struct); +} +/** + * @brief spi configuration. + * @param none + * @retval none + */ +static void spi_config(void) +{ + spi_init_type spi_init_struct; + + /* spi master initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode-transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -103,16 +127,31 @@ static void spi_config(void) spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; - spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - - spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; - spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; - spi_init(SPI2, &spi_init_struct); - - spi_hardware_cs_output_enable(SPI1, TRUE); - spi_i2s_dma_receiver_enable(SPI2, TRUE); + + /* use dma transmit */ + spi_i2s_dma_transmitter_enable(SPI1, TRUE); + spi_enable(SPI1, TRUE); + + /* spi slave initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* single line bidirectional half duplex mode-receiving */ + spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; + spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; + spi_init(SPI2, &spi_init_struct); + + /* use dma receive */ + spi_i2s_dma_receiver_enable(SPI2, TRUE); + spi_enable(SPI2, TRUE); } @@ -129,43 +168,53 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE); gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE); gpio_pin_remap_config(SPI1_MUX_01, TRUE); - - /* master sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_default_para_init(&gpio_initstructure); + + /* spi master gpio initialization */ + /* spi1 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_3; - gpio_init(GPIOB, &gpio_initstructure); - - /* master mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; - gpio_init(GPIOB, &gpio_initstructure); - - /* master cs pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOA, &gpio_initstructure); - - /* slave sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* spi1 sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_3; gpio_init(GPIOB, &gpio_initstructure); - /* slave miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_14; + /* spi1 mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 gpio initialization */ + /* spi2 cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); - /* slave cs pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_12; + /* spi2 sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; + gpio_init(GPIOB, &gpio_initstructure); + + /* spi2 miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); } @@ -176,35 +225,51 @@ static void gpio_config(void) */ int main(void) { + __IO uint32_t index = 0; system_clock_config(); at32_board_init(); - - /* button press:ensure code canbe download normally */ - while(at32_button_press() == NO_BUTTON); - + at32_led_on(LED4); + dma_config(); gpio_config(); spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + /* enable spi slave dma to get data */ dma_channel_enable(DMA1_CHANNEL4, TRUE); - - /* transfer procedure:the "BUFFER_SIZE" data transfer */ - while(tx_index < BUFFER_SIZE) + + /* enable spi master dma to fill data */ + dma_channel_enable(DMA1_CHANNEL3, TRUE); + + /* wait master spi data fill end */ + while(dma_flag_get(DMA1_FDT3_FLAG) == RESET) { - while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); - spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); } - while(!dma_flag_get(DMA1_FDT4_FLAG)); + + /* wait slave spi data get end */ + while(dma_flag_get(DMA1_FDT4_FLAG) == RESET) + { + } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ transfer_status = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); - /* test result indicate:if success ,led2 lights */ + /* test result indicate:if SUCCESS ,led2 lights */ if(transfer_status == SUCCESS) { at32_led_on(LED2); } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f415/examples/spi/halfduplex_interrupt/readme.txt b/project/at_start_f415/examples/spi/halfduplex_interrupt/readme.txt index a09be62..b4c9d76 100644 --- a/project/at_start_f415/examples/spi/halfduplex_interrupt/readme.txt +++ b/project/at_start_f415/examples/spi/halfduplex_interrupt/readme.txt @@ -9,7 +9,9 @@ halfduplex mode transfer data by interrupt mode. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f415/examples/spi/halfduplex_interrupt/src/at32f415_int.c b/project/at_start_f415/examples/spi/halfduplex_interrupt/src/at32f415_int.c index c51ddb2..4b9bc3b 100644 --- a/project/at_start_f415/examples/spi/halfduplex_interrupt/src/at32f415_int.c +++ b/project/at_start_f415/examples/spi/halfduplex_interrupt/src/at32f415_int.c @@ -24,12 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f415_int.h" -#include "at32f415_board.h" - -extern uint8_t spi1_tx_buffer[]; -extern uint8_t spi2_rx_buffer[]; -extern uint32_t tx_index; -extern uint32_t rx_index; /** @addtogroup AT32F415_periph_examples * @{ @@ -138,36 +132,6 @@ void SysTick_Handler(void) { } -/** - * @brief This function handles the spi1 interrupt request. - * @param None - * @retval None - */ - void SPI1_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); - if(tx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); - } - } -} - -/** - * @brief This function handles the spi2 interrupt request. - * @param None - * @retval None - */ - void SPI2_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) - { - spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); - } -} - /** * @} */ diff --git a/project/at_start_f415/examples/spi/halfduplex_interrupt/src/main.c b/project/at_start_f415/examples/spi/halfduplex_interrupt/src/main.c index 813e446..ff48b81 100644 --- a/project/at_start_f415/examples/spi/halfduplex_interrupt/src/main.c +++ b/project/at_start_f415/examples/spi/halfduplex_interrupt/src/main.c @@ -33,9 +33,9 @@ * @{ */ -#define BUFFER_SIZE 32 - -spi_init_type spi_init_struct; +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, @@ -45,10 +45,6 @@ uint8_t spi2_rx_buffer[BUFFER_SIZE]; volatile uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -77,9 +73,14 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI1_IRQn, 0, 0); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode - transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode =SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -89,18 +90,27 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); + + /* enable transmit data buffer empty interrupt */ + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI2_IRQn, 0, 0); + /* single line bidirectional half duplex mode - receiving */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; spi_init_struct.master_slave_mode =SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - - nvic_irq_enable(SPI1_IRQn, 0, 0); - nvic_irq_enable(SPI2_IRQn, 0, 0); - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + + /* enable receive data buffer full interrupt */ spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE); - - spi_enable(SPI2, TRUE); - spi_enable(SPI1, TRUE); } /** @@ -113,35 +123,83 @@ static void gpio_config(void) gpio_init_type gpio_initstructure; crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); + gpio_default_para_init(&gpio_initstructure); - - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; + /* master spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); - - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* spi2 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_14; + /* slave spi miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_14; gpio_init(GPIOB, &gpio_initstructure); +} - while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13)!=RESET); +/** + * @brief spi1 interrupt function + * @param none + * @retval none + */ + void SPI1_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + if(tx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); + } + } +} + +/** + * @brief spi2 interrupt function + * @param none + * @retval none + */ + void SPI2_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) + { + spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); + } } /** @@ -153,23 +211,39 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); gpio_config(); /* config spi1 send spi2 receive */ spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + spi_enable(SPI2, TRUE); + spi_enable(SPI1, TRUE); + + /* wait slave data receive end */ while(rx_index < BUFFER_SIZE); + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ transfer_status = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); - /* test result indicate:if success ,led2 lights */ + /* test result indicate:if SUCCESS ,led2 lights */ if(transfer_status==SUCCESS) { at32_led_on(LED2); } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/readme.txt b/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/readme.txt index 050f607..1ba8d7c 100644 --- a/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/readme.txt +++ b/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/readme.txt @@ -10,6 +10,7 @@ realize data send and receive. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb14(miso) <---> pa7(mosi) diff --git a/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/src/at32f415_int.c b/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/src/at32f415_int.c index 53eced2..2b88879 100644 --- a/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/src/at32f415_int.c +++ b/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/src/at32f415_int.c @@ -24,14 +24,6 @@ /* includes ------------------------------------------------------------------*/ #include "at32f415_int.h" -#include "at32f415_board.h" - -extern uint8_t spi1_tx_buffer[]; -extern uint8_t spi2_tx_buffer[]; -extern uint8_t spi1_rx_buffer[]; -extern uint8_t spi2_rx_buffer[]; -extern uint32_t tx_index; -extern uint32_t rx_index; /** @addtogroup AT32F415_periph_examples * @{ @@ -140,54 +132,6 @@ void SysTick_Handler(void) { } -/** - * @brief This function handles the spi1 interrupt request. - * @param None - * @retval None - */ - void SPI1_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); - if(tx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); - } - } - if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_RDBF_FLAG) != RESET) - { - spi_enable(SPI1, FALSE); - spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); - spi_enable(SPI1, TRUE); - if(rx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, FALSE); - } - } -} - -/** - * @brief This function handles the spi2 interrupt request. - * @param None - * @retval None - */ - void SPI2_IRQHandler(void) -{ - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_TDBE_FLAG) != RESET) - { - spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]); - if(tx_index == BUFFERSIZE) - { - spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, FALSE); - } - } - if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) - { - spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); - } -} - /** * @} */ diff --git a/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/src/main.c b/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/src/main.c index 377ff94..dfa0d03 100644 --- a/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/src/main.c +++ b/project/at_start_f415/examples/spi/halfduplex_transceiver_switch/src/main.c @@ -33,8 +33,9 @@ * @{ */ -#define BUFFER_SIZE 32 - +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 spi_init_type spi_init_struct; uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, @@ -49,10 +50,6 @@ uint8_t spi1_rx_buffer[BUFFER_SIZE], spi2_rx_buffer[BUFFER_SIZE]; volatile uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -81,9 +78,12 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI1_IRQn, 0, 0); spi_default_para_init(&spi_init_struct); + + /* single line bidirectional half duplex mode - transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256; @@ -93,18 +93,27 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + /* enable transmit data buffer empty interrupt */ + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + nvic_irq_enable(SPI2_IRQn, 0, 0); + + /* single line bidirectional half duplex mode - receiving */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - nvic_irq_enable(SPI1_IRQn, 0, 0); - nvic_irq_enable(SPI2_IRQn, 0, 0); - spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE); + /* enable receive data buffer full interrupt */ spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE); - - spi_enable(SPI1, TRUE); - spi_enable(SPI2, TRUE); } /** @@ -118,36 +127,103 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); gpio_default_para_init(&gpio_initstructure); - - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOA, &gpio_initstructure); + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; + /* master spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_initstructure); - - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; gpio_init(GPIOB, &gpio_initstructure); - /* spi2 miso pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_14; + /* slave spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13)!=RESET); + /* slave spi miso pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_14; + gpio_init(GPIOB, &gpio_initstructure); } +/** + * @brief spi1 interrupt function + * @param none + * @retval none + */ + void SPI1_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + if(tx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); + } + } + if(spi_i2s_interrupt_flag_get(SPI1, SPI_I2S_RDBF_FLAG) != RESET) + { + spi_enable(SPI1, FALSE); + spi1_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI1); + spi_enable(SPI1, TRUE); + if(rx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, FALSE); + spi_enable(SPI1, FALSE); + } + } +} + +/** + * @brief spi2 interrupt function + * @param none + * @retval none + */ + void SPI2_IRQHandler(void) +{ + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_TDBE_FLAG) != RESET) + { + spi_i2s_data_transmit(SPI2, spi2_tx_buffer[tx_index++]); + if(tx_index == BUFFER_SIZE) + { + spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, FALSE); + } + } + if(spi_i2s_interrupt_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET) + { + spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); + } +} + + /** * @brief main function. * @param none @@ -157,37 +233,70 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); gpio_config(); + /* config spi1 send spi2 receive */ spi_config(); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + + spi_enable(SPI2, TRUE); + spi_enable(SPI1, TRUE); + + /* wait data receive end */ while(rx_index < BUFFER_SIZE); - + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + /* test result:the data check */ transfer_status1 = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); - + /* config spi2 send spi1 receive */ spi_enable(SPI1, FALSE); spi_enable(SPI2, FALSE); + rx_index = 0; tx_index = 0; spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE); spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, FALSE); - + + /* single line bidirectional half duplex mode - receiving */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; + spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + /* single line bidirectional half duplex mode - transmitting */ spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); spi_i2s_interrupt_enable(SPI1, SPI_I2S_RDBF_INT, TRUE); spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, TRUE); + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + spi_enable(SPI2, TRUE); spi_enable(SPI1, TRUE); + + /* wait slave data receive end */ while(rx_index < BUFFER_SIZE); - + + /* master half duplex receiving mode，the busy flag isnot usefull */ + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + /* test result:the data check */ transfer_status2 = buffer_compare(spi1_rx_buffer, spi2_tx_buffer, BUFFER_SIZE); @@ -198,7 +307,7 @@ int main(void) } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f415/examples/spi/only_receive_mode_polling/readme.txt b/project/at_start_f415/examples/spi/only_receive_mode_polling/readme.txt index 2969812..c3662bd 100644 --- a/project/at_start_f415/examples/spi/only_receive_mode_polling/readme.txt +++ b/project/at_start_f415/examples/spi/only_receive_mode_polling/readme.txt @@ -9,7 +9,9 @@ only receive mode receive data by polling mode. the pins connection as follow: - spi2 slaver spi1 master + pb12(cs) <---> pa4(cs) pb13(sck) <---> pa5(sck) pb15(mosi) <---> pa7(mosi) - for more detailed information. please refer to the application note document AN0102. \ No newline at end of file + for more detailed information. please refer to the application note document AN0102. + diff --git a/project/at_start_f415/examples/spi/only_receive_mode_polling/src/main.c b/project/at_start_f415/examples/spi/only_receive_mode_polling/src/main.c index 9d54783..2d1cb02 100644 --- a/project/at_start_f415/examples/spi/only_receive_mode_polling/src/main.c +++ b/project/at_start_f415/examples/spi/only_receive_mode_polling/src/main.c @@ -33,9 +33,10 @@ * @{ */ -#define BUFFER_SIZE 32 +#define SPI_MASTER_CS_HIGH gpio_bits_set(GPIOA, GPIO_PINS_4) +#define SPI_MASTER_CS_LOW gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define BUFFER_SIZE 32 -spi_init_type spi_init_struct; uint8_t spi1_tx_buffer[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, @@ -44,10 +45,6 @@ uint8_t spi2_rx_buffer[BUFFER_SIZE]; uint32_t tx_index = 0, rx_index = 0; volatile error_status transfer_status = ERROR; -static void gpio_config(void); -static void spi_config(void); -error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length); - /** * @brief buffer compare function. * @param pbuffer1, pbuffer2: buffers to be compared. @@ -76,9 +73,13 @@ error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffe */ static void spi_config(void) { + spi_init_type spi_init_struct; + + /* master spi initialization */ crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); - crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); + + /* dual line unidirectional full-duplex mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; @@ -88,12 +89,23 @@ static void spi_config(void) spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; spi_init(SPI1, &spi_init_struct); - + + spi_enable(SPI1, TRUE); + + /* slave spi initialization */ + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); + + /* dual line unidirectional simplex receive-only mode */ spi_init_struct.transmission_mode = SPI_TRANSMIT_SIMPLEX_RX; spi_init_struct.master_slave_mode = SPI_MODE_SLAVE; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB; + spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; + spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW; + spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; + spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE; spi_init(SPI2, &spi_init_struct); - - spi_enable(SPI1, TRUE); + spi_enable(SPI2, TRUE); } @@ -108,34 +120,49 @@ static void gpio_config(void) crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); gpio_default_para_init(&gpio_initstructure); - - /* spi1 sck pin */ - gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + + /* master spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; + gpio_initstructure.gpio_pins = GPIO_PINS_4; gpio_init(GPIOA, &gpio_initstructure); - - /* spi1 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_7; + + /* non communication time: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; + + /* master spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_5; gpio_init(GPIOA, &gpio_initstructure); - - /* spi2 sck pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_13; + + /* master spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_MUX; + gpio_initstructure.gpio_pins = GPIO_PINS_7; + gpio_init(GPIOA, &gpio_initstructure); + + /* slave spi cs pin */ + gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_initstructure.gpio_pins = GPIO_PINS_12; + gpio_init(GPIOB, &gpio_initstructure); + + /* slave spi sck pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_13; gpio_init(GPIOB, &gpio_initstructure); - /* spi2 mosi pin */ - gpio_initstructure.gpio_pull = GPIO_PULL_DOWN; - gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; - gpio_initstructure.gpio_pins = GPIO_PINS_15; + /* slave spi mosi pin */ + gpio_initstructure.gpio_pull = GPIO_PULL_UP; + gpio_initstructure.gpio_mode = GPIO_MODE_INPUT; + gpio_initstructure.gpio_pins = GPIO_PINS_15; gpio_init(GPIOB, &gpio_initstructure); - - while(gpio_input_data_bit_read(GPIOB, GPIO_PINS_13) != RESET); } /** @@ -147,29 +174,43 @@ int main(void) { system_clock_config(); at32_board_init(); + at32_led_on(LED4); gpio_config(); spi_config(); - + + /* start communication: master pull down CS pin select slave */ + SPI_MASTER_CS_LOW; + /* transfer procedure:the "BUFFER_SIZE" data transfer */ while(tx_index < BUFFER_SIZE) { + /* master transmit data fill */ while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); spi_i2s_data_transmit(SPI1, spi1_tx_buffer[tx_index++]); + + /* slave receive data get */ while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); spi2_rx_buffer[rx_index++] = spi_i2s_data_receive(SPI2); } + + /* wait master and slave idle when communication end */ + while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + + /* end communication: master pull up CS pin release slave */ + SPI_MASTER_CS_HIGH; /* test result:the data check */ transfer_status = buffer_compare(spi2_rx_buffer, spi1_tx_buffer, BUFFER_SIZE); - /* test result indicate:if success ,led2 lights */ + /* test result indicate:if SUCCESS ,led2 lights */ if(transfer_status == SUCCESS) { at32_led_on(LED2); } else { - at32_led_off(LED2); + at32_led_on(LED3); } while(1) { diff --git a/project/at_start_f415/examples/spi/w25q_flash/readme.txt b/project/at_start_f415/examples/spi/w25q_flash/readme.txt index 41cb88c..30eb24c 100644 --- a/project/at_start_f415/examples/spi/w25q_flash/readme.txt +++ b/project/at_start_f415/examples/spi/w25q_flash/readme.txt @@ -5,8 +5,8 @@ ************************************************************************** */ - this demo is based on the at-start board and AT32-Comm-EV board, in this demo, - shows how to use spi access the w25q flash chip. + this demo is based on the at-start board, in this demo, shows how to use spi access + the w25q flash chip. the pins use as follow: - cs <---> pb12(software cs, pb12 as a general io to control flash cs) - sck <---> pb13 diff --git a/project/at_start_f415/examples/spi/w25q_flash/src/spi_flash.c b/project/at_start_f415/examples/spi/w25q_flash/src/spi_flash.c index e16a9a4..ed1bc09 100644 --- a/project/at_start_f415/examples/spi/w25q_flash/src/spi_flash.c +++ b/project/at_start_f415/examples/spi/w25q_flash/src/spi_flash.c @@ -339,6 +339,9 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length) while(dma_flag_get(DMA1_FDT4_FLAG) == RESET); dma_flag_clear(DMA1_FDT4_FLAG); + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); dma_channel_enable(DMA1_CHANNEL4, FALSE); dma_channel_enable(DMA1_CHANNEL5, FALSE); @@ -354,6 +357,9 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length) dummy_data = spi_i2s_data_receive(SPI2); pbuffer++; } + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); #endif } @@ -403,6 +409,9 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length) while(dma_flag_get(DMA1_FDT4_FLAG) == RESET); dma_flag_clear(DMA1_FDT4_FLAG); + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); dma_channel_enable(DMA1_CHANNEL4, FALSE); dma_channel_enable(DMA1_CHANNEL5, FALSE); @@ -418,6 +427,9 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length) *pbuffer = spi_i2s_data_receive(SPI2); pbuffer++; } + + /* wait spi idle when communication end */ + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); #endif } @@ -490,7 +502,10 @@ uint8_t spi_byte_write(uint8_t data) spi_i2s_data_transmit(SPI2, data); while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); brxbuff = spi_i2s_data_receive(SPI2); + + /* wait spi idle when communication end */ while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); + return brxbuff; } diff --git a/project/at_start_f415/examples/usb_device/audio/src/main.c b/project/at_start_f415/examples/usb_device/audio/src/main.c index eebe74a..8950ece 100644 --- a/project/at_start_f415/examples/usb_device/audio/src/main.c +++ b/project/at_start_f415/examples/usb_device/audio/src/main.c @@ -98,7 +98,10 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) { /* 48MHz */ case 48000000: @@ -127,7 +130,6 @@ void usb_clock48m_select(usb_clk48_s clk_s) default: break; - } } diff --git a/project/at_start_f415/examples/usb_device/composite_audio_hid/src/main.c b/project/at_start_f415/examples/usb_device/composite_audio_hid/src/main.c index b14ef11..b8d4594 100644 --- a/project/at_start_f415/examples/usb_device/composite_audio_hid/src/main.c +++ b/project/at_start_f415/examples/usb_device/composite_audio_hid/src/main.c @@ -108,7 +108,10 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) { /* 48MHz */ case 48000000: @@ -137,7 +140,6 @@ void usb_clock48m_select(usb_clk48_s clk_s) default: break; - } } diff --git a/project/at_start_f415/examples/usb_device/composite_vcp_keyboard/src/main.c b/project/at_start_f415/examples/usb_device/composite_vcp_keyboard/src/main.c index 43f4c0a..0936a16 100644 --- a/project/at_start_f415/examples/usb_device/composite_vcp_keyboard/src/main.c +++ b/project/at_start_f415/examples/usb_device/composite_vcp_keyboard/src/main.c @@ -228,7 +228,10 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) { /* 48MHz */ case 48000000: @@ -257,9 +260,7 @@ void usb_clock48m_select(usb_clk48_s clk_s) default: break; - } - } diff --git a/project/at_start_f415/examples/usb_device/composite_vcp_msc/src/main.c b/project/at_start_f415/examples/usb_device/composite_vcp_msc/src/main.c index a648206..8749a31 100644 --- a/project/at_start_f415/examples/usb_device/composite_vcp_msc/src/main.c +++ b/project/at_start_f415/examples/usb_device/composite_vcp_msc/src/main.c @@ -127,36 +127,39 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) - { - /* 48MHz */ - case 48000000: - crm_usb_clock_div_set(CRM_USB_DIV_1); - break; + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) + { + /* 48MHz */ + case 48000000: + crm_usb_clock_div_set(CRM_USB_DIV_1); + break; - /* 72MHz */ - case 72000000: - crm_usb_clock_div_set(CRM_USB_DIV_1_5); - break; + /* 72MHz */ + case 72000000: + crm_usb_clock_div_set(CRM_USB_DIV_1_5); + break; - /* 96MHz */ - case 96000000: - crm_usb_clock_div_set(CRM_USB_DIV_2); - break; + /* 96MHz */ + case 96000000: + crm_usb_clock_div_set(CRM_USB_DIV_2); + break; - /* 120MHz */ - case 120000000: - crm_usb_clock_div_set(CRM_USB_DIV_2_5); - break; + /* 120MHz */ + case 120000000: + crm_usb_clock_div_set(CRM_USB_DIV_2_5); + break; - /* 144MHz */ - case 144000000: - crm_usb_clock_div_set(CRM_USB_DIV_3); - break; - - default: - break; - } + /* 144MHz */ + case 144000000: + crm_usb_clock_div_set(CRM_USB_DIV_3); + break; + + default: + break; + } } /** diff --git a/project/at_start_f415/examples/usb_device/custom_hid/src/main.c b/project/at_start_f415/examples/usb_device/custom_hid/src/main.c index 9e49f22..cc1dedf 100644 --- a/project/at_start_f415/examples/usb_device/custom_hid/src/main.c +++ b/project/at_start_f415/examples/usb_device/custom_hid/src/main.c @@ -102,7 +102,10 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) { /* 48MHz */ case 48000000: @@ -131,7 +134,6 @@ void usb_clock48m_select(usb_clk48_s clk_s) default: break; - } } diff --git a/project/at_start_f415/examples/usb_device/keyboard/src/main.c b/project/at_start_f415/examples/usb_device/keyboard/src/main.c index c32680b..d16e9b9 100644 --- a/project/at_start_f415/examples/usb_device/keyboard/src/main.c +++ b/project/at_start_f415/examples/usb_device/keyboard/src/main.c @@ -85,7 +85,6 @@ void keyboard_send_string(void *udev, uint8_t *string, uint8_t len) } - /** * @brief main function. * @param none @@ -148,21 +147,43 @@ int main(void) /* enter deep sleep */ if(((keyboard_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag == 1) { - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); - /* congfig the voltage regulator mode */ - pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER); - - /* enter deep sleep mode */ - pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI); - /* wait clock stable */ - for(delay_index = 0; delay_index < 600; delay_index++) + __disable_irq(); + if(OTG_PCGCCTL(otg_core_struct.usb_reg)->pcgcctl_bit.suspendm == 1 + && usb_suspend_status_get(otg_core_struct.usb_reg) == 1) { - __NOP(); + at32_led_off(LED2); + at32_led_off(LED3); + at32_led_off(LED4); + /* congfig the voltage regulator mode */ + pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER); + + /* enter deep sleep mode */ + pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI); + + /* wait 3 LICK(maximum 120us) cycles to ensure clock stable */ + /* when wakeup from deepsleep,system clock source changes to HICK */ + if((CRM->misc2_bit.hick_to_sclk == TRUE) && (CRM->misc1_bit.hickdiv == TRUE)) + { + /* HICK is 48MHz */ + for(delay_index = 0; delay_index < 750; delay_index++) + { + __NOP(); + } + } + else + { + /* HICK is 8MHz */ + for(delay_index = 0; delay_index < 125; delay_index++) + { + __NOP(); + } + } + + system_clock_recover(); } - system_clock_recover(); ((keyboard_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag = 0; + __enable_irq(); + at32_led_on(LED2); at32_led_on(LED3); at32_led_on(LED4); @@ -179,7 +200,10 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) { /* 48MHz */ case 48000000: @@ -208,7 +232,6 @@ void usb_clock48m_select(usb_clk48_s clk_s) default: break; - } } diff --git a/project/at_start_f415/examples/usb_device/mouse/src/main.c b/project/at_start_f415/examples/usb_device/mouse/src/main.c index eb1d615..34963c0 100644 --- a/project/at_start_f415/examples/usb_device/mouse/src/main.c +++ b/project/at_start_f415/examples/usb_device/mouse/src/main.c @@ -118,21 +118,43 @@ int main(void) /* enter deep sleep */ if(((mouse_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag == 1) { - at32_led_off(LED2); - at32_led_off(LED3); - at32_led_off(LED4); - /* congfig the voltage regulator mode */ - pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER); - - /* enter deep sleep mode */ - pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI); - /* wait clock stable */ - for(delay_index = 0; delay_index < 600; delay_index++) + __disable_irq(); + if(OTG_PCGCCTL(otg_core_struct.usb_reg)->pcgcctl_bit.suspendm == 1 + && usb_suspend_status_get(otg_core_struct.usb_reg) == 1) { - __NOP(); + at32_led_off(LED2); + at32_led_off(LED3); + at32_led_off(LED4); + /* congfig the voltage regulator mode */ + pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER); + + /* enter deep sleep mode */ + pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI); + + /* wait 3 LICK(maximum 120us) cycles to ensure clock stable */ + /* when wakeup from deepsleep,system clock source changes to HICK */ + if((CRM->misc2_bit.hick_to_sclk == TRUE) && (CRM->misc1_bit.hickdiv == TRUE)) + { + /* HICK is 48MHz */ + for(delay_index = 0; delay_index < 750; delay_index++) + { + __NOP(); + } + } + else + { + /* HICK is 8MHz */ + for(delay_index = 0; delay_index < 125; delay_index++) + { + __NOP(); + } + } + + system_clock_recover(); } - system_clock_recover(); ((mouse_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag = 0; + __enable_irq(); + at32_led_on(LED2); at32_led_on(LED3); at32_led_on(LED4); @@ -148,7 +170,10 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) { /* 48MHz */ case 48000000: @@ -177,7 +202,6 @@ void usb_clock48m_select(usb_clk48_s clk_s) default: break; - } } diff --git a/project/at_start_f415/examples/usb_device/msc/inc/msc_diskio.h b/project/at_start_f415/examples/usb_device/msc/inc/msc_diskio.h index 4b4a09d..8cfdbc7 100644 --- a/project/at_start_f415/examples/usb_device/msc/inc/msc_diskio.h +++ b/project/at_start_f415/examples/usb_device/msc/inc/msc_diskio.h @@ -44,7 +44,7 @@ extern "C" { #define SPI_FLASH_LUN 1 #define SD_LUN 2 -#define USB_FLASH_ADDR_OFFSET 0x08005000 +#define USB_FLASH_ADDR_OFFSET 0x08008000 #define SECTOR_SIZE_1K 1024 #define SECTOR_SIZE_2K 2048 diff --git a/project/at_start_f415/examples/usb_device/msc/src/main.c b/project/at_start_f415/examples/usb_device/msc/src/main.c index 4a2697e..4438fe1 100644 --- a/project/at_start_f415/examples/usb_device/msc/src/main.c +++ b/project/at_start_f415/examples/usb_device/msc/src/main.c @@ -95,7 +95,10 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) { /* 48MHz */ case 48000000: @@ -124,7 +127,6 @@ void usb_clock48m_select(usb_clk48_s clk_s) default: break; - } } diff --git a/project/at_start_f415/examples/usb_device/printer/src/main.c b/project/at_start_f415/examples/usb_device/printer/src/main.c index 2d31356..4dae7ca 100644 --- a/project/at_start_f415/examples/usb_device/printer/src/main.c +++ b/project/at_start_f415/examples/usb_device/printer/src/main.c @@ -104,37 +104,39 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) - { - /* 48MHz */ - case 48000000: - crm_usb_clock_div_set(CRM_USB_DIV_1); - break; + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) + { + /* 48MHz */ + case 48000000: + crm_usb_clock_div_set(CRM_USB_DIV_1); + break; - /* 72MHz */ - case 72000000: - crm_usb_clock_div_set(CRM_USB_DIV_1_5); - break; + /* 72MHz */ + case 72000000: + crm_usb_clock_div_set(CRM_USB_DIV_1_5); + break; - /* 96MHz */ - case 96000000: - crm_usb_clock_div_set(CRM_USB_DIV_2); - break; + /* 96MHz */ + case 96000000: + crm_usb_clock_div_set(CRM_USB_DIV_2); + break; - /* 120MHz */ - case 120000000: - crm_usb_clock_div_set(CRM_USB_DIV_2_5); - break; + /* 120MHz */ + case 120000000: + crm_usb_clock_div_set(CRM_USB_DIV_2_5); + break; - /* 144MHz */ - case 144000000: - crm_usb_clock_div_set(CRM_USB_DIV_3); - break; + /* 144MHz */ + case 144000000: + crm_usb_clock_div_set(CRM_USB_DIV_3); + break; - default: - break; - - } + default: + break; + } } /** diff --git a/project/at_start_f415/examples/usb_device/vcp_loopback/src/main.c b/project/at_start_f415/examples/usb_device/vcp_loopback/src/main.c index abe3058..5a42793 100644 --- a/project/at_start_f415/examples/usb_device/vcp_loopback/src/main.c +++ b/project/at_start_f415/examples/usb_device/vcp_loopback/src/main.c @@ -127,36 +127,39 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) - { - /* 48MHz */ - case 48000000: - crm_usb_clock_div_set(CRM_USB_DIV_1); - break; + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) + { + /* 48MHz */ + case 48000000: + crm_usb_clock_div_set(CRM_USB_DIV_1); + break; - /* 72MHz */ - case 72000000: - crm_usb_clock_div_set(CRM_USB_DIV_1_5); - break; + /* 72MHz */ + case 72000000: + crm_usb_clock_div_set(CRM_USB_DIV_1_5); + break; - /* 96MHz */ - case 96000000: - crm_usb_clock_div_set(CRM_USB_DIV_2); - break; + /* 96MHz */ + case 96000000: + crm_usb_clock_div_set(CRM_USB_DIV_2); + break; - /* 120MHz */ - case 120000000: - crm_usb_clock_div_set(CRM_USB_DIV_2_5); - break; + /* 120MHz */ + case 120000000: + crm_usb_clock_div_set(CRM_USB_DIV_2_5); + break; - /* 144MHz */ - case 144000000: - crm_usb_clock_div_set(CRM_USB_DIV_3); - break; + /* 144MHz */ + case 144000000: + crm_usb_clock_div_set(CRM_USB_DIV_3); + break; - default: - break; - } + default: + break; + } } /** diff --git a/project/at_start_f415/examples/usb_device/virtual_comport/src/main.c b/project/at_start_f415/examples/usb_device/virtual_comport/src/main.c index d7dbfdc..c334527 100644 --- a/project/at_start_f415/examples/usb_device/virtual_comport/src/main.c +++ b/project/at_start_f415/examples/usb_device/virtual_comport/src/main.c @@ -380,36 +380,39 @@ void usart_gpio_config(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) - { - /* 48MHz */ - case 48000000: - crm_usb_clock_div_set(CRM_USB_DIV_1); - break; + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) + { + /* 48MHz */ + case 48000000: + crm_usb_clock_div_set(CRM_USB_DIV_1); + break; - /* 72MHz */ - case 72000000: - crm_usb_clock_div_set(CRM_USB_DIV_1_5); - break; + /* 72MHz */ + case 72000000: + crm_usb_clock_div_set(CRM_USB_DIV_1_5); + break; - /* 96MHz */ - case 96000000: - crm_usb_clock_div_set(CRM_USB_DIV_2); - break; + /* 96MHz */ + case 96000000: + crm_usb_clock_div_set(CRM_USB_DIV_2); + break; - /* 120MHz */ - case 120000000: - crm_usb_clock_div_set(CRM_USB_DIV_2_5); - break; + /* 120MHz */ + case 120000000: + crm_usb_clock_div_set(CRM_USB_DIV_2_5); + break; - /* 144MHz */ - case 144000000: - crm_usb_clock_div_set(CRM_USB_DIV_3); - break; + /* 144MHz */ + case 144000000: + crm_usb_clock_div_set(CRM_USB_DIV_3); + break; - default: - break; - } + default: + break; + } } /** diff --git a/project/at_start_f415/examples/usb_device/virtual_msc_iap/src/main.c b/project/at_start_f415/examples/usb_device/virtual_msc_iap/src/main.c index 2694cfc..b6e99ec 100644 --- a/project/at_start_f415/examples/usb_device/virtual_msc_iap/src/main.c +++ b/project/at_start_f415/examples/usb_device/virtual_msc_iap/src/main.c @@ -110,7 +110,10 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) { /* 48MHz */ case 48000000: @@ -139,7 +142,6 @@ void usb_clock48m_select(usb_clk48_s clk_s) default: break; - } } diff --git a/project/at_start_f415/examples/usb_device/winusb/src/main.c b/project/at_start_f415/examples/usb_device/winusb/src/main.c index 81a5253..c5a2a9f 100644 --- a/project/at_start_f415/examples/usb_device/winusb/src/main.c +++ b/project/at_start_f415/examples/usb_device/winusb/src/main.c @@ -120,36 +120,39 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) - { - /* 48MHz */ - case 48000000: - crm_usb_clock_div_set(CRM_USB_DIV_1); - break; + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) + { + /* 48MHz */ + case 48000000: + crm_usb_clock_div_set(CRM_USB_DIV_1); + break; - /* 72MHz */ - case 72000000: - crm_usb_clock_div_set(CRM_USB_DIV_1_5); - break; + /* 72MHz */ + case 72000000: + crm_usb_clock_div_set(CRM_USB_DIV_1_5); + break; - /* 96MHz */ - case 96000000: - crm_usb_clock_div_set(CRM_USB_DIV_2); - break; + /* 96MHz */ + case 96000000: + crm_usb_clock_div_set(CRM_USB_DIV_2); + break; - /* 120MHz */ - case 120000000: - crm_usb_clock_div_set(CRM_USB_DIV_2_5); - break; + /* 120MHz */ + case 120000000: + crm_usb_clock_div_set(CRM_USB_DIV_2_5); + break; - /* 144MHz */ - case 144000000: - crm_usb_clock_div_set(CRM_USB_DIV_3); - break; + /* 144MHz */ + case 144000000: + crm_usb_clock_div_set(CRM_USB_DIV_3); + break; - default: - break; - } + default: + break; + } } /** diff --git a/project/at_start_f415/examples/usb_host/cdc_demo/mdk_v5/cdc.uvprojx b/project/at_start_f415/examples/usb_host/cdc_demo/mdk_v5/cdc.uvprojx index 093722b..6912f4d 100644 --- a/project/at_start_f415/examples/usb_host/cdc_demo/mdk_v5/cdc.uvprojx +++ b/project/at_start_f415/examples/usb_host/cdc_demo/mdk_v5/cdc.uvprojx @@ -275,7 +275,7 @@ 1 0x8000000 - 0x3f0000 + 0x40000 1 diff --git a/project/at_start_f415/examples/usb_host/cdc_demo/src/main.c b/project/at_start_f415/examples/usb_host/cdc_demo/src/main.c index 4725618..93636ed 100644 --- a/project/at_start_f415/examples/usb_host/cdc_demo/src/main.c +++ b/project/at_start_f415/examples/usb_host/cdc_demo/src/main.c @@ -131,37 +131,39 @@ void cdc_receive_complete(usbh_core_type *uhost) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) - { - /* 48MHz */ - case 48000000: - crm_usb_clock_div_set(CRM_USB_DIV_1); - break; + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) + { + /* 48MHz */ + case 48000000: + crm_usb_clock_div_set(CRM_USB_DIV_1); + break; - /* 72MHz */ - case 72000000: - crm_usb_clock_div_set(CRM_USB_DIV_1_5); - break; + /* 72MHz */ + case 72000000: + crm_usb_clock_div_set(CRM_USB_DIV_1_5); + break; - /* 96MHz */ - case 96000000: - crm_usb_clock_div_set(CRM_USB_DIV_2); - break; + /* 96MHz */ + case 96000000: + crm_usb_clock_div_set(CRM_USB_DIV_2); + break; - /* 120MHz */ - case 120000000: - crm_usb_clock_div_set(CRM_USB_DIV_2_5); - break; + /* 120MHz */ + case 120000000: + crm_usb_clock_div_set(CRM_USB_DIV_2_5); + break; - /* 144MHz */ - case 144000000: - crm_usb_clock_div_set(CRM_USB_DIV_3); - break; + /* 144MHz */ + case 144000000: + crm_usb_clock_div_set(CRM_USB_DIV_3); + break; - default: - break; - - } + default: + break; + } } /** diff --git a/project/at_start_f415/examples/usb_host/hid_demo/src/main.c b/project/at_start_f415/examples/usb_host/hid_demo/src/main.c index 1d07b2d..8890c5a 100644 --- a/project/at_start_f415/examples/usb_host/hid_demo/src/main.c +++ b/project/at_start_f415/examples/usb_host/hid_demo/src/main.c @@ -142,7 +142,10 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) { /* 48MHz */ case 48000000: @@ -171,7 +174,6 @@ void usb_clock48m_select(usb_clk48_s clk_s) default: break; - } } diff --git a/project/at_start_f415/examples/usb_host/msc_only_fat32/mdk_v5/msc_only_fat32.uvprojx b/project/at_start_f415/examples/usb_host/msc_only_fat32/mdk_v5/msc_only_fat32.uvprojx index eb04e80..0fb3d59 100644 --- a/project/at_start_f415/examples/usb_host/msc_only_fat32/mdk_v5/msc_only_fat32.uvprojx +++ b/project/at_start_f415/examples/usb_host/msc_only_fat32/mdk_v5/msc_only_fat32.uvprojx @@ -275,7 +275,7 @@ 1 0x8000000 - 0x3f0000 + 0x40000 1 diff --git a/project/at_start_f415/examples/usb_host/msc_only_fat32/src/main.c b/project/at_start_f415/examples/usb_host/msc_only_fat32/src/main.c index 1d96645..81fb269 100644 --- a/project/at_start_f415/examples/usb_host/msc_only_fat32/src/main.c +++ b/project/at_start_f415/examples/usb_host/msc_only_fat32/src/main.c @@ -95,37 +95,39 @@ int main(void) */ void usb_clock48m_select(usb_clk48_s clk_s) { - switch(system_core_clock) - { - /* 48MHz */ - case 48000000: - crm_usb_clock_div_set(CRM_USB_DIV_1); - break; + crm_clocks_freq_type clocks_struct; + + crm_clocks_freq_get(&clocks_struct); + switch(clocks_struct.sclk_freq) + { + /* 48MHz */ + case 48000000: + crm_usb_clock_div_set(CRM_USB_DIV_1); + break; - /* 72MHz */ - case 72000000: - crm_usb_clock_div_set(CRM_USB_DIV_1_5); - break; + /* 72MHz */ + case 72000000: + crm_usb_clock_div_set(CRM_USB_DIV_1_5); + break; - /* 96MHz */ - case 96000000: - crm_usb_clock_div_set(CRM_USB_DIV_2); - break; + /* 96MHz */ + case 96000000: + crm_usb_clock_div_set(CRM_USB_DIV_2); + break; - /* 120MHz */ - case 120000000: - crm_usb_clock_div_set(CRM_USB_DIV_2_5); - break; + /* 120MHz */ + case 120000000: + crm_usb_clock_div_set(CRM_USB_DIV_2_5); + break; - /* 144MHz */ - case 144000000: - crm_usb_clock_div_set(CRM_USB_DIV_3); - break; + /* 144MHz */ + case 144000000: + crm_usb_clock_div_set(CRM_USB_DIV_3); + break; - default: - break; - - } + default: + break; + } } /** diff --git a/project/at_start_f415/templates/eclipse_gcc/template/.cproject b/project/at_start_f415/templates/eclipse_gcc/template/.cproject index fc8f115..992799c 100644 --- a/project/at_start_f415/templates/eclipse_gcc/template/.cproject +++ b/project/at_start_f415/templates/eclipse_gcc/template/.cproject @@ -98,12 +98,12 @@