mirror of
https://github.com/ArteryTek/AT32F415_Firmware_Library.git
synced 2026-05-21 09:22:11 +00:00
upload version v2.0.0
This commit is contained in:
Artery-MCU
@@ -0,0 +1,46 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_clock.h
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief header file of clock program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F415_CLOCK_H
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||||
#define __AT32F415_CLOCK_H
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||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
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||||
#endif
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
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||||
#include "at32f415.h"
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||||
|
||||
/* exported functions ------------------------------------------------------- */
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||||
void system_clock_config(void);
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|
||||
#ifdef __cplusplus
|
||||
}
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||||
#endif
|
||||
|
||||
#endif /* __AT32F415_CLOCK_H */
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||||
|
||||
@@ -0,0 +1,146 @@
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||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_conf.h
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||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief at32f415 config header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F415_CONF_H
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||||
#define __AT32F415_CONF_H
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||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the value of high speed exernal crystal (hext)
|
||||
* used in your application
|
||||
* tip: to avoid modifying this file each time you need to use different hext, you
|
||||
* can define the hext value in your toolchain compiler preprocessor.
|
||||
*/
|
||||
#if !defined HEXT_VALUE
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||||
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the high speed exernal crystal (hext) startup
|
||||
* timeout value
|
||||
*/
|
||||
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
|
||||
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
|
||||
|
||||
/* module define -------------------------------------------------------------*/
|
||||
#define CRM_MODULE_ENABLED
|
||||
#define CMP_MODULE_ENABLED
|
||||
#define TMR_MODULE_ENABLED
|
||||
#define ERTC_MODULE_ENABLED
|
||||
#define GPIO_MODULE_ENABLED
|
||||
#define I2C_MODULE_ENABLED
|
||||
#define USART_MODULE_ENABLED
|
||||
#define PWC_MODULE_ENABLED
|
||||
#define CAN_MODULE_ENABLED
|
||||
#define ADC_MODULE_ENABLED
|
||||
#define SPI_MODULE_ENABLED
|
||||
#define DMA_MODULE_ENABLED
|
||||
#define DEBUG_MODULE_ENABLED
|
||||
#define FLASH_MODULE_ENABLED
|
||||
#define CRC_MODULE_ENABLED
|
||||
#define WWDT_MODULE_ENABLED
|
||||
#define WDT_MODULE_ENABLED
|
||||
#define EXINT_MODULE_ENABLED
|
||||
#define SDIO_MODULE_ENABLED
|
||||
#define USB_MODULE_ENABLED
|
||||
#define MISC_MODULE_ENABLED
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#ifdef CRM_MODULE_ENABLED
|
||||
#include "at32f415_crm.h"
|
||||
#endif
|
||||
#ifdef CMP_MODULE_ENABLED
|
||||
#include "at32f415_cmp.h"
|
||||
#endif
|
||||
#ifdef TMR_MODULE_ENABLED
|
||||
#include "at32f415_tmr.h"
|
||||
#endif
|
||||
#ifdef ERTC_MODULE_ENABLED
|
||||
#include "at32f415_ertc.h"
|
||||
#endif
|
||||
#ifdef GPIO_MODULE_ENABLED
|
||||
#include "at32f415_gpio.h"
|
||||
#endif
|
||||
#ifdef I2C_MODULE_ENABLED
|
||||
#include "at32f415_i2c.h"
|
||||
#endif
|
||||
#ifdef USART_MODULE_ENABLED
|
||||
#include "at32f415_usart.h"
|
||||
#endif
|
||||
#ifdef PWC_MODULE_ENABLED
|
||||
#include "at32f415_pwc.h"
|
||||
#endif
|
||||
#ifdef CAN_MODULE_ENABLED
|
||||
#include "at32f415_can.h"
|
||||
#endif
|
||||
#ifdef ADC_MODULE_ENABLED
|
||||
#include "at32f415_adc.h"
|
||||
#endif
|
||||
#ifdef SPI_MODULE_ENABLED
|
||||
#include "at32f415_spi.h"
|
||||
#endif
|
||||
#ifdef DMA_MODULE_ENABLED
|
||||
#include "at32f415_dma.h"
|
||||
#endif
|
||||
#ifdef DEBUG_MODULE_ENABLED
|
||||
#include "at32f415_debug.h"
|
||||
#endif
|
||||
#ifdef FLASH_MODULE_ENABLED
|
||||
#include "at32f415_flash.h"
|
||||
#endif
|
||||
#ifdef CRC_MODULE_ENABLED
|
||||
#include "at32f415_crc.h"
|
||||
#endif
|
||||
#ifdef WWDT_MODULE_ENABLED
|
||||
#include "at32f415_wwdt.h"
|
||||
#endif
|
||||
#ifdef WDT_MODULE_ENABLED
|
||||
#include "at32f415_wdt.h"
|
||||
#endif
|
||||
#ifdef EXINT_MODULE_ENABLED
|
||||
#include "at32f415_exint.h"
|
||||
#endif
|
||||
#ifdef SDIO_MODULE_ENABLED
|
||||
#include "at32f415_sdio.h"
|
||||
#endif
|
||||
#ifdef MISC_MODULE_ENABLED
|
||||
#include "at32f415_misc.h"
|
||||
#endif
|
||||
#ifdef USB_MODULE_ENABLED
|
||||
#include "at32f415_usb.h"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __AT32F415_CONF_H */
|
||||
|
||||
|
||||
@@ -0,0 +1,58 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_int.h
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief header file of main interrupt service routines.
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F415_INT_H
|
||||
#define __AT32F415_INT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415.h"
|
||||
|
||||
/* exported types ------------------------------------------------------------*/
|
||||
/* exported constants --------------------------------------------------------*/
|
||||
/* exported macro ------------------------------------------------------------*/
|
||||
/* exported functions ------------------------------------------------------- */
|
||||
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,356 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>halfduplex_dma</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>0</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F415_256 -FS08000000 -FL040000 -FP0($$Device:-AT32F415RCT7$Flash\AT32F415_256.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>user</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\src\at32f415_clock.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_clock.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\src\at32f415_int.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_int.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
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|
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|
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
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|
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|
||||
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|
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|
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
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|
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
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|
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|
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|
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
||||
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|
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>AT32F415RCT7,USE_STDPERIPH_DRIVER,AT_START_F415_V1</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\inc;..\..\..\..\..\at32f415_board</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<ClangAsOpt>4</ClangAsOpt>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>user</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>at32f415_clock.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\src\at32f415_clock.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_int.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\src\at32f415_int.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\src\main.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>bsp</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>at32f415_board.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\at32f415_board\at32f415_board.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>firmware</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>at32f415_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_misc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_misc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_crm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_crm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_dma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_dma.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_spi.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>system_at32f415.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f415.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>startup_at32f415.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f415.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>readme</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>readme.txt</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\readme.txt</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
<LayerInfo>
|
||||
<Layers>
|
||||
<Layer>
|
||||
<LayName><Project Info></LayName>
|
||||
<LayDesc></LayDesc>
|
||||
<LayUrl></LayUrl>
|
||||
<LayKeys></LayKeys>
|
||||
<LayCat></LayCat>
|
||||
<LayLic></LayLic>
|
||||
<LayTarg>0</LayTarg>
|
||||
<LayPrjMark>1</LayPrjMark>
|
||||
</Layer>
|
||||
</Layers>
|
||||
</LayerInfo>
|
||||
|
||||
</Project>
|
||||
17
project/at_start_f415/examples/i2s/halfduplex_dma/readme.txt
Normal file
17
project/at_start_f415/examples/i2s/halfduplex_dma/readme.txt
Normal file
@@ -0,0 +1,17 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file readme.txt
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief readme
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
this demo is based on the at-start board, in this demo, shows in halfduplex
|
||||
mode how to use dma transfer data.
|
||||
the pins connection as follow:
|
||||
- pb0 as mck out
|
||||
- i2s2 slaver i2s1 master
|
||||
- pb12 <---> pa4(ws)
|
||||
- pb13 <---> pa5(ck)
|
||||
- pb15 <---> pa7(sd)
|
||||
@@ -0,0 +1,99 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_clock.c
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief system clock config program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_clock.h"
|
||||
|
||||
/**
|
||||
* @brief system clock config program
|
||||
* @note the system clock is configured as follow:
|
||||
* - system clock = hext / 2 * pll_mult
|
||||
* - system clock source = pll (hext)
|
||||
* - hext = 8000000
|
||||
* - sclk = 144000000
|
||||
* - ahbdiv = 1
|
||||
* - ahbclk = 144000000
|
||||
* - apb2div = 2
|
||||
* - apb2clk = 72000000
|
||||
* - apb1div = 2
|
||||
* - apb1clk = 72000000
|
||||
* - pll_mult = 36
|
||||
* - flash_wtcyc = 4 cycle
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void system_clock_config(void)
|
||||
{
|
||||
/* config flash psr register */
|
||||
flash_psr_set(FLASH_WAIT_CYCLE_4);
|
||||
|
||||
/* reset crm */
|
||||
crm_reset();
|
||||
|
||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
|
||||
|
||||
/* wait till hext is ready */
|
||||
while(crm_hext_stable_wait() == ERROR)
|
||||
{
|
||||
}
|
||||
|
||||
/* config pll clock resource */
|
||||
crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_36);
|
||||
|
||||
/* enable pll */
|
||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
|
||||
|
||||
/* wait till pll is ready */
|
||||
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
|
||||
{
|
||||
}
|
||||
|
||||
/* config ahbclk */
|
||||
crm_ahb_div_set(CRM_AHB_DIV_1);
|
||||
|
||||
/* config apb2clk */
|
||||
crm_apb2_div_set(CRM_APB2_DIV_2);
|
||||
|
||||
/* config apb1clk */
|
||||
crm_apb1_div_set(CRM_APB1_DIV_2);
|
||||
|
||||
/* enable auto step mode */
|
||||
crm_auto_step_mode_enable(TRUE);
|
||||
|
||||
/* select pll as system clock source */
|
||||
crm_sysclk_switch(CRM_SCLK_PLL);
|
||||
|
||||
/* wait till pll is used as system clock source */
|
||||
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
|
||||
{
|
||||
}
|
||||
|
||||
/* disable auto step mode */
|
||||
crm_auto_step_mode_enable(FALSE);
|
||||
|
||||
/* update system_core_clock global variable */
|
||||
system_core_clock_update();
|
||||
}
|
||||
@@ -0,0 +1,145 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_int.c
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief main interrupt service routines.
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_int.h"
|
||||
#include "at32f415_board.h"
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup 415_I2S_halfduplex_dma
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief this function handles nmi exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles hard fault exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when hard fault exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles memory manage exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when memory manage exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles bus fault exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when bus fault exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles usage fault exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when usage fault exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles svcall exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles debug monitor exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles pendsv_handler exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles systick handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
222
project/at_start_f415/examples/i2s/halfduplex_dma/src/main.c
Normal file
222
project/at_start_f415/examples/i2s/halfduplex_dma/src/main.c
Normal file
@@ -0,0 +1,222 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file main.c
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief main program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
#include "at32f415_board.h"
|
||||
#include "at32f415_clock.h"
|
||||
#include <stdio.h>
|
||||
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup 415_I2S_halfduplex_dma I2S_halfduplex_dma
|
||||
* @{
|
||||
*/
|
||||
|
||||
uint16_t i2s1_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C,
|
||||
0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718,
|
||||
0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324,
|
||||
0x2526, 0x2728, 0x292A, 0x2B2C, 0x2D2E, 0x2F30,
|
||||
0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C,
|
||||
0x3D3E, 0x3F40};
|
||||
uint16_t i2s2_buffer_rx[32];
|
||||
volatile error_status transfer_status = ERROR;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void i2s_config(void);
|
||||
error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
|
||||
|
||||
/**
|
||||
* @brief buffer_compare function.
|
||||
* @param none
|
||||
* @retval the result of compare
|
||||
*/
|
||||
error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length)
|
||||
{
|
||||
while(buffer_length--)
|
||||
{
|
||||
if(*pbuffer1 != *pbuffer2)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
pbuffer1++;
|
||||
pbuffer2++;
|
||||
}
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief i2s configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void i2s_config(void)
|
||||
{
|
||||
dma_init_type dma_init_struct;
|
||||
i2s_init_type i2s_init_struct;
|
||||
|
||||
crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
|
||||
dma_reset(DMA1_CHANNEL4);
|
||||
dma_reset(DMA1_CHANNEL3);
|
||||
dma_default_para_init(&dma_init_struct);
|
||||
dma_init_struct.buffer_size = 32;
|
||||
dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
|
||||
dma_init_struct.memory_base_addr = (uint32_t)i2s1_buffer_tx;
|
||||
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
|
||||
dma_init_struct.memory_inc_enable = TRUE;
|
||||
dma_init_struct.peripheral_base_addr = (uint32_t)0x4001300C;
|
||||
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
|
||||
dma_init_struct.peripheral_inc_enable = FALSE;
|
||||
dma_init_struct.priority = DMA_PRIORITY_HIGH;
|
||||
dma_init_struct.loop_mode_enable = FALSE;
|
||||
dma_init(DMA1_CHANNEL3, &dma_init_struct);
|
||||
|
||||
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
|
||||
dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx;
|
||||
dma_init_struct.peripheral_base_addr = (uint32_t)0x4000380C;
|
||||
dma_init(DMA1_CHANNEL4, &dma_init_struct);
|
||||
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
i2s_default_para_init(&i2s_init_struct);
|
||||
i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
|
||||
i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT;
|
||||
i2s_init_struct.mclk_output_enable = TRUE;
|
||||
i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K;
|
||||
i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
|
||||
i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX;
|
||||
i2s_init(SPI1, &i2s_init_struct);
|
||||
|
||||
i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX;
|
||||
i2s_init(SPI2, &i2s_init_struct);
|
||||
|
||||
dma_channel_enable(DMA1_CHANNEL3, TRUE);
|
||||
dma_channel_enable(DMA1_CHANNEL4, TRUE);
|
||||
spi_i2s_dma_receiver_enable(SPI2, TRUE);
|
||||
i2s_enable(SPI1, TRUE);
|
||||
i2s_enable(SPI2, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief gpio configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void gpio_config(void)
|
||||
{
|
||||
gpio_init_type gpio_initstructure;
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* master ws pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master mck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_0;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ws pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief main function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_off(LED2);
|
||||
at32_led_off(LED3);
|
||||
at32_led_off(LED4);
|
||||
gpio_config();
|
||||
i2s_config();
|
||||
spi_i2s_dma_transmitter_enable(SPI1, TRUE);
|
||||
|
||||
while(dma_flag_get(DMA1_FDT4_FLAG) == RESET);
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32);
|
||||
|
||||
/* test result indicate:if passed ,led2 lights */
|
||||
if(transfer_status==SUCCESS)
|
||||
{
|
||||
at32_led_on(LED2);
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
}
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,46 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_clock.h
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief header file of clock program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F415_CLOCK_H
|
||||
#define __AT32F415_CLOCK_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415.h"
|
||||
|
||||
/* exported functions ------------------------------------------------------- */
|
||||
void system_clock_config(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __AT32F415_CLOCK_H */
|
||||
|
||||
@@ -0,0 +1,146 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_conf.h
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief at32f415 config header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F415_CONF_H
|
||||
#define __AT32F415_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the value of high speed exernal crystal (hext)
|
||||
* used in your application
|
||||
* tip: to avoid modifying this file each time you need to use different hext, you
|
||||
* can define the hext value in your toolchain compiler preprocessor.
|
||||
*/
|
||||
#if !defined HEXT_VALUE
|
||||
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the high speed exernal crystal (hext) startup
|
||||
* timeout value
|
||||
*/
|
||||
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
|
||||
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
|
||||
|
||||
/* module define -------------------------------------------------------------*/
|
||||
#define CRM_MODULE_ENABLED
|
||||
#define CMP_MODULE_ENABLED
|
||||
#define TMR_MODULE_ENABLED
|
||||
#define ERTC_MODULE_ENABLED
|
||||
#define GPIO_MODULE_ENABLED
|
||||
#define I2C_MODULE_ENABLED
|
||||
#define USART_MODULE_ENABLED
|
||||
#define PWC_MODULE_ENABLED
|
||||
#define CAN_MODULE_ENABLED
|
||||
#define ADC_MODULE_ENABLED
|
||||
#define SPI_MODULE_ENABLED
|
||||
#define DMA_MODULE_ENABLED
|
||||
#define DEBUG_MODULE_ENABLED
|
||||
#define FLASH_MODULE_ENABLED
|
||||
#define CRC_MODULE_ENABLED
|
||||
#define WWDT_MODULE_ENABLED
|
||||
#define WDT_MODULE_ENABLED
|
||||
#define EXINT_MODULE_ENABLED
|
||||
#define SDIO_MODULE_ENABLED
|
||||
#define USB_MODULE_ENABLED
|
||||
#define MISC_MODULE_ENABLED
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#ifdef CRM_MODULE_ENABLED
|
||||
#include "at32f415_crm.h"
|
||||
#endif
|
||||
#ifdef CMP_MODULE_ENABLED
|
||||
#include "at32f415_cmp.h"
|
||||
#endif
|
||||
#ifdef TMR_MODULE_ENABLED
|
||||
#include "at32f415_tmr.h"
|
||||
#endif
|
||||
#ifdef ERTC_MODULE_ENABLED
|
||||
#include "at32f415_ertc.h"
|
||||
#endif
|
||||
#ifdef GPIO_MODULE_ENABLED
|
||||
#include "at32f415_gpio.h"
|
||||
#endif
|
||||
#ifdef I2C_MODULE_ENABLED
|
||||
#include "at32f415_i2c.h"
|
||||
#endif
|
||||
#ifdef USART_MODULE_ENABLED
|
||||
#include "at32f415_usart.h"
|
||||
#endif
|
||||
#ifdef PWC_MODULE_ENABLED
|
||||
#include "at32f415_pwc.h"
|
||||
#endif
|
||||
#ifdef CAN_MODULE_ENABLED
|
||||
#include "at32f415_can.h"
|
||||
#endif
|
||||
#ifdef ADC_MODULE_ENABLED
|
||||
#include "at32f415_adc.h"
|
||||
#endif
|
||||
#ifdef SPI_MODULE_ENABLED
|
||||
#include "at32f415_spi.h"
|
||||
#endif
|
||||
#ifdef DMA_MODULE_ENABLED
|
||||
#include "at32f415_dma.h"
|
||||
#endif
|
||||
#ifdef DEBUG_MODULE_ENABLED
|
||||
#include "at32f415_debug.h"
|
||||
#endif
|
||||
#ifdef FLASH_MODULE_ENABLED
|
||||
#include "at32f415_flash.h"
|
||||
#endif
|
||||
#ifdef CRC_MODULE_ENABLED
|
||||
#include "at32f415_crc.h"
|
||||
#endif
|
||||
#ifdef WWDT_MODULE_ENABLED
|
||||
#include "at32f415_wwdt.h"
|
||||
#endif
|
||||
#ifdef WDT_MODULE_ENABLED
|
||||
#include "at32f415_wdt.h"
|
||||
#endif
|
||||
#ifdef EXINT_MODULE_ENABLED
|
||||
#include "at32f415_exint.h"
|
||||
#endif
|
||||
#ifdef SDIO_MODULE_ENABLED
|
||||
#include "at32f415_sdio.h"
|
||||
#endif
|
||||
#ifdef MISC_MODULE_ENABLED
|
||||
#include "at32f415_misc.h"
|
||||
#endif
|
||||
#ifdef USB_MODULE_ENABLED
|
||||
#include "at32f415_usb.h"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __AT32F415_CONF_H */
|
||||
|
||||
|
||||
@@ -0,0 +1,58 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_int.h
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief header file of main interrupt service routines.
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F415_INT_H
|
||||
#define __AT32F415_INT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415.h"
|
||||
|
||||
/* exported types ------------------------------------------------------------*/
|
||||
/* exported constants --------------------------------------------------------*/
|
||||
/* exported macro ------------------------------------------------------------*/
|
||||
/* exported functions ------------------------------------------------------- */
|
||||
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,344 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>halfduplex_interrupt</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>0</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F415_256 -FS08000000 -FL040000 -FP0($$Device:-AT32F415RCT7$Flash\AT32F415_256.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>user</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\src\at32f415_clock.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_clock.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\src\at32f415_int.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_int.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\src\main.c</PathWithFileName>
|
||||
<FilenameWithoutPath>main.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>bsp</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>4</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\at32f415_board\at32f415_board.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_board.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>firmware</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>5</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f415_gpio.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_gpio.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>6</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f415_misc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_misc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>7</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f415_crm.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_crm.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>8</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\drivers\src\at32f415_spi.c</PathWithFileName>
|
||||
<FilenameWithoutPath>at32f415_spi.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>9</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f415.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_at32f415.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>10</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f415.s</PathWithFileName>
|
||||
<FilenameWithoutPath>startup_at32f415.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>readme</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>11</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\readme.txt</PathWithFileName>
|
||||
<FilenameWithoutPath>readme.txt</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
@@ -0,0 +1,487 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>halfduplex_interrupt</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>-AT32F415RCT7</Device>
|
||||
<Vendor>ArteryTek</Vendor>
|
||||
<PackID>ArteryTek.AT32F415_DFP.2.0.0</PackID>
|
||||
<Cpu>IRAM(0x20000000,0x8000) IROM(0x08000000,0x40000) CPUTYPE("Cortex-M4") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F415_256 -FS08000000 -FL0100000 -FP0($$Device:-AT32F415RCT7$Flash\AT32F415_256.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:-AT32F415RCT7$Device\Include\at32f415.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:-AT32F415RCT7$SVD\AT32F415xx_v2.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\objects\</OutputDirectory>
|
||||
<OutputName>halfduplex_interrupt</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\listings\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -REMAP</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments></TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<RvdsCdeCp>0</RvdsCdeCp>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>AT32F415RCT7,USE_STDPERIPH_DRIVER,AT_START_F415_V1</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\inc;..\..\..\..\..\at32f415_board</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<ClangAsOpt>4</ClangAsOpt>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>user</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>at32f415_clock.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\src\at32f415_clock.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_int.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\src\at32f415_int.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\src\main.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>bsp</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>at32f415_board.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\at32f415_board\at32f415_board.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>firmware</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>at32f415_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_misc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_misc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_crm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_crm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_spi.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>system_at32f415.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f415.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>startup_at32f415.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f415.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>readme</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>readme.txt</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\readme.txt</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
<LayerInfo>
|
||||
<Layers>
|
||||
<Layer>
|
||||
<LayName><Project Info></LayName>
|
||||
<LayDesc></LayDesc>
|
||||
<LayUrl></LayUrl>
|
||||
<LayKeys></LayKeys>
|
||||
<LayCat></LayCat>
|
||||
<LayLic></LayLic>
|
||||
<LayTarg>0</LayTarg>
|
||||
<LayPrjMark>1</LayPrjMark>
|
||||
</Layer>
|
||||
</Layers>
|
||||
</LayerInfo>
|
||||
|
||||
</Project>
|
||||
@@ -0,0 +1,17 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file readme.txt
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief readme
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
this demo is based on the at-start board, in this demo, shows in halfduplex
|
||||
mode how to use interrupt transfer data.
|
||||
the pins connection as follow:
|
||||
- pb0 as mck out
|
||||
- i2s2 slaver i2s1 master
|
||||
- pb12 <---> pa4(ws)
|
||||
- pb13 <---> pa5(ck)
|
||||
- pb15 <---> pa7(sd)
|
||||
@@ -0,0 +1,99 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_clock.c
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief system clock config program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_clock.h"
|
||||
|
||||
/**
|
||||
* @brief system clock config program
|
||||
* @note the system clock is configured as follow:
|
||||
* - system clock = hext / 2 * pll_mult
|
||||
* - system clock source = pll (hext)
|
||||
* - hext = 8000000
|
||||
* - sclk = 144000000
|
||||
* - ahbdiv = 1
|
||||
* - ahbclk = 144000000
|
||||
* - apb2div = 2
|
||||
* - apb2clk = 72000000
|
||||
* - apb1div = 2
|
||||
* - apb1clk = 72000000
|
||||
* - pll_mult = 36
|
||||
* - flash_wtcyc = 4 cycle
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void system_clock_config(void)
|
||||
{
|
||||
/* config flash psr register */
|
||||
flash_psr_set(FLASH_WAIT_CYCLE_4);
|
||||
|
||||
/* reset crm */
|
||||
crm_reset();
|
||||
|
||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
|
||||
|
||||
/* wait till hext is ready */
|
||||
while(crm_hext_stable_wait() == ERROR)
|
||||
{
|
||||
}
|
||||
|
||||
/* config pll clock resource */
|
||||
crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_36);
|
||||
|
||||
/* enable pll */
|
||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
|
||||
|
||||
/* wait till pll is ready */
|
||||
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
|
||||
{
|
||||
}
|
||||
|
||||
/* config ahbclk */
|
||||
crm_ahb_div_set(CRM_AHB_DIV_1);
|
||||
|
||||
/* config apb2clk */
|
||||
crm_apb2_div_set(CRM_APB2_DIV_2);
|
||||
|
||||
/* config apb1clk */
|
||||
crm_apb1_div_set(CRM_APB1_DIV_2);
|
||||
|
||||
/* enable auto step mode */
|
||||
crm_auto_step_mode_enable(TRUE);
|
||||
|
||||
/* select pll as system clock source */
|
||||
crm_sysclk_switch(CRM_SCLK_PLL);
|
||||
|
||||
/* wait till pll is used as system clock source */
|
||||
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
|
||||
{
|
||||
}
|
||||
|
||||
/* disable auto step mode */
|
||||
crm_auto_step_mode_enable(FALSE);
|
||||
|
||||
/* update system_core_clock global variable */
|
||||
system_core_clock_update();
|
||||
}
|
||||
@@ -0,0 +1,177 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_int.c
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief main interrupt service routines.
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_int.h"
|
||||
#include "at32f415_board.h"
|
||||
|
||||
extern uint16_t i2s1_buffer_tx[];
|
||||
extern uint16_t i2s2_buffer_rx[];
|
||||
extern __IO uint32_t tx_index, rx_index;
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup 415_I2S_halfduplex_interrupt
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief this function handles nmi exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles hard fault exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when hard fault exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles memory manage exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when memory manage exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles bus fault exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when bus fault exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles usage fault exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when usage fault exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles svcall exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles debug monitor exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles pendsv_handler exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles systick handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief This function handles the spi2 interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SPI2_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET)
|
||||
{
|
||||
i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles the spi1 interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SPI1_IRQHandler(void)
|
||||
{
|
||||
if(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) != RESET)
|
||||
{
|
||||
spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]);
|
||||
if(tx_index == 32)
|
||||
{
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, FALSE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,239 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file main.c
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief main program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
#include "at32f415_board.h"
|
||||
#include "at32f415_clock.h"
|
||||
#include <stdio.h>
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup 415_I2S_halfduplex_interrupt I2S_halfduplex_interrupt
|
||||
* @{
|
||||
*/
|
||||
|
||||
uint16_t i2s1_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C,
|
||||
0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718,
|
||||
0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324,
|
||||
0x2526, 0x2728, 0x292A, 0x2B2C, 0x2D2E, 0x2F30,
|
||||
0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C,
|
||||
0x3D3E, 0x3F40};
|
||||
uint16_t i2s2_buffer_rx[32];
|
||||
__IO uint32_t tx_index = 0, rx_index = 0;
|
||||
volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq);
|
||||
error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
|
||||
error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
|
||||
|
||||
/**
|
||||
* @brief buffer_compare function.
|
||||
* @param none
|
||||
* @retval the result of compare
|
||||
*/
|
||||
error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length)
|
||||
{
|
||||
while(buffer_length--)
|
||||
{
|
||||
if(*pbuffer1 != *pbuffer2)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
pbuffer1++;
|
||||
pbuffer2++;
|
||||
}
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief buffer_compare_24bits function.
|
||||
* @param none
|
||||
* @retval the result of compare
|
||||
*/
|
||||
error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length)
|
||||
{
|
||||
while(buffer_length--)
|
||||
{
|
||||
if(*pbuffer1 != *pbuffer2)
|
||||
{
|
||||
if(*pbuffer1 != (*pbuffer2 & 0xFF00))
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
pbuffer1++;
|
||||
pbuffer2++;
|
||||
}
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief i2s configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq)
|
||||
{
|
||||
i2s_init_type i2s_init_struct;
|
||||
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
nvic_irq_enable(SPI1_IRQn, 0, 0);
|
||||
nvic_irq_enable(SPI2_IRQn, 0, 0);
|
||||
spi_i2s_reset(SPI2);
|
||||
spi_i2s_reset(SPI1);
|
||||
i2s_default_para_init(&i2s_init_struct);
|
||||
i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
|
||||
i2s_init_struct.data_channel_format = format;
|
||||
i2s_init_struct.mclk_output_enable = TRUE;
|
||||
i2s_init_struct.audio_sampling_freq = freq;
|
||||
i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
|
||||
i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX;
|
||||
i2s_init(SPI1, &i2s_init_struct);
|
||||
|
||||
i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX;
|
||||
i2s_init(SPI2, &i2s_init_struct);
|
||||
|
||||
spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE);
|
||||
spi_i2s_interrupt_enable(SPI1, SPI_I2S_TDBE_INT, TRUE);
|
||||
i2s_enable(SPI2, TRUE);
|
||||
i2s_enable(SPI1, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief gpio configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void gpio_config(void)
|
||||
{
|
||||
gpio_init_type gpio_initstructure;
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* master ws pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master mck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_0;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ws pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief main function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
__IO uint32_t index = 0;
|
||||
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_off(LED2);
|
||||
at32_led_off(LED3);
|
||||
at32_led_off(LED4);
|
||||
gpio_config();
|
||||
i2s_config(I2S_DATA_16BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_48K);
|
||||
while(rx_index < 32);
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32);
|
||||
|
||||
for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0;
|
||||
tx_index = 0;
|
||||
rx_index = 0;
|
||||
|
||||
i2s_config(I2S_DATA_24BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_16K);
|
||||
while(rx_index < 32);
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status2 = buffer_compare_24bits(i2s2_buffer_rx, i2s1_buffer_tx, 32);
|
||||
|
||||
/* test result indicate:if passed ,led2 lights */
|
||||
if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS))
|
||||
{
|
||||
at32_led_on(LED2);
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
}
|
||||
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,46 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_clock.h
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief header file of clock program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F415_CLOCK_H
|
||||
#define __AT32F415_CLOCK_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415.h"
|
||||
|
||||
/* exported functions ------------------------------------------------------- */
|
||||
void system_clock_config(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __AT32F415_CLOCK_H */
|
||||
|
||||
@@ -0,0 +1,146 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_conf.h
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief at32f415 config header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F415_CONF_H
|
||||
#define __AT32F415_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the value of high speed exernal crystal (hext)
|
||||
* used in your application
|
||||
* tip: to avoid modifying this file each time you need to use different hext, you
|
||||
* can define the hext value in your toolchain compiler preprocessor.
|
||||
*/
|
||||
#if !defined HEXT_VALUE
|
||||
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the high speed exernal crystal (hext) startup
|
||||
* timeout value
|
||||
*/
|
||||
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
|
||||
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
|
||||
|
||||
/* module define -------------------------------------------------------------*/
|
||||
#define CRM_MODULE_ENABLED
|
||||
#define CMP_MODULE_ENABLED
|
||||
#define TMR_MODULE_ENABLED
|
||||
#define ERTC_MODULE_ENABLED
|
||||
#define GPIO_MODULE_ENABLED
|
||||
#define I2C_MODULE_ENABLED
|
||||
#define USART_MODULE_ENABLED
|
||||
#define PWC_MODULE_ENABLED
|
||||
#define CAN_MODULE_ENABLED
|
||||
#define ADC_MODULE_ENABLED
|
||||
#define SPI_MODULE_ENABLED
|
||||
#define DMA_MODULE_ENABLED
|
||||
#define DEBUG_MODULE_ENABLED
|
||||
#define FLASH_MODULE_ENABLED
|
||||
#define CRC_MODULE_ENABLED
|
||||
#define WWDT_MODULE_ENABLED
|
||||
#define WDT_MODULE_ENABLED
|
||||
#define EXINT_MODULE_ENABLED
|
||||
#define SDIO_MODULE_ENABLED
|
||||
#define USB_MODULE_ENABLED
|
||||
#define MISC_MODULE_ENABLED
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#ifdef CRM_MODULE_ENABLED
|
||||
#include "at32f415_crm.h"
|
||||
#endif
|
||||
#ifdef CMP_MODULE_ENABLED
|
||||
#include "at32f415_cmp.h"
|
||||
#endif
|
||||
#ifdef TMR_MODULE_ENABLED
|
||||
#include "at32f415_tmr.h"
|
||||
#endif
|
||||
#ifdef ERTC_MODULE_ENABLED
|
||||
#include "at32f415_ertc.h"
|
||||
#endif
|
||||
#ifdef GPIO_MODULE_ENABLED
|
||||
#include "at32f415_gpio.h"
|
||||
#endif
|
||||
#ifdef I2C_MODULE_ENABLED
|
||||
#include "at32f415_i2c.h"
|
||||
#endif
|
||||
#ifdef USART_MODULE_ENABLED
|
||||
#include "at32f415_usart.h"
|
||||
#endif
|
||||
#ifdef PWC_MODULE_ENABLED
|
||||
#include "at32f415_pwc.h"
|
||||
#endif
|
||||
#ifdef CAN_MODULE_ENABLED
|
||||
#include "at32f415_can.h"
|
||||
#endif
|
||||
#ifdef ADC_MODULE_ENABLED
|
||||
#include "at32f415_adc.h"
|
||||
#endif
|
||||
#ifdef SPI_MODULE_ENABLED
|
||||
#include "at32f415_spi.h"
|
||||
#endif
|
||||
#ifdef DMA_MODULE_ENABLED
|
||||
#include "at32f415_dma.h"
|
||||
#endif
|
||||
#ifdef DEBUG_MODULE_ENABLED
|
||||
#include "at32f415_debug.h"
|
||||
#endif
|
||||
#ifdef FLASH_MODULE_ENABLED
|
||||
#include "at32f415_flash.h"
|
||||
#endif
|
||||
#ifdef CRC_MODULE_ENABLED
|
||||
#include "at32f415_crc.h"
|
||||
#endif
|
||||
#ifdef WWDT_MODULE_ENABLED
|
||||
#include "at32f415_wwdt.h"
|
||||
#endif
|
||||
#ifdef WDT_MODULE_ENABLED
|
||||
#include "at32f415_wdt.h"
|
||||
#endif
|
||||
#ifdef EXINT_MODULE_ENABLED
|
||||
#include "at32f415_exint.h"
|
||||
#endif
|
||||
#ifdef SDIO_MODULE_ENABLED
|
||||
#include "at32f415_sdio.h"
|
||||
#endif
|
||||
#ifdef MISC_MODULE_ENABLED
|
||||
#include "at32f415_misc.h"
|
||||
#endif
|
||||
#ifdef USB_MODULE_ENABLED
|
||||
#include "at32f415_usb.h"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __AT32F415_CONF_H */
|
||||
|
||||
|
||||
@@ -0,0 +1,58 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_int.h
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief header file of main interrupt service routines.
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F415_INT_H
|
||||
#define __AT32F415_INT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415.h"
|
||||
|
||||
/* exported types ------------------------------------------------------------*/
|
||||
/* exported constants --------------------------------------------------------*/
|
||||
/* exported macro ------------------------------------------------------------*/
|
||||
/* exported functions ------------------------------------------------------- */
|
||||
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,344 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>spii2s_switch_halfduplex_polling</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>0</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F415_256 -FS08000000 -FL040000 -FP0($$Device:-AT32F415RCT7$Flash\AT32F415_256.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>user</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
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|
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|
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|
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|
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|
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<SimDllArguments> -REMAP</SimDllArguments>
|
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|
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
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|
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|
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
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|
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|
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
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|
||||
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|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
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|
||||
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|
||||
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|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
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|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
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|
||||
<Size>0x0</Size>
|
||||
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|
||||
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|
||||
<Type>0</Type>
|
||||
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|
||||
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|
||||
</Ocm5>
|
||||
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|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>AT32F415RCT7,USE_STDPERIPH_DRIVER,AT_START_F415_V1</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\inc;..\..\..\..\..\at32f415_board</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<ClangAsOpt>4</ClangAsOpt>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>user</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>at32f415_clock.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\src\at32f415_clock.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_int.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\src\at32f415_int.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\src\main.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>bsp</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>at32f415_board.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\at32f415_board\at32f415_board.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>firmware</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>at32f415_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_misc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_misc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_crm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_crm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>at32f415_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\drivers\src\at32f415_spi.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>system_at32f415.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f415.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>startup_at32f415.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f415.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>readme</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>readme.txt</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\readme.txt</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
<LayerInfo>
|
||||
<Layers>
|
||||
<Layer>
|
||||
<LayName><Project Info></LayName>
|
||||
<LayDesc></LayDesc>
|
||||
<LayUrl></LayUrl>
|
||||
<LayKeys></LayKeys>
|
||||
<LayCat></LayCat>
|
||||
<LayLic></LayLic>
|
||||
<LayTarg>0</LayTarg>
|
||||
<LayPrjMark>1</LayPrjMark>
|
||||
</Layer>
|
||||
</Layers>
|
||||
</LayerInfo>
|
||||
|
||||
</Project>
|
||||
@@ -0,0 +1,18 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file readme.txt
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief readme
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
this demo is based on the at-start board, in this demo, shows in halfduplex
|
||||
mode how to use polling transfer data. use the mode switch to realize spi and
|
||||
i2s communication.
|
||||
the pins connection as follow:
|
||||
- pb0 as mck out
|
||||
- i2s2 slaver i2s1 master
|
||||
- pb12 <---> pa4(ws)
|
||||
- pb13 <---> pa5(ck)
|
||||
- pb15 <---> pa7(sd)
|
||||
@@ -0,0 +1,99 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_clock.c
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief system clock config program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_clock.h"
|
||||
|
||||
/**
|
||||
* @brief system clock config program
|
||||
* @note the system clock is configured as follow:
|
||||
* - system clock = hext / 2 * pll_mult
|
||||
* - system clock source = pll (hext)
|
||||
* - hext = 8000000
|
||||
* - sclk = 144000000
|
||||
* - ahbdiv = 1
|
||||
* - ahbclk = 144000000
|
||||
* - apb2div = 2
|
||||
* - apb2clk = 72000000
|
||||
* - apb1div = 2
|
||||
* - apb1clk = 72000000
|
||||
* - pll_mult = 36
|
||||
* - flash_wtcyc = 4 cycle
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void system_clock_config(void)
|
||||
{
|
||||
/* config flash psr register */
|
||||
flash_psr_set(FLASH_WAIT_CYCLE_4);
|
||||
|
||||
/* reset crm */
|
||||
crm_reset();
|
||||
|
||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
|
||||
|
||||
/* wait till hext is ready */
|
||||
while(crm_hext_stable_wait() == ERROR)
|
||||
{
|
||||
}
|
||||
|
||||
/* config pll clock resource */
|
||||
crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_36);
|
||||
|
||||
/* enable pll */
|
||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
|
||||
|
||||
/* wait till pll is ready */
|
||||
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
|
||||
{
|
||||
}
|
||||
|
||||
/* config ahbclk */
|
||||
crm_ahb_div_set(CRM_AHB_DIV_1);
|
||||
|
||||
/* config apb2clk */
|
||||
crm_apb2_div_set(CRM_APB2_DIV_2);
|
||||
|
||||
/* config apb1clk */
|
||||
crm_apb1_div_set(CRM_APB1_DIV_2);
|
||||
|
||||
/* enable auto step mode */
|
||||
crm_auto_step_mode_enable(TRUE);
|
||||
|
||||
/* select pll as system clock source */
|
||||
crm_sysclk_switch(CRM_SCLK_PLL);
|
||||
|
||||
/* wait till pll is used as system clock source */
|
||||
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
|
||||
{
|
||||
}
|
||||
|
||||
/* disable auto step mode */
|
||||
crm_auto_step_mode_enable(FALSE);
|
||||
|
||||
/* update system_core_clock global variable */
|
||||
system_core_clock_update();
|
||||
}
|
||||
@@ -0,0 +1,147 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f415_int.c
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief main interrupt service routines.
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f415_int.h"
|
||||
#include "at32f415_board.h"
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup 415_I2S_spii2s_switch_halfduplex_polling
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief this function handles nmi exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles hard fault exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when hard fault exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles memory manage exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when memory manage exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles bus fault exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when bus fault exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles usage fault exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* go to infinite loop when usage fault exception occurs */
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles svcall exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles debug monitor exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles pendsv_handler exception.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief this function handles systick handler.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,279 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file main.c
|
||||
* @version v2.0.0
|
||||
* @date 2021-11-26
|
||||
* @brief main program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
#include "at32f415_board.h"
|
||||
#include "at32f415_clock.h"
|
||||
#include <stdio.h>
|
||||
|
||||
/** @addtogroup AT32F415_periph_examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup 415_I2S_spii2s_switch_halfduplex_polling I2S_spii2s_switch_halfduplex_polling
|
||||
* @{
|
||||
*/
|
||||
|
||||
uint16_t i2s1_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C,
|
||||
0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718,
|
||||
0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324,
|
||||
0x2526, 0x2728, 0x292A, 0x2B2C, 0x2D2E, 0x2F30,
|
||||
0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C,
|
||||
0x3D3E, 0x3F40
|
||||
};
|
||||
uint16_t SPI1_buffer_tx[32] = {0x5152, 0x5354, 0x5556, 0x5758, 0x595A, 0x5B5C,
|
||||
0x5D5E, 0x5F60, 0x6162, 0x6364, 0x6566, 0x6768,
|
||||
0x696A, 0x6B6C, 0x6D6E, 0x6F70, 0x7172, 0x7374,
|
||||
0x7576, 0x7778, 0x797A, 0x7B7C, 0x7D7E, 0x7F80,
|
||||
0x8182, 0x8384, 0x8586, 0x8788, 0x898A, 0x8B8C,
|
||||
0x8D8E, 0x8F90
|
||||
};
|
||||
uint16_t i2s2_buffer_rx[32];
|
||||
uint16_t spi2_buffer_rx[32];
|
||||
__IO uint32_t tx_index = 0, rx_index = 0;
|
||||
volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR, transfer_status3 = ERROR;
|
||||
|
||||
static void gpio_config(void);
|
||||
static void spi_config(void);
|
||||
static void i2s_config(i2s_operation_mode_type i2s1_mode, i2s_operation_mode_type i2s2_mode);
|
||||
error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
|
||||
|
||||
/**
|
||||
* @brief buffer_compare function.
|
||||
* @param none
|
||||
* @retval the result of compare
|
||||
*/
|
||||
error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length)
|
||||
{
|
||||
while(buffer_length--)
|
||||
{
|
||||
if(*pbuffer1 != *pbuffer2)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
pbuffer1++;
|
||||
pbuffer2++;
|
||||
}
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief i2s configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void i2s_config(i2s_operation_mode_type i2s1_mode, i2s_operation_mode_type i2s2_mode)
|
||||
{
|
||||
i2s_init_type i2s_init_struct;
|
||||
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
spi_i2s_reset(SPI2);
|
||||
spi_i2s_reset(SPI1);
|
||||
i2s_default_para_init(&i2s_init_struct);
|
||||
i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
|
||||
i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT;
|
||||
i2s_init_struct.mclk_output_enable = FALSE;
|
||||
i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K;
|
||||
i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
|
||||
i2s_init_struct.operation_mode = i2s1_mode;
|
||||
i2s_init(SPI1, &i2s_init_struct);
|
||||
|
||||
i2s_init_struct.operation_mode =i2s2_mode;
|
||||
i2s_init(SPI2, &i2s_init_struct);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief spi configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void spi_config(void)
|
||||
{
|
||||
spi_init_type spi_init_struct;
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
spi_i2s_reset(SPI2);
|
||||
spi_i2s_reset(SPI1);
|
||||
spi_default_para_init(&spi_init_struct);
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX;
|
||||
spi_init_struct.master_slave_mode =SPI_MODE_MASTER;
|
||||
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
|
||||
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
|
||||
spi_init_struct.frame_bit_num = SPI_FRAME_16BIT;
|
||||
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
|
||||
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
|
||||
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
|
||||
spi_init(SPI1, &spi_init_struct);
|
||||
|
||||
spi_init_struct.transmission_mode = SPI_TRANSMIT_SIMPLEX_RX;
|
||||
spi_init_struct.master_slave_mode =SPI_MODE_SLAVE;
|
||||
spi_init(SPI2, &spi_init_struct);
|
||||
|
||||
spi_enable(SPI2, TRUE);
|
||||
spi_enable(SPI1, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief gpio configuration.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void gpio_config(void)
|
||||
{
|
||||
gpio_init_type gpio_initstructure;
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* master ws pin */
|
||||
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_4;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_5;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_initstructure);
|
||||
|
||||
/* master mck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_0;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ws pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave ck pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_13;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
|
||||
/* slave sd pin */
|
||||
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
|
||||
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_initstructure.gpio_pins = GPIO_PINS_15;
|
||||
gpio_init(GPIOB, &gpio_initstructure);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief main function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
__IO uint32_t index = 0;
|
||||
system_clock_config();
|
||||
at32_board_init();
|
||||
at32_led_off(LED2);
|
||||
at32_led_off(LED3);
|
||||
at32_led_off(LED4);
|
||||
gpio_config();
|
||||
i2s_config(I2S_MODE_MASTER_TX, I2S_MODE_SLAVE_RX);
|
||||
i2s_enable(SPI2, TRUE);
|
||||
i2s_enable(SPI1, TRUE);
|
||||
while(rx_index < 32)
|
||||
{
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32);
|
||||
|
||||
tx_index = 0;
|
||||
rx_index = 0;
|
||||
spi_config();
|
||||
while(rx_index < 32)
|
||||
{
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, SPI1_buffer_tx[tx_index++]);
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
spi2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
}
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status2 = buffer_compare(spi2_buffer_rx, SPI1_buffer_tx, 32);
|
||||
|
||||
for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0;
|
||||
tx_index = 0;
|
||||
rx_index = 0;
|
||||
i2s_config(I2S_MODE_SLAVE_TX, I2S_MODE_MASTER_RX);
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]);
|
||||
i2s_enable(SPI1, TRUE);
|
||||
i2s_enable(SPI2, TRUE);
|
||||
while(rx_index < 32)
|
||||
{
|
||||
while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
|
||||
i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
|
||||
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
|
||||
spi_i2s_data_transmit(SPI1, i2s1_buffer_tx[tx_index++]);
|
||||
}
|
||||
|
||||
/* test result:the data check */
|
||||
transfer_status3 = buffer_compare(i2s2_buffer_rx, i2s1_buffer_tx, 32);
|
||||
|
||||
/* test result indicate:if passed ,led2 lights */
|
||||
if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS) && (transfer_status3 == SUCCESS))
|
||||
{
|
||||
at32_led_on(LED2);
|
||||
}
|
||||
else
|
||||
{
|
||||
at32_led_off(LED2);
|
||||
}
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
Reference in New Issue
Block a user