update version to v2.1.2

This commit is contained in:
Artery-MCU
2024-01-25 10:08:14 +08:00
parent 9d554c6b91
commit 0a93017e07
105 changed files with 3447 additions and 242 deletions

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@@ -133,7 +133,7 @@ typedef enum
CRM_I2C1_PERIPH_CLOCK = MAKE_VALUE(0x1C, 21), /*!< i2c1 periph clock */
CRM_I2C2_PERIPH_CLOCK = MAKE_VALUE(0x1C, 22), /*!< i2c2 periph clock */
CRM_CAN1_PERIPH_CLOCK = MAKE_VALUE(0x1C, 25), /*!< can1 periph clock */
CRM_PWC_PERIPH_CLOCK = MAKE_VALUE(0x1C, 28), /*!< pwc periph clock */
CRM_PWC_PERIPH_CLOCK = MAKE_VALUE(0x1C, 28) /*!< pwc periph clock */
} crm_periph_clock_type;
@@ -174,7 +174,7 @@ typedef enum
CRM_I2C1_PERIPH_RESET = MAKE_VALUE(0x10, 21), /*!< i2c1 periph reset */
CRM_I2C2_PERIPH_RESET = MAKE_VALUE(0x10, 22), /*!< i2c2 periph reset */
CRM_CAN1_PERIPH_RESET = MAKE_VALUE(0x10, 25), /*!< can1 periph reset */
CRM_PWC_PERIPH_RESET = MAKE_VALUE(0x10, 28), /*!< pwc periph reset */
CRM_PWC_PERIPH_RESET = MAKE_VALUE(0x10, 28) /*!< pwc periph reset */
} crm_periph_reset_type;
@@ -268,7 +268,7 @@ typedef enum
CRM_PLL_FREF_8M = 2, /*!< pll refrence clock between 7.8125 mhz and 8.33 mhz */
CRM_PLL_FREF_12M = 3, /*!< pll refrence clock between 8.33 mhz and 12.5 mhz */
CRM_PLL_FREF_16M = 4, /*!< pll refrence clock between 15.625 mhz and 20.83 mhz */
CRM_PLL_FREF_25M = 5, /*!< pll refrence clock between 20.83 mhz and 31.255 mhz */
CRM_PLL_FREF_25M = 5 /*!< pll refrence clock between 20.83 mhz and 31.255 mhz */
} crm_pll_fref_type;
/**

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@@ -498,6 +498,7 @@ void dma_data_number_set(dma_channel_type* dmax_channely, uint16_t data_number);
uint16_t dma_data_number_get(dma_channel_type* dmax_channely);
void dma_interrupt_enable(dma_channel_type* dmax_channely, uint32_t dma_int, confirm_state new_state);
flag_status dma_flag_get(uint32_t dmax_flag);
flag_status dma_interrupt_flag_get(uint32_t dmax_flag);
void dma_flag_clear(uint32_t dmax_flag);

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@@ -271,6 +271,52 @@ void dma_flexible_config(dma_type* dma_x, uint8_t flex_channelx, dma_flexible_re
}
}
/**
* @brief get dma interrupt flag
* @param dmax_flag
* this parameter can be one of the following values:
* - DMA1_FDT1_FLAG - DMA1_HDT1_FLAG - DMA1_DTERR1_FLAG
* - DMA1_FDT2_FLAG - DMA1_HDT2_FLAG - DMA1_DTERR2_FLAG
* - DMA1_FDT3_FLAG - DMA1_HDT3_FLAG - DMA1_DTERR3_FLAG
* - DMA1_FDT4_FLAG - DMA1_HDT4_FLAG - DMA1_DTERR4_FLAG
* - DMA1_FDT5_FLAG - DMA1_HDT5_FLAG - DMA1_DTERR5_FLAG
* - DMA1_FDT6_FLAG - DMA1_HDT6_FLAG - DMA1_DTERR6_FLAG
* - DMA1_FDT7_FLAG - DMA1_HDT7_FLAG - DMA1_DTERR7_FLAG
* - DMA2_FDT1_FLAG - DMA2_HDT1_FLAG - DMA2_DTERR1_FLAG
* - DMA2_FDT2_FLAG - DMA2_HDT2_FLAG - DMA2_DTERR2_FLAG
* - DMA2_FDT3_FLAG - DMA2_HDT3_FLAG - DMA2_DTERR3_FLAG
* - DMA2_FDT4_FLAG - DMA2_HDT4_FLAG - DMA2_DTERR4_FLAG
* - DMA2_FDT5_FLAG - DMA2_HDT5_FLAG - DMA2_DTERR5_FLAG
* - DMA2_FDT6_FLAG - DMA2_HDT6_FLAG - DMA2_DTERR6_FLAG
* - DMA2_FDT7_FLAG - DMA2_HDT7_FLAG - DMA2_DTERR7_FLAG
* @retval state of dma flag
*/
flag_status dma_interrupt_flag_get(uint32_t dmax_flag)
{
flag_status status = RESET;
uint32_t temp = 0;
if(dmax_flag > 0x10000000)
{
temp = DMA2->sts;
}
else
{
temp = DMA1->sts;
}
if ((temp & dmax_flag) != (uint16_t)RESET)
{
status = SET;
}
else
{
status = RESET;
}
return status;
}
/**
* @brief get dma flag
* @param dmax_flag

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@@ -167,8 +167,10 @@ flag_status exint_flag_get(uint32_t exint_line)
flag_status exint_interrupt_flag_get(uint32_t exint_line)
{
flag_status status = RESET;
uint32_t exint_flag =0;
exint_flag = EXINT->intsts & exint_line & EXINT->inten;
uint32_t exint_flag = 0;
exint_flag = EXINT->intsts & exint_line;
exint_flag = exint_flag & EXINT->inten;
if((exint_flag != (uint16_t)RESET))
{
status = SET;

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@@ -632,7 +632,7 @@ flag_status i2c_interrupt_flag_get(i2c_type *i2c_x, uint32_t flag)
break;
case I2C_RDBF_FLAG:
case I2C_TDBE_FLAG:
iten = i2c_x->ctrl2_bit.dataien & i2c_x->ctrl2_bit.evtien;
iten = i2c_x->ctrl2_bit.dataien && i2c_x->ctrl2_bit.evtien;
break;
case I2C_BUSERR_FLAG:
case I2C_ARLOST_FLAG: