update version to v2.0.3

This commit is contained in:
Artery-MCU
2022-03-03 19:38:35 +08:00
parent 79c8fdf6b4
commit 07d7347ba4
1063 changed files with 17001 additions and 4410 deletions

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -89,7 +89,7 @@ extern "C" {
*/
#define __AT32F415_LIBRARY_VERSION_MAJOR (0x02) /*!< [31:24] major version */
#define __AT32F415_LIBRARY_VERSION_MIDDLE (0x00) /*!< [23:16] middle version */
#define __AT32F415_LIBRARY_VERSION_MINOR (0x02) /*!< [15:8] minor version */
#define __AT32F415_LIBRARY_VERSION_MINOR (0x03) /*!< [15:8] minor version */
#define __AT32F415_LIBRARY_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __AT32F415_LIBRARY_VERSION ((__AT32F415_LIBRARY_VERSION_MAJOR << 24) | \
(__AT32F415_LIBRARY_VERSION_MIDDLE << 16) | \

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_conf.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 config header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
******************************************************************************
* @file startup_at32f415.s
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415xx devices vector table for gcc toolchain.
* this module performs:
* - set the initial sp

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@@ -1,7 +1,7 @@
;**************************************************************************
;* @file startup_at32f415.s
;* @version v2.0.2
;* @date 2021-12-31
;* @version v2.0.3
;* @date 2022-02-11
;* @brief at32f415 startup file for IAR Systems
;**************************************************************************
;

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@@ -1,7 +1,7 @@
;**************************************************************************
;* @file startup_at32f415.s
;* @version v2.0.2
;* @date 2021-12-31
;* @version v2.0.3
;* @date 2022-02-11
;* @brief at32f415 startup file for keil
;**************************************************************************
;

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file system_at32f415.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for cmsis cortex-m4 system source file
**************************************************************************
* Copyright notice & Disclaimer
@@ -63,6 +63,11 @@ unsigned int system_core_clock = HICK_VALUE; /*!< system clock frequen
*/
void SystemInit (void)
{
/* enable low power mode */
CRM->apb1en_bit.pwcen = 1;
*(volatile uint8_t *)(0x40007050) |= (uint8_t)(0x1 << 2);
CRM->apb1en_bit.pwcen = 0;
/* reset the crm clock configuration to the default reset state(for debug purpose) */
/* set hicken bit */
CRM->ctrl_bit.hicken = TRUE;

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file system_at32f415.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief cmsis cortex-m4 system header file.
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_adc.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 adc header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -76,23 +76,6 @@ extern "C" {
* @{
*/
/**
* @brief adc combine mode type
*/
typedef enum
{
ADC_INDEPENDENT_MODE = 0x00, /*!< independent mode */
ADC_ORDINARY_SMLT_PREEMPT_SMLT_MODE = 0x01, /*!< combined ordinary simultaneous + preempt simultaneous mode */
ADC_ORDINARY_SMLT_PREEMPT_INTERLTRIG_MODE = 0x02, /*!< combined ordinary simultaneous + preempt interleaved trigger mode */
ADC_ORDINARY_SHORTSHIFT_PREEMPT_SMLT_MODE = 0x03, /*!< combined ordinary short shifting + preempt simultaneous mode */
ADC_ORDINARY_LONGSHIFT_PREEMPT_SMLT_MODE = 0x04, /*!< combined ordinary long shifting + preempt simultaneous mode */
ADC_PREEMPT_SMLT_ONLY_MODE = 0x05, /*!< preempt simultaneous mode only */
ADC_ORDINARY_SMLT_ONLY_MODE = 0x06, /*!< ordinary simultaneous mode only */
ADC_ORDINARY_SHORTSHIFT_ONLY_MODE = 0x07, /*!< ordinary short shifting mode only */
ADC_ORDINARY_LONGSHIFT_ONLY_MODE = 0x08, /*!< slow interleaved mode only */
ADC_PREEMPT_INTERLTRIG_ONLY_MODE = 0x09 /*!< alternate trigger mode only */
} adc_combine_mode_type;
/**
* @brief adc data align type
*/
@@ -253,8 +236,7 @@ typedef struct
__IO uint32_t ocpen : 1; /* [11] */
__IO uint32_t pcpen : 1; /* [12] */
__IO uint32_t ocpcnt : 3; /* [15:13] */
__IO uint32_t mssel : 4; /* [19:16] */
__IO uint32_t reserved1 : 2; /* [21:20] */
__IO uint32_t reserved1 : 6; /* [21:16] */
__IO uint32_t pcvmen : 1; /* [22] */
__IO uint32_t ocvmen : 1; /* [23] */
__IO uint32_t reserved2 : 8; /* [31:24] */
@@ -560,7 +542,6 @@ typedef struct
void adc_reset(adc_type *adc_x);
void adc_enable(adc_type *adc_x, confirm_state new_state);
void adc_combine_mode_select(adc_combine_mode_type combine_mode);
void adc_base_default_para_init(adc_base_config_type *adc_base_struct);
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct);
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state);
@@ -588,7 +569,6 @@ flag_status adc_ordinary_software_trigger_status_get(adc_type *adc_x);
void adc_preempt_software_trigger_enable(adc_type *adc_x, confirm_state new_state);
flag_status adc_preempt_software_trigger_status_get(adc_type *adc_x);
uint16_t adc_ordinary_conversion_data_get(adc_type *adc_x);
uint32_t adc_combine_ordinary_conversion_data_get(void);
uint16_t adc_preempt_conversion_data_get(adc_type *adc_x, adc_preempt_channel_type adc_preempt_channel);
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag);
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag);

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_can.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 can header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_cmp.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 cmp header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_crc.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 crc header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_crm.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 crm header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -57,6 +57,7 @@ extern "C" {
#define CRM_PLL_STABLE_FLAG MAKE_VALUE(0x00, 25) /*!< phase locking loop stable flag */
#define CRM_LEXT_STABLE_FLAG MAKE_VALUE(0x20, 1) /*!< low speed external crystal stable flag */
#define CRM_LICK_STABLE_FLAG MAKE_VALUE(0x24, 1) /*!< low speed internal clock stable flag */
#define CRM_ALL_RESET_FLAG MAKE_VALUE(0x24, 24) /*!< all reset flag */
#define CRM_NRST_RESET_FLAG MAKE_VALUE(0x24, 26) /*!< nrst pin reset flag */
#define CRM_POR_RESET_FLAG MAKE_VALUE(0x24, 27) /*!< power on reset flag */
#define CRM_SW_RESET_FLAG MAKE_VALUE(0x24, 28) /*!< software reset flag */

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_debug.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 debug header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -48,7 +48,7 @@ extern "C" {
* @{
*/
#define DEBUG_SLEEP ((uint32_t)0x00000001) /*!< debug sleep mode */
#define DEBUG_STOP ((uint32_t)0x00000002) /*!< debug deepsleep mode */
#define DEBUG_DEEPSLEEP ((uint32_t)0x00000002) /*!< debug deepsleep mode */
#define DEBUG_STANDBY ((uint32_t)0x00000004) /*!< debug standby mode */
#define DEBUG_WDT_PAUSE ((uint32_t)0x00000100) /*!< debug watchdog timer pause */
#define DEBUG_WWDT_PAUSE ((uint32_t)0x00000200) /*!< debug window watchdog timer pause */
@@ -111,18 +111,18 @@ typedef struct
__IO uint32_t can1_pause : 1;/* [14] */
__IO uint32_t i2c1_smbus_timeout : 1;/* [15] */
__IO uint32_t i2c2_smbus_timeout : 1;/* [16] */
__IO uint32_t tim8_pause : 1;/* [17] */
__IO uint32_t tim5_pause : 1;/* [18] */
__IO uint32_t tim6_pause : 1;/* [19] */
__IO uint32_t tim7_pause : 1;/* [20] */
__IO uint32_t tmr8_pause : 1;/* [17] */
__IO uint32_t tmr5_pause : 1;/* [18] */
__IO uint32_t tmr6_pause : 1;/* [19] */
__IO uint32_t tmr7_pause : 1;/* [20] */
__IO uint32_t can2_pause : 1;/* [21] */
__IO uint32_t reserved2 : 3;/* [24:22] */
__IO uint32_t tim12_pause : 1;/* [25] */
__IO uint32_t tim13_pause : 1;/* [26] */
__IO uint32_t tim14_pause : 1;/* [27] */
__IO uint32_t tim9_pause : 1;/* [28] */
__IO uint32_t tim10_pause : 1;/* [29] */
__IO uint32_t tim11_pause : 1;/* [30] */
__IO uint32_t tmr12_pause : 1;/* [25] */
__IO uint32_t tmr13_pause : 1;/* [26] */
__IO uint32_t tmr14_pause : 1;/* [27] */
__IO uint32_t tmr9_pause : 1;/* [28] */
__IO uint32_t tmr10_pause : 1;/* [29] */
__IO uint32_t tmr11_pause : 1;/* [30] */
__IO uint32_t i2c3_smbus_timeout : 1;/* [31] */
} ctrl_bit;
};

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_def.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 macros header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_dma.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 dma header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_ertc.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 ertc header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_exint.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 exint header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_flash.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 flash header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_gpio.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 gpio header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_i2c.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 i2c header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_misc.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 misc header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -99,8 +99,8 @@ typedef enum
*/
void nvic_system_reset(void);
void nvic_irq_enable(uint32_t irqn, uint32_t preempt_priority, uint32_t sub_priority);
void nvic_irq_disable(uint32_t irqn);
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority);
void nvic_irq_disable(IRQn_Type irqn);
void nvic_priority_group_config(nvic_priority_group_type priority_group);
void nvic_vector_table_set(uint32_t base, uint32_t offset);
void nvic_lowpower_mode_config(nvic_lowpower_mode_type lp_mode, confirm_state new_state);

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_pwc.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 pwc header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_sdio.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 sdio header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_spi.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 spi header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_tmr.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 tmr header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -174,8 +174,8 @@ typedef enum
TMR_OUTPUT_CONTROL_HIGH = 0x01, /*!< tmr output control mode high */
TMR_OUTPUT_CONTROL_LOW = 0x02, /*!< tmr output control mode low */
TMR_OUTPUT_CONTROL_SWITCH = 0x03, /*!< tmr output control mode switch */
TMR_OUTPUT_CONTROL_FORCE_HIGH = 0x04, /*!< tmr output control mode force high */
TMR_OUTPUT_CONTROL_FORCE_LOW = 0x05, /*!< tmr output control mode force low */
TMR_OUTPUT_CONTROL_FORCE_LOW = 0x04, /*!< tmr output control mode force low */
TMR_OUTPUT_CONTROL_FORCE_HIGH = 0x05, /*!< tmr output control mode force high */
TMR_OUTPUT_CONTROL_PWM_MODE_A = 0x06, /*!< tmr output control mode pwm a */
TMR_OUTPUT_CONTROL_PWM_MODE_B = 0x07 /*!< tmr output control mode pwm b */
} tmr_output_control_mode_type;

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_usart.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 usart header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_usb.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 usb header file
**************************************************************************
* Copyright notice & Disclaimer
@@ -1404,7 +1404,7 @@ void usb_hc_enable(otg_global_type *usbx,
uint8_t ept_num,
uint8_t dev_address,
uint8_t type,
uint8_t maxpacket,
uint16_t maxpacket,
uint8_t speed);
uint32_t usb_hch_read_interrupt(otg_global_type *usbx);
void usb_host_disable(otg_global_type *usbx);

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_wdt.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 wdt header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_wwdt.h
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief at32f415 wwdt header file
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_adc.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the adc firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -72,27 +72,6 @@ void adc_enable(adc_type *adc_x, confirm_state new_state)
adc_x->ctrl2_bit.adcen = new_state;
}
/**
* @brief select combine mode of the specified adc peripheral.
* @param combine_mode: select the adc combine mode.
* this parameter can be one of the following values:
* - ADC_INDEPENDENT_MODE
* - ADC_ORDINARY_SMLT_PREEMPT_SMLT_MODE
* - ADC_ORDINARY_SMLT_PREEMPT_INTERLTRIG_MODE
* - ADC_ORDINARY_SHORTSHIFT_PREEMPT_SMLT_MODE
* - ADC_ORDINARY_LONGSHIFT_PREEMPT_SMLT_MODE
* - ADC_PREEMPT_SMLT_ONLY_MODE
* - ADC_ORDINARY_SMLT_ONLY_MODE
* - ADC_ORDINARY_SHORTSHIFT_ONLY_MODE
* - ADC_ORDINARY_LONGSHIFT_ONLY_MODE
* - ADC_PREEMPT_INTERLTRIG_ONLY_MODE
* @retval none
*/
void adc_combine_mode_select(adc_combine_mode_type combine_mode)
{
ADC1->ctrl1_bit.mssel = combine_mode;
}
/**
* @brief adc base default para init.
* @param sequence_mode: set the state of adc sequence mode.
@@ -821,15 +800,6 @@ uint16_t adc_ordinary_conversion_data_get(adc_type *adc_x)
return (uint16_t)(adc_x->odt_bit.odt);
}
/**
* @brief return the last conversion data for ordinary channel of combine adc.
* @retval the last conversion data for ordinary channel.
*/
uint32_t adc_combine_ordinary_conversion_data_get(void)
{
return (uint32_t)(ADC1->odt);
}
/**
* @brief return the conversion data for selection preempt channel of the specified adc peripheral.
* @param adc_x: select the adc peripheral.

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_can.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the can firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_cmp.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the gpio firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_crc.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the crc firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_crm.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the crm firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -321,6 +321,7 @@ void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_sta
* - CRM_WDT_RESET_FLAG
* - CRM_WWDT_RESET_FLAG
* - CRM_LOWPOWER_RESET_FLAG
* - CRM_ALL_RESET_FLAG
* interrupt flag:
* - CRM_LICK_READY_INT_FLAG
* - CRM_LEXT_READY_INT_FLAG
@@ -340,6 +341,7 @@ void crm_flag_clear(uint32_t flag)
case CRM_WDT_RESET_FLAG:
case CRM_WWDT_RESET_FLAG:
case CRM_LOWPOWER_RESET_FLAG:
case CRM_ALL_RESET_FLAG:
CRM->ctrlsts_bit.rstfc = TRUE;
break;
case CRM_LICK_READY_INT_FLAG:

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_debug.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the debug firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -55,7 +55,7 @@ uint32_t debug_device_id_get(void)
* @param periph_debug_mode
* this parameter can be any combination of the following values:
- DEBUG_SLEEP
- DEBUG_STOP
- DEBUG_DEEPSLEEP
- DEBUG_STANDBY
- DEBUG_WDT_PAUSE
- DEBUG_WWDT_PAUSE

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_dma.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the dma firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_ertc.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the ertc firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_exint.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the exint firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_flash.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the flash firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_gpio.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the gpio firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_i2c.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the i2c firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_misc.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the misc firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -61,16 +61,16 @@ void nvic_system_reset(void)
* @param sub_priority: subpriority value (starting from 0)
* @retval none
*/
void nvic_irq_enable(uint32_t irqn, uint32_t preempt_priority, uint32_t sub_priority)
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
{
uint32_t temp_priority = 0;
/* encode priority */
temp_priority = NVIC_EncodePriority(NVIC_GetPriorityGrouping(), preempt_priority, sub_priority);
/* set priority */
NVIC_SetPriority((IRQn_Type)irqn, temp_priority);
NVIC_SetPriority(irqn, temp_priority);
/* enable irqn */
NVIC_EnableIRQ((IRQn_Type)irqn);
NVIC_EnableIRQ(irqn);
}
/**
@@ -78,9 +78,9 @@ void nvic_irq_enable(uint32_t irqn, uint32_t preempt_priority, uint32_t sub_prio
* @param irqn (IRQn_Type number)
* @retval none
*/
void nvic_irq_disable(uint32_t irqn)
void nvic_irq_disable(IRQn_Type irqn)
{
NVIC_DisableIRQ((IRQn_Type)irqn);
NVIC_DisableIRQ(irqn);
}
/**

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_pwc.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the pwc firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_sdio.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the sdio firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_spi.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the spi firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_tmr.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the tmr firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_usart.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the usart firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_usb.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the usb firmware library
**************************************************************************
* Copyright notice & Disclaimer
@@ -893,7 +893,7 @@ void usb_hc_enable(otg_global_type *usbx,
uint8_t ept_num,
uint8_t dev_address,
uint8_t type,
uint8_t maxpacket,
uint16_t maxpacket,
uint8_t speed)
{
otg_hchannel_type *hch = USB_CHL(usbx, chn);

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_wdt.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the wdt firmware library
**************************************************************************
* Copyright notice & Disclaimer

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@@ -1,8 +1,8 @@
/**
**************************************************************************
* @file at32f415_wwdt.c
* @version v2.0.2
* @date 2021-12-31
* @version v2.0.3
* @date 2022-02-11
* @brief contains all the functions for the wwdt firmware library
**************************************************************************
* Copyright notice & Disclaimer