2021-12-14 13:34:31 +08:00
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/**
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**************************************************************************
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* @file at32f415_cmp.c
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2022-06-30 17:16:46 +08:00
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* @version v2.0.6
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* @date 2022-06-28
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2021-12-14 13:34:31 +08:00
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* @brief contains all the functions for the gpio firmware library
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**************************************************************************
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* Copyright notice & Disclaimer
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*
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2022-04-11 19:32:28 +08:00
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* The software Board Support Package (BSP) that is made available to
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* download from Artery official website is the copyrighted work of Artery.
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* Artery authorizes customers to use, copy, and distribute the BSP
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* software and its related documentation for the purpose of design and
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* development in conjunction with Artery microcontrollers. Use of the
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2021-12-14 13:34:31 +08:00
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* software is governed by this copyright notice and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
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* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
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* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
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* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
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* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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*
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**************************************************************************
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*/
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#include "at32f415_conf.h"
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/** @addtogroup AT32F415_periph_driver
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* @{
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*/
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/** @defgroup CMP
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* @brief CMP driver modules
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* @{
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*/
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2022-04-11 19:32:28 +08:00
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2021-12-14 13:34:31 +08:00
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#ifdef CMP_MODULE_ENABLED
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/** @defgroup CMP_private_functions
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* @{
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*/
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#define CMP_CTRLSTS1_CLEAR_MASK ((uint32_t)0x00039C7C)
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#define CMP_INPINPUT_CLEAR_MASK ((uint32_t)0x00000180)
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2022-04-11 19:32:28 +08:00
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#define CMP_HIGH_PULSE_CLEAR_MASK ((uint16_t)0x003F)
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2021-12-14 13:34:31 +08:00
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#define CMP_LOW_PULSE_CLEAR_MASK ((uint16_t)0x003F)
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2022-04-11 19:32:28 +08:00
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/**
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2021-12-14 13:34:31 +08:00
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* @brief reset the cmp register
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* @param none
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* @retval none
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*/
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void cmp_reset(void)
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{
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crm_periph_reset(CRM_CMP_PERIPH_RESET, TRUE);
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crm_periph_reset(CRM_CMP_PERIPH_RESET, FALSE);
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}
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2022-04-11 19:32:28 +08:00
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/**
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2021-12-14 13:34:31 +08:00
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* @brief initialize the cmp peripheral
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* @param cmp_sel: to select the cmp peripheral
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* this parameter only can be CMP1_SELECTION
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* @param cmp_init_struct: pointer to cmp init structure
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* @retval none
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*/
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void cmp_init(cmp_sel_type cmp_sel, cmp_init_type* cmp_init_struct)
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{
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if(cmp_sel == CMP1_SELECTION)
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{
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CMP->ctrlsts2_bit.cmp1ninvsel = cmp_init_struct->cmp_non_inverting;
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CMP->ctrlsts1_bit.cmp1invsel = cmp_init_struct->cmp_inverting;
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CMP->ctrlsts1_bit.cmp1ssel = cmp_init_struct->cmp_speed;
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CMP->ctrlsts1_bit.cmp1tag = cmp_init_struct->cmp_output;
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CMP->ctrlsts1_bit.cmp1p = cmp_init_struct->cmp_polarity;
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CMP->ctrlsts1_bit.cmp1hyst = cmp_init_struct->cmp_hysteresis;
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}
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else
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{
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CMP->ctrlsts2_bit.cmp2ninvsel = cmp_init_struct->cmp_non_inverting;
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CMP->ctrlsts1_bit.cmp2invsel = cmp_init_struct->cmp_inverting;
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CMP->ctrlsts1_bit.cmp2ssel = cmp_init_struct->cmp_speed;
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CMP->ctrlsts1_bit.cmp2tag = cmp_init_struct->cmp_output;
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CMP->ctrlsts1_bit.cmp2p = cmp_init_struct->cmp_polarity;
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CMP->ctrlsts1_bit.cmp2hyst = cmp_init_struct->cmp_hysteresis;
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}
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}
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/**
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* @brief fill each cmp_init_type member with its default value.
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* @param cmp_init_type : pointer to a cmp_init_type structure
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* which will be initialized.
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* @retval none
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*/
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void cmp_default_para_init(cmp_init_type *cmp_init_struct)
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{
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/* reset cmp init structure parameters values */
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2022-06-30 17:16:46 +08:00
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cmp_init_struct->cmp_non_inverting = CMP_NON_INVERTING_PA1_PA3;
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2021-12-14 13:34:31 +08:00
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cmp_init_struct->cmp_inverting = CMP_INVERTING_1_4VREFINT;
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cmp_init_struct->cmp_speed = CMP_SPEED_FAST;
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cmp_init_struct->cmp_output = CMP_OUTPUT_NONE;
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cmp_init_struct->cmp_polarity = CMP_POL_NON_INVERTING;
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cmp_init_struct->cmp_hysteresis = CMP_HYSTERESIS_NONE;
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}
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/**
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* @brief enable or disable cmp
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* @param cmp_sel: to select the cmp peripheral
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* this parameter only can be CMP1_SELECTION.
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* @param new_state (TRUE or FALSE)
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* @retval none
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*/
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void cmp_enable(cmp_sel_type cmp_sel, confirm_state new_state)
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{
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/* cmp enable */
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if(cmp_sel == CMP1_SELECTION)
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{
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CMP->ctrlsts1_bit.cmp1en = new_state;
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}
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else
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{
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CMP->ctrlsts1_bit.cmp2en = new_state;
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}
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}
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/**
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* @brief enable or disable cmp input shift
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* @param new_state (TRUE or FALSE)
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* @retval none
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*/
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void cmp_input_shift_enable(confirm_state new_state)
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{
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CMP->ctrlsts1_bit.cmp1is = new_state;
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}
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/**
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* @brief get cmp output value
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* @param cmp_sel: to select the cmp peripheral
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* this parameter only can be CMP1_SELECTION.
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* @retval cmp output value
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*/
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uint32_t cmp_output_value_get(cmp_sel_type cmp_sel)
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{
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uint32_t cmpout = 0x0;
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if(cmp_sel == CMP1_SELECTION)
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{
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cmpout = CMP->ctrlsts1_bit.cmp1value;
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}
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else
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{
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cmpout = CMP->ctrlsts1_bit.cmp2value;
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}
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/* return the comparator output level */
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return (uint32_t)(cmpout);
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}
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/**
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* @brief enable cmp write protect
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* @param cmp_sel: to select the cmp peripheral
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* this parameter only can be CMP1_SELECTION.
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* @retval none
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*/
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void cmp_write_protect_enable(cmp_sel_type cmp_sel)
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{
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if(cmp_sel == CMP1_SELECTION)
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{
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CMP->ctrlsts1_bit.cmp1wp = TRUE;
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}
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else
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{
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CMP->ctrlsts1_bit.cmp2wp = TRUE;
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}
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}
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2022-06-30 17:16:46 +08:00
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/**
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* @brief enable or disable double comparator mode
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* @param new_state (TRUE or FALSE)
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* @retval none
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*/
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void cmp_double_mode_enable(confirm_state new_state)
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{
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CMP->ctrlsts1_bit.dcmpen = new_state;
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}
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2021-12-14 13:34:31 +08:00
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/**
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* @}
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*/
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#endif
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/**
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* @}
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*/
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/**
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* @}
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*/
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